1311361 九、發明說明 【發明所屬之技術領域】 '本發明係有關於一種半導體晶片封裝構造，特別是有關 於種具有散熱片（heat slug)之半導體晶片封裝構造。 【先前技術】 積體電路（或稱晶片）封裝技術逐漸成為發展更高效能 之封裝積體電路的限制因素。封裝構造的設計者一直掙扎於 追趕接腳數（pin e〇unt)的增加、尺寸限制、低側面接著限 制（profUe mounting constraint)以及其他對於封裝以及接著 積體電路逐漸發展㈣要求。目前常料—種封裝以及封裝 構造接著的方式，係為球格陣列封裝構造， 此外，隨著晶片功能的增加，其會耗更多的能量而產生 必須移除之廢熱（避免積體電路或晶片因過熱而損壞）。因 此，在大部分的情況下，大都雷 “要利用散熱件來消散晶片所 產生之廢熱。 第1A圖與第1B圖所示為一種 裡 > 用之散熱片球格陣列 (Heat Slug BGA)封裝構造 1〇〇，里 共王要包含一設於基板11〇 上的半導體晶片120、一散埶片ηη ιν ^ 土板11ϋ 月文熟片130以及一封膠體14〇。該 半導體晶片12 0係電性連接於兮其此# 思操於該基板。該散熱片130传用以 減少降低該習用封裝構造1〇〇 糸用 resistance) 〇 〇〇 之熱阻抗（thermal 該散熱片13 0 —般係以導埶雷 …、電佳的材料（例如金屬） 製成，但封膠體14〇 —般是以絕 金屬 貝I例如裱氧化合物塑 1311361 料）製成。因此，該散熱片130與封膠體140間的結合力相 當弱，並且其間的熱膨脹係數差異很大。當該習用封裝構造 1〇〇受到溫度變化時，在散熱片與封膠體間的介面就會因熱 膨脹係數不一致（CTE mismatch)而有應力產生。該應力會’導 致該金屬/塑膠介面層裂（delaminati〇n)(j而當該金屬/塑膠介 面產生層裂時，週遭的水分就會經由該封膠體渗透積聚到該 、裂之區域，而一旦水分積聚在封膠體中，則遇到溫度快速 增加時，積聚的水分會瞬間蒸發並且膨脹，因而在該層裂之 區域產生-内部壓力而導致附近之封膠體破裂（⑽⑻。該封 膠體破裂常見於當前述之習用裝置藉由紅外線BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a semiconductor wafer package structure, and more particularly to a semiconductor wafer package structure having a heat slug. [Prior Art] Integrated circuit (or wafer) packaging technology has gradually become a limiting factor in the development of higher performance package integrated circuits. Designers of package construction have struggled with the increase in pin-up pin size, size limitations, profUe mounting constraints, and other requirements for package and subsequent integrated circuit development. At present, it is common to package and package the next way, which is a ball grid array package structure. In addition, as the function of the chip increases, it consumes more energy and generates waste heat that must be removed (avoiding integrated circuits or The wafer is damaged due to overheating). Therefore, in most cases, the majority of mines "use heat sinks to dissipate the waste heat generated by the wafers. Figures 1A and 1B show a heat sink grid array (Heat Slug BGA) In the package structure, the semiconductor chip 120 includes a semiconductor wafer 120 disposed on the substrate 11 , a entangled sheet ηη ιν ^ soil plate 11 ϋ 熟 熟 130 130 and a colloid 14 〇. The semiconductor wafer 12 0 Electrically connected to the substrate, the heat sink 130 is used to reduce the thermal resistance of the conventional package structure (thermal resistance) (thermal heat sink 13 0 It is made of a material such as a conductive material, such as a metal, but the sealant 14 is generally made of a metal shell I, such as a silicone compound 1311361. Therefore, the heat sink 130 and the seal The bonding force between the colloids 140 is rather weak, and the coefficient of thermal expansion therebetween is very different. When the conventional package structure is subjected to temperature change, the interface between the heat sink and the encapsulant is inconsistent due to the coefficient of thermal expansion (CTE mismatch). And there is stress This stress will cause the metal/plastic interface to crack (j and when the metal/plastic interface is cracked, the surrounding water will accumulate through the sealant to the cracked area. Once the moisture accumulates in the sealant, when the temperature increases rapidly, the accumulated moisture will evaporate and expand instantaneously, and thus - internal pressure is generated in the region of the split to cause the sealant in the vicinity to break ((10)(8). Colloidal cracking is common in the aforementioned conventional devices by infrared
，焊接至一外部印刷電路板時。 （R 、因此，習用之散熱片130 一般設有小凹部（⑴呵⑼、 用以增加散熱片與封膠體間的接觸面積，藉此增加該散熱片 130與封膠體14G間的結合力1而，由於該些小凹部130a :ί I 口寬底部窄的剖面，因此其無法穩固地將散熱片固定 在封膠體上。 【發明内容】 、生 纟發明之主要目的係提供__種半導體晶片封裝構 U克服或至少改善前述先前技術之問題。 ^用於本發明之半導體晶片封裝構造主要包含設於一 : I導體曰曰片與散熱片以及一封膠體。該封膠體係利 用::的塑膠模塑法（例如傳遞模 一 形成在該半導體晶片、該散熱片以及至少該基板之一二 1311361 上，使得該散熱片之上表面至少 藉此獲得較佳之散熱效能。 以暴露於該封膠體’ 且有：述以及其他目的，根據本發明之散熱片之下表面 八複數個凹部，每一該些凹部具有口、 =該:部與該開口。值得注意的是，該側壁 =面之夾角係小於90。，使得該些凹部具有開口窄底； =的箱。較佳地，該些凹部之開口之寬度係小於底部之 度。由於該些凹部具有開口窄底部寬的剖面，因此，在硬化 (curing)製程中塑料（mGlding eQmpQund)會收縮並且會__ 些凹部之側壁施以一端緊張力，藉此該散熱片會被硬^ 塑料固定在位置上。 在另實施例中，該散熱片之下表面具有複數個延伸方 向不同之第-凹部與第二凹部（取代前述之凹部），使得該 封膠體具有複數個第一突出部分與第二突出部分別形成在 該些第一凹部與第二凹部之内，且該些第一突出部之延伸方 向係與該些第二突出部之延伸方向不同，藉此，在硬化 _ (cunng)製程中，塑料（molding compound)會收縮而使得該第 一突出部分與第二突出部分一起夾持住該散熱片。較佳地， 該些第一凹部之延伸方向與該些第二凹部之延伸方向之間 的夾角Θ2 (亦即該些第一突出部之延伸方向與該些第二突 出部之延伸方向之間的夾角）係小於90。，藉此提供更佳的 夾持效果。 【實施方式】 8 1311361 、雖然本發明可表現為不同形式之實施例，但附圖所示者 ’ 及於中說明者係為本發明之較佳實施f列，並言青了解本文 日尋示者係考1為本發明之一範例，且並非意圖用以將本發 月限制於圖示及/或所描述之特定實施例中。本發明之圖示 1用以楚繪示實施例的相關特冑，而並不—定按比例繪 ^某些尺度與其他相關尺度相比已經被誇張或是簡化，以 ^供更清楚的描述和本發明的理解。 第2 A-2B圖所示為根據本發明一實施例之半導體晶片 籲封裝構造200,其主要包含設於一基板21〇上之半導體晶片 22〇與散熱片230以及一封膠體24〇。該散熱片23〇可以是 金屬片，用於幫助半導體晶片散熱至封裝構造外部。該散 熱片係被彎折而形成一設於該半導體晶片22〇上方之中間 部分以及一固設於該基板21〇上之周邊部分。 值得注意的是，該散熱片230之下表面具有複數個凹部 232(參見第2B圖）’每一該些凹部232具有一開口 232a、 一底部23 2b以及一側壁23 2c連接該底部232b與該開口 • 232a。值得注意的是，該側壁232c與該散熱片下表面之夾 角Θ i係小於90。，使得該些凹部232具有開口窄底部寬的 刮面。較佳地，該些凹部232之開口 232a之寬度di係大於 ‘底部232b之寬度d2。 該封膠體240係利用習知的塑膠模塑法（例如傳遞模塑 法（transfer molding))形成在該半導體晶片22〇、該散熱片 230以及至少該基板210之一部分上，使得該散熱片2^之 上表面至少有部分係暴露於該封膠體240，藉此獲彳寻較彳圭< 1311361 散熱效能。為了更進一步提高該半導體封裝構造2〇〇的散熱 效率，亦可在該散熱片2 3 〇裸露之上表面加設背鰭式散熱件 或是風扇。 值得注意的是，由於該些凹部232具有開口窄底部寬的 剖面，因此，在硬化（CUring)製程中塑料（m〇Ming c〇mp〇und) 會收縮並且會對該些凹部232之側壁232c施以—繃緊張 力，藉此S亥散熱片23 0會被硬化後之塑料固定在位置上。When soldering to an external printed circuit board. (R, therefore, the conventional heat sink 130 is generally provided with a small recess ((1) (9) for increasing the contact area between the heat sink and the sealant, thereby increasing the bonding force 1 between the heat sink 130 and the sealant 14G. Because the small recesses 130a have a narrow cross section at the bottom of the mouth, the heat sink cannot be firmly fixed on the sealant. [Invention] The main purpose of the invention is to provide a semiconductor wafer package. U overcomes or at least ameliorates the problems of the prior art described above. ^ The semiconductor chip package structure used in the present invention mainly comprises: I-conductor chip and heat sink and a gel. The glue system utilizes:: a plastic mold a molding method (for example, a transfer mold is formed on the semiconductor wafer, the heat sink, and at least one of the substrates 2131361, such that the upper surface of the heat sink at least thereby obtains a better heat dissipation performance. To be exposed to the sealant' There are: and other objects, the plurality of recesses on the lower surface of the heat sink according to the present invention, each of the recesses having a mouth, a: portion and the opening. It is worth noting that The side wall = the angle of the face is less than 90. The recesses have a narrow opening; = the box. Preferably, the width of the openings of the recesses is less than the degree of the bottom. Since the recesses have an open narrow bottom width The profile, therefore, the plastic (mGlding eQmpQund) will shrink during the curing process and the sidewalls of the recesses will be tensioned at one end, whereby the heat sink will be held in place by the hard plastic. In an embodiment, the lower surface of the heat sink has a plurality of first recesses and second recesses (instead of the recesses) extending in different directions, so that the seal body has a plurality of first protruding portions and second protruding portions respectively formed on The first concave portion and the second concave portion are located, and the extending directions of the first protruding portions are different from the extending directions of the second protruding portions, thereby, in the curing process, plastic The compound is contracted such that the first protruding portion and the second protruding portion together hold the heat sink. Preferably, between the extending direction of the first concave portion and the extending direction of the second concave portions The corner Θ 2 (that is, the angle between the extending direction of the first protruding portions and the extending direction of the second protruding portions) is less than 90. Thereby, a better clamping effect is provided. [Embodiment] 8 1311361 The present invention may be embodied in various forms, but the figures shown in the drawings are the preferred embodiment of the present invention, and An example of the invention is not intended to limit the present invention to the particular embodiments illustrated and/or described. Figure 1 of the present invention is used to illustrate the features of the embodiments, and is not - Proportional drawing ^ Certain scales have been exaggerated or simplified compared to other related scales to provide a clearer description and an understanding of the present invention. 2A-2B shows a semiconductor wafer package structure 200 according to an embodiment of the present invention, which mainly includes a semiconductor wafer 22, a heat sink 230, and a colloid 24, which are disposed on a substrate 21A. The heat sink 23A may be a metal sheet for assisting in dissipating heat from the semiconductor wafer to the outside of the package structure. The heat sink is bent to form an intermediate portion disposed above the semiconductor wafer 22 and a peripheral portion fixed to the substrate 21A. It should be noted that the lower surface of the heat sink 230 has a plurality of recesses 232 (see FIG. 2B). Each of the recesses 232 has an opening 232a, a bottom portion 23 2b, and a side wall 23 2c connecting the bottom portion 232b. Opening • 232a. It should be noted that the angle Θ i between the side wall 232c and the lower surface of the heat sink is less than 90. The recesses 232 have a scraping surface with a narrow bottom and a wide opening. Preferably, the width di of the opening 232a of the recesses 232 is greater than the width d2 of the bottom 232b. The encapsulant 240 is formed on the semiconductor wafer 22, the heat sink 230, and at least a portion of the substrate 210 by a conventional plastic molding method (for example, transfer molding) such that the heat sink 2 ^ At least part of the upper surface is exposed to the encapsulant 240, thereby obtaining the heat dissipation performance of the < 1311361. In order to further improve the heat dissipation efficiency of the semiconductor package structure 2, a fin fin heat sink or a fan may be added to the surface of the heat sink 2 3 〇 exposed. It should be noted that since the recesses 232 have a narrow bottom wide section, the plastic (m〇Ming c〇mp〇und) will shrink and the sidewall 232c of the recesses 232 will be formed in the CUring process. Applying - tension, whereby the S-Heat Heatsink 30 will be fixed in place by the hardened plastic.
第3圖所示為根據本發明另一實施例之半導體晶片封 震構造300。除了該散熱片23〇之下表面具有複數個第一凹 部234與第二凹部236(參見第3圖)每一該些第一凹部叫 與該些第二凹部236之剖面輪廓具有一開口、兩側邊以及連 接該兩側邊之底面，該第一凹部234具有一由底面中心點延 申至開口中〜之第一延伸方向，該第二凹部具有一由底 面中心點延伸至開口中心之第二延伸方向，其中第-延伸方 向係與第二延伸方向不同’該封膠體240具有複數個第 =24:與第二突出部分-別形成在該些第一凹部234 ” 凹°卩236之内，其中每一該些第一凹部與該些第二凹 兩側邊以及連接該兩側邊之底面；開：與 係與該些第二突㈣2:6=一突出部244之延伸方向 (―胸中，峨缚 向不同，藉此，在硬化 一突出P / 。啊咖）會收縮而使得該第 犬出h 244與第二突出部分24 弟 230。較佳地，該 起㈣住錢熱片 部236之延伸方向―二：/ 34之延伸方向與該些第二凹 向之間的夾角Θ 2(亦即該些第一突出部244 10 1311361 之延伸方向與該歧第-穿屮却> J丹χ —乐一犬出邛246之延伸方向之間的夾角） 係小於90。，藉此提供更佳的夾持效果。 請再參見第，該基板21{)可以1有機基板，其 係由一玻璃纖維強化型BT ( bi_leimide七)樹脂或 FR-4玻璃纖維強化型環氧樹脂之蕊層所製成。該基板21〇 亦可以是複數層的陶瓷基板。 該半導體晶片220可藉由—膠層222(例如含銀之環氧 樹月曰旨或非導電膠層）貼附於基板21()上。如圖所示，該半導 片220係藉由複數條銲線（例如金線)連接於基板 上，該些金線224係作為電輸入輸出連結至基板21〇上 導電線路或接墊（未示於圖中）。或者，該半導體晶片， 亦可藉由複數個錫球（SGlderBall)以覆晶接合的方式連接 21〇。該些錫球可利用任何已知的凸塊（Bu叫㈣製 程形成在該半導體晶片220之正面（aetive surfaee)上。 β可以理解的是，根據本發明之半㈣晶片封裝構造可以 :球格陣列封裝構造。在此實施例中，前述之基板⑴ 表面可設有複數㈣列排列之錫球銲墊（未示於圖中）。 球料係藉由設於該練2iq上的導電線路以及 形：於：線（或錫球）與晶片連接。在將複數個錫球250 ^藉由:錫^銲墊上之後，本發明之半導體晶片封裝構造可 , 仃一加熱步驟融化（回銲）該錫球而安裝於_外1 印刷電路板上。 於外邛 以限月已以數個較佳實施例揭露如上，然、其並非用 .^ ，任何熟習此技藝者，在不脫離本發明之精神 〇祀内，當可作各種之更動與潤飾，因此本發明之保護範 1311361 圍當視後附之申請專利範圍所界定者為準 【圖式簡單說明】 為讓本發明之上述和其他 易懂，下文特舉一較佳實施例 明如下： 目的、特徵、和優點能更明顯 並配合所附圖式，作詳細說 第1A圖係繪示習用散埶 .,^ ^ Λ 用政熟片球格陣列（Heat Slug B(JA) 封裝構造的部分剖面示意圖；Figure 3 shows a semiconductor wafer sealing construction 300 in accordance with another embodiment of the present invention. The lower surface of the heat sink 23 has a plurality of first recesses 234 and second recesses 236 (see FIG. 3). Each of the first recesses and the second recesses 236 has an opening and two cross-sectional profiles. The first recess 234 has a first extending direction extending from the center point of the bottom surface to a first extending direction of the opening, and the second recess has a first extending from the center point of the bottom surface to the center of the opening. a second extending direction, wherein the first extending direction is different from the second extending direction. The sealing body 240 has a plurality of the second=24: and the second protruding portion is formed in the first concave portion 234 ” Each of the first recesses and the second recessed sides and the bottom surfaces of the two sides; the opening and the second protrusions (4) 2:6 = the extension direction of the protrusions 244 ( In the chest, the shackles are different, whereby, in the hardening a prominent P / . ah coffee will shrink so that the first dog out h 244 and the second protruding part 24 brother 230. Preferably, the starting (four) live money hot film The extension direction of the portion 236 - two: / 34 extension direction and the second concave direction The angle Θ 2 between the two (i.e., the direction in which the first protrusions 244 10 1311361 extend) and the angle between the extension of the 突出 - 屮 & J J 乐 乐 乐 邛 邛 246 246 90. Thereby providing a better clamping effect. Please refer to the second, the substrate 21{) can be an organic substrate, which is made of a glass fiber reinforced BT (bi_leimide seven) resin or FR-4 glass fiber reinforced type. The substrate 21 can also be a plurality of ceramic substrates. The semiconductor wafer 220 can be formed by a glue layer 222 (for example, a silver-containing epoxy tree or a non-conductive layer). Attached to the substrate 21 (), as shown, the semi-conductive sheet 220 is connected to the substrate by a plurality of bonding wires (for example, gold wires) connected to the substrate as electrical input and output. 21 〇 upper conductive lines or pads (not shown). Alternatively, the semiconductor wafer may be connected to 21 覆 by a plurality of solder balls (SGlderBall) in a flip chip bond. The solder balls may utilize any A known bump (Bu) process is formed on the front side of the semiconductor wafer 220 (aeive surfaee) It can be understood that the half (four) chip package structure according to the present invention may be: a ball grid array package structure. In this embodiment, the surface of the substrate (1) may be provided with a plurality of (four) columns of solder ball pads (not shown). In the figure), the ball material is connected to the wafer by a conductive line and a shape: a wire (or a solder ball) disposed on the wire 2iq. After the plurality of solder balls 250 ^ are used: tin solder pad The semiconductor chip package structure of the present invention may be melted (reflowed) in a heating step and mounted on the outer printed circuit board. The outer circumference has been disclosed in several preferred embodiments as described above. However, it is not intended to use .^, any person skilled in the art can make various changes and retouchings without departing from the spirit of the present invention. Therefore, the protection scope of the present invention is disclosed in the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS In order to make the above and other aspects of the present invention readily apparent, the following detailed description of the preferred embodiments are as follows: The objects, features, and advantages are more apparent and in accordance with the drawings In detail, the 1A figure is drawn Powder shame, partially cross-sectional schematic ^ ^ Λ cooked with governance sheet ball grid array (Heat Slug B (JA) package structure.;
示意：;1B圖係繪示第1A圖習用封裝構造的部分放大剖面 m㈣根據本發明一實施例之 構造的剖面示意圖； 第2B圖係缯·示第2a菌^ ^ Α Λι| ^ * 之半導體晶片封裝構造的部分 孜大剖面不意圖；以及 刀 第3圖係繪示根據.1B is a cross-sectional view showing a partially enlarged cross-section m of a conventional package structure of FIG. 1A. FIG. 2B is a schematic view showing a structure according to an embodiment of the present invention; FIG. 2B is a semiconductor showing a 2a-strain 2^ Α Λι| ^ * Part of the wafer package structure is not intended to be a large section; and the third figure of the knife is shown.
裝構造的部分放大剖面示f圖月另一實施例之半導體晶片封 【主要元件符號說明 100 封裝構造 120 晶片 140 封膠體 200 封裝構造 220 晶片 224 金線 110 基板 130 散熱片 130a 小凹部 210 基板 222 膠層 230 散熱片 12 1311361 232 凹部 232a 開口 232b 底部 232c 側壁 234 凹部 236 凹部 240 封膠體 244 突出部分 246 突出部分 250 錫球 300 封裝構造 θ 1 夾角 θ 2 夾角 di 寬度 d2 寬度 13A partially enlarged cross-section of the package structure shows a semiconductor wafer package of another embodiment. [Main component symbol description 100 package structure 120 wafer 140 encapsulant 200 package structure 220 wafer 224 gold wire 110 substrate 130 heat sink 130a small recess 210 substrate 222 Adhesive layer 230 heat sink 12 1311361 232 recess 232a opening 232b bottom 232c side wall 234 recess 236 recess 240 encapsulant 244 protruding portion 246 protruding portion 250 solder ball 300 package structure θ 1 angle θ 2 angle di width d2 width 13