TWI308226B - Microlens structure and fabricating method thereof - Google Patents

Description

1308226 IX. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to a method of fabricating a micro concentrating mirror and a structure thereof, and more particularly to a method of fabricating a micro concentrating mirror by an etching process and a structure thereof. [Prior Art] Complementary MOS transistor image sensor (CIS) and carrier-coupled devices (CCDs) are commonly used in the prior art to convert light into electronic signals. Optical circuit components, both of which are used in a wide range of applications, including scanners, cameras, cameras, etc. 'But because the carrier coupling device is limited by price and volume, there are currently complementary MOS semiconductors on the market. Transistor image sensors are more popular. The device is mainly applied to products such as brooms, and the surface-type complementary MOS transistor is made of a conventional semiconductor process because the stand-up MOS transistor image sensor is manufactured by a conventional semiconductor process. Cost and component size are required, and its application range includes digital electronic products such as personal computer cameras and digital cameras. Currently, complementary MOS transistor image sensors are roughly two types: line splitting and face '. Metal oxide semiconductor crystal image. Image sensor is mainly used in digital cameras and other products. 1308226 Please refer to Figure 1 to Figure 2 'Figure 1 to Figure 2 for making complementary MOS semiconductors in the prior art. Schematic diagram of the method of the transistor image sensor. As shown in Fig. 1, the semiconductor substrate 2 includes a plurality of shallow trench isolation (STI) 4 and a plurality of photodiodes 6. Wherein, each of the photodiodes 6 is electrically connected to a corresponding metal oxide semiconductor (MOS) transistor such as a reset transistor, a current source follower, and a row selector. (not shown), and the shallow trench isolation 4 is used as an insulator between any two adjacent photodiodes 6 and MOS transistors to prevent the photodiode 6 from interfacing with other components. A short circuit occurs during contact. Then, an interlayer dielectric (ILD) layer 8 is formed on the semiconductor substrate 2, covering the photodiode 6 and the shallow trench isolation 4, and then a metallization process is performed on the interlayer dielectric layer 8 to form a Multiple metal interconnects layer 9. The multiple metal interconnect layer 9 further includes an inter metal dielectric (IMD) layer 11 for isolation, and a metal layer 10 and a metal layer 12 for circuit connection such as a MOS transistor. And all of them are formed above the shallow trench isolations 4 to avoid shielding the photosensitive diodes 6, and the incident light (not shown) can be collected on the photosensitive diode 6 without scattering, resulting in scattering. Signal cross talk. Thereafter, a planarization layer 13 is formed on the metal layer 12. The planarization layer 13 may have a multi-layer structure, such as a oxidized stone layer (referred to as HDP layer) and utilized by a high-density plasma method of J308226. The plasma enhanced chemical vapor deposition method consists of a plasma enhanced TEOS (PETEOS) made of tetra-ethyl-ortho-silicate (TEOS). Further, a protective layer of nitride or the like is formed on the planarization layer 13 to prevent moisture and other impurities from entering the element region. Then, a plurality of color filter arrays (c〇1〇r fmer arrays, CFAs) 18 formed of red, green, and blue (R / G/B) filter patterns are formed on the protective layer 14 and are respectively located on the respective layers. Above the corresponding photodiode 6, a spacer layer 20 is formed over the color filter array 18, and a resin having a photoactive compound is formed over the spacer layer 20. ) layer (not shown). Then, the wavelength of 365 nanometers (nm) ultraviolet light (n) is used as the exposure light source. This is the exposure wavelength commonly used in the fabrication of micro condensers (mien>lens) for complementary MOS transistor image sensors. After the wavelength of 365 nm ultraviolet light exposure and 3 shadows, a photosensitive block 22 arranged in an array is formed. Next, please refer to Figure 2, using the & ~ reflow process, t to make the complementary gold-oxygen semiconductor (four) crystal image like ❹ placed at 5 高温 in the high temperature % i brother about 5 to 1 〇 minutes The π, inch is changed from the photosensitive material block 22 of the resin to the shape by the temperature reflow, and is changed from the photosensitive block 22 having the square shape 1308226 in FIG. 1 to the shape resembling a hemisphere in the micro condenser concentrating lens in FIG. After the concentrating lens 24 is formed, a "protective layer%" is formed to protect the micro condensing mirror 24'. Thus, the fabrication of the complementary MOS transistor image sensor 50 is completed. Since the conventional technique uses a resin of ', <, an organic material as a micro concentrator, it cannot be applied at 250. (: Above > ^ 二义尚温环境, for example, it is applied to image sensors in the south temperature environment or laser read/write devices for special use and △ special purposes, otherwise it will cause problems such as cracking and deformation. , ^ ^ H .,, In addition, 'because of the low hardness of organic materials' and the valley is susceptible to the influence of the outside world, it is necessary to additionally form 1^ above the micro-concentrating mirror. - The structure of the Γ Γ 供 种 种 种 种 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作 制作Limitations and problems encountered by the above-mentioned prior art. According to the patent scope of the present invention, a method for producing a micro-concentrating mirror includes a blanking step, providing a substrate, and having at least a dielectric layer on the substrate Forming at least a microbump on the surface of the dielectric layer, and forming a film on the surface of the microbump and the surface of the dielectric layer, the optical film and the microbump forming the micro concentrating mirror. Please take care of the towel Further provided is a micro-concentrating mirror junction structure, suitable for a semiconductor component, comprising a substrate having an upper layer; an electrical layer, at least one microbump disposed on the dielectric layer, and - optics The film 'covers the surface of the microbump and the surface of the dielectric layer, and the optical film and the microbump constitute the micro concentrating mirror. Since the present invention can form a microbump of an inorganic dielectric material by using various etching processes, The optical film of an inorganic dielectric material is formed by using a chemical vapor deposition process to form a micro concentrating mirror. Therefore, compared with the prior art, the micro concentrating mirror manufactured by the present invention can be applied to a high/dish environment of 25 〇tW, for example. It is applied to laser reading and writing devices without cracking problems and because the hardness of inorganic dielectric materials is high enough, such as tantalum nitride (Si3N4), the anti-blocking ability to alkali metal ions is very easy to draft. It is infiltrated by water vapor, so the present invention can eliminate the need to additionally make a protective layer on the micro concentrator compared to the prior art. In addition, when the micro concentrator manufactured by the present invention is applied to the complementary galvanic half In the case of a conductor transistor image sensor and a carrier coupling device, the present invention can also be deposited on a microbump using a red, green, and blue filter layer as an optical ,', so that it can replace the conventional technology. The color filter array located above the photodiode not only reduces the cost, but also reduces the distance between the micro condenser and the photodiode, so as to further minimize the problem caused by the skew light. [Embodiment] J308226 Referring to Figures 3 through 8, Figures 3 through 8 are schematic cross-sectional views showing the steps of the manufacturing method of the first preferred embodiment of the present invention. As shown in Figure 3, the present invention first provides a substrate. 1〇〇, and the substrate 100 has a dielectric layer 1〇2, wherein the substrate 1 is a semiconductor substrate 'but is not limited to a wafer or a stone insulation (s〇I) The substrate 100 may include a plurality of photosensitive structures 96, such as photodiodes, for receiving external light and sensing the intensity of the illumination' and the photosensitive structures are electrically charged. Connected A CMOS transistor (not shown) such as a transistor, a current-missing element or a column selection switch, and a plurality of insulators 98, such as shallow trench isolation (STI) or local tantalum oxide insulating layer (i〇cai) οχΜ^ίοη 〇f silicon isolation layer (LOCOS), in order to avoid such a photosensitive structure, the MOS transistor is in contact with other components to cause a short circuit. In addition, the dielectric layer 102 may include an inte layer dielectric layer (ILD) layer 103, an inter metal dielectric (IMD) layer 105, a planarization layer 107, and a tantalum nitride layer. The protective layer i 〇 8 , and the inter-metal dielectric layer 105 and the planarization layer 1 〇 7 are formed with a plurality of metal layer 104 and metal layer 106 and other multiple metal interconnect lines (muitilevel interconnects) layer as the sensitization The structure of the MOS transistor is connected to the circuit of other components, and they are formed above the isolation of each shallow trench to avoid shielding the photosensitive structure' and allow the incident light (not shown) to be collected when it is incident. In the photosensitive structure, no scattering occurs, causing cross talk. 1308226, a deposition process is performed to form a patterned photoresist layer on the dielectric layer 110' to define the position of each micro condenser. Next, as shown in FIG. 4, a first film 112 is formed on the first film 11A, and the 'th film-110 may include an inorganic dielectric material, such as a nitride (Si3N4) or a poly Amine ((10) yimide) and the like. Secret, as shown in Figure 5,

Using the patterned photoresist layer 112 as a paste mask (_k) to staple the first film 110, for example, using a secret process or a rhyme process, etc. to transfer the pattern of the patterned photoresist layer 112 to In the first film 11A, a plurality of microbumps 114 are formed, and then the patterned photoresist layer 112 is removed. In the first preferred embodiment, each of the microbumps 114 can be selectively etched into a trapezoidal or rectangular shape as the exposure and development process of the patterned photoresist layer 112 and the parameter control of the etching process are adjusted. shape. As shown in FIG. 6, each of the microbumps 114 can be subjected to a fillet process, for example, by a reflow process or a wet etch process for etching each of the microbumps 114 into rounded corners. Trapezoidal or rectangular. Finally, as shown in FIG. 7, a deposition process is performed to deposit a second film 116 on the dielectric layer 1〇2 and each of the microbumps 114 to form the microbumps 114 covered with the second film 116. A plurality of micro condensers 118 are provided. The deposition process may be an atmospheric pressure chemical vapor deposition (APCVD) or a sub-atmospheric pressure chemical vapor deposition (SACVD) chemical vapor deposition. Process to make J308226

/ Child's first - (four) 116 has a smoother surface. Moreover, the second film IK may be an inorganic dielectric material similar to the microbumps 114, or an inorganic dielectric material different from the f-g, or an inorganic "electrical material having a surface-light function, such as oxidation. An optical film such as a dichroic film made of a material such as titanium (titanium 〇 xide) or oxidized group (tantalum oxide 'Ta 2 〇 5). It is worthwhile to think that in a preferred embodiment, the microbump (1) has a refractive index greater than or equal to the refractive index of the second film 116. In addition, the present invention can selectively change the thickness and width of the microbumps 114, and adjust the shape, curvature, and the like of each of the micro-condensers 118. The present invention can also selectively perform a further process on the second film 116 to adjust the thickness of the second film μ. In addition, the present invention can also be selectively performed again - a thermal process to eliminate the interface between the microbump 114 and the first film 116 as shown in FIG. 8 , wherein the temperature of the thermal process is greater than 25 (rc. 9 to 13 are a cross-sectional view showing the structure of each step (4) of the manufacturing method of the present invention in detail. As shown in Fig. 9, the present invention first provides a substrate 2 The substrate 200 has a dielectric layer 2〇2. As in the above embodiment, the substrate 200 also includes a plurality of photosensitive structures 196, CMOS transistors (not shown), and a plurality of shallow trench isolations 198, etc. The dielectric layer 2〇2 may include a dielectric (ILd) layer 203, a plurality of metal layers 2〇4, and a 1308226.

The structure of the inter-metal dielectric (IM layer 207 and an upper layer 205, a plurality of metal layers 206, a flattened thin layer 208, etc.) will not be described here. Next, as shown in the first surface formation 202, A deposition process is performed on the dielectric layer, the film 210, and then a patterned photoresist layer a, which is used to delimit the position of each micro condenser.

The coin-bonding film 21 〇 --p 11 shows the use of an inorganic dielectric material. Then, a patterned photoresist layer 212 is used as an etch mask to etch the first 艟 石 哲 哲 T to transfer the pattern of the patterned photoresist layer 212 to the first thin film. 'Forming a plurality of patterned first films 213' and then removing the patterned anisotropic t-resist layer 212. The 'etching process can choose to use a tantalum process', such as a sputtering etching process, a plasma etching process, or a reactive ion etching process (RIE process). .

Next, as shown in FIG. 12, a deposition process and an etch process are performed to form a spacer 214 on each of the surrounding sidewalls of the patterned first film 213, and each has a sidewall 214 structure. The patterned first film 213 constitutes the microbumps 215 of the second preferred embodiment, and the shape of each of the microbumps 215 is slightly trapezoidal with rounded corners. Finally, as shown in FIG. 13, a deposition process is performed to deposit a second film 216' on the dielectric layer 202 and each of the microbumps 215 to form a plurality of microbumps 215 covered with the 1308226 second film 216. A micro condenser s. The deposition process may be an atmospheric pressure chemical vapor deposition process, a primary pressure chemical vapor deposition process, etc., so that the deposited second film 216 has a smoother surface. Similarly, the second film 216 can be an inorganic dielectric material identical to the microbumps 215, or an inorganic dielectric material different from the microbumps 215, or an inorganic dielectric material having a filtering function, such as A color separation film, etc. It should be noted that the refractive index of the microbumps 215 is greater than or equal to the refractive index of the second film 216. In addition, the present invention can selectively change the thickness and width of the microbumps 215, and adjust the shape, curvature, and the like of the respective micro condensing mirrors 218. The second film 216 can also be selectively etched back to adjust the thickness of the second film 216. In addition, the present invention can also selectively perform a further thermal process to eliminate the patterning of the microbumps 215.

In the same manner as the above embodiments, the structure 296, the CMOS electro-crystal separation 298, and the like, and the substrate 300 of the dielectric layer 302 also includes a plurality of photosensitive bodies (not shown) and a plurality of hidden and a plurality of shallow The trench isolation 2 卯 1308226 may include a dielectric (ILD) layer 303, a plurality of metal layers 304, an inter-metal dielectric (IMD) layer 305, a plurality of metal layers 306, a planarization layer 307, and a protective layer. The structure of 308, etc., will not be repeated here. Next, as shown in FIG. 15, a deposition process is performed to form a first film 310 on the surface of the dielectric layer 302, and then a patterned photoresist layer 312 is formed on the first film 310 to define each micro The position of the condenser. Wherein, the patterned photoresist layer 312 is formed by a halftone mask, so that after exposure, it can form a semicircular, semi-elliptical, or stepped patterned photoresist layer 312. The first film 310 may comprise an inorganic dielectric material. Then, as shown in FIG. 16, an anisotropic etching process is performed on the first film 310 by using the patterned photoresist layer 312 as an etch mask to transfer the pattern of the patterned photoresist layer 312 to the first In the film 310, a plurality of microbumps 314 having the same shape as the patterned photoresist layer 312 are formed. The non-isotropic etching process may select an anisotropic dry etching process, such as a killing process, a power process, or a reactive ion etching process. Finally, as shown in FIG. 17, a deposition process is performed to deposit a second film 316 on the dielectric layer 302 and each of the microbumps 314 to form a plurality of microbumps 314 covered with the second film 316. Micro condenser 318. 1308226 Similarly, the deposition process can be an atmospheric pressure chemical vapor phase, a sub-atmospheric pressure chemical vapor deposition process, etc., such that the deposited / ^ or a smoother surface, and the second film 316 is also ~ 316 ^ Block 3H of inorganic dielectric material, or a different from micro-convex = = the same machine, I electrical material 'or - an inorganic dielectric colorless film with a calender function. For example

The refractive index of the 疋' (four) block 314 is greater than the refractive index of the second film 316. In addition, the present invention can selectively change the thickness and width of the convex state, and adjust the shape of each micro-concentrating mirror. 7 Bumps The present invention can also selectively perform the second film 316 again. It is used to adjust the thickness of the second film 316. In addition, the present invention also selectively re-decrements the interface between the age-old microbump 314 and the second film 316, as shown in Fig. 8 of the first embodiment, wherein the temperature of the process is greater than 2503⁄4. In summary, the present invention can form a micro-bump of an inorganic dielectric material by an etching process, and then form an optical film of an inorganic dielectric material by using a deposition process of a chemical vapor or the like to form a micro-concentrating mirror. The micro concentrating mirror manufactured by the invention can be applied to a high temperature environment of 2503⁄4 or more, for example, for a scene in a warm environment, such as a sensor or a special-purpose laser reading and writing device, without causing cracks, deformation, etc. problem. And because the hardness of the inorganic dielectric material is high enough, such as tantalum nitride, etc., the anti-blocking energy of the alkali metal ions is high, and is not easily penetrated by water vapor, so the invention can be omitted on the micro condenser. Make an extra layer of protection. In addition, when the micro concentrator manufactured by the present invention is applied to an image sensing device such as a complementary MOS transistor image sensor and a carrier coupling device, the present invention can also use a red, green, and blue filter layer. The color film and the like can be separated from the color optical film and deposited on the micro bumps, so that the color filter array located above the photosensitive diode can be replaced in the prior art, which not only reduces the cost but also reduces The distance between the micro condenser and the photodiode to further minimize the problems caused by oblique light. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should fall within the scope of the present invention. [Simple diagram of the diagram] Lu Figures 1 to 2 are schematic diagrams of a method for fabricating a complementary MOS transistor image sensor in the prior art. 3 to 8 are schematic cross-sectional views showing the steps of the manufacturing method of the first preferred embodiment of the present invention in detail. Fig. 9 through Fig. 13 are schematic cross-sectional views showing the steps of the manufacturing method of the second preferred embodiment of the present invention in detail. Fig. 14 through Fig. π are schematic cross-sectional views showing the steps of the steps of the manufacturing method of the third preferred embodiment of the present invention. 1308226 • [Main component symbol description] - 2: Semiconductor substrate 4: shallow trench isolation 6: Photosensitive diodes 8, 103, 203, 303: dielectric layer 9: multiple metal interconnect layers 10, 12, 104, 1〇6, 204, 206, 304, 306: metal layer • 11, 1〇5, 205, 305: inter-metal dielectric layer 13, 107, 207, 307: planarization layer 14, 26, 108, 208 ' 308 : Protective layer 18: color filter array 20: spacer layer 22: photosensitive block 24, 118, 218, 318: micro-concentrating mirror Lu 50: complementary MOS transistor image sensor 96, 196, 296: photosensitivity Structure 98, 198, 298: Insulator 100, 200, 300: Substrate 102, 202, 302 · Dielectric layer 110, 210, 310: First film 112, 212, 312: Patterned photoresist layer 114, 215 314: microbumps 116, 216, 316: second film 1308226 213: patterned first film 214: sidewall

Claims (1)

1308226 X. Patent Application Range: 1 . A method for fabricating a micro concentrating mirror, comprising the steps of: providing a substrate having at least one dielectric layer thereon; forming a first film on a surface of the dielectric layer; etching the The first film forms at least one microbump; and a second film is formed on the surface of the microbump and the surface of the dielectric layer, and the second film and the microbump constitute the micro concentrator. 1 As for the method of applying for the patent scope, the bottom of the towel county has at least one photosensitive element. 3. If you apply for a patent scope! The method of the present invention, wherein the method for forming the micro-bumps further comprises: forming a patterned photoresist layer on the first film; The first film is formed to form the microbump by using the patterned photoresist layer as a mask; and the patterned photoresist layer is removed. 4. The method of claim 3, wherein after removing the patterned photoresist layer, further comprising a step of β rounding the microbumps. The method of claim 4, wherein the step of rounding the micro 1308226 bump comprises thermal reflow or etching. The method of claim i, further comprising an etching back The method of claim 1, wherein the refractive index of the microbump is greater than or equal to the refractive index of the second film. The micro-bump and the ruthenium film a are the same dielectric material. 9 includes ^=^_峨-shaped green, and the dielectric material is packaged according to the method of claim 1, wherein the second film package 3, A light-sensitive material or a dichroic film. The method is the method of claim 1, wherein the micro-bump is shaped like a shape, a trapezoid, a rectangle, or a trapezoid or rectangle with rounded corners. Such as the method of the application of the patent (4) of the application, the shovel ra The method of fabricating a micro-concentrating mirror to eliminate the 1308226 '13·-- between the microbumps and the second film comprises the following steps: - providing a substrate, and having at least - a dielectric layer; forming a first film on the surface of the dielectric layer; etching the first film to form a patterned first film; forming a sidewall around the patterned first film, and the patterning A thin film and the sidewall sub-system form a micro-bump; and a second film is formed on the surface of the sub-bump and the surface of the dielectric layer, and the second film and the micro-bump constitute the micro-concentrating mirror. Please refer to the full-time _13 item, which has at least one photosensitive element at the bottom of the towel county. The method of forming the patterned first film is further included in the method of forming the patterned first film, and the first layer is formed into a pattern. a photoresist layer on the first film; using the patterned photoresist layer as a mask (4) the first film to pattern the first film; and attacking and removing the patterned photoresist layer. The method described further includes The method of claiming the second film, wherein the method of claim 13 wherein the microbump 1308226 has a refractive index greater than a scale of the second thin refractive index. And the method of claim 18, wherein the first film is the same dielectric material. 19. The inorganic dielectric material is included in the scope of the patent application. The method of claim 18, wherein the dielectric material is the method of claim 13, wherein the second thin flag is a filter material or a dichroic film. 21) The method of claim 13, wherein the method further comprises: the temperature is greater than 25 generations (four), and the interface between the microbump and the second thin is removed. 22. A micro concentrating mirror structure for a semiconductor device comprising: a substrate 'having at least one dielectric layer on the substrate, at least one microbump disposed on the dielectric layer; and an optical film covering And a surface of the microbump and the surface of the dielectric layer, and the optical film and the microbump form the micro concentrating mirror. 23. The micro concentrator structure of claim 22, wherein the substrate has at least one photosensitive element. 1308226 - 24. The micro-concentrating mirror structure of claim 22, wherein the microbump includes a patterned second thin crucible, and a side wall surrounds the patterned first film. 25. The micro-concentrating mirror structure of claim 22, wherein the shape of the microbump comprises a semicircular shape, a trapezoidal shape, a rectangular shape, or a trapezoidal shape or a rectangular shape with rounded corners. 26. The micro-concentrating mirror structure of claim 22, wherein the micro-bump has a refractive index greater than or equal to a refractive index of the photonic film. 27. The micro-concentrating mirror structure according to claim 22 'Where the microbump contains the same dielectric material as the optical film. 28. The micro-concentrating mirror structure of claim 27, wherein the W dielectric material is an inorganic dielectric material. 29. The micro-concentrating mirror structure of claim 22, wherein the optical film comprises a filter material or a dichroic film. 30. The micro condenser as described in claim 22 The structure of the semiconductor device is a complementary CMOS transistor image sensor (CIS), and the substrate further has a photodiode corresponding to the photodiode. Micro condenser structure.