TWI307415B - A manufacture method and structure of integrated photoelectric component - Google Patents

A manufacture method and structure of integrated photoelectric component Download PDF

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TWI307415B
TWI307415B TW95129699A TW95129699A TWI307415B TW I307415 B TWI307415 B TW I307415B TW 95129699 A TW95129699 A TW 95129699A TW 95129699 A TW95129699 A TW 95129699A TW I307415 B TWI307415 B TW I307415B
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Taiwan
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light
region
optical waveguide
optical
layer
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TW95129699A
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Chinese (zh)
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TW200809290A (en
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Rong Xuan
Chi Yu Ni
Chuli Chao
Sheng Huei Kuo
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Ind Tech Res Inst
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Description

1307415 九、發明說明: 【發明所屬之技術領域】 本發明係有關於一種積體光電元件之製造方法及 其結構,特別是有關於一種將光電元件區、光波導區及 光柵結構積體化於同一基板上之積體光電元件之製造 方法及其結構。 【先前技術】 由於現今科技的發達,應用於光纖通訊系統及其他 相關的光學系統之技術迅速發展,從八零年代貝爾實驗 室開始研發以半導體光學元件作為光通訊主動元件,直 至目前之大通訊容量之波光多工系統(Wavelength Division Multiplexing,WDM)的發展過程中,最重視 的就是光波於光波導元件與光纖陣列之間的光學耦合 特性之問題,如何減少因耦合造成之光學損耗是目前光 通訊技術_最為重要之課題。 另外,平面光波導(Planner Lightwave Circuit,PLC ) 技術係一種利用半導體於平面上製作單一或是複數個 以光傳輸原理製成之光波導通道,經由調光對準 (Alignment)之步驟,而使通過其中之光波具有分光、 聚光及光學切換等功能之光學技術,用以將相互分離之 光學元件整合至一製作基板上,以降低整體模組之尺 寸、減少製造程序及系統複雜性、降低光學損耗、及提 高光學元件之可靠度。 6 1307415 光纖核心設置於錢後再以光學調整移動(依其輕 率而調整兩者之相對位置)之方式進行對準之步驟 達到光纖與光波導最佳之匹配對接。 、目雨習用之光波導耦合結構中,其中常見之製造方 法有將光纖之芯線與光波導元件之光波導處利用黏結 劑進行光學與機械連接方式進行對準步驟;另一種方式 為於半導體基板上進行蝕刻製程,以形成放置光纖之v 里對準溝槽’並配合覆晶(Fnp_CJiip)技術致使光纖之 杉、“(C〇re)對準於光波導處,而習知技術之蝕刻溝槽 的對準技術分為靜態對準(AHgnment)及動態對 準(Active Alignmem)兩種方法,其中靜態對準技術 :於开4 V型對準溝槽的同時亦完成光纖與光波導輕 合之對準關係’而動態對準技術係先形成對準溝槽,待 依其輕光效 之步驟’以 習知技術中以黏結劑將光纖與光波導相互耦1307415 IX. Description of the Invention: [Technical Field] The present invention relates to a method for fabricating an integrated photovoltaic device and a structure thereof, and more particularly to a method for integrating a photovoltaic device region, an optical waveguide region, and a grating structure A method of manufacturing an integrated photovoltaic element on the same substrate and a structure thereof. [Prior Art] Due to the development of today's technology, the technology applied to optical fiber communication systems and other related optical systems has developed rapidly. From the 1980s, Bell Labs began to develop semiconductor optical components as optical communication active components, until now the big communication In the development of the Wavelength Division Multiplexing (WDM) system, the most important thing is the optical coupling characteristics between the optical waveguide component and the optical fiber array. How to reduce the optical loss caused by the coupling is the current light. Communication technology _ the most important topic. In addition, a Planar Lightwave Circuit (PLC) technology is a method in which a semiconductor is used to form a single or a plurality of optical waveguide channels fabricated by optical transmission on a plane, and the steps of aligning are performed. The optical technology in which the light wave has the functions of splitting, concentrating, and optical switching is used to integrate the optical elements separated from each other onto a manufacturing substrate, thereby reducing the size of the overall module, reducing the manufacturing process and system complexity, and reducing Optical loss and improved reliability of optical components. 6 1307415 The fiber core is set after the money and then optically adjusted to move (according to its relative position to adjust the relative position of the two) to achieve the best match between the fiber and the optical waveguide. In the optical waveguide coupling structure used in the rain, a common manufacturing method is an optical fiber-optic connection between the core of the optical fiber and the optical waveguide of the optical waveguide component by an optical and mechanical connection method; the other method is a semiconductor substrate The etching process is performed to form an alignment groove in the v of the optical fiber, and the Fnp_CJiip technology is used to cause the fiber to be spliced, and the (C〇re) is aligned with the optical waveguide, and the etching groove of the prior art is used. The alignment technology of the slot is divided into two methods: static alignment (AHgnment) and dynamic alignment (Active Alignment). The static alignment technique is to complete the alignment of the optical fiber and the optical waveguide while opening the 4 V-shaped alignment trench. The alignment relationship 'the dynamic alignment technology first forms the alignment trenches, and the light-efficiency step is to be coupled to the optical waveguide by a binder in the prior art.

另外,若以钱刻方式形成對準溝槽, 板之蝕刻特性的—— ,由於半導體基In addition, if the alignment trench is formed in a money-etching manner, the etching characteristics of the board are due to the semiconductor base.

刻寬度及深度, 1307415 ’皆無法使光纖及 損耗’增加光傳播 導之光通量。 論是使用靜態對準或是動態對準方式 光波導準確地耦合對準,將造成光學 損失,進而影響光波進入或輸出光波 【發明内容】 鑒於以上的問題,本發明提供一 製造:法及其結構,藉以改良先前技術之光 對準關係不佳,導致光傳播損耗增加的限制或缺 點0The width and depth of the engraving, 1307415 ’, do not allow the fiber and loss to increase the luminous flux of the light. The use of static alignment or dynamic alignment mode optical waveguides to accurately couple alignment will cause optical loss, which in turn affects light waves entering or outputting light waves. SUMMARY OF THE INVENTION In view of the above problems, the present invention provides a manufacturing method and Structure, in order to improve the prior art, poor light alignment, resulting in limitations or disadvantages of increased light propagation loss

本發明所揭露之積體光電元件之製造方法及其結 二先提供-半導體基板,並於半導體基板上同時形 。、光电兀件區及一與光電元件區相鄰之光波導保留 區’其中光電元件區具有一作用層及一光傳輸口,此作 用層藉由鄰接於鄰接面之光傳輸口射出或是接收一光 波,接著钱刻光波導保留區至低於光傳輸口之高度位 置y遺後於_後之光波導保留區上形成—光波導區, 光波‘區具有一光波導光路,且光波導光路鄰接於光 電元件區與紐導保留㈣之鄰接面上,並對應於光傳 輸口 ’以連通作用層與光波導光路而形成—光傳輸路 徑。 本發明係以一體成型之方式將光電元件區及光波 導區形成於同一半導體基板上,並使光電元件的作用層 對應於光波導區中的光波導光路,如此即可改善習知技 8 1307415 術之黏結劑或溝槽導致耦合性不佳之問題,精確地使光 電疋件區與光波導區相互對準耦合,且製程簡單'減少 耦合損耗、及提升光傳輸效率。 以上之關於本發明内容之說明及以下之實施方式 之說明係用以示範與解釋本發明之原理,並且提供本發 明之專利申請範圍更進一步之解釋。 【實施方式】The method for fabricating the integrated photovoltaic device disclosed in the present invention and the second embodiment thereof provide a semiconductor substrate which is simultaneously formed on the semiconductor substrate. And an optoelectronic component region and an optical waveguide retention region adjacent to the photo-electric component region, wherein the photo-electric component region has an active layer and an optical transmission port, and the active layer is emitted or received by the optical transmission port adjacent to the adjacent surface a light wave, and then the optical waveguide retaining region is lower than the height position of the optical transmission port, and then the optical waveguide region is formed on the optical waveguide reserved region, and the optical wave region has an optical waveguide optical path and the optical waveguide optical path Adjacent to the optoelectronic element region and the adjacent side of the bond guide (4), and corresponding to the optical transmission port 'to form a light transmission path between the active layer and the optical waveguide optical path. In the invention, the photoelectric element region and the optical waveguide region are formed on the same semiconductor substrate in an integrally formed manner, and the active layer of the photovoltaic element corresponds to the optical waveguide optical path in the optical waveguide region, so that the conventional technique 8 1307415 can be improved. The adhesive or trench causes poor coupling, accurately aligns the optoelectronic component region and the optical waveguide region, and the process is simple 'reducing coupling loss and improving light transmission efficiency. The above description of the present invention and the following description of the embodiments of the present invention are intended to illustrate and explain the principles of the invention. [Embodiment]

、凊麥閱「第1圖」及「第2Α圖」至「第2D圖」, 係為本發明之積體光電元件製造方法之步驟流程圖及 剖面示意圖。如「第1圖」及「第2A圖」所示,首先 提供-半導體基板U0 (步驟)做為基材,其中半 導體基板140係為一磷化銦(lnp)半導體基板,本發 明揭露之半導體基板14〇更可變化為JE-V族半導體材 ,或是發光材料,並^本發明提供之實_為限。接 考於半導體基板140上同時形成—光電元件區m及一 與光電元件區m相鄰之光波導保留區15(^步驟 _,且於光電元件區11〇與光波導保留區之間形 成一鄰接面160’而光電元件區11〇中具有—作用層⑴ 傳輸…2’其中作用層ηι係藉由鄰接於曰鄰接 光、皮翼rf傳輸σ 112射出或是接收—光波,接著钮刻 =導保M 15G (步驟22G)至低於光 咼度位置處。 如「第1圖」及 第2B圖」至「第2D圖 所示, 9 1307415 接著於蝕刻後之光波導保留區15〇上形成一具有光波 光路121之光波導區120 (步驟230、240、250 ),而 光波導光路121係鄰接於鄰接面16〇並對應於光傳輸口 112,以連通作用層lu與光波導光路121而形成一光 傳輸路徑。其中,形成光波導區12〇之光波導光路121 之步驟包含有於蝕刻後之光波導保留區12〇上形成一 下披覆層 1211 (Bottom Cladding Layer)(步驟 23〇), 且下披覆層1211之上表面位置與光傳輸口 112之底部 同高,或是低於光傳輸口 112之底部;接著於下披覆層 1211上形成一光導層1212(GuidingLayer)(步驟 240),而光導層1212高度與光傳輸口 112之高度與其 寬度相同’或是高於光傳輸口 112,以避免光波於作用 層111與光波導光路121之間傳輸時造成光能之損失; 最後於光導| 1212±形成一上披覆| 1213:τ〇ρThe "Fig. 1" and "2nd drawing" to "2D" are the steps and cross-sectional views of the method for manufacturing the integrated photovoltaic device of the present invention. As shown in "Fig. 1" and "Fig. 2A", first, a semiconductor substrate U0 (step) is provided as a substrate, wherein the semiconductor substrate 140 is an indium phosphide (lnp) semiconductor substrate, and the semiconductor disclosed by the present invention The substrate 14 can be changed to a JE-V semiconductor material, or a luminescent material, and is limited to the present invention. A photo-electric element region m and an optical waveguide retention region 15 adjacent to the photo-electric device region m are simultaneously formed on the semiconductor substrate 140, and a photo-forming region is formed between the photo-electric device region 11A and the optical waveguide retention region. The abutting surface 160' and the photo-electric element region 11 have an active layer (1) transmission... 2' wherein the active layer ηι is emitted or received by the σ 112 adjacent to the 曰 adjacent light, the flap rf, and then the button is pressed. Guide M 15G (step 22G) to below the pupil position. As shown in Figure 1 and Figure 2B to Figure 2D, 9 1307415 is followed by the etched optical waveguide retention area 15 An optical waveguide region 120 having a light wave path 121 is formed (steps 230, 240, 250), and the optical waveguide optical path 121 is adjacent to the abutting surface 16A and corresponds to the light transmission port 112 to connect the active layer lu and the optical waveguide optical path 121. And forming an optical transmission path, wherein the step of forming the optical waveguide optical path 121 of the optical waveguide region 12 includes forming a Bottom Cladding Layer on the etched optical waveguide retention region 12 (step 23 〇) ), and the surface of the lower cladding layer 1211 The same height as the bottom of the light transmission port 112 or lower than the bottom of the light transmission port 112; then a light guiding layer 1212 (Guiding Layer) is formed on the lower cladding layer 1211 (step 240), and the height of the light guiding layer 1212 and the light transmission The height of the port 112 is the same as the width of the port 112 or higher than the optical transmission port 112 to avoid loss of light energy when the light wave is transmitted between the active layer 111 and the optical waveguide optical path 121. Finally, a light is formed on the light guide | 1212± | 1213: τ〇ρ

Cladding Layer) ’其中光導層1212係以錢膜、旋塗或 是沉積之方式形成於下披制1211上,而兩披覆層 咖、ms係以鑛膜 '㈣或是披覆方式形成,且兩^ 覆層1211、1213係以介電質材料或聚合物材料所製成, 而介電質質材料例如為二氧化梦(Si〇2)、氮氧^石夕 (SK)N)、或氮化欽(TlN)之其中一種材料。^發明 揭露之披覆層1211、1213更可變化為各種材料,^不 以本發明提供之實施例為限。 如 1圖」及「第2D圖」所示 其中本發明所 10 1307415 揭露之積體光電元件製造方法更包含有於光傳輸路徑 上形成一光柵結構130 (步驟26〇),而光栅結構13〇係 用以限制固定波長之光波通過,以增加光場傳輸效率, 其中光柵結構130可設置於光波導區12〇或是光電元件 區110之中,並不限定必須位於光波導區12〇之中。以 本發明所揭露之實施例為例,其中光柵結構〗3〇係先於 光波導區120之聚合物材料上形成,接著覆蓋二氧化矽 鲁以形成光波導光路121,如此可避免光波於光波導光路 121中產生逸散,導致耦光效率降低。另外,積體光電 元件調整波長之方式可分為以電流調動式 (Electronically)調整波長之電極控制器(圖中未示), 及以熱調式(Thermally)調整波長之溫度控制器(圖中 未示),此波長调整裝置係設置於光栅結構1 3 〇中,用 以改變作用層111之折射係數,以選擇通過光柵結構 馨130之光波的波長,進而精準地控制反射之光波波長, 進而提升輸出光功率。 如「第2D圖」所示,其中光電元件區i 1〇係利用 光罩技術,於半導體基板14〇上定義出預設元件之圖 案,再利用微影蝕刻、乾式或濕式蝕刻將光罩(圖中未 不)去除,最後以薄膜沉積及鍍膜技術製作脊狀雷射。 且脊狀雷射光源(圖中未示)所激發之光波,係藉由形 成於光電元件區110之作用層ln做為半導體發光區 域,並透過與作用層lu相對應之光傳輸口 112,而將 11 1307415 光波射出至光波導光路121中。如「第3圖」所示,其 中本發明第二實施例之形成光電元件區110之步驟更包 含有於光波導區120相對於光電元件區110之一側形成 一半導體光接收元件層116於,且光接收層116之高度 及厚度係對應於光傳輸口 Π2。其中光接收層116中更 °又有光檢測器、光放大器、或是光調變器其中之一光電 元件。 、 如第4A圖」、「第4B圖」及「第4C圖」所示, 八中^波‘光路121之輸入端及輸出端具有多種對應 之型悲':如「第4A圖」所示之第三實施例,光波導光 路係以夕個輸入端對應於一輸出端;如「第圖 所不之弟四貫施例,光波導亦 於多個輸出端’·如「第-輸入 弟C圖」所不之第五實施例,光 明121係以多個輸入端對應於多個輪出端。此 $之積體光電元件結構1〇〇更 Γ如光放大一等’作為光電積體化元件3 「第5圖」及「第6圖 之厚度比對耦合效率 。技術與本發明 口从卞之關係圖。如 以來累積之光波導元件# …#以長期 術所造成之叙合損耗約有咖 位技 失’以習知技術之「第 乂之耦光損 較之下,本發明可有圖」,、本發明之「第6圖」相 了有放避免因光師位所導致之_效 12 1307415 率不其輪出光功率大幅優於習知技術。 /第7圖」所示為本發明之蝕刻深度對傳導效率之 _圖。如圖所示’由於光波導光路12】之折射率小於 鱗化姻(InP )本 1/ιλ n以牛蛤體基板14〇,若是光波導光路121 覆層1211、1213厚度太薄’於光波導光路m 中傳¥之光波將往半導體基板⑽方向逸散,因而導致 先波損耗率大幅上升。因此,本發明將光波導區 度與雷射厚度比界定為〇.8,而得到如「第7圖」之每 :結果’故確定被覆層1211、1213厚度必須大於^ Χ ^ μΠ1)以上’如此將可確保光波不會產生額外之傳 播損耗,以提升積體光電元件結構⑽之整體光輪出功 率0 ,與習知技術相較’本發明以—體成型之方式形成兩 相鄰之光電7〇件區及光波導區,以達到光電元件區與光 φ波導區精確地對準耦合、簡化製程複純、減少輕損 耗、及提升光傳輸效率之目的。 —雖然本發明之實施例揭露如上所述,然並非用以限 定本發明,任何熟習相關技藝者,在不脫離本發明之精 2和範圍内,舉凡依本發明申請範圍所述之形狀、構 造、特徵及精神當可做些許之變更,因此本發明之專利 保護範圍須視本說明書所附之申請專利範圍所界 為準。 13 1307415 f圖式簡單說明】 第1圖為本發明之步驟流程圖; 第2A圖為本發明之分解步驟示意圖’· 第2B圖為本發明之分解步驟示意圖,· 第2C圖為本發明之分解步驟示意圖; 第2D圖為本發明之分解步驟示意圖; 第3圖為本發明第二實施例之剖面示意圖; 第4A圖為本發明第三實施例之立體示意圖; f 4B圖為本發明第四實施例之立體示意圖; 第C圖為本發明第五實施例之立體示意圖; $圖為t知技*之厚度比軸合效率之關係圖 以及 本發明之厚度比對輕合效率之關係圖; 弟圖為本發明之蝕刻深度對傳導效率 【主I异从# n說明】 守欢早之關係圖 100 110 111 112 116 120 121 1211 1212 積體光電元件結構 光電元件區 作用層 光傳輸口 光接收層 光波導區 光波導光路 下彼覆層 光導層 14 1307415 1213 上披覆層 130 光柵結構 140 半導體基板 150 光波導保留區 160 鄰接面 步驟200 提供一半導體基板 步驟210 於半導體基板上形成光電元件區及光波 導保留區 步驟220 蝕刻光波導保留區 步驟2 3 0 於光波導保留區上形成下披覆層 步驟240 於下披覆層上形成光導層 步驟2 5 0 於光導層上形成上彼覆層 步驟2 6 0 於光傳輸路徑上形成光拇結構 15Cladding Layer) 'The photoconductive layer 1212 is formed on the lower fabric 1211 by means of money film, spin coating or deposition, and the two coating layers are formed by the mineral film 'four' or the coating method, and The two coatings 1211, 1213 are made of a dielectric material or a polymer material, and the dielectric material is, for example, Dioxide Dream (Si〇2), Nitrogen Oxide (SK)N), or One of the materials of Nitrix (TlN). The disclosed cover layers 1211, 1213 can be further modified into various materials, and are not limited to the embodiments provided by the present invention. As shown in FIG. 1 and FIG. 2D, the method for manufacturing an integrated photovoltaic device disclosed in Japanese Patent No. 10 1307415 further includes forming a grating structure 130 on the optical transmission path (step 26〇), and the grating structure 13〇 It is used to limit the transmission of light waves of a fixed wavelength to increase the transmission efficiency of the light field. The grating structure 130 may be disposed in the optical waveguide region 12 or the photo-electric device region 110, and is not limited to be located in the optical waveguide region 12〇. . Taking the embodiment disclosed in the present invention as an example, wherein the grating structure is formed on the polymer material of the optical waveguide region 120, and then covers the ruthenium dioxide to form the optical waveguide optical path 121, so that the light wave can be avoided. Escape occurs in the waveguide optical path 121, resulting in a decrease in coupling efficiency. In addition, the method of adjusting the wavelength of the integrated photoelectric element can be divided into an electrode controller (not shown) that adjusts the wavelength by current modulation, and a temperature controller that adjusts the wavelength by the thermometric method (not shown) The wavelength adjustment device is disposed in the grating structure 13 〇 to change the refractive index of the active layer 111 to select the wavelength of the light wave passing through the grating structure 130, thereby accurately controlling the wavelength of the reflected light wave, thereby improving Output optical power. As shown in the "2D", in which the photo-electric element region i 1 利用 is defined by a photomask technology, a pattern of a predetermined component is defined on the semiconductor substrate 14 , and then the photomask is etched, dry or wet etched. (not shown in the figure) removed, and finally ridge laser is produced by thin film deposition and coating technology. And the light wave excited by the ridge laser light source (not shown) is formed as a semiconductor light-emitting region by the active layer ln formed in the photovoltaic element region 110, and transmitted through the light transmission port 112 corresponding to the active layer lu. The 11 1307415 light wave is emitted into the optical waveguide optical path 121. As shown in FIG. 3, the step of forming the photo-electric device region 110 of the second embodiment of the present invention further includes forming a semiconductor light-receiving device layer 116 on one side of the optical waveguide region 120 with respect to the photo-electric device region 110. And the height and thickness of the light receiving layer 116 correspond to the light transmission port Π2. The light receiving layer 116 further has a photodetector, an optical amplifier, or one of the optoelectronic components. As shown in Figure 4A, Figure 4B and Figure 4C, the input and output of the eight-in-wave 'light path 121 have a variety of corresponding types of sadness': as shown in Figure 4A In the third embodiment, the optical waveguide optical path corresponds to an output end of the input end; for example, "the fourth embodiment of the image is not shown, the optical waveguide is also applied to the plurality of outputs". In the fifth embodiment, which is not shown in Fig. C, the light 121 corresponds to a plurality of rounded ends with a plurality of input ends. The structure of the photovoltaic element of the $ is more like, for example, optical amplification, as the coupling efficiency of the thickness of the optoelectronic integrated component 3 "Fig. 5" and "Fig. 6". The relationship diagram of the optical waveguide component #...#, which has been accumulated by the long-term operation, has a loss of the gamma technology. In the figure, the "figure 6" of the present invention is relatively easy to avoid due to the position of the optical division. The effect of the 12 1307415 rate is not superior to the conventional technology. / Figure 7 is a graph showing the etching depth versus conduction efficiency of the present invention. As shown in the figure, the refractive index of the optical waveguide 12 is smaller than that of the scalar (InP), and the thickness of the cladding 1211, 1213 is too thin. The light wave transmitted from the waveguide optical path m is dissipated in the direction of the semiconductor substrate (10), and thus the first wave loss rate is greatly increased. Therefore, the present invention defines the ratio of the optical waveguide to the laser thickness as 〇.8, and obtains each of the "Fig. 7": the result 'so that the thickness of the coating layers 1211, 1213 must be greater than ^ Χ ^ μ Π 1) or more ' This will ensure that the light wave does not generate additional propagation loss to enhance the overall light wheel output power of the integrated photovoltaic device structure (10). Compared with the prior art, the present invention forms two adjacent photovoltaics 7 by means of body molding. The component area and the optical waveguide area are used to achieve precise alignment coupling between the photoelectric element region and the optical φ waveguide region, simplifying process re-purification, reducing light loss, and improving optical transmission efficiency. </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; The features and spirit of the invention are subject to change without departing from the scope of the invention as set forth in the appended claims. 13 1307415 f Brief description of the drawings] Fig. 1 is a flow chart of the steps of the present invention; Fig. 2A is a schematic view showing the decomposition steps of the present invention; 2B is a schematic diagram of the decomposition steps of the present invention, and Fig. 2C is a schematic view of the present invention 2D is a schematic view of a decomposition step of the present invention; FIG. 3 is a schematic cross-sectional view showing a second embodiment of the present invention; FIG. 4A is a perspective view of a third embodiment of the present invention; 4 is a perspective view of a fifth embodiment of the present invention; FIG. 2 is a perspective view showing the relationship between the thickness ratio of the t-technology and the thickness ratio of the present invention; The etched depth versus conduction efficiency of the present invention is the same as the conduction efficiency of the present invention. The relationship between the singularity and the singularity of the invention is 100 110 111 112 116 120 121 1211 1212 Receiving layer optical waveguide region optical waveguide optical path underlying cladding optical guiding layer 14 1307415 1213 upper cladding layer 130 grating structure 140 semiconductor substrate 150 optical waveguide retention region 160 abutting surface step 200 provides a Conductor substrate step 210 forming a photo-element region and an optical waveguide-retaining region on the semiconductor substrate. Step 220 etching the optical waveguide-retaining region. Step 2 3 forming a lower cladding layer on the optical waveguide-retaining region. Step 240 forming a photo-conductive layer on the lower cladding layer. Step 2 5 0 forming an upper cladding layer on the photoconductive layer. Step 2 60 forming an optical thumb structure on the optical transmission path.

Claims (1)

1307415 十、申請專利範圍: 1· 一種積體光電元件之製造方法,其包括有: 提供一半導體基板; 於孩半導體基板上形成一光電元件區及一與該 光電元件區相鄰之光波導保留區,且於該光電元;牛區 及該光波導保留區間形成—鄰接面,絲電元件區具 有-作用層及-光傳輸口,該作用層藉由鄰接於該鄰 籲接面之該光傳輸口射出或接收-光波; 蝕刻該光波導保留區至低於該光傳輪口之 度;以及 。“光波導保留區上形成一光波導區,該光波_ 區具有-光波導光路,且該光波導光路係鄰接於 接面並對應於該光傳’以連通 導光路形成-光傳輸路徑。 曰…亥u 2·如申請專·圍第丨項所述之積體光電元件 2=^包含有於該光傳輸路徑上形成—光《 3.二申請專利範圍第2項所述之積體光電元件之製逢 去’纟巾該光柵結構係設置於該光波導區之' .方:請專利範圍第2項所述之積體光電元件之製造 5·如由:其中該光栅結構係設置於該光電元件區之;。 晴專利範圍第2項所述之積體光電 万法,更句冬句署 _ L ^ ^ ^ 匕S °又置—電極於該光栅結構之步驟,該電 16 1307415 極作用時係調整該光栅結構之反射波長。 6·如申請專利範圍第2項所述之積體光電元件之製造 方法,其中更包含設置一溫度控制器於該光柵結構之 步驟,該溫度控制器係控制該光柵結構之溫度並藉以 調整該光栅結構之反射波長。 λ如申請專利範圍第1項所述之積體光電元件之製造 方法,其中更包含有: 形成一光接收層於該光波導區相對於該光電元 件區之一側,且該光接收層係對應該光傳輸口。 8. 如申請專利範圍帛i❺所述之積體光電元件之製造 方法,其中於該光波導保留區上形成一光波導區之 驟更包含有: 於該光波導保留區上形成一下披覆層,且該下披 使層之上表面位置與該光傳輸口之底部同高,或低於 該光傳輸口之底部; 於該下披覆層上形成一光導層,且該光導層之高 度與該光傳輸口之高度相同,或高於該光傳輸口;以 及 於該光導層上形成一上披覆芦。 9. 如申請專利範圍第8項所述之積θ體光電元件之製造 方去其中該光導層之寬度係對應於該光傳輸口。 1〇.如申請專利範圍第8項所述之積體光電元件之製造 方去,其中該光導層係以錢膜、旋塗或是沉積之方式 1307415 形成。 11. 如申叫專利範圍第8項所述之積體光電元件之製造 方法’其中该上披覆層及該下披覆層係以錢膜、旋塗 或疋丨儿積方式形成。 12. -種積體光電元件結構,係為—體成型之結構,其 包括有: 一光+電元件區,其具有一作用層及一光傳輸口, 該作用層藉由該光傳輸口射出或接收—光波;以及 。一光波導區,係相鄰於該光電元件區,該光波導 區具有-光波導光路’該光波導光㈣接於該光電元 件區並對應於該光傳輸口,以連通該作用層與該光波 導光路形成一光傳輸路徑。 13.如申明專利乾圍第12項所述之積體光電元件結 =,其中更包含有-設置於該光傳輪路徑上之光拇結 構’用以限制固定波長之該光波進行傳輸。 14·如申請專利範圍第13項所述之積體光電元件結 冓,其中該光柵結構係設置於該光波導區之中。 Κ如申請專利範圍第13項所述之積體光電元件結 構’其中該光栅結構係設置於該光電元件區之中。 16.如申請專利範圍第13項所述之積體光電元件結 冓’其中該光柵結構更具有一電極,係用 柵結構之反射波長。 门正通亢 17.如申請專利範圍第 13項所述之積體光電元件結 18 1307415 構’其中該光栅結構更具有一溫度控制器,係用以調 整該光栅結構之反射波長。 18. 如申請專利範圍第12項所述之積體光電元件詰 構’其中更包含有一設置於該光波導區相對於該光電 元件區一側之光接收層,且該光接收層係對應於該光 傳輪口。 19. 如申請專利範圍第18項所述之積體光電元件結 構’其中該光接收層更具有一光檢測器、一光放大 器、或一光調變器。 2〇.如申請專利範圍第12項所述之積體光電元件結 構,其中該光波導光路具有一下披覆層、一光導層、 及一上披覆層,該光導層係位於該下披覆層之上,該 上披覆層係位於該光導層之上。 21.如申請專利範圍第20項所述之積體光電元件結 構,其中該光導層之高度及寬度實質上皆與該光傳^ 口相同。 22·如申凊專利範圍第20項所述之積體光電元件矣士 構’其中兩該披覆層的材料包括聚合物材料。 如申請專利範圍第2〇項所述之積體光電元件結 構’其中兩該坡覆層的材料包括介電質材料。 24.如申請專利範圍第23項所述之積體光電元件結 構,其中該介電質材料係為二氧化矽(Si0、、&amp; : ,, 虱氣 化矽(SiON)、或氮化鈦(TiN)。 191307415 X. Patent Application Range: 1. A method for manufacturing an integrated photovoltaic device, comprising: providing a semiconductor substrate; forming a photovoltaic element region on the semiconductor substrate and a fiber waveguide adjacent to the photovoltaic device region a region, and the photocell; the cattle region and the optical waveguide retention interval form an abutting surface, and the wire element region has an active layer and a light transmission port, the active layer being adjacent to the light of the adjacent contact surface The transmission port emits or receives a light wave; etching the optical waveguide retention region to a degree lower than the light transmission port; "An optical waveguide region is formed on the optical waveguide reserved region, and the optical waveguide region has an optical waveguide optical path, and the optical waveguide optical path is adjacent to the junction and corresponds to the optical transmission to form a light guiding path to form an optical transmission path. ... Hai u 2 · The integrated optoelectronic component 2 = ^ as described in the application of the special 围 丨 包含 包含 包含 包含 = = = = = = 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. 3. The component is manufactured by the 'scratch of the grating structure set in the optical waveguide region'. The production of the integrated photovoltaic element described in the second paragraph of the patent scope is as follows: wherein the grating structure is provided The photoelectric element region; the fine body photoelectric method described in the second item of the patent scope, the sentence sentenced to the sentence _L ^ ^ ^ 匕S ° and the electrode is in the step of the grating structure, the electricity 16 1307415 In the extreme action, the reflection wavelength of the grating structure is adjusted. 6. The method for manufacturing an integrated photovoltaic device according to claim 2, further comprising the step of providing a temperature controller to the grating structure, the temperature control The system controls the temperature of the grating structure and The method of manufacturing the integrated photovoltaic device according to the first aspect of the invention, further comprising: forming a light receiving layer in the optical waveguide region relative to the photovoltaic device region a side, and the light-receiving layer is corresponding to the optical transmission port. 8. The method for manufacturing an integrated photovoltaic element according to the patent application, wherein the formation of an optical waveguide region on the optical waveguide retention region further comprises Having: forming a lower cladding layer on the optical waveguide retention region, and the surface of the lower cladding layer is at the same height as the bottom of the light transmission port or lower than the bottom of the light transmission port; Forming a light guiding layer on the layer, and the height of the light guiding layer is the same as or higher than the height of the light transmitting opening; and forming an overlying reed on the light guiding layer. 9. The manufacturing method of the θ-body photoelectric element of the above-mentioned item 8 corresponds to the width of the light-conducting layer corresponding to the light-transmitting port. 1. The manufacturing method of the integrated-body photovoltaic element according to claim 8 of the patent application, The photoconductive layer The method of manufacturing the integrated photovoltaic element according to the invention of claim 8 wherein the upper coating layer and the lower coating layer are formed by the method of money film, spin coating or deposition 1307415. Formed by money film, spin coating or smear. 12. - The structure of the photovoltaic element is a body-formed structure, which comprises: a light + electrical component region having an active layer and a light a transmission port, the active layer emits or receives a light wave through the optical transmission port; and an optical waveguide region adjacent to the photoelectric element region, the optical waveguide region having an optical waveguide optical path In the optoelectronic device region and corresponding to the optical transmission port, to form an optical transmission path connecting the active layer and the optical waveguide optical path. 13. The integrated photovoltaic device junction according to claim 12, wherein Furthermore, the optical structure of the light disposed on the path of the light transmission wheel is used to limit the transmission of the light wave of a fixed wavelength. 14. The integrated photovoltaic device component of claim 13, wherein the grating structure is disposed in the optical waveguide region. For example, the integrated photovoltaic element structure described in claim 13 wherein the grating structure is disposed in the photovoltaic element region. 16. The integrated photovoltaic device structure of claim 13 wherein the grating structure further comprises an electrode having a reflection wavelength of the gate structure. The door is 亢 亢 17. The integrated photovoltaic element junction 18 1307415 ′′ as described in claim 13 wherein the grating structure further has a temperature controller for adjusting the reflection wavelength of the grating structure. 18. The integrated photovoltaic device structure of claim 12, further comprising a light receiving layer disposed on a side of the optical waveguide region relative to the photovoltaic device region, and the light receiving layer corresponds to The light passes the wheel. 19. The integrated photovoltaic device structure of claim 18, wherein the light receiving layer further comprises a photodetector, an optical amplifier, or a light modulator. 2. The integrated photovoltaic device structure of claim 12, wherein the optical waveguide optical path has a lower cladding layer, a light guiding layer, and an upper cladding layer, the light guiding layer being located under the coating Above the layer, the upper cladding layer is above the photoconductive layer. 21. The integrated photovoltaic device structure of claim 20, wherein the height and width of the light guiding layer are substantially the same as the light transmission port. 22. The composite photovoltaic element according to claim 20, wherein the material of the two coating layers comprises a polymer material. The integrated photovoltaic element structure as described in claim 2, wherein the material of the two slope layers comprises a dielectric material. 24. The integrated photovoltaic device structure according to claim 23, wherein the dielectric material is cerium oxide (Si0, &amp;, , yttrium gasified germanium (SiON), or titanium nitride. (TiN). 19
TW95129699A 2006-08-11 2006-08-11 A manufacture method and structure of integrated photoelectric component TWI307415B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI514560B (en) * 2011-12-20 2015-12-21 Intel Corp Hybrid integration of group iii-v semiconductor devices on silicon

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI514560B (en) * 2011-12-20 2015-12-21 Intel Corp Hybrid integration of group iii-v semiconductor devices on silicon

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