TWI304243B - Printed circuit substrate with adjustable characteristic impedance - Google Patents

Printed circuit substrate with adjustable characteristic impedance Download PDF

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Publication number
TWI304243B
TWI304243B TW94107626A TW94107626A TWI304243B TW I304243 B TWI304243 B TW I304243B TW 94107626 A TW94107626 A TW 94107626A TW 94107626 A TW94107626 A TW 94107626A TW I304243 B TWI304243 B TW I304243B
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Taiwan
Prior art keywords
layer
dielectric layer
substrate
printed circuit
characteristic impedance
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TW94107626A
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Chinese (zh)
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TW200633117A (en
Inventor
Te Chun Wang
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Advanced Semiconductor Eng
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Priority to TW94107626A priority Critical patent/TWI304243B/en
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Publication of TWI304243B publication Critical patent/TWI304243B/en

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1304243 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種印刷電路基板之結構,詳言之,係關 於一種利用介電層厚度而調整特性阻抗之印刷電路基板。 【先前技術】 電子零件的性能正逐年增高,其處理之信號也隨之高速 化當中,在此情況下,印刷電路基板之特性阻抗 (Characteristic Impedance)被要求加以整合,因為電子零件 或裝置之輸入或輸出阻抗,若未與該印刷電路基板上之信 號導體(例如導線或傳輸線)之阻抗整合,則會在邊界部產生 反射信號,形成雜音而降低傳送信號之品質,亦即信號不 能有效地自發射端傳送至接收端。 參考圖1,顯示習用之印刷電路基板之局部示意圖。圖中 所示之結構係為一微帶線(micr〇_strip)結構。該印刷電路基 板1包括一信號導體11(例如一傳輸線)、一介電層12及一接 地層13,該信號導體U係位於該介電層12之上,該接地層 13係位於該介電層12之下,其中該信號導體u、該介電層 12及該接地層13皆具有均一之厚度與寬度。理論上,該信 號導體11上任意點的特性阻抗與該點的橫切面幾何構造直 接相關,以圖2所示之電路基板結構之剖視圖為例,該信號 導體11的寬度與厚度,以及該信號導體u到該接地層13的 距離(也就是該介電層12之厚度)是主要的幾何因素,其關係 式如下·· Ζ0=^1ηί^-1 ^j£r 99049.doc 1304243 . 已經可以觀察到一介雷居厘痄知ϋ Ί 卜 ,丨电層厗度相差10微米,約可造成10歐 • 姆甚至更高的特性阻抗差異。 參考圖5’顯示本發明可調整特性阻抗之印刷電路基板之 第二實施例之示意圖。圖5所示之印刷電路基板4與圖4之印 刷電路基板3大致相$,不同處僅在於圖5所示之印刷電路 基板4中之接地層34不再是均一寬度,其具有一第一端 及弟一知342,且该接地層34第一端341及該介電層32第 • 一端321之厚度總和與該接地層34第二端342及該介電層32 弟一端3 2 2之厚度總和相同。 茲以下列實例予以詳細說明本發明,唯並不意味本發明 僅侷限於此(等)實例所揭示之内容。 實例: 一長度為1.5cm之印刷電路基板之微帶線結構如圖4所 示,其尺寸如下··該信號導體31具有均一寬度31//m,該信 號導體31具有均一厚度2〇/zm,該介電層32第一端32ι之厚 鲁度23/zm,該介電層32第二端322之厚度33//m。本實例之 特性阻抗係以開路法量測,其量測到之特性阻抗波形如圖6 所示。由圖6可看出,時間由15〇微微秒(pic〇sec〇nd,ps)到 210微微秒為外部電纜及探針訊號,為標準5〇歐姆。21〇到 280微微秒間’特性阻抗的下降為該印刷電路基板上其他如 • 通孔及孔塾形成的電容效應。由280到420微微秒間,印刷 ; 電路基板則對應到待測線路主體的訊號,此例中特性阻抗 - 值約從50歐姆連續上升到60歐姆,其係由於該介電層32厚 度的由薄變厚造成特性阻抗的上升。 99049.doc 1304243 , 惟上述實施例僅為說明本發明之原理及其功效,而非用 . 卩限制本發明。因此,習於此技術之人士可在不違背本發 明之精神對上述實施例進行修改及變化。本發明之權利範 圍應如後述之申請專利範圍所列。 【圖式簡單說明】 圖1顯示習用之印刷電路基板之局部示意圖; 圖2顯示圖1中沿著線2_2之剖視示意圖; • 圖3顯示另一種習用之印刷電路基板之局部示意圖; 圖4顯示本發明可調整特性阻抗之印刷電路基板之第一 實施例之示意圖; 圖5顯示本發明可調整特性阻抗之印刷電路基板之第二 實施例之示意圖;及 圖6顯示實例中所量測到之特性阻抗波形。 【主要元件符號說明】 1 印刷電路基板 2 印刷電路基板 3 印刷電路基板 11 信號導體 12 介電層 13 接地層 31 信號導體 32 介電層 33 接地層 141 第一端 99049.doc 1304243 142 第 二端 321 第 一端 322 第 二端 341 第 -^端 342 第 —端 99049.doc •10-BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a printed circuit board, and more particularly to a printed circuit board in which a characteristic impedance is adjusted by a thickness of a dielectric layer. [Prior Art] The performance of electronic components is increasing year by year, and the signal of processing is also increasing. In this case, the characteristic impedance of printed circuit boards is required to be integrated because of the input of electronic parts or devices. Or the output impedance, if not integrated with the impedance of the signal conductor (such as a wire or a transmission line) on the printed circuit board, a reflected signal is generated at the boundary portion to form a noise to reduce the quality of the transmitted signal, that is, the signal cannot be effectively The transmitting end is transmitted to the receiving end. Referring to Figure 1, a partial schematic view of a conventional printed circuit board is shown. The structure shown in the figure is a microstrip line (micr〇_strip) structure. The printed circuit board 1 includes a signal conductor 11 (for example, a transmission line), a dielectric layer 12, and a ground layer 13. The signal conductor U is located on the dielectric layer 12, and the ground layer 13 is located on the dielectric layer. Below the layer 12, the signal conductor u, the dielectric layer 12 and the ground layer 13 have a uniform thickness and width. Theoretically, the characteristic impedance of any point on the signal conductor 11 is directly related to the cross-sectional geometry of the point, taking the cross-sectional view of the circuit substrate structure shown in FIG. 2 as an example, the width and thickness of the signal conductor 11, and the signal. The distance from the conductor u to the ground plane 13 (that is, the thickness of the dielectric layer 12) is the main geometric factor, and the relationship is as follows: Ζ0=^1ηί^-1 ^j£r 99049.doc 1304243 . It has been observed that the 丨 居 痄 痄 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨Referring to Figure 5', there is shown a schematic view of a second embodiment of a printed circuit board with adjustable characteristic impedance of the present invention. The printed circuit board 4 shown in FIG. 5 is substantially the same as the printed circuit board 3 of FIG. 4, except that the ground layer 34 in the printed circuit board 4 shown in FIG. 5 is no longer uniform, and has a first The first and third sides of the ground layer 34 and the second end 321 of the dielectric layer 34 and the second end 342 of the ground layer 34 and the dielectric layer 32 The sum of the thicknesses is the same. The invention is illustrated by the following examples, which are not intended to be construed as limiting the invention. Example: A microstrip line structure of a printed circuit board having a length of 1.5 cm is as shown in FIG. 4, and its dimensions are as follows: The signal conductor 31 has a uniform width of 31//m, and the signal conductor 31 has a uniform thickness of 2 〇/zm. The first end 32 of the dielectric layer 32 has a thickness of 23/zm, and the second end 322 of the dielectric layer 32 has a thickness of 33/m. The characteristic impedance of this example is measured by the open circuit method, and the measured characteristic impedance waveform is shown in Fig. 6. As can be seen from Figure 6, the time is from 15 〇 picoseconds (ps) to 210 picoseconds for the external cable and probe signals, which is a standard 5 ohms. The decrease in characteristic impedance between 21 〇 and 280 picoseconds is a capacitive effect formed by other vias and vias on the printed circuit board. Printing from 280 to 420 picoseconds; the circuit board corresponds to the signal of the main body of the circuit to be tested. In this example, the characteristic impedance-value rises continuously from about 50 ohms to 60 ohms, which is thin due to the thickness of the dielectric layer 32. Thickening causes an increase in the characteristic impedance. The above examples are merely illustrative of the principles of the invention and its utility, and are not intended to limit the invention. Therefore, those skilled in the art can make modifications and changes to the above embodiments without departing from the spirit of the invention. The scope of the invention should be as set forth in the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a partial schematic view showing a conventional printed circuit board; FIG. 2 is a cross-sectional view along line 2-2 of FIG. 1; FIG. 3 is a partial schematic view showing another conventional printed circuit board; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 5 is a schematic view showing a second embodiment of a printed circuit board with adjustable characteristic impedance according to the present invention; and FIG. 6 is a view showing the second embodiment of the printed circuit board with adjustable characteristic impedance of the present invention; Characteristic impedance waveform. [Main component symbol description] 1 printed circuit board 2 printed circuit board 3 printed circuit board 11 signal conductor 12 dielectric layer 13 ground layer 31 signal conductor 32 dielectric layer 33 ground layer 141 first end 99049.doc 1304243 142 second end 321 first end 322 second end 341 first - ^ end 342 first end 99049.doc • 10-

Claims (1)

:1304祕觸6號專利申請案 中文申請專利範圍替換本(96年i月) 十、申請專利範圍·· 一種可調整特性阻抗之基板,包括一信號導體、一介電 層及一接地層,該信號導體係位於該介電層之上,該介 電層具有一第一端及一第二端,該接地層係位於該介電 層之下’其特徵在於該介電層之厚度係由該第二端向該 第一端遞減。:1304 Secret Touch No. 6 Patent Application Chinese Patent Application Range Replacement (96 years i month) X. Patent Application Range · A substrate with adjustable characteristic impedance, including a signal conductor, a dielectric layer and a ground layer. The signal guiding system is located above the dielectric layer, the dielectric layer has a first end and a second end, the ground layer is located under the dielectric layer, wherein the thickness of the dielectric layer is The second end is decremented toward the first end. 2·如請求項1之基板,其中該導體具有均一之寬度及厚度。 3·如請求項1之基板,其中該接地層具有均一之厚度。 4·如請求項丨之基板,其中該接地層具有一第一端及一第二 端,其分別對應該介電層之第一端及第二端,且該接地 層第一端及該介電層第一端之厚度總和與該接地層第二 端及該介電層第二端之厚度總和相同。 • 碉整特性阻抗之基板,包括一信號導體、一介 層及一電源層,該信號導體係位於該介電層之上,該 電層具有ϋ及m電源層係位於㈣ =之下’其特徵在於該介電層之厚度係由 第一端遞減。 6. 如請求項5之基板,其中該電源層具有均—之厚度。 7. 如請求項5之基板,其中該電源層具有—第一::一第 =第其t別對應該介電層之第—端及第二端,且該電 =弟1及該介電層第-端之厚度總和與該電源声第 端及該介電層第二端之厚度總和相同。 ”曰 99〇49-daims-AMD(替換本)d〇c2. The substrate of claim 1, wherein the conductor has a uniform width and thickness. 3. The substrate of claim 1, wherein the ground layer has a uniform thickness. The substrate of the request item, wherein the ground layer has a first end and a second end respectively corresponding to the first end and the second end of the dielectric layer, and the first end of the ground layer and the medium The sum of the thicknesses of the first ends of the electrical layers is the same as the sum of the thicknesses of the second ends of the ground layer and the second ends of the dielectric layers. • a substrate for modulating the characteristic impedance, comprising a signal conductor, a via layer and a power supply layer, the signal guiding system being located above the dielectric layer, the electrical layer having the ϋ and m power layer layers at (4) = below The thickness of the dielectric layer is decremented by the first end. 6. The substrate of claim 5, wherein the power layer has a uniform thickness. 7. The substrate of claim 5, wherein the power layer has - first:: one = the second, the second end corresponding to the first end and the second end of the dielectric layer, and the electrical = brother 1 and the dielectric The sum of the thicknesses of the first ends of the layers is the same as the sum of the thicknesses of the first end of the power supply and the second end of the dielectric layer.曰 99〇49-daims-AMD (replace this) d〇c
TW94107626A 2005-03-14 2005-03-14 Printed circuit substrate with adjustable characteristic impedance TWI304243B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI426834B (en) * 2011-03-21 2014-02-11 Hon Hai Prec Ind Co Ltd Circuit board with bga area

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI426834B (en) * 2011-03-21 2014-02-11 Hon Hai Prec Ind Co Ltd Circuit board with bga area

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