1303762 九、發明說明： 【發明所屬之技術領域】 本發明係有關一種用以檢查主機板的診斷界面卡，尤 指一種透過一低針腳數（LPC)界面設計出一診斷界面卡， 可供一測試人員得知一主機板之故障所在，進而達到幫助 该測試人員檢查、診斷該主機板之目的者。 【先前技術】1303762 IX. Description of the Invention: [Technical Field] The present invention relates to a diagnostic interface card for inspecting a motherboard, and more particularly to designing a diagnostic interface card through a low pin count (LPC) interface. The tester knows the fault of a motherboard, and then achieves the purpose of helping the tester to inspect and diagnose the motherboard. [Prior Art]
牧，在目刖個人電腦（pers〇nal c〇mputer)系統中 所使用的域板（MQtherb_l)敎麟該電腦系統有絕 對的影響，因此，當社她被設計完絲，必須仰賴測 試人員之經驗，檢查該主機板上之各電路魏，是否符合 規格要求’其巾在社機板上之—唯讀記隨上，係存放 $丰又基本輸入輸出系統Input/Qut⑽加㈣， 簡稱BIOS)程式，該基本輸入輸出系統（BI〇s)程式包含 ^多電腦輸出人的基本副程式。該基本輸人輸出系統 程式負責在該電腦系統開機的時候，進行硬體的 初始.又疋和L以確保該電腦纟統巾各個元件可以正常 工f ’並且讀取硬碟大小、系鱗間及記㈣等資訊；一 二雜本輸人輸料統（娜）程式偵酬硬體不正常的 情況，立即停止運作。 體，=1^試人員係利用—診斷界面卡及其上之記憶 右一 .板進订診斷檢查，其中該診斷界面卡上係設 ^#ISA； ^ 〇ndUStry δΐΛά ΑΓ〇Μ^ΐυΓ6 ^ 5 !3〇3762 惟’傳統之該工業標準架構⑽）界面之診斷界面 卡，係具有以下之缺點： 丄卜其傳輸速度（8百萬赫兹（MHz))較慢，且所需之 信號針聊數（Pin Count)較多。 2、由於目前資訊電子之突艇進，所以在該主機板 j與該工麵準架構（ISA)界面之賴界面卡相互插設之 插槽已不再生產’因此’將使得該主機板之診斷檢查無 法順利進行。 由於，在目前該個人電腦系統中之該主機板上之該基 本輸入輸㈣統⑽S)財，鑛透過—顧謂之低針 腳數（Low Pin Count，簡稱LPC)界面，以讀取該電腦系 統開機時之記鐘（如：Flash M_ry)特訊，英特爾 (Intel)制定此一規範，在於取代傳統之該工業標準架構 (ISA)界面及記憶體，主要特點是在降低其所需之信號針 腳數（Pin Count)與提高其傳輸速度至33百萬赫茲（MHz)， 原速度為8百萬赫茲（MHz)。 基於此，發明人在嗅覺到此一現象，即構想透過該低 針腳數（LPC)界面設計出-診斷界面卡，透過該低針腳數 (LPC)界面之診斷界面卡，以讀取該主機板在開機後，會 自我測s式其上各部分元件是否正常，以及檢查是否有某此 重要的周邊裝i沒有接上之信號，進而達到該測試人員檢 查、診斷該主機板之各項測試功能，以提高該主機板之生 產良率，降低其生產錯誤率與生產成本，藉以提昇業者在 其同類產品中的競爭實力，這也就是本案發明人認為有必 6 1303762 要將其提出專利申請之構想起源。 【發明内容】 有鑑於上述介紹，傳統使用之該工業標準架構（ISA) 界面及土憶體’因傳輸速度慢、所需之信號針腳數多，現 已被業界所献，亟待有—新設計之麟界面卡，用以幫 助測試人貞進行檢查、診_域板之各酬試功能，以 避免影響該主機板之整體生產良率，故為解決此一問題， 發明人以縣南了❹年之經驗，乃經過長久努力研究與 實驗，終·發設㈣本购之—種「用赠查主機板的 診斷界面卡」，⑽藉由本發日狀巧思，提高該主機板之 生產良率。 本毛明之目的’在提供一種透過—低針腳數（咖）界 面設計出-麟界面卡，透過鱗斷界面卡可讀取一主機 板⑽herboard)在_後之自我職功能信號，及複 數檢查點（CheckiW)之碼值，並將該碼值顯示出來， 供-測試人員依據該碼值對照—對照表上之錯誤碼 (Error Code)後，即可知到該主機板之故障所在，進而 達到檢查、賴該域板，細朗試人㈣該主機板開 發測試，並提高該主機板之生產良率，& 與生產成本之目的者。 手 為達成前述之目的’本發明之技術手段係設計一界面 卡，其上設-低針腳數界面以讀取一主機板在開機後之自 我測龜號及複數檢查點信號，並將該等信號儲存在 -記憶體中’ _將該等信號送至_可程式規劃控制器進 1303762 ί!ΐ資料之檢測與判斷處理，並將處理後之該資料儲存在 資料暫存H巾，且將—碼值透過—顯示器、將該碼值顯示 在其上二供i試人員依據該碼值對照—對絲上之錯誤 以得知該主機板之故障所在，進而達到幫助該測試人 貝檢查、診斷該主機板之目的。 。除此之外，該界面卡上尚包括一切換開關，其係與該 可程式規馳制H連接，由於鋪示雜可顯示32位元 /b⑴㈣線與位址線的值，故透過該切換開關用以供 該測試人員選擇該可程式規劃控制器傳出之前後8組的碼 值，並經該顯示器顯示出。 、、再^，該界面卡上另包括一第二記憶體，其係與該資 料暫存1§連接，㈣供存放該域板職程·;藉此， 透過本發明在該界面卡上所設之該第—記憶體與該第二 讀、體，可使得在生產測試該主機板時，可減少再行將該 第一記憶體與該第二記憶體^^裝在該主機板上的工作，如 此-來，將可更加提高_域板之生產效率。 為便於#審查委員能對本發明之技術手段及運作過 私有更進-步之認識與瞭解，轉實補配合圖式，詳細 說明如下： 【實施方式】 本發明係-種「用以檢查主機板的診斷界面卡」，請參 閱第1圖射’其係本發明之—最佳實關，包括一診斷 界面卡10,該診斷界面卡10上係分別設有一低針腳數(L〇w Pin Count，麵LPC)界面m、一第一記憶體1〇2、〆 1303762 可程式規劃控制器103'—資料暫存器i〇4 (DataBuffer) 及一連接埠105，其中該低針腳數（LPC)界面1〇1包含有 複數控制信號線（7支針腳數：pc ICLK、PC IRST #、LFRAME， LAD[0〜3]) ’係用以讀取一主機板2〇 (Motherboard)在開 機後之自我測試（Power On Self Test，簡稱POST)信號Shepherd, the domain board (MQtherb_l) used in the system of personal computers (pershernal c〇mputer) has an absolute impact on the computer system. Therefore, when she was designed, she must rely on the testers. Experience, check the various circuits on the motherboard, whether it meets the specifications. 'The towel is on the social machine board—only read on, the storage and the basic input and output system Input/Qut (10) plus (four), referred to as BIOS) Program, the basic input and output system (BI〇s) program contains the basic subroutine of the multi-computer output. The basic input output system program is responsible for performing the initial hardware, 疋 and L when the computer system is turned on to ensure that the components of the computer 可以 可以 can be properly operated and read the hard disk size and the scale. And remember (4) and other information; one or two miscellaneous input and output system (Na) program detection of the hardware is not normal, immediately stop operating. Body,=1^ test personnel use the diagnosis-diagnosis interface card and the memory on the right one. The board is scheduled for diagnostic examination, wherein the diagnosis interface card is set to ^#ISA; ^ 〇ndUStry δΐΛά ΑΓ〇Μ^ΐυΓ6 ^ 5 !3〇3762 The diagnostic interface card of the 'traditional industry standard architecture (10) interface has the following disadvantages: 传输 Its transmission speed (8 megahertz (MHz)) is slow, and the required signal chat There are more Pin Counts. 2. Due to the current information electronic escaping, the slot in which the motherboard j and the interface interface (ISA) interface are interposed is no longer produced. Therefore, the diagnosis of the motherboard will be made. The check did not go smoothly. Because, in the current personal computer system, the basic input and output (4) system (10) S), the mine through the low pin count (Low Pin Count (LPC) interface to read the computer system Clock (such as: Flash M_ry), the Intel (Intel) developed this specification to replace the traditional industry standard architecture (ISA) interface and memory, the main feature is to reduce the signal pins required Pin Count and increase its transmission speed to 33 megahertz (MHz), the original speed is 8 megahertz (MHz). Based on this, the inventor senses the phenomenon that the diagnostic interface card is designed through the low pin count (LPC) interface, and the diagnostic interface card through the low pin count (LPC) interface is read to read the motherboard. After the power is turned on, it will self-test whether the components of the above components are normal, and check whether there is a signal that some important peripheral devices are not connected, so that the test personnel can check and diagnose the test functions of the motherboard. In order to improve the production yield of the motherboard, reduce its production error rate and production cost, in order to enhance the competitiveness of the industry in its similar products, which is the inventor of this case believes that there must be 6 1303762 to apply for a patent The origin of the conception. SUMMARY OF THE INVENTION In view of the above introduction, the traditionally used industrial standard architecture (ISA) interface and the soil memory type have been provided by the industry due to the slow transmission speed and the required number of signal pins, and it is urgent to have a new design. The Linlin interface card is used to help the tester to perform the inspection and diagnosis of the domain board to avoid affecting the overall production yield of the motherboard. Therefore, in order to solve this problem, the inventor The experience of the year is a long-term effort to study and experiment, and finally, (4) the purchase of the "diagnostic interface card with the check board", (10) to improve the production of the motherboard by the ingenuity rate. The purpose of this book is to provide a through-low pin number (coffee) interface to design a -Lin interface card, through the scale interface card can read a motherboard (10) herboard) after the self-function signal, and multiple checkpoints (CheckiW) code value, and the code value is displayed, for the tester to check the error code (Error Code) on the comparison table according to the code value, then the fault of the motherboard is known, and then the inspection is completed. Lay the domain board, carefully test (4) the motherboard development test, and improve the production yield of the motherboard, & and the cost of production. In order to achieve the foregoing objectives, the technical means of the present invention is to design an interface card having a low pin count interface for reading a self-test turtle number and a plurality of checkpoint signals of a motherboard after being turned on, and The signal is stored in the -memory' _ these signals are sent to the _programmable controller into the 1303762 ί! ΐ data detection and judgment processing, and the processed data is stored in the data temporary storage H towel, and will - the code value is transmitted through the display, and the code value is displayed on the top two for the test personnel to check according to the code value - the error on the wire is used to know the fault of the motherboard, thereby helping the tester to check, Diagnose the purpose of the motherboard. . In addition, the interface card further includes a switch, which is connected to the programmable H, and the switch can display the value of the 32-bit/b(1) (four) line and the address line. The switch is used by the tester to select the code values of the first 8 groups before the programmable controller is transmitted, and is displayed by the display. And, the interface card further includes a second memory, which is connected to the data temporary storage 1 §, and (4) for storing the domain board service; thereby, the interface card is used in the interface card according to the present invention. The first memory and the second read and the body are configured to reduce the loading of the first memory and the second memory on the motherboard when the motherboard is produced and tested. Work, so - will increase the production efficiency of the _ domain board. In order to facilitate the reviewer's understanding and understanding of the technical means and operation of the present invention, the details of the implementation are as follows: [Embodiment] The present invention is a type of "used to check the motherboard For the diagnostic interface card, please refer to FIG. 1 for the best practice of the present invention, including a diagnostic interface card 10, which is provided with a low pin number (L〇w Pin Count). , face LPC) interface m, a first memory 1〇2, 〆1303762 programmable programming controller 103' - data register i〇4 (DataBuffer) and a port 105, wherein the low pin count (LPC) Interface 1〇1 contains multiple control signal lines (7 pins: pc ICLK, PC IRST #, LFRAME, LAD[0~3]) ' is used to read a motherboard 2〇 (Motherboard) after booting Power On Self Test (POST) signal
(在啟動該主機板20的時候，測試其上各部分元件是否 正常，以及檢查是否有某些重要的周邊裝置沒有接上，以 維持該主機板20的正常運作，即所謂的p〇ST。）及複數 檢查點（Checkpoint)信號，該等檢查點（Checkp〇int) 係存放在該域板20上-唯讀記紐上的—段基本輸入 輸出系統（Basic Input/Output System，簡稱 BIOS)程 式中，該自我測試信號係至少包含該主機板2〇上一即時 時鐘（Real Time Clock，_RTC)之檢測信號及其上一 記憶體存取檢雕號，其中該即時時鐘，係—種脈衝發生 器作為該主機板20上記錄系統之時間日期的必要元件。 前述該第-記憶體1〇2係用以儲存該低針腳數（Lpc) 界面101所接收之該自_試信號及複數檢查點信號。 前述該可程式規劃控制器1〇3係用以接收該低針腳數 (LPC)界面101所傳出之該___ 信號，並纽-資料之、檢戦騎後，將—碼值糾。 前述該資料暫存器取係用以暫時儲存該可程式規割 控制器103之處理資料，該警粗彳 一 計違貝枓（Data)包含8組資料線 = 料線(D[0〜15])及32位址線 (Address) (A[0〜31])。 9 1303762 前述該連接璋105係用以接收該可程式規劃控制器 103所傳出之碼值，並透過一顯示器3〇將該碼值顯示在其 上’以供-測試人貞依據該碼麟照—_、表上之錯誤碼 (Error Code)後，即可知到該主機板2〇之故障所在， 其中顯示器30係可顯示32位元⑽）資料線與位址線 的值。 藉由上述各構件，在該域板2G _後，會立即執行 自我測試，此時，該診斷界面卡1〇上之該低針腳數（Lpc) 界面101 ’將同時讀取該自我職信號及複數檢查點信 除可將料信雜存在該第—記,_⑽巾，並將該 等信號送至該可程式規馳彻⑽進行_資料之檢 判斷處理’並將處理後之該資料儲存在該資料暫存器刚 中，且將一碼值透過該顯示器3〇將該石馬值顯示在其上， 以供該測試人員依據該碼值對照該對照 (Error Code)後，即可知到該主機板2〇之故障^在/ 另丄該主触20在職職完畢後，村_該診斷界 :卡1〇作為-軟體檢查點顯示。藉此，透過該診斷界面 10即可使剌試人員加速檢修社機板2q，並提高該 主機板20之開發職及生產良率，同 錯誤率與生產成本。 桃”生產 在^實施例中，復請參閱第丨圖所示，該診斷界面卡 括^換開關⑽，該切換開關⑽係與該可程 :^控制②1〇3連接，由於該顯示器加係可顯示犯位 疋（b⑴資料線與位址線的值，故透過該切換開關⑽ 1303762 用以供該測試人員選擇該可程式規劃控制器⑽所傳出之 前後8組的碼值，趣軸示H 3G顯示在其上，以利生 產測試的須要。(When the motherboard 20 is activated, it is tested whether the components on the board are normal, and whether some important peripheral devices are not connected to maintain the normal operation of the motherboard 20, so-called p〇ST. And a checkpoint (Checkpoint) signal, which is stored on the domain board 20 - a basic input/output system (Basic Input/Output System, BIOS for short) In the program, the self-test signal includes at least a detection signal of a Real Time Clock (_RTC) on the motherboard 2 and a memory access check number of the previous memory, wherein the instant clock is a pulse The generator serves as an essential component of the time and date of the recording system on the motherboard 20. The first memory 1〇2 is configured to store the self-test signal and the complex checkpoint signal received by the low pin count (Lpc) interface 101. The programmable programming controller 1〇3 is configured to receive the ___ signal transmitted by the low pin count (LPC) interface 101, and check the code value after the check. The data cache is used to temporarily store the processing data of the programmable controller 103. The data contains 8 sets of data lines = material lines (D[0~15] ]) and 32 address lines (Address) (A[0~31]). 9 1303762 The foregoing port 105 is configured to receive the code value transmitted by the programmable controller 103, and display the code value on the display through a display 3 for the tester to follow the code After the error code is displayed on the table, the error code of the motherboard can be known. The display 30 can display the value of the 32-bit (10) data line and the address line. With the above components, the self-test is performed immediately after the domain board 2G_, and at this time, the low-pin number (Lpc) interface 101' on the diagnostic interface card 1 will simultaneously read the self-signal signal and The plurality of checkpoints may be stored in the first note, the _(10) towel, and the signals are sent to the programmable code (10) for the _ data check process 'and the processed data is stored in the The data register is just in the middle, and a code value is displayed on the display through the display, so that the tester can compare the error code according to the code value. The failure of the motherboard 2 ^ ^ 在 / 丄 The main touch 20 after the completion of the job, the village _ the diagnostic community: card 1 〇 as a - software checkpoint display. Therefore, through the diagnostic interface 10, the test personnel can speed up the maintenance of the social machine board 2q, and improve the development position and production yield of the motherboard 20, as well as the error rate and production cost. "Peach" is produced in the embodiment, as shown in the figure, the diagnostic interface includes a switch (10), and the switch (10) is connected to the process: ^ control 21〇3, because the display is added The value of the 犯 (b(1) data line and the address line can be displayed, so the switcher (10) 1303762 is used by the tester to select the code values of the previous 8 groups transmitted by the programmable controller (10). H 3G is shown on it to facilitate the production test needs.
除此之外，在該診斷界面卡10上係另包括有-第二記 憶體107，該第二記憶體1〇7係與該資料暫存器⑽相連 接，用以供存放該主機板20開機程式之用；意即該第二 記憶體107内係可供存放該主機板20之開機程式，使得 該主機板20亦可透過該低針腳數（Lpc)界面ι〇ι、該可 程式規劃控制H 103及該資料暫存器刚與該第二記憶體 107之相連接，而達到開機之目的。 “ 藉此透過本發明在該診斷界面卡1G上所^之該第一 記憶體廳與該第二記憶體，可使得在生產測試該主 機板20 a寺，可減少再行將該第一記憶體1〇2與該第二記 憶體107組裝在該主機板2〇上的工作，如此一來，將可 更加提高該主機板20之生產效率。In addition, the diagnostic interface card 10 further includes a second memory 107 connected to the data register (10) for storing the motherboard 20 The booting program is used; that is, the second memory 107 is configured to store the booting program of the motherboard 20, so that the motherboard 20 can also pass the low stitch number (Lpc) interface, and the programmable program can be programmed. The control H 103 and the data register are just connected to the second memory 107 to achieve the purpose of booting. The first memory hall and the second memory on the diagnostic interface card 1G can be used to test the motherboard 20 a in the production test, thereby reducing the first memory. The work of the body 1〇2 and the second memory 107 on the motherboard 2〇, so that the production efficiency of the motherboard 20 can be further improved.
按，以上所述，僅為本發明最佳之一具體實施例，惟 本^明之技巧特徵並不侷限於此，凡任何熟悉該項技藝者 在本發明領域内，可輕易狀之變化或修飾’應均被涵蓋 在以下本案之申請專利範圍内。 【圖式簡單說明】 第1圖係本發明診斷界面卡之方塊示意圖。 【主要元件符號說明】 診斷界面卡…10低針腳數(LPC)界面…101 第一記憶體…102可程式規劃控制器…103 11 1303762 資料暫存器… 104 連接埠 …105 切換開關 … 106 第二記憶體 …107 主機板 … 20 顯示器 …30 12According to the above, it is only one of the best embodiments of the present invention, but the technical features of the present invention are not limited thereto, and any one skilled in the art can easily change or modify in the field of the invention. 'should be covered in the scope of the patent application in this case below. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of a diagnostic interface card of the present invention. [Main component symbol description] Diagnostic interface card...10 low pin count (LPC) interface...101 First memory...102 programmable controller...103 11 1303762 Data register... 104 port 埠...105 switch... 106 Two memory...107 motherboard... 20 display...30 12