1295504 九、發明說明： 【發明所屬之技術領域】 ‘ 本發明係關於一種雙鎖開關電路，尤指一種應用於一 液晶顯示面板之雙鎖開關電路。 【先前技術】 在液晶顯示面板包括由晝素電極排列成m列（row)、3η 行（column)之陣列。因此所有之畫素電極之個數為mx3n。 母個畫素是由三個分別代表紅色（recj)、綠色（green)以及 Ιί色（blue)的畫素電極所構成。亦即，以一群（mxn)畫素電 .極用以顯示紅色，以形成R次晝素（subpixels)。另一群（m χη)旦素電極用以顯示綠色’以形成g次畫素。剩下之（jjjx η)畫素電極用以顯示藍色，以形成β次畫素。因此，該液 晶顯不面板之總畫素為（mx3n)。而第1至第m條掃描線係 分別沿陣列之列方向排列，第丨至第n條掃描線係分別沿 陣列之行方向排列。mx 3η個薄膜電晶體（thin film transistors, TFTs)則配置於掃描線與資料線之交點上，用 以驅動各個畫素電極。同一掃描線上的每個TFT，其閘極 均電性連接到與其對應之掃描線第丨至第m。而同一資料 線上的每個TFT ’其汲極均電性連接到與其對應的畫素電 •極。在習知液晶顯示面板檢測技術中，需要使用複數個測 试針腳來進行液晶顯示面板之檢測。首先，必須將複數個 測试針腳個別連接液晶顯示面板所有訊號輸入端。將資料 動信號傳送到資料線路電路板，依據掃描控制信號以及 =料控制信號，分別驅動液晶顯示面板的每條掃描線以及 資7線，使得被掃描掃描線所連接的所有TFT，可以將所 有貧料線上的影像資料傳送到對應的畫素電極，藉此用來 檢測晝面顯示之品質。然而，應用複數個測試針腳測試系 統之液晶顯示面板檢測技術具有下面之缺點··第一、複數 個測試針腳測試系統之價格十分昂貴，以1〇24 (行）*768 5 1295504 U =液晶顯示面板為例，則至少有難個訊號輪 入ϋ 要接近彻0個測試針腳之測試系統。第二、 隨者南解析度與大尺寸之液晶顯示面板需纟， 目：；1十腳之測試系統來進行液晶顯示面板之檢測 再者要提高測試針腳之數目，單位面積之測試針 腳必須增加’因此容易造成測試針腳與液晶顯示面 板輸2之電性連接不穩定的現象，使得檢測效率大 低。因此檢測的可靠度大為降低。1295504 IX. Description of the invention: [Technical field to which the invention pertains] ‘ The present invention relates to a double lock switch circuit, and more particularly to a double lock switch circuit applied to a liquid crystal display panel. [Prior Art] The liquid crystal display panel includes an array in which arrays of m columns and 3 columns are arranged by halogen electrodes. Therefore, the number of all pixel electrodes is mx3n. The parent pixel is composed of three pixel electrodes representing red (recj), green (green), and Ιί color (blue). That is, a group of (mxn) pixels are used to display red to form R subpixels. Another group of (m χη) denier electrodes is used to display green ' to form g-order pixels. The remaining (jjjx η) pixel electrodes are used to display blue to form a β-pixel. Therefore, the total pixel of the liquid crystal display panel is (mx3n). The first to mth scanning lines are arranged in the column direction of the array, and the second to nth scanning lines are arranged in the row direction of the array, respectively. Mx 3n thin film transistors (TFTs) are disposed at the intersection of the scan line and the data line to drive the respective pixel electrodes. Each of the TFTs on the same scanning line is electrically connected to its corresponding scanning line from the second to the mth. Each of the TFTs on the same data line is electrically connected to its corresponding pixel. In the conventional liquid crystal display panel detection technology, it is necessary to use a plurality of test pins for detecting the liquid crystal display panel. First, a plurality of test pins must be individually connected to all signal inputs of the LCD panel. The data signal is transmitted to the data circuit board, and each scan line of the liquid crystal display panel and the 7 lines are respectively driven according to the scan control signal and the material control signal, so that all the TFTs connected to the scan scan line can be all The image data on the poor material line is transmitted to the corresponding pixel electrode, thereby detecting the quality of the facet display. However, the liquid crystal display panel detection technology using a plurality of test pin test systems has the following disadvantages: First, the price of a plurality of test pin test systems is very expensive, at 1 〇 24 (rows) * 768 5 1295504 U = liquid crystal display For example, if there is a panel, it is difficult to get at least one signal to enter the test system that is close to 0 test pins. Second, the south resolution and the large-size liquid crystal display panel need to be smashed, and the test system of the 10 feet should be used to test the liquid crystal display panel. The number of test pins should be increased, and the test pin per unit area must be increased. 'Therefore, it is easy to cause the electrical connection between the test pin and the liquid crystal display panel to be unstable, which makes the detection efficiency low. Therefore, the reliability of the detection is greatly reduced.
明參考第1A圖’係為f知液晶顯示面板檢驗電路之示 意圖。該檢驗電路，包含··複數條控制線102、l〇2a、複 數條資料線103、複數條輸人資料線1()3a、複數條掃描線 104、複數條輸入掃描線1〇4a、複數個開關電路丨〇6，而一 開關電路係為一電晶體結構並以製程的方式佈局於一基板 100，其中該複數條輸入資料線1〇3a分別為R、G、B三條 輸入為料線，該複數條輸入掃描線1〇4a分別為奇數（〇dd) 及偶數（Even)二條輸入掃描線。首先，複數條資料線1〇3 與該，數條掃描線1〇4係以互相交錯分佈於該基板1〇〇 中’母條 > 料線1 〇3與掃描線1 〇4皆連接於相對應開關電 路1 06之汲極，該複數個開關電路丨〇6之源極分別電連接 該，數條輸入資料線103&與該複數條輸入掃描線1〇4a。 接著’該複數個開關電路丨之閘極分別對應該複數條控 制f 1 02、1 〇2a係用以接收一控制訊號，以控制所對應之 該等掃描線與該等資料線導通或關閉（Turn 〇ff)。最後實 施檢測時，透過該等控制線1 〇2、1 〇2a以導通開關電路 1〇6 ’可藉由奇數（Odd)及偶數（Even)二條輸入掃描線以及 R、G、B三條輸入資料線即可驅動整個面板的所有畫素電 極（圖未表示），驗證畫面之品質。相較於習知複數個測試 針腳測試系統之液晶顯示面板檢測技術，第1A圖所示之液 晶顯示面板快速檢測技術，僅需使用控制線1〇2、奇數（〇dd) 6 1295504 及偶數（Even)二條掃描線i〇4即可檢測液晶顯示面板之某 區域的狀況，使得檢測效率大為提升，節省了檢測設備的 成本與檢測時間。 然而此種習知液晶顯示面板快速檢測電路，為了避免 " 在正常使用時，檢驗電路對顯示區之電路造成干擾而產生 顯示異常狀況，藉由對開關電路丨〇6之閘極施加逆偏壓或 浮接（floating)的方式關閉（Turn off)該等開關電路。然 而’不論以施加逆偏壓或浮接（f 1 〇at i ng)的方式仍可能於 正常使用時導通，使得晝素單元無法得到預定電壓，進而 造成液晶顯示面板的畫質偏暗（dark panel )及顏色不均的 _ 情形，而影響面板的顯示品質。 請參考第1B〜1C圖習知局部開關電路結構之示意圖。 如第1B〜1C圖所示，該開關電路係為一電晶體結構，包含： 一金屬層120、一半導體層122。一般液晶顯示器設計是在 常溫下麵作’若在戶外的高溫環境下操作，會因為半導體 層之物理特性，使得電晶體之臨界電壓（thresh〇ld voltage)降低。當電晶體之閘極與源極之間的電壓差大於 臨界電壓Vth，使得該開關電路導通（turn on)，即發生閉 鎖不良而產生漏電流的現象，因而影響液晶顯示面板畫面 的顯示品質。 職是之故，本發明鑒於習知技術之缺失，乃思及改良 發明之意念，發明出本案之『雙鎖開關及其應用電路』。 【發明内容】 本發明之一目的係提供一種雙鎖開關電路及其應用電 路，該應用電路包含複數個雙鎖開關電路，其中每一雙鎖 開關電路包含一第一電晶體及一第二電晶體，以構成一開 關電路。而該第一電晶體之源極搞接該第二電晶1體之没 極，該第一電晶體之閘極耦接該第二電晶體之閘極，使得 該雙鎖開關電路之導通電壓較單一電晶體為高，來抑制泡 7 1295504 漏電流’其餘腳位為外部訊號輸出入端點。該複數雙鎖開 關電路之閘極為接收一控制訊號使該複數個雙鎖開關電路 導通或關閉。 ’ 本發明之另一目的係提供一種雙鎖開關電路及其應用 *電路’該應用電路包含：複數條控制線、複數條資料線、 複數條輸入資料線、複數條掃描線、複數條輸入掃描線、 複數個雙鎖開關電路。而複數個雙鎖開關電路係為一第一 複數個開關電路以及一第二複數個開關電路，用以測試液 晶顯示面板，其中該複數條資料線與該複數條掃描線係以 互相交錯分佈於該基板中，每條資料線與掃描線分別連接 • 於相對應之該些第一及第二開關電路之汲極，而該些第一 及第二開關電路之源極分別電連接該複數條輸入資料線與 該複數條輸入掃描線。該複數條控制線分別有不同功能， 其中之一控制線並列於該複數條輸入資料線與該第一複數 個開關電路之間；另一控制線並列於該複數條輸入掃描線 與該第二複數個開關電路之間，藉由該複數條控制線接收 外部之控制訊號以導通該些第一及第二開關電路，藉著哥 數及偶數一條輸入掃描線以及r、G、B三條輸入資料線即 可驅動整個面板的所有畫素電極，係用以檢測相對應之液 φ 晶顯示面板之像素（P i xe 1)的顯示品質。 本發明之另一目的係提供一種雙鎖開關電路及其應用 電路’藉由該複數條控制線接收外部之控制訊號以驅動該 複數個雙鎖開關電路之閘極，係用以偵測相對應之液晶顯 示面板之像素，且有效阻隔訊號線之間之干擾。 依據本發明之具體實施例，其中該雙鎖開關電路包含 一第一電晶體以及一第二電晶體所構成，而兩者之電晶體 係為一薄膜電晶體（TFT)。 依據本發明之具體實施例，其中每一個該雙鎖開關電 路包含一第一電晶體耦接一電壓調節裝置，該電壓調節裝 1295504 置係為一二極體所組成。 依據本發明之具體實施例，其中一 路包含一第一電晶體耦接一電壓調節詈 ，置係為一電阻所組成。 λ即裝置’該電壓調節裝 •依據本發明之具體實施例，其中廿去并 苴庫用雷改每所认处碰 l 4 /、τ亚未改變雙鎖開關及 路貝質的結構設計’其連接導線之材用阻 高阻抗值達到抑制茂漏電流的產生。 電路有上述之目的，本發明提供一種開關 一基板； -㈣=導電層形絲該基板上，而該第―導電層係為 一第一導電層，該第一導電層係為一閘極電極； 一閘極絕緣層係覆蓋該第一導電層； 一第一半導體層係形成於該閘極絕緣層上，並與該閘 極電極相互重疊（〇verlap); 一第二半導體層係形成於該第一半導體層上； 一第二金屬層係形成於該第二半導體層上，並分隔成 一汲極電極、一源極電極以及一源極汲極電極；以及 一保護層覆蓋於該第二金屬層。 本案得藉由以下列圖是與詳細說明，俾得一更深入之 了解〇 【實施方式】 請參考第2A〜2B圖係分別為本發明較佳實施例之雙 鎖開關電路結構剖面示意圖以及開關電路示意圖。該雙鎖 開關電路200包含一第一電晶體以及一電壓調節裝置並以 製程方式而組成，其中該雙鎖開關電路200係為一第一電 晶體及一第二電晶體。首先，一基板202，係為一透明絕 9 1295504 緣基板或一玻璃基板，於上方形成一導電層 利用光罩對該金屬層進行微影钱刻製程，以定義:間極電 .極（gate eleCtr〇de)204，而該閘極電極204係作為該第一電 晶體與該第二電晶體之閘極。然後，依序於該基板2〇2表 .面上覆蓋一閘極絕緣層206、一第一半導體層2〇仏以及第 -半導體層2G8b，其中該閘極絕緣層鳩係由例如氧化石夕 層或氮化矽層所構成，該第一半導體層2〇8a係由非晶質矽 (amorphous siliC0n，a-Si)所構成，第二半導體層⑼讣係 為摻雜非晶質矽（doped amorphous siiicon，a_Si)所構成， 例如n+，利用光罩對該第一半導體層2〇8a以及第二半導 灸體層208b進行微影，使殘留之該第一半導體層2〇8&以及 第二半導體層208b覆蓋於閘極電極2〇4上方區域。 一接著，於該基板202表面上形成一第二金屬層（未標 不）。跟著利用光罩對該第二金屬層進行微影與蝕刻製程， 係使第二金屬層分隔成一汲極電極、一源極電極以及一源 極汲極接電極，再利用相同之光罩將未被第二金屬層覆蓋 之部分該第一半導體層208a與該第二半導體層208b去 除。如此一來，該第二半導體層2〇8b能被區分成一汲極電 極2 1 0、一源極電極2 12以及一源極汲極電極2 14。最後， 於該基板202覆蓋一保護層216，以形成該雙鎖開關電路 ^ 200的圖形’係將該雙鎖開關電路2〇〇定義為一開關電路。 請參考第2C圖係為上述雙鎖開關電路之簡單電路示 思圖。一第一電晶體230之汲極Di與一第二電晶體232之 源極S2具有電性連接關係。假設只有一顆電晶體時，該第 二電晶體232的閘極g2與汲極d2之間的電壓差大於臨界 電壓Vth時，會產生漏電流的現象。因此再增加第一電晶 體230，藉由增加阻抗值以抑制漏電流的現象。在此實施 例中兩顆電晶體的等效臨界電壓約為兩倍的Vth，假設該 第二電晶體232之電壓差大於臨界電壓vth而小於兩倍臨 10 1295504 2壓vth日夺，將不會導通兩顆電晶冑，能有效改善漏電 ，見象其中3亥第一電晶體230與該第二電晶體232可 為一薄膜電晶體。 斤。請參考第2C，圖係為雙鎖開關電路另一較佳實施例之 電路示意圖。該雙鎖開關電％ 2〇〇係為一薄膜電晶體 、卫成其中將該第二電晶體232的閘極G2與汲極D2電 連接]此時該第二電晶體232可視為_二極體，該二極體 也同樣具有電阻的功效，可以使該第_電晶體23〇的閉極 ^與汲極〇1之間的電壓差會小於臨界電壓，以抑制漏電流 產生。 • 舉例來說，請參考第3圖係為本發明之液晶顯示面板 檢驗電路示意圖。其中，液晶顯示面板包括一基板3〇〇、 複數條控制線302、302a、複數條資料線3〇3、複數條輸入 資料線303a、複數條掃描線304、複數條輸入掃描線3〇“ 以及複數個雙鎖開關電路306。係將複數個雙鎖開關電路 3〇6分為一第一複數個開關電路（圖未表示）以及一第二複 數個開關電路（圖未表示），係用以測試液晶顯示面板，其 中該複數條輸入資料線303a分別為R、〇、B三條輸入資 料線，該複數條輸入掃描線304a分別為奇數（〇dd)及偶數 (Even)二條輸入掃描線。首先，該複數條資料線303與該 複數條知描線304係以互相父錯分佈於該基板中，每 條資料線303與掃描線304分別連接於相對應之該些第一 及第二開關電路之沒極，而該些第一及第二開關電路之源 極分別電連接該複數條輸入資料線3 0 3 a與該複數條輸入 掃描線304a。接著，該複數條控制線302、3〇2a分別有不 同功能，其中之一控制線302a並列於該複數條輸入資料線 303a與该弟一複數個開關電路之間，另一控制線302並列 於該複數條輸入掃描線304a與該第二複數個開關電路之 間，藉由該複數條控制線302、302a接收外部之控制訊號 1295504 以導通該複數個雙鎖開關電路306，藉著奇數（〇dd)及偶數 (Even)二條輸入掃描線以及R、G、B三條輸入資料線即可 '驅動整個面板的所有畫素電極（圖未表示），係用以檢測相 對應之液晶顯示面板之像素（pixel)的顯示品質。 • 其中’该第一電晶體230之源極S!(請配合第2C圖） 分別電連接相鄰之該複數條r、G、B輸入資料線303a，以 及另一相鄰之該複數條奇數（Odd)及偶數（Even)輸入掃描 線3 04a’且該第一電晶體230之閘極G〗分別與鄰近之該控 制線3 02、302a相連接’係分別用以接收外部所發出之控 制訊號，再經由該第二電晶體232之汲極D2傳送相對應之 # 控制訊號’使得相對應之該複數條資料線3 03及該複數條 掃描線3 04能產生相對應之訊號。 再者’依據本發明之較佳具體實施例，藉由該複數個 雙鎖開關電路306均可精碟的提供一參考電壓與一控制訊 號。因此，液晶顯示面板陣列（array)中之像素，其所包含 之母一雙鎖開關電路均得以產生一時脈之控制訊號。其中 Vth為一閘極Gi及汲極Dl之臨界電壓，當閘極（^及汲極 Da之臨界電壓為V’th，且Vth，>Vth時，可提高該複數個 雙鎖開關電路3 0 6之導通電壓’即能抑制浪漏電流產生。 藉由該複數個雙鎖開關電路306的電性連接，以形成一内 9 部電路開關電路，讓使用者於正常使用時，能有效避免電 子零件特性的改變而產生異常的現象，使得該複數條資料 線3 03與該複數條掃描線304交會處之晝素能得到一預定 電壓’以有效改善液晶顯示面板產生忽暗忽亮的暗點現象。 值得一提的是，係於測試顯示面板時，透過奇數掃描 線以各別偵測相對應之R資料線、G資料線以及b資料線； 以及透過偶數掃描線以各別偵測相對應之R資料線、G資 料線以及B資料線，藉此檢驗液晶顯示面板之各原色的顯 示品質。 12 1295504 ^再者，其中本發明之雙鎖開關電路檢測結構能以另一 :路實現，其中每一該雙鎖開關電路包含一第一電晶體耦 電壓調節裝置，該電壓調節裝置係為一電阻所組成， 错以增加阻抗值來抑制洩漏電流產生。 又，本發明之雙鎖開關電路檢測結構能以另一電路實 ，，其中連接之導線可藉由阻抗較高的材質，藉由增加阻 抗值來抑制洩漏電流的產生。 上述本發明之具體實施例與圖示係使熟知此技術之人 所能瞭解，然而本專利之權利範圍並不侷限在上述實施 例0 因而可以看見，基於解說本發明之功能與結構原理之 目的而顯示及說明纟發明《具體實施 體實施例進行均等變化，而尤&始她_ ^彳対这寻具 4 %叮J寻芟化，而不致脫離此類原理。因此，太 $明專利範圍包括涵蓋於以下巾請專利範圍 内之所有均等變化。 1^、辄圍 【圖式簡單說明】 第1A圖習知液晶顯示面板檢驗電路之示意圖。 第1B〜1C圖習知局部開關電路結構之示意圖。 係分別為本發明較佳實施例之雙鎖開關結構之剖 Ϊ示2^#'剌為本發明較佳實_之雙鎖開關f路結構 L2CC，圖:Λ本太發:月之雙鎖開關電路簡單電路示意圖。 ::c圖:、為本發明之另—較佳實施例 早電路示意圖。 j丨呵电格間 第發”液晶顯示面板檢驗電路示意圖。 【主要7G件符號說明】 〜131 100基板 102、l〇2a複數條控制線 13 1295504 103複數條資料線 104複數條掃描線 ί 106複數個開關電路 ^ 120金屬層 . 122介電層 200雙鎖開關電路 202 ' 300 基底 2 0 4間極電極 206閘極絕緣層 208a第一半導體層 φ 2〇8b第二半導體層 2 1 0沒極電極 2 12源極電極 2 1 4源極汲極電極 2 1 6保護層 230第一電晶體 232第二電晶體 302、302a複數條控制線 303複數條資料線 303a複數條輸入資料線 • 304複數條掃描線 、 複數條輸入掃描線304a ' 306複數個雙鎖開關電路 G1、G2閘極S1、S2源極 D1、D 2沒極Referring to Figure 1A, the schematic of the liquid crystal display panel inspection circuit is shown. The verification circuit comprises: a plurality of control lines 102, 10a, a plurality of data lines 103, a plurality of input data lines 1 () 3a, a plurality of scan lines 104, a plurality of input scan lines 1 〇 4a, a plurality a switch circuit 丨〇6, and a switch circuit is a transistor structure and is arranged in a process on a substrate 100, wherein the plurality of input data lines 1〇3a are respectively R, G, B three input lines The plurality of input scan lines 1〇4a are odd (〇dd) and even (Even) two input scan lines, respectively. First, a plurality of data lines 1〇3 and the plurality of scanning lines 1〇4 are alternately distributed in the substrate 1〇〇's 'female>> the material line 1 〇3 and the scanning line 1 〇4 are connected to each other. Corresponding to the drain of the switching circuit 106, the sources of the plurality of switching circuits 丨〇6 are electrically connected to the plurality, respectively, and the plurality of input data lines 103& and the plurality of input scanning lines 1〇4a. Then, the gates of the plurality of switching circuits are respectively corresponding to the plurality of control devices f 1 02, 1 〇 2a for receiving a control signal to control the corresponding scan lines to be turned on or off with the data lines ( Turn 〇ff). Finally, when the detection is performed, the control lines 1 〇 2, 1 〇 2a are turned on to turn on the switching circuit 1 〇 6 ' by the odd (Odd) and even (Even) input lines and the R, G, and B input data. The line can drive all the pixel electrodes of the entire panel (not shown) to verify the quality of the picture. Compared with the conventional liquid crystal display panel detection technology of a plurality of test pin test systems, the liquid crystal display panel rapid detection technology shown in FIG. 1A only needs to use the control line 1〇2, odd number (〇dd) 6 1295504 and even number ( Even) The two scanning lines i〇4 can detect the condition of a certain area of the liquid crystal display panel, so that the detection efficiency is greatly improved, and the cost and detection time of the detecting device are saved. However, such a conventional liquid crystal display panel rapid detection circuit, in order to avoid " in normal use, the verification circuit interferes with the circuit of the display area to cause an abnormal display condition, by applying a reverse bias to the gate of the switching circuit 丨〇6 The switching circuits are turned off by pressure or floating. However, 'the reverse conduction or floating connection (f 1 〇 at i ng) may still be turned on during normal use, so that the pixel unit cannot obtain a predetermined voltage, thereby causing the liquid crystal display panel to have a dark image quality (dark) Panel ) and the _ case of uneven color, which affects the display quality of the panel. Please refer to the schematic diagram of the structure of the local switch circuit according to the figures 1B to 1C. As shown in FIGS. 1B to 1C, the switching circuit is a transistor structure comprising: a metal layer 120 and a semiconductor layer 122. Generally, the liquid crystal display is designed to operate under normal temperature. If it is operated in an outdoor high temperature environment, the threshold voltage of the transistor is lowered due to the physical properties of the semiconductor layer. When the voltage difference between the gate and the source of the transistor is greater than the threshold voltage Vth, the switching circuit is turned on, that is, a latching failure occurs to cause a leakage current, thereby affecting the display quality of the liquid crystal display panel screen. For the sake of the job, the present invention has invented the "double lock switch and its application circuit" in the present invention in view of the lack of the prior art and the idea of improving the invention. SUMMARY OF THE INVENTION One object of the present invention is to provide a double lock switch circuit and an application circuit thereof, the application circuit includes a plurality of double lock switch circuits, wherein each double lock switch circuit includes a first transistor and a second circuit Crystals to form a switching circuit. The source of the first transistor is connected to the gate of the second transistor 1 , and the gate of the first transistor is coupled to the gate of the second transistor, so that the turn-on voltage of the double-lock switch circuit It is higher than a single transistor to suppress the leakage current of the bubble 7 1295504. The remaining pins are the external signal input and output terminals. The gate of the plurality of double lock switch circuits receives a control signal to turn the plurality of double lock switch circuits on or off. Another object of the present invention is to provide a double-lock switch circuit and an application* circuit thereof. The application circuit includes: a plurality of control lines, a plurality of data lines, a plurality of input data lines, a plurality of scan lines, and a plurality of input scans. Line, a plurality of double lock switch circuits. The plurality of double-lock switch circuits are a first plurality of switch circuits and a second plurality of switch circuits for testing the liquid crystal display panel, wherein the plurality of data lines and the plurality of scan lines are staggered with each other. In the substrate, each of the data lines and the scan lines are respectively connected to the drains of the first and second switch circuits, and the sources of the first and second switch circuits are electrically connected to the plurality of strips Enter the data line and the multiple lines to enter the scan line. The plurality of control lines respectively have different functions, wherein one of the control lines is juxtaposed between the plurality of input data lines and the first plurality of switch circuits; another control line is juxtaposed to the plurality of input scan lines and the second Between the plurality of switch circuits, the plurality of control signals are received by the plurality of control lines to turn on the first and second switch circuits, and the input scan lines and the three input data of r, G, and B are used by the number and the even number. The line can drive all the pixel electrodes of the entire panel to detect the display quality of the corresponding pixel (P i xe 1) of the liquid crystal display panel. Another object of the present invention is to provide a double lock switch circuit and an application circuit thereof for receiving an external control signal by the plurality of control lines to drive the gates of the plurality of double lock switch circuits for detecting corresponding The pixels of the liquid crystal display panel and effectively block the interference between the signal lines. According to a specific embodiment of the present invention, the double lock switch circuit comprises a first transistor and a second transistor, and the transistors of the two are a thin film transistor (TFT). According to a specific embodiment of the present invention, each of the double-lock switch circuits includes a first transistor coupled to a voltage regulating device, and the voltage adjusting device 1295504 is configured as a diode. According to a specific embodiment of the present invention, a circuit includes a first transistor coupled to a voltage regulation 詈, and the resistor is formed by a resistor. λ is the device 'the voltage adjustment device according to the specific embodiment of the present invention, wherein the 苴 苴 苴 用 雷 雷 雷 每 每 每 每 每 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 τ τ τ τ τ The material of the connecting wire is used to suppress the generation of the leakage current by using a high impedance value. The circuit has the above object, and the present invention provides a switch-substrate; - (4) = conductive layer-shaped wire on the substrate, and the first conductive layer is a first conductive layer, and the first conductive layer is a gate electrode a gate insulating layer covers the first conductive layer; a first semiconductor layer is formed on the gate insulating layer and overlaps with the gate electrode; a second semiconductor layer is formed on a second metal layer is formed on the second semiconductor layer and is divided into a drain electrode, a source electrode and a source drain electrode; and a protective layer covers the second Metal layer. The present invention can be further understood by the following figures and detailed descriptions. [Embodiment] Please refer to FIGS. 2A-2B for a schematic cross-sectional view and a switch of a double-lock switch circuit structure according to a preferred embodiment of the present invention. Circuit diagram. The double-lock switch circuit 200 includes a first transistor and a voltage regulating device and is formed by a process. The double-lock switch circuit 200 is a first transistor and a second transistor. First, a substrate 202 is a transparent substrate or a glass substrate, and a conductive layer is formed thereon. The metal layer is etched by a photomask to define: a pole. The gate electrode 204 serves as a gate of the first transistor and the second transistor. Then, a gate insulating layer 206, a first semiconductor layer 2A, and a first semiconductor layer 2G8b are covered on the surface of the substrate 2〇2, wherein the gate insulating layer is made of, for example, an oxidized oxide a layer or a tantalum nitride layer, the first semiconductor layer 2〇8a is composed of amorphous siliC0n (a-Si), and the second semiconductor layer (9) is doped amorphous doped (doped Amorphous siiicon, a_Si), for example, n+, lithography of the first semiconductor layer 2A8a and the second semi-guided moxibustion layer 208b by a photomask, leaving the first semiconductor layer 2〇8& and the second The semiconductor layer 208b covers the upper region of the gate electrode 2〇4. First, a second metal layer (not labeled) is formed on the surface of the substrate 202. Following the lithography and etching process of the second metal layer by using a photomask, the second metal layer is separated into a drain electrode, a source electrode and a source drain electrode, and the same photomask is used. The portion of the first semiconductor layer 208a and the second semiconductor layer 208b are removed by a portion covered by the second metal layer. In this way, the second semiconductor layer 2 〇 8b can be divided into a drain electrode 2 10 , a source electrode 2 12 and a source drain electrode 2 14 . Finally, the substrate 202 is covered with a protective layer 216 to form a pattern of the double-lock switch circuit ^200. The double-lock switch circuit 2 is defined as a switch circuit. Please refer to the 2C figure for a simple circuit diagram of the above double lock switch circuit. The drain Di of a first transistor 230 is electrically connected to the source S2 of a second transistor 232. Assuming that there is only one transistor, when the voltage difference between the gate g2 and the drain d2 of the second transistor 232 is larger than the threshold voltage Vth, a leakage current occurs. Therefore, the first electric crystal 230 is further increased, and the leakage current is suppressed by increasing the impedance value. In this embodiment, the equivalent threshold voltage of the two transistors is about twice Vth, assuming that the voltage difference of the second transistor 232 is greater than the threshold voltage vth and less than twice the amount of 10 1295504 2 pressure vth day, will not The two transistors can be turned on, which can effectively improve the leakage. It can be seen that the 3H first transistor 230 and the second transistor 232 can be a thin film transistor. jin. Referring to Fig. 2C, the figure is a circuit diagram of another preferred embodiment of the double lock switch circuit. The double-lock switch is a thin film transistor, and the gate G2 of the second transistor 232 is electrically connected to the drain D2. The second transistor 232 can be regarded as a _ diode. The body also has the effect of electrical resistance, so that the voltage difference between the closed pole of the first transistor 23 汲 and the drain 〇 1 will be less than the threshold voltage to suppress leakage current generation. • For example, please refer to Figure 3 for a schematic diagram of the inspection circuit of the liquid crystal display panel of the present invention. The liquid crystal display panel includes a substrate 3〇〇, a plurality of control lines 302 and 302a, a plurality of data lines 3〇3, a plurality of input data lines 303a, a plurality of scan lines 304, and a plurality of input scan lines 3” and a plurality of double lock switch circuits 306. The plurality of double lock switch circuits 3〇6 are divided into a first plurality of switch circuits (not shown) and a second plurality of switch circuits (not shown). The liquid crystal display panel is tested, wherein the plurality of input data lines 303a are respectively R, 〇, and B input data lines, and the plurality of input scan lines 304a are odd (〇dd) and even (Even) two input scan lines respectively. The plurality of data lines 303 and the plurality of lines 304 are distributed in the substrate in a parental error. Each of the data lines 303 and the scan lines 304 are respectively connected to the corresponding first and second switching circuits. Incompletely, the sources of the first and second switching circuits are electrically connected to the plurality of input data lines 3 0 3 a and the plurality of input scan lines 304a. Then, the plurality of control lines 302, 3〇2a Have either The same function, one of the control lines 302a is juxtaposed between the plurality of input data lines 303a and the plurality of switching circuits, and the other control line 302 is juxtaposed to the plurality of input scanning lines 304a and the second plurality of switches. Between the circuits, the plurality of control signals 1295504 are received by the plurality of control lines 302, 302a to turn on the plurality of double lock switch circuits 306, and the odd input (〇dd) and the even (even) input scan lines and R, G and B three input data lines can 'drive all the pixel electrodes of the entire panel (not shown) to detect the pixel quality of the corresponding liquid crystal display panel. • Where the first electric The source S! of the crystal 230 (please cooperate with the 2C figure) electrically connects the adjacent plurality of r, G, and B input data lines 303a, and another adjacent odd number (Odd) and even number (Even). The input scan line 3 04a' and the gate G of the first transistor 230 are respectively connected to the adjacent control lines 302, 302a to receive the external control signal, and then through the second Datum D2 transmission of transistor 232 Corresponding #control signal' enables the corresponding plurality of data lines 3 03 and the plurality of scanning lines 3 04 to generate corresponding signals. Further, in accordance with a preferred embodiment of the present invention, by the plural The double-lock switch circuit 306 can provide a reference voltage and a control signal for the fine disc. Therefore, the pixels in the array of the liquid crystal display panel, the mother-single-lock switch circuit included therein can generate a clock control. Signal, where Vth is the threshold voltage of a gate Gi and a drain D1. When the gate (the threshold voltage of the gate and the drain Da is V'th, and Vth, > Vth, the plurality of double-lock switches can be improved. The turn-on voltage of the circuit 3 0 6 can suppress the generation of leakage current. The plurality of double-lock switch circuits 306 are electrically connected to form an inner circuit switch circuit, so that the user can effectively avoid the change of the electronic component characteristics during normal use, thereby causing an abnormal phenomenon. The data line 3 03 and the plurality of scanning lines 304 can obtain a predetermined voltage 'to effectively improve the dark point phenomenon of the liquid crystal display panel. It is worth mentioning that when testing the display panel, the corresponding R data lines, G data lines and b data lines are respectively detected by odd scanning lines; and corresponding detection is performed by the even scanning lines. The R data line, the G data line, and the B data line are used to check the display quality of each of the primary colors of the liquid crystal display panel. 12 1295504 ^ Furthermore, wherein the double lock switch circuit detecting structure of the present invention can be implemented by another path, wherein each of the double lock switch circuits includes a first transistor coupled voltage adjusting device, and the voltage adjusting device is The resistor is composed of a fault to increase the impedance value to suppress leakage current generation. Moreover, the double lock switch circuit detecting structure of the present invention can be realized by another circuit, wherein the connected wires can suppress the generation of leakage current by increasing the impedance value by a material having a higher impedance. The above-described embodiments and illustrations of the present invention are known to those skilled in the art, but the scope of the patent is not limited to the above-described embodiment 0, and thus can be seen based on the purpose of explaining the functions and structural principles of the present invention. While showing and explaining the invention, the embodiment of the specific embodiment is equally changed, and especially the _ ^ 彳対 寻 寻 寻 寻 寻 寻 寻 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 芟 。 。 Therefore, the scope of the patents includes all equal changes within the scope of the following patents. 1^, 辄 【 [Simple description of the diagram] Figure 1A is a schematic diagram of a conventional LCD display panel inspection circuit. 1B to 1C are schematic diagrams showing the structure of a local switching circuit. According to a preferred embodiment of the present invention, the double-lock switch structure is shown in FIG. 2 is a preferred embodiment of the present invention. The dual-lock switch f-way structure L2CC is shown in FIG. A schematic diagram of a simple circuit of a switching circuit. ::c diagram: another embodiment of the invention. A schematic diagram of an early circuit. j丨 电 电 电 ” ” ” LCD display panel inspection circuit schematic. [Main 7G parts symbol description] ~131 100 substrate 102, l〇2a multiple control lines 13 1295504 103 multiple data lines 104 multiple scanning lines ί 106 A plurality of switching circuits ^ 120 metal layers. 122 dielectric layer 200 double-lock switch circuit 202 '300 substrate 2 0 4 pole electrodes 206 gate insulating layer 208a first semiconductor layer φ 2 〇 8b second semiconductor layer 2 1 0 Polar electrode 2 12 source electrode 2 1 4 source drain electrode 2 1 6 protective layer 230 first transistor 232 second transistor 302, 302a a plurality of control lines 303 a plurality of data lines 303a a plurality of input data lines • 304 a plurality of scan lines, a plurality of input scan lines 304a '306, a plurality of double lock switch circuits G1, G2, gates S1, S2, source D1, D2, no pole