1293804 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種導線架及具導線架之封裝結構，詳言 之，係關於一種具複數個開孔的導線架及具該導線架之封 裝結構。 【先前技術】 參考圖1A，為習知之導線架1〇之示意圖。該導線架1〇具 一晶片承座101、框架1〇2、複數條導腳1〇3及複數條繫條 104。该等導腳103係配置於該晶片承座i 〇丨周圍。該等繫 條104係將該晶片承座1 〇 1固定於該導線架丨〇之框架丨中 央位置。此一習知之導線架1〇由於導腳1〇3數量有限，以 致於導致接點不足，無法增加晶片之功能性。 餐考圖1B，為習知之封裝結構之示意圖。該習知之封裝 結構15包括一導線架1 〇、複數個晶片丨2及封膠丨4。該導線 架10係與上述圖1A之導線架1 〇結構相同。該晶片承座1 〇 j 具有一第一表面106及一第二表面1〇7，該第二表面107係 相對於該第一表面106。該等晶片12具一第一表面121及一 第二表面122，該第二表面122係相對於該第一表面121， 該第一表面121係為一線路面，該第二表面122係為一非線 路面。該等晶片12之該第二表面設置於該晶片承座1〇1之 弟 表面上。§亥荨晶片12之第一表面121係經由複數條 導線1 3與該導線架1 〇之該等導腳1 〇3電性連接。該底膠11 係將該等晶片12黏著至該導線架1 〇之該等晶片承座1 〇 ^ 上。該封膠14係用以封裝該晶片12、導線架10及該等導線 I00802.doc 1293804 13，完成此一具該導線架之封裝結構15。 上述習知之具導線架之封裝結構15之缺點如下，第—， 由於晶片12完全被包裹在封裝材料中，以致於散熱效果不 而導致效月b P牛低。第二，導腳j 〇3數量不足，無法増 加晶片12之功能性。以，有必要提供—種㈣具有進步 性之導線架封裝結構，以解決上述問題。 【發明内容】 本t月之目的在於提供一種導線架及含該導線架之封裝 結構。該封裝結構包括—導線架、—晶片及複數條導線。 ㈣導線架包括-晶片承座、複數條導腳及複數條繫條。 4曰曰片承座具有一第一表面及一第二表面，該晶片承座具 複數個開孔。該等導腳配置於該晶片承座周圍。該等繫條 係將该晶片承座固定於該導線架之中央位置。該晶片置於 4晶片承座之第一表面上。該等導線用以電性連接該晶片 及该導線架。最後，以封膠做最後階段模壓並固化成型， 完成此一含該導線架之封裝結構。藉該晶片承座之該等開 孔’提供更多的連接點，增加該封裝結構之1/〇數，並可 以增加散熱效果。 【實施方式】 參考圖2A，為本發明之導線架2〇之示意圖。該導線架20 具有一晶片承座201、框架202、複數條導腳203、複數條 繫條204。該晶片承座201具有複數個開孔205，該等開孔 係呈陣列排列。該等導腳203係配置於該晶片承座201周 圍。該等繫條204係將該晶片承座201固定於該導線架20之 100802.doc 1293804 框架202中央位置。 參考圖2B，為本發明含導線架之封裝結構28之示意圖。 該含導線架之封裝結構28，包括一導線架20、一晶片22、 複數條導線23及封膠24。該導線架20係與上述圖2A之導線 架結構相同。該晶片22具一第一表面221及一第二表面 222，該第二表面222係相對於該第一表面221。該晶片22 設置於該晶片承座201之一第一表面206上。該晶片22之第 一表面221係經由該等導線23與該導線架20之該等導腳203 電性連接。該晶片22係以底膠21與該晶片承座201之該第 一表面206貼合。 該晶片承座201具一第一表面20 6及一第二表面207，該 弟一表面207係相對於該第一表面206。該等開孔205係貫 穿該第一表面206及該第二表面207。該晶片承座2〇1之該 寺開孔205係填滿導電物質26。該晶片22之該第二表面222 係經由複數個第一凸塊25與該導電物質26電性連接。該導 電物質26係與複數個第二凸塊27電性連接。該封膠24係用 以封裝該晶片22、導線架20及該等導線23，完成此一含該 導線架之封裝結構28。 該等導腳203具有一第一部分208及一第二部分2〇9。該 第一部分208高於該第二部分2〇9，該第二部分2〇9與該等 第二凸塊27之遠離該晶片承座2〇1之頂表面位於同一高 度。因此，相對於該第二部分209,該第—部分2〇8與該晶 片承座201形成一凹陷空間，使得該等第二凸塊27設置於 該凹陷空間内。 1293804 參:圖2C，為另—本發明具導線架之封裝結構之實施例 ::意圖。該含導線架之封裝結構38,包括一導線架30、 、μ片32複數條導線33及封膠％。該封裝結構％係與上 述圖2Β之具導線架之封裝結構28相同。不同之處在於複數 個銲塾36設置於該等開孔3()5位置之㈣—表面则及該第 二表面307,且該第一表面3〇6及該第二表面3〇7之該等銲 塾36係透過㈣開孔3()5而電性連接。該晶片則經由複 數個第一凸塊35與該等銲墊36電性連接。該等銲墊％係與 複數個第二凸塊37電性連接。 利用上述之封裝結構，由於晶片承座具有複數個開孔， 曰曰片可藉由開孔進行散熱，並且利用第二凸塊與導線架電 性連接，因此可以增加接點，以克服習知技術之散熱效果 不k而導致效能降低以及無法增加晶片之功能性之缺 二 口此，利用本發明之上述結構，改善習知之導線架由 於導腳數量有限，以致於導致接點不足，無法增加晶片之 功能性之問題。 惟上述實施例僅為說明本發明之原理及其功效，而非用 於限制本發明。因此，習於此技術之人士可在不違背本發 明之精神對上述實施例進行修改及變化。本發明之權利範 圍應如後述之申請專利範圍所列。 【圖式簡單說明】 圖1A顯示習知導線架之示意圖； 圖1B顯示習知之封裝結構示意圖； 圖2A顯示本發明導線架之示意圖； 1293804 圖2B顯示本發明具導線架之封裝結構示意圖；及 圖2C顯示本發明具導線架之封裝結構示意圖。1293804 IX. Description of the Invention: [Technical Field] The present invention relates to a lead frame and a package structure having a lead frame, and more particularly to a lead frame having a plurality of openings and a package having the same structure. [Prior Art] Referring to FIG. 1A, a schematic view of a conventional lead frame 1 is shown. The lead frame 1 has a wafer holder 101, a frame 1〇2, a plurality of lead pins 1〇3, and a plurality of strips 104. The leads 103 are disposed around the wafer holder i 。. The strips 104 secure the wafer holder 1 〇 1 to the center of the frame of the lead frame. This conventional lead frame 1 has a limited number of leads 1 〇 3, so that the contacts are insufficient and the functionality of the wafer cannot be increased. Table 1B is a schematic view of a conventional package structure. The conventional package structure 15 includes a lead frame 1 , a plurality of wafer cassettes 2 , and a sealant 4 . The lead frame 10 is the same as the lead frame 1 上述 structure of Fig. 1A described above. The wafer holder 1 〇 j has a first surface 106 and a second surface 〇7, the second surface 107 being opposite the first surface 106. The wafer 12 has a first surface 121 and a second surface 122. The second surface 122 is opposite to the first surface 121. The first surface 121 is a line surface, and the second surface 122 is a non-surface. Line surface. The second surface of the wafers 12 is disposed on the surface of the wafer holder 1〇1. The first surface 121 of the chip 12 is electrically connected to the leads 1 〇 3 of the lead frame 1 via a plurality of wires 13. The primer 11 adheres the wafers 12 to the wafer holders 1 〇 ^ of the lead frame 1 . The encapsulant 14 is used to package the wafer 12, the lead frame 10, and the wires I00802.doc 1293804 13, and the package structure 15 of the lead frame is completed. The disadvantages of the conventional lead frame package structure 15 are as follows. First, since the wafer 12 is completely wrapped in the package material, the heat dissipation effect is not caused to cause a low efficiency. Second, the number of leads j 〇 3 is insufficient to add the functionality of the wafer 12. Therefore, it is necessary to provide (4) a progressive lead frame package structure to solve the above problems. SUMMARY OF THE INVENTION The purpose of this month is to provide a lead frame and a package structure including the lead frame. The package structure includes a lead frame, a wafer, and a plurality of wires. (4) The lead frame includes a wafer holder, a plurality of lead pins, and a plurality of strips. The cymbal holder has a first surface and a second surface, and the wafer holder has a plurality of openings. The leads are disposed around the wafer holder. The strips secure the wafer holder to a central location of the lead frame. The wafer is placed on the first surface of the 4-wafer holder. The wires are used to electrically connect the wafer and the lead frame. Finally, the final stage of molding and curing is performed by sealing, and the package structure including the lead frame is completed. The openings of the wafer holder provide more connection points, increase the number of turns of the package structure, and increase heat dissipation. Embodiments Referring to FIG. 2A, a schematic diagram of a lead frame 2 of the present invention is shown. The lead frame 20 has a wafer holder 201, a frame 202, a plurality of lead pins 203, and a plurality of strips 204. The wafer holder 201 has a plurality of openings 205 which are arranged in an array. The lead pins 203 are disposed around the wafer holder 201. The tie strips 204 secure the wafer holder 201 to the center of the 100802.doc 1293804 frame 202 of the leadframe 20. Referring to FIG. 2B, a schematic diagram of a package structure 28 including a lead frame of the present invention is shown. The lead frame-containing package structure 28 includes a lead frame 20, a wafer 22, a plurality of wires 23, and a sealant 24. The lead frame 20 is identical in construction to the lead frame of Figure 2A above. The wafer 22 has a first surface 221 and a second surface 222 opposite to the first surface 221. The wafer 22 is disposed on a first surface 206 of the wafer holder 201. The first surface 221 of the wafer 22 is electrically connected to the leads 203 of the lead frame 20 via the wires 23. The wafer 22 is bonded to the first surface 206 of the wafer holder 201 with a primer 21. The wafer holder 201 has a first surface 206 and a second surface 207, and the surface 207 is opposite to the first surface 206. The openings 205 extend through the first surface 206 and the second surface 207. The temple opening 205 of the wafer holder 2〇 is filled with a conductive substance 26. The second surface 222 of the wafer 22 is electrically connected to the conductive material 26 via a plurality of first bumps 25. The conductive material 26 is electrically connected to the plurality of second bumps 27. The encapsulant 24 is used to package the wafer 22, the lead frame 20 and the wires 23 to complete the package structure 28 containing the lead frame. The lead pins 203 have a first portion 208 and a second portion 2〇9. The first portion 208 is higher than the second portion 2〇9, and the second portion 2〇9 is at the same height as the top surface of the second bump 27 away from the wafer holder 2〇1. Therefore, the first portion 2〇8 and the wafer holder 201 form a recessed space with respect to the second portion 209, so that the second bumps 27 are disposed in the recessed space. 1293804 Reference: Figure 2C, is another embodiment of the present invention having a leadframe package structure. The lead frame-containing package structure 38 includes a lead frame 30, a μ piece 32, a plurality of wires 33, and a seal %. The package structure % is the same as the package structure 28 of the lead frame of Figure 2 above. The difference is that a plurality of soldering dies 36 are disposed at the (four)-surface of the openings 3 () 5 and the second surface 307, and the first surface 3 〇 6 and the second surface 〇 7 The soldering wire 36 is electrically connected through the (four) opening 3 () 5 . The wafer is electrically connected to the pads 36 via a plurality of first bumps 35. The pads are electrically connected to a plurality of second bumps 37. With the above package structure, since the wafer holder has a plurality of openings, the cymbal can be dissipated by the opening, and the second bump is electrically connected to the lead frame, so that the contact can be added to overcome the conventional knowledge. The above-mentioned structure of the present invention improves the conventional lead frame due to the limited number of guide pins, so that the contact is insufficient and cannot be increased. The functionality of the chip. However, the above-described embodiments are merely illustrative of the principles of the invention and its effects, and are not intended to limit the invention. Therefore, those skilled in the art can make modifications and changes to the above embodiments without departing from the spirit of the invention. The scope of the invention should be as set forth in the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a schematic view showing a conventional lead frame; FIG. 1B is a schematic view showing a conventional package structure; FIG. 2A is a schematic view showing a lead frame of the present invention; 2C is a schematic view showing the package structure of the lead frame of the present invention.
【主要元件符號說明】 10 習知之導線架 11 底膠 12 晶片 121 第一表面 122 第二表面 13 導線 14 封膠 15 習知之封裝結構 20 本發明之導線架 21 底膠 22 晶片 23 導線 24 封膠 25 第一凸塊 26 導電物質 27 第二凸塊 28 本發明具導線架之封裝結構 30 本發明之導線架 31 底膠 32 晶片 33 導線 100802.doc 1293804[Main component symbol description] 10 Conventional lead frame 11 Primer 12 Wafer 121 First surface 122 Second surface 13 Conductor 14 Sealing 15 Conventional package structure 20 Lead frame 21 of the present invention Primer 22 Wafer 23 Wire 24 Sealing 25 first bump 26 conductive material 27 second bump 28 package structure 30 with lead frame of the present invention lead frame 31 of the present invention base 32 wafer 33 wire 100802.doc 1293804
34 封膠 35 第一凸塊 36 銲墊 37 第二凸塊 38 本發明具導線架之封裝結構 101 晶片承座 102 框架 103 導腳 104 繫條 106 第一表面 107 第二表面 201 晶片承座 202 框架 203 導腳 204 繫條 205 開孔 206 第一表面 207 第二表面 208 第一部分 209 第二部分 221 第一表面 222 第二表面 305 開孔 306 第一表面 307 第二表面 100802.doc -10-34 encapsulant 35 first bump 36 pad 37 second bump 38 package structure with lead frame of the present invention 101 wafer holder 102 frame 103 lead 104 tie 106 first surface 107 second surface 201 wafer holder 202 Frame 203 lead 204 strip 205 opening 206 first surface 207 second surface 208 first portion 209 second portion 221 first surface 222 second surface 305 opening 306 first surface 307 second surface 100802.doc -10-