1286251 176881wf. doc/r 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種平面燈源及其製造方法，且特別 是有關於一種具有高亮度的平面燈源及其製造方法。 【先前技術】 近年來，大部分的顯示螢幕皆以液晶顯示面板(Liquid Crystal Display panel, LCD panel)為主流。然而，因為液晶 顯示面板本身並不具有發光的功能，故在液晶顯示面板下 方必須提供一背光模組(Back light module)以提供光源，進 而達到顯示的功能。背光模組中的燈源一般是發光燈管所 提供，而燈管所發出之光線再通過背光模組中之光學膜片 並進行散射後，形成一適於照射液晶顯示面板之面光源。 但是，若能直接利用平面燈源，則可以提昇光線的利 用效率以及更均勻的面光源，且平面燈源除了可以應用於 液晶顯示面板之背光源外，也可應用在許多其他之領域 上。因此’平面燈源有其發展的優勢。 、 一般而言，平面燈源是一種電漿發光元件，其主要是 利用在電極對之間施加一高電壓差以產生高能電^，並炉 由高能電子撞擊惰性氣體（inert gas)而形成所謂之二 之後，電漿巾被激發的激態原子會以放射紫外 能量釋放絲’ *所放射之紫外線會進—步、= 中的螢光粉(phosphor)，以發出可見光。 戈 1厂、 而就目前的平面燈源而言，如何增加其 > a 提升其發光均勻度是積極研發的重點之一。、X光冗度以及 5 1286251 17688twf.doc/r 【發明内容】 a本發明之目的是提供一種平面燈源，其具有高亮度以 及兩發光均勻度。 、本务明之另一目的是提供一種平面燈源的製造方 去’所製造出的平面燈源具有高亮度以及高發光均句度。 一本發明提出一種平面燈源，其包括一第一基板、一第 —基，、一框膠(sealam)、多數組介電層圖案以及一螢光 ^第基板上包括配置有多數條電極。框膠是設置於第 一基板與第二基板之間，以於第一基板、第二基板與框膠 2,形成-空間。而這些組介電層圖案是配置於第一基板 二 :：i板之間的空間内’每一組介電層圖案包括至少兩 案:且每一條狀介電層圖案會對應覆蓋住其 兩側表面:層圖案具有-頂部表面以及 於每-組介電層圖案離成凹凸狀。榮光層是配置 配置於條狀介”电層圖案之間’且螢光層更 、俅狀；丨電層圖案之頂部表面上。 在本發明之一實施例 相鄰的兩組介電層圖案之間。过之虫先層更包括配置於 在本發明之一實施例φ， 隔物’其是設置於第 :：燈源更包括多數個間 1施财，螢光層更包括塗空間内。在 —霄施例中，這些條狀介電安^物之表面上。在另 相同。在又一實施例中，木的鬲度與間隔物的高度 間隔物的高度。 k二备 '狀介電層圖案的高度低於 a 6 1286251 17688twf.doc/r 度會Ϊ^盘/ 電層圖案的高 、弟基板與弟二基板之間的間距相同。 声，實施例中，此平面燈源更包括一反射 層其疋配置於弟一基板之表面上。 ^發=之_私财，此平_源更 層，其是配置於第二基板上。 赏7^ 提供m料—種平面燈源㈣造方法。此方法首先 後;^第-其Γ板。接者在第一基板上形成多數條電極。之 、二基板士形成多數組介電層圖案，每 至少兩條狀介電層圖案，且每—條狀介電層圖“ 宰ίί„Γ電極，其中所形成的每-條狀介電層^ 二ΠΓΓ及兩側表面，且頂部表面之輪廓是成 3之後’在母一組介電層圖案的條狀介電層圖宰之 i以犬第介電尤圖案之頂部表面上形成-榮光層:、隨 ki、-弟一基板，然後在第一基板與 成—框膠，並將第一基板與第二基板結合。板之門形 、在本發明之—實施财，形成條狀介電層_之方法 G進仃-網版印刷製程、一韻刻製程或是—嘴砂彭程。 包括ΐ本發明之一實施例中，在形成螢光層之步财，更 匕括於相鄰_組介電層_之間塗佈螢光層。 在本發明之一實施例中，將第一基板與第二 人 更—包括於第4板與第二基板之間形成多“二 ^在了施射，私層更包括塗佈於間隔物之表面上。 在另-貫施财，條狀介電層圖案的高度與間隔物 相同。在又一實施例中 物的高度。 度食ί本ίΓ之—實關巾，上狀雜介圖案的高 度基板與第二基板之間的間距相同。 q 前，1麵巾，於第—基板上形成電極之 又匕括在弟一基板上形成一反射層。 形成實施财，此方法更包括在第二基板上BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a planar light source and a method of fabricating the same, and more particularly to a planar light source having high brightness and a method of fabricating the same. [Prior Art] In recent years, most display screens have been dominated by liquid crystal display panels (LCD panels). However, since the liquid crystal display panel itself does not have the function of emitting light, a backlight module (Back light module) must be provided under the liquid crystal display panel to provide a light source to achieve the display function. The light source in the backlight module is generally provided by the light-emitting tube, and the light emitted by the light tube passes through the optical film in the backlight module and is scattered to form a surface light source suitable for illuminating the liquid crystal display panel. However, if the planar light source can be directly used, the light efficiency and a more uniform surface light source can be improved, and the planar light source can be applied to many other fields in addition to the backlight of the liquid crystal display panel. Therefore, the 'plane light source has its development advantages. In general, a planar light source is a plasma light-emitting element, which mainly uses a high voltage difference between electrode pairs to generate high-energy electricity, and the furnace is formed by high-energy electrons striking an inert gas. After the second, the excited atom excited by the plasma towel will emit ultraviolet light by emitting ultraviolet light. * The emitted ultraviolet light will enter the phosphor in the step, = to emit visible light. Ge 1 plant, and as far as the current flat light source is concerned, how to increase it > a to improve its uniformity of illumination is one of the focuses of active research and development. X-ray redundancy and 5 1286251 17688 twf.doc/r SUMMARY OF THE INVENTION It is an object of the present invention to provide a planar light source having high brightness and two illumination uniformities. Another object of the present invention is to provide a planar light source that is manufactured by a flat light source having high brightness and high luminous uniformity. A planar light source includes a first substrate, a first substrate, a seal, a multi-array dielectric layer pattern, and a fluorescent substrate. The substrate includes a plurality of electrodes. The sealant is disposed between the first substrate and the second substrate to form a space between the first substrate and the second substrate and the sealant 2. And the set of dielectric layer patterns are disposed in a space between the first substrate two::i boards. 'Each set of dielectric layer patterns includes at least two cases: and each strip of dielectric layer pattern correspondingly covers the two of them Side surface: The layer pattern has a top surface and a pattern of each of the dielectric layers is embossed. The glory layer is disposed on the strip between the "electric layer patterns" and the phosphor layer is more ridged; on the top surface of the enamel layer pattern. Two sets of dielectric layer patterns adjacent to one embodiment of the present invention The first layer of the worm is further disposed in an embodiment of the present invention φ, the spacer 'is disposed at the first:: the light source further includes a plurality of 1s, and the fluorescent layer further includes a coating space In the embodiment, the strip dielectric insulators are on the same surface. In still another embodiment, the height of the wood and the height of the spacer are the height of the spacer. The height of the dielectric layer pattern is lower than that of a 6 1286251 17688 twf.doc/r. The height of the disk/electric layer pattern is the same as the spacing between the second substrate and the second substrate. Acoustic, in the embodiment, the planar light source Furthermore, a reflective layer is disposed on the surface of the substrate of the younger one. The hair source is _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Source (4) manufacturing method. This method is first and then; ^ first - its slab. The connector forms a plurality of electrodes on the first substrate. Forming a multi-array dielectric layer pattern, each of at least two dielectric layer patterns, and each strip-like dielectric layer pattern "Zai ίί" electrode, wherein each of the formed dielectric layers ^ 2 and The side surface, and the contour of the top surface is 3, after the strip dielectric layer pattern in the mother dielectric layer pattern is formed on the top surface of the dog dielectric pattern - the glory layer: And a substrate, then the first substrate and the frame-bonding glue, and the first substrate and the second substrate are combined. The gate shape of the board, in the present invention - the method of forming a strip dielectric layer G 仃 网 - screen printing process, a rhyme process or - mouth sand Peng. In one embodiment of the invention, in the formation of the fluorescent layer of the step, more included in the adjacent group of dielectric The phosphor layer is coated between the layers. In one embodiment of the present invention, the first substrate and the second person are further included, and the fourth plate and the second substrate are formed to form a plurality of "two" shots. The private layer further includes a coating on the surface of the spacer. In another way, the height of the strip dielectric layer pattern is the same as the spacer. In another embodiment the height of the object. It is the same as the distance between the high substrate and the second substrate. Before the q-face towel, the electrode is formed on the first substrate, and a reflective layer is formed on the substrate. Forming an implementation, the method further includes on the second substrate
凹凸因在每—條狀介電層圖案的頂部表面設計成 不面^郭’13此螢光層的塗佈面積可以增加，因而提升 w奴源的亮度。 為讓本發明之±述和其他目的、特徵和優點能更明顯 下文特舉較佳實施例，並配合所附圖式，作詳細說 明如下。 " 【實施方式】The unevenness is designed such that the coating surface of the phosphor layer can be increased by the top surface of each strip-shaped dielectric layer pattern, thereby increasing the brightness of the slave source. The present invention will be more apparent from the following detailed description of the preferred embodiments of the invention. " [Implementation]
條狀介電層圖案的高度低於間隔 一立圖1Α是依照本發明一較佳實施例的平面燈源的剖面 不思圖。請參照圖1A，本發明之平面燈源包括一第一基板 1〇〇、一第二基板120、一框膠104、多條電極1〇2、多組 介電層圖案108以及一螢光層11〇。 琶極102是配置於第一基板1〇〇上，且這些電極搬 是以條狀型式彼此平行的配置於第一基板1〇〇上。框膠1〇4 疋汉置於弟一基板100與第二基板120之間，以於第一基 板100、第二基板12〇與框膠104之間形成一空間1〇6。框 膠104是用來使第一基板100與第二基板12〇結合在一 ⑧ 8 1286251 J7688twf.doc/r 基if1.1%之間具有—間隙。而介電層圖案 疋配置於弟-基板100上並位於空間觸Ν，每一組 介電層圖案⑽包括至少兩條狀介電層圖案觸a q嶋， ，母-條狀介電層圖案職或娜會對應覆蓋住其中一 = H)2。被-組介電層圖案⑽的兩條狀介電層圖 木⑽a、職所覆蓋的兩電極1〇2即是一電極 牆 pair) ° 特別是，本發明之條狀介電層圖案1〇8a、麵且有 =的輪廊。請參照圖4，其鱗示第一基板ι〇〇上时 ⑽的立鮮_，每—絲介電層圖案施 或108b具有-頂部表面2〇2以及兩侧表面2〇4、施，且 2表面202之輪廓是成凹凸狀。也就是說，每一條狀介 ^層圖案職或麵具有凸起部分以及凹陷部分，而形 成凹凸或階梯結構。 此外’睛荼照圖1A，平面燈源的螢光層11〇是配置 ’-組介電層圖案1〇8的兩條狀介電層圖案_、勵 =間且赏光層110更配置於條狀介電層圖案嶋、應b ，_頂部表面202上。如圖5所示，其係為 t介電層圖案施或祕沿著其延伸方向的剖面圖， 笨光層U0更塗佈在介電層圖案職或腿的頂部表面 依據本發明另-實施例，在第一基板i〇〇上更包括配 反射層m。反射層112可以配置於第—基板1〇〇 之上表面，且電極102配置於反射層112上。反射層ιΐ2 1286251 17688twf.doc/r 亦可以配置於第一基才反100之下表面(未緣示出）。不論反 射層112配置於第一基板100之上表面或是下表面，反射 層112之材質是非導電材質。 依據本發明之一實施例，在第二基板120上更可包括 配置有一螢光層114。如此，可以再增加平面燈源内螢光 層所塗佈的面積。 由於本發明之平面燈源内的螢光層110除了塗佈於兩 條狀介電層圖案108a、108b之間之外，螢光層11〇更配置 d木狀’丨％層圖案l〇8a、l〇%之具有凹凸輪廓的頂部表面 202上。因此，相較於傳統平面燈源，本發明之 内的螢光層塗佈面積更大，而且因在條狀介電層圖案 W8a、l〇8b凹陷部分會產生干擾(cr〇ss4al]dng)現象，使得 該處原先不會發光也會因為干擾現象而發光。因此，可以 提升平面燈源的亮度。 依據本發明一較佳實施例，如圖1A所示，平面燈源 =可包括多數個間隔物116，其是設置於第一基板1〇〇與 第:基板120之間的空間1〇6内，用以保持第一基板100 與第二基板120之間的間隙高度。在另一較佳實施例中， 上述之螢光層11G更包括塗佈於這些間隔物116之表面 上，如圖1B所示。如此，可更提高螢光層塗佈的面積， 進而提升平面燈源的亮度以及發光均勻度。 倘若平面燈源内包括有間隔物(如圖丨八與圖 所示),，則介電層圖案108的高度可以低於間隔物U6的高 度。晏然’介電層圖案1〇8的高度亦可以是與間隔物Π6 1286251 17688twf.doc/r g问又祁Μ，如圖lc所示。如此，間隔物116與介電層 圖木1〇8可以共同支撐兩基板100、120以保持兩基板 100、120之間的間隙高度。 然而，本發明並不限制平面燈源内一定要配置有間隔 物。在本發明另一實施例中，平面燈源内是不包括有間隔 物，如圖2所示。由於平面燈源内是不包括有間隔物，因 ^ ’較佳的是，介電層圖案⑽的高度會與間隔物116的 南度相同’以保持兩基板1GG、12()之間的間隙高度。而在 f 2的實施例中，㈣層⑽除了塗佈_-組介電層圖 木108的兩條狀介電層圖案1〇如、職之間以及條狀介電 層圖案l〇8a、i〇8b具有凹凸輪廓的頂部表面之外，螢光層 no更塗佈在相鄰的兩組介電層圖案1〇8之間。如此，^ 以增加榮光層塗佈的面積，進而提升平面燈源的亮度。 f上述圖1A〜圖1C以及圖2的實施例中，都是以每 雷=二、1層圖案1〇8具有兩條狀介電層圖案108a、108b(- 严为社禮^列來β兄明’但本發明並不限於此。本發明之平面 ==可以是每一組介電層圖案權是包括三條或以 如圖Ϊ所^圖案職、_、職(與三條電極102)， K)8c的/。特別是’這些條狀介電層圖案1G8a、108b、 狀介輪廊為凹凸狀’且勞光層㈣除覆蓋於條 = 腿，之間外，更覆蓋於介電層 包括有 8b】〇8C之頂部表面上。而若此平面燈源更 4:: 在其中，螢光層110更覆蓋在間隔物⑽ 1286251 17688twf.doc/r 而上述之平面燈源的製造方法如下所述。首先請參照 圖—1A、圖1B或圖lc，首先提供一第一基板_。:二 第一基板100上形成多數條電極102，其例如是藉由沈積 與侧製程、網版印刷製程等已知方法製成。在一實施例 中，此方法更包括在第一基板100上形成一反射層112。 之後，在第一基板上形成多組介電層圖案，每一 組介電層圖案108包括至少兩條狀介電層圖案1〇8&、 鲁 108b，且每一條狀介電層圖案108a、1〇8b會對應覆蓋住其 中一電極102。特別是，所形成的每一條狀介電層圖^ 108a、108b具有一頂部表面2〇2以及兩側表面2〇4、2〇6， 且頂部表面202之輪廓是成凹凸狀，如圖4所示。形成這 些條狀介電層圖案l〇8a、108b之方法包括進行一網版印刷 製程、一鞋刻製程或是一喷砂製程。 之後在每一組介電層圖案108的條狀介電層圖案 108a、108b之間形成一螢光層11〇，且更在條狀介電層圖 案108a、108b之頂部表面2〇2上塗佈此螢光層11〇 圖 _ 5所示）。之後，提供一第二基板120。在一較佳實施例中， • 更包括在第二基板120上形成另一螢光層114。接著在第 一基板100與弟一基板120之間形成一框膠104，並將第 一基板100與弟二基板120結合，以於兩基板1〇〇、no 與框膠104之間形成一空間1〇6。之後再於空間1〇6内填 入惰性氣體，當開啟電源時，電極102之間所產生高能電 子會撞擊惰性氣體而形成電漿。 ％ 依據較佳實施例，在將兩基板1〇〇、120結合之前， 12 iwf.doc/r 更詳細的說，是在塗佈榮光層m之前，更包括在第一基 板100上或是第二基板12〇上形成間隔物116。而若平面 燈源内形成有間隔物116，更佳的是於塗佈勞光層110之 過私中’更於間隔物116表面上塗佈此螢光層11G。而若 平面燈源内未形成有_物，則於塗佈f光層ug之過程 中’更在相鄰的兩組介電層圖案108之間塗佈螢光層11〇, 如圖2所示。The height of the strip dielectric layer pattern is lower than the interval. Figure 1 is a cross-sectional view of a planar light source in accordance with a preferred embodiment of the present invention. Referring to FIG. 1A, the planar light source of the present invention includes a first substrate 1 , a second substrate 120 , a sealant 104 , a plurality of electrodes 1 , 2 , a plurality of dielectric layer patterns 108 , and a phosphor layer . 11〇. The drain 102 is disposed on the first substrate 1A, and these electrodes are disposed on the first substrate 1A in parallel with each other in a strip pattern. The frame adhesive 1〇4 is placed between the substrate 100 and the second substrate 120 to form a space 1〇6 between the first substrate 100, the second substrate 12〇 and the sealant 104. The mask 104 is used to bond the first substrate 100 and the second substrate 12 to each other between a gap of 1.1% and a ratio of 1.1%. The dielectric layer pattern is disposed on the substrate 100 and located in the space. Each of the dielectric layer patterns (10) includes at least two dielectric layer patterns, and the mother-strip dielectric layer is patterned. Or Na will cover one of them = H) 2. The two dielectric layers (10)a of the dielectric layer pattern (10) and the two electrodes 1〇2 covered by the position are an electrode wall pair. In particular, the strip dielectric layer pattern of the present invention is 1〇 8a, face and have a veranda. Referring to FIG. 4, when the scale is shown on the first substrate (10), the per-wire dielectric layer pattern application 108b has a top surface 2〇2 and two side surfaces 2〇4, and 2 The contour of the surface 202 is concave and convex. That is to say, each strip pattern has a convex portion and a concave portion, and forms a concave or convex structure. In addition, in view of FIG. 1A, the fluorescent layer 11 of the planar light source is a two-layer dielectric layer pattern _, which is disposed with the group dielectric layer pattern 〇8, and the light-receiving layer 110 is disposed on the strip. The dielectric layer pattern 嶋, should be b, _ top surface 202. As shown in FIG. 5, it is a cross-sectional view of the t dielectric layer pattern or secret direction along the extending direction thereof, and the stupid layer U0 is further coated on the top surface of the dielectric layer pattern or the leg according to the present invention. For example, the reflective layer m is further included on the first substrate i. The reflective layer 112 may be disposed on the upper surface of the first substrate 1 ,, and the electrode 102 is disposed on the reflective layer 112. The reflective layer ιΐ2 1286251 17688twf.doc/r can also be disposed on the lower surface of the first substrate (not shown). The reflective layer 112 is made of a non-conductive material regardless of whether the reflective layer 112 is disposed on the upper surface or the lower surface of the first substrate 100. According to an embodiment of the present invention, a fluorescent layer 114 may be further disposed on the second substrate 120. In this way, the area coated by the phosphor layer in the planar light source can be increased. Since the phosphor layer 110 in the planar light source of the present invention is applied between the two dielectric layer patterns 108a and 108b, the phosphor layer 11 is further provided with a woody '丨% layer pattern l〇8a, L〇% of the top surface 202 having a relief profile. Therefore, the coating area of the phosphor layer in the present invention is larger than that of the conventional planar light source, and interference occurs in the depressed portions of the strip dielectric layer patterns W8a, l8b (cr〇ss4al]dng) The phenomenon that the original place does not emit light will also illuminate because of the interference phenomenon. Therefore, the brightness of the flat light source can be increased. According to a preferred embodiment of the present invention, as shown in FIG. 1A, the planar light source= can include a plurality of spacers 116 disposed in the space 1〇6 between the first substrate 1 and the substrate 120. The gap height between the first substrate 100 and the second substrate 120 is maintained. In another preferred embodiment, the above-described phosphor layer 11G further includes a surface coated on the spacers 116 as shown in Fig. 1B. In this way, the area coated by the phosphor layer can be further improved, thereby improving the brightness of the planar light source and the uniformity of illumination. If the planar light source includes spacers (as shown in Fig. 8 and the figure), the height of the dielectric layer pattern 108 may be lower than the height of the spacer U6. The height of the dielectric layer pattern 1 〇 8 may also be the same as the spacer 12 6 1286251 17688 twf.doc/r g, as shown in Figure lc. Thus, the spacer 116 and the dielectric layer 1 8 can collectively support the two substrates 100, 120 to maintain the gap height between the substrates 100, 120. However, the invention does not limit that spacers must be disposed within the planar light source. In another embodiment of the invention, the planar light source does not include spacers as shown in FIG. Since the planar light source does not include a spacer, it is preferable that the height of the dielectric layer pattern (10) is the same as the south of the spacer 116 to maintain the gap height between the two substrates 1GG, 12(). . In the embodiment of f 2, the (four) layer (10) is coated with the two dielectric layer patterns 1 of the dielectric layer 108, such as the inter-position and the strip dielectric layer pattern l8a, In addition to the top surface of the uneven profile, the phosphor layer no is more coated between the adjacent two sets of dielectric layer patterns 1〇8. In this way, ^ increases the area coated by the glory layer, thereby increasing the brightness of the planar light source. f In the above embodiments of FIG. 1A to FIG. 1C and FIG. 2, there are two dielectric layer patterns 108a and 108b in each of the Ray=two, one-layer patterns 1〇8 (- Xiong Ming', but the invention is not limited thereto. The plane == of the present invention may be that each group of dielectric layer pattern weights includes three or as shown in the figure, _, job (with three electrodes 102), K) 8c of /. In particular, 'the strip dielectric layer patterns 1G8a, 108b, the shape of the wheel corridor are concave and convex" and the layer of the light layer (4) is covered between the strips and the legs, and the dielectric layer is covered with 8b 〇 8C. On the top surface. If the planar light source is further 4::, the phosphor layer 110 is covered by the spacer (10) 1286251 17688twf.doc/r, and the above planar light source is manufactured as follows. Referring first to FIG. 1A, FIG. 1B or FIG. 1c, a first substrate _ is first provided. : 2 A plurality of strip electrodes 102 are formed on the first substrate 100, which are formed, for example, by a known method such as deposition and side process, screen printing process. In an embodiment, the method further includes forming a reflective layer 112 on the first substrate 100. Thereafter, a plurality of sets of dielectric layer patterns are formed on the first substrate, each set of dielectric layer patterns 108 includes at least two dielectric layer patterns 1〇8&, Lu 108b, and each strip-shaped dielectric layer pattern 108a, 1〇8b will cover one of the electrodes 102 correspondingly. In particular, each of the strip-shaped dielectric layer patterns 108a, 108b has a top surface 2〇2 and two side surfaces 2〇4, 2〇6, and the top surface 202 has a concave-convex shape, as shown in FIG. Shown. The method of forming the strip-like dielectric layer patterns 10a, 108b includes performing a screen printing process, a shoe engraving process, or a sandblasting process. A phosphor layer 11〇 is then formed between the strip dielectric layer patterns 108a, 108b of each of the dielectric layer patterns 108, and is further coated on the top surface 2〇2 of the strip dielectric layer patterns 108a, 108b. This fluorescent layer 11 is shown in Figure _ 5). Thereafter, a second substrate 120 is provided. In a preferred embodiment, • further includes forming another phosphor layer 114 on the second substrate 120. Then, a sealant 104 is formed between the first substrate 100 and the substrate 120, and the first substrate 100 is combined with the second substrate 120 to form a space between the two substrates 1〇〇, no and the sealant 104. 1〇6. Then, an inert gas is filled in the space 1〇6, and when the power is turned on, high-energy electrons generated between the electrodes 102 collide with the inert gas to form a plasma. % According to the preferred embodiment, before combining the two substrates 1 〇〇, 120, 12 iwf.doc/r is more specifically included on the first substrate 100 or before the application of the glory layer m. A spacer 116 is formed on the second substrate 12A. On the other hand, if the spacer 116 is formed in the planar light source, it is more preferable to apply the phosphor layer 11G on the surface of the spacer 116 in the coating of the coating layer 110. If no material is formed in the planar light source, the phosphor layer 11 is applied between the adjacent two sets of dielectric layer patterns 108 during the application of the f-light layer ug, as shown in FIG. .
/宗上所述，本發明之平面燈源及其製造綠中，由於 所形成的條狀介電層圖案具有凹凸輪廓的頂部表面，且 光層除了塗佈於兩條狀介電層圖案之間之外，更配置於 狀介電層圖案之具有凹凸輪廓的頂部表面上。因此，相較 於傳統平研源，本發明之平面燈源_螢光層塗佈面積 更大，而且因在條狀介電層_凹陷部分會產生干擾現 象，使得該處原先不會發光也因而發光。因此，可 平面燈源的亮度。As described above, in the planar light source of the present invention and its manufacturing green, since the formed strip dielectric layer pattern has a top surface of the concave and convex profile, and the light layer is applied to the two dielectric layer patterns. In addition, it is disposed on the top surface of the dielectric layer pattern having a concave-convex profile. Therefore, compared with the conventional flat research source, the planar light source_fluorescent layer of the present invention has a larger coating area, and the interference phenomenon occurs in the strip dielectric layer_depression portion, so that the place does not emit light originally. Thus glowing. Therefore, the brightness of the flat light source.
除此之外，本發明更在其他原先不會塗佈有榮光層的 位置塗上螢光層，例如在間隔物之表面或是相鄰的兩挺介 電層圖案之間’如此’可以增加榮光層的塗佈面積，進而 提高平面燈_亮度。而且還可以提升平碰源的 光均勻度。 x 雖然本發明已以較佳實施例揭露如上，然其並非用以 限=本發明，任何熟習此技藝者，在不脫離本發明之精神 和範圍内，當可作些許之更動與潤飾，因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1A〜圖1C是依照本發明之數個實施例的平面燈源 的剖面示意圖。 圖2是依照本發明另一實施例的平面燈源的剖面示意 圖。 圖3是依照本發明又一實施例的平面燈源的剖面示意 圖。 圖4是依照本發明較佳實施例的平面燈源中的介電層 圖案的立體示意圖。 圖5是依照本發明較佳實施例的平面燈源中其中一條 狀介電層圖案沿著其延伸方向的剖面圖。 【主要元件符號說明】 100 :第一基板 102 ··電極 104 :框膠 106 :空間 108 :介電層圖案 108a、108b、108c ··條狀介電層圖案 110 :螢光層 112 :反射層 114 :螢光層 120 :第二基板 116 :間隔物 202 :頂部表面 204、206 :侧表面 ⑧ 14In addition, the present invention applies a phosphor layer at other locations where the glory layer is not originally applied, for example, the surface of the spacer or the adjacent two dielectric layer patterns can be increased. The coated area of the glory layer, which in turn increases the flat light _ brightness. It also improves the light uniformity of the flat source. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention, and it is to be understood that those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS Figures 1A to 1C are schematic cross-sectional views of a planar light source in accordance with several embodiments of the present invention. Figure 2 is a cross-sectional schematic view of a planar light source in accordance with another embodiment of the present invention. Figure 3 is a cross-sectional schematic view of a planar light source in accordance with yet another embodiment of the present invention. 4 is a perspective view of a dielectric layer pattern in a planar light source in accordance with a preferred embodiment of the present invention. Figure 5 is a cross-sectional view of a planar dielectric layer pattern along a direction in which it extends in accordance with a preferred embodiment of the present invention. [Description of main component symbols] 100: First substrate 102 · Electrode 104 : Frame adhesive 106 : Space 108 : Dielectric layer patterns 108 a , 108 b , 108 c · Strip dielectric layer pattern 110 : Fluorescent layer 112 : Reflective layer 114: fluorescent layer 120: second substrate 116: spacer 202: top surface 204, 206: side surface 8 14