TWI284205B - Modulized probe head for high frequency - Google Patents

Modulized probe head for high frequency Download PDF

Info

Publication number
TWI284205B
TWI284205B TW93125409A TW93125409A TWI284205B TW I284205 B TWI284205 B TW I284205B TW 93125409 A TW93125409 A TW 93125409A TW 93125409 A TW93125409 A TW 93125409A TW I284205 B TWI284205 B TW I284205B
Authority
TW
Taiwan
Prior art keywords
panel
probe
modular high
ground
high frequency
Prior art date
Application number
TW93125409A
Other languages
Chinese (zh)
Other versions
TW200608025A (en
Inventor
Yi-Chang Lee
John Liu
Yeong-Her Wang
Yeong-Ching Chao
Yau-Rung Li
Original Assignee
Chipmos Technologies Inc
Chipmos Technologies Bermuda
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chipmos Technologies Inc, Chipmos Technologies Bermuda filed Critical Chipmos Technologies Inc
Priority to TW93125409A priority Critical patent/TWI284205B/en
Publication of TW200608025A publication Critical patent/TW200608025A/en
Application granted granted Critical
Publication of TWI284205B publication Critical patent/TWI284205B/en

Links

Landscapes

  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)

Abstract

A modulized probe head for high frequency is provided. The probe head mainly includes a probing panel, a mounting PCB and an interposer between the panel and the PCB. The probing panel has a plurality of cavities on its back side. A plurality of decoupling components are installed inside the cavities and are electrically coupled to ground/power traces of the probing panel in by-pass connection. The interposer has a covering surface corresponding to the back side of the probing panel, and includes a plurality of connectors on the covering surface. Some of the connectors connect the decoupling components to electrically couple to the ground layer of the mounting PCB.

Description

1284205 五、發明說明(1) 【發明所屬之技術領域】 ^本發明係有關於一種積體電路測試設備之探測卡,特. 別係有關於一種模組化高頻探測卡。 【先前技術】 · 積體電路係朝向高頻化與高密度化發展,習知積體電 =測試設備係裝設有一探測卡(pr〇be card),習知在一次 抓測^作中只能測試一個積體電路產品,如晶圓中之晶 片、捲帶或基板上之晶片封裝件,為了提昇測試速度,探 貝J卡要更加$又计出选集複雜線路,在一次探測操作中能探 觸=個積體電路產品,在測試過程,對於電磁波干擾日顯 敏感,無法確實得知積體電路產品之品質,導致測試失 Φ 與測試效率低落。1284205 V. INSTRUCTION DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a probe card for an integrated circuit test device, and relates to a modular high frequency probe card. [Prior Art] · The integrated circuit is developed toward high frequency and high density. It is known that the integrated circuit = test equipment is equipped with a probe card (pr〇be card), which is known only in one capture test. Can test an integrated circuit product, such as a wafer in a wafer, a tape or a chip package on a substrate. In order to improve the test speed, the probe J card has to be more complicated and counts the complex line, which can be used in one detection operation. Detecting = integrated circuit products, in the test process, sensitive to electromagnetic interference, can not really know the quality of integrated circuit products, resulting in test loss Φ and test efficiency.

、美國專利第5, 491,426號係揭示有一種探測卡組合構 造#’複數個懸臂式探針係固設於一探測卡之下表面,一解 耦裝置(decoup 1 ing apparatus)係裝設於一探測卡之上表 面且疋位於一載板(load b〇ard)之孔内,以消除由電磁波 干擾之雜訊,但其只能過濾由測試設備至探測卡之間連接 纜線產生之雜訊,因探測卡本身線路產生之雜訊將無法 ,=二裝置過遽,效果有限且僅適用於舊型懸臂式探針之 原申請人於我國專利公 探測頭」,其係揭示有—種 (probe head),該探硎頭内 地導電層與複數個探觸端τ 告第586627號「可消除雜訊之 可結合於探測卡之探測頭 部形成一接地導電層,在該接 方連接墊之間係為一具有適當U.S. Patent No. 5,491,426 discloses a probe card assembly structure. A plurality of cantilever probes are fixed on the lower surface of a probe card, and a decoupling device is installed. On the upper surface of a probe card and located in a hole of a load b〇ard to eliminate noise caused by electromagnetic waves, but it can only filter the connection cable from the test equipment to the probe card. The noise, because the noise generated by the detection card itself will not be able to be used, the second device is too sloppy, and the effect is limited. It is only applicable to the original applicant of the old cantilever probe in the Chinese patent public probe. Probe head, the conductive layer in the probe head and a plurality of probe terminals τ 586627 "can eliminate noise, can be combined with the probe head of the probe card to form a ground conductive layer, connected at the joint Between the mats is appropriate

1284205 五、發明說明(2) 間隔之介電層,以構成一内建旁路電容(internai bypass capaci tor),可更加接近該些探觸端的方式過濾雜訊,以 作為一種内建式解粞元件(decoupling component),然由 於習知探測頭(或稱探觸面板)係為一種高密度之多層陶瓷 ,路板,需要植接各式的探觸端·,製造良率低且單價相當 高,若在該探測頭内部需要製成一内建旁路電容之介電 f,因其材質與製程均不同一般陶瓷基板之線路製程將不 容易製造成形,進而增加探測頭成本。 【發明内容】1284205 V. INSTRUCTIONS (2) Interval dielectric layers to form a built-in bypass capacitor (internai bypass capaci tor), which can be used to filter noise by approaching the probes as a built-in solution. Decoupling component, however, because the conventional probe (or probe panel) is a high-density multilayer ceramic, the road plate needs to be implanted with various types of probe ends, and the manufacturing yield is low and the unit price is quite high. If a dielectric f of a built-in bypass capacitor needs to be formed inside the probe, the material process and the process are different. Generally, the circuit process of the ceramic substrate will not be easily formed, thereby increasing the cost of the probe. [Summary of the Invention]

本發明之主要目的係在於提供一種模組化高頻探測 卡,主要包含一探觸面板、一電路載板以及一在該探觸面 板與戎電路載板之間之介面板,該探觸面板係具有複數個 在其背面之容置穴,複數個解耦元件(dec〇upHng component)係埋設於該些容置穴並旁路連接至該探觸面板 之接地線路,該介面板係具有複數個在該遮蓋表面 之 螭"亥遮蓋表面係覆蓋該探觸面板之背面,且部分 η=接端係連接於該些解耦元件,以導接至該電路載 以達到在低模組成本之條件將解耦元件構成 兮^緬而4 °卩,用以過濾探測卡内部線路傳遞之雜訊,且The main purpose of the present invention is to provide a modular high frequency detection card, which mainly comprises a probe panel, a circuit carrier board and a interface panel between the probe panel and the circuit board, the probe panel The system has a plurality of receiving holes on the back side thereof, and a plurality of decoupling components are embedded in the receiving holes and bypassed to the grounding line of the detecting panel. The surface of the cover surface covers the back surface of the probe panel, and a part of the n= connection is connected to the decoupling components to be connected to the circuit to achieve low module cost. The condition is that the decoupling component is configured to filter the noise transmitted by the internal line of the probe card, and

不需要内建電容,不會增加探觸面板(探測頭) 尸/Τ兩义成本。 面板〜模化同頻抓測卡,其係主要包含一探觸 都杯以芬一人 干、C〇UpllnS component)、一電路 載板及一;I面板,該探觸面板係具有一正面、一背面及 1284205 五、發明說明(3) . 複數個在該背面之容置穴,複數個探觸端係設於該探觸面 板之正面,該些解耦元件係埋設於該些容置穴並電性連接 至部分之該些探觸端,該電路載板係用以接合至一測試設 備之測試頭,該介面板係設於該探觸面板與該電路載板之 間’該介面板係具有一遮蓋表面以及複數個在該遮蓋表面 之第一'導接端’邊遮盖表面係覆盖該探觸面板之背面,且 部分之該些第一導接端係連接於該些解耗元件。 【實施方式】 參閱所附圖式,本發明將列舉以下之實施例說明。 依本發明之第一具體實施例,請參閱第1圖,一種模 組化高頻探測卡1 〇 〇主要包含一探觸面板1 1 〇、複數個解耗 元件 130(decoupling component)、一電路載板 140 以及一 介面板1 50,該探觸面板110係作為探觸待測積體電路之第 一電性傳遞基板,在本實施例中,該探觸面板1 1 〇係為一 種具有密集線路之多層陶瓷電路板,在其它實施例中,該 探觸面板11 0係可選自於玻璃基板、晶圓與印刷電路板之 其中之一,遺探觸面板110具有一正面ill、,一背面112及 複數個在該背面1 1 2之容置穴11 3,較佳地,該些容置穴 11 3係為矩陣排列’該探觸面板1 1 〇係包含有複數個電源/ 接地線路114、複麩個旁路線路1 1 5以及複數個訊號傳遞線 路116,在該探觸面板110之背面112另形成有複數個電源/ 接地接墊117與複數個訊號接墊118,該些電源/接地線路 114係連接該些電源/接地接墊117與對應之電源/接地探觸 端1 20,該些旁路線路〗丨5係分接於對應之該些電源/接地No need for built-in capacitors, no increase in the cost of the probe panel (probe). The panel-modular co-frequency capture card mainly includes a probe cup, a C-up, a circuit board and an I panel, and the probe panel has a front panel and a front panel. The back side and 1284205 V. The invention description (3). a plurality of receiving holes on the back surface, a plurality of detecting ends are disposed on the front surface of the detecting panel, and the decoupling components are embedded in the receiving holes and Electrically connected to a portion of the probe end, the circuit carrier is used for bonding to a test head of a test device, the interface panel is disposed between the touch panel and the circuit carrier A cover surface and a plurality of first 'guide ends' covering the surface of the cover surface cover the back surface of the probe panel, and a portion of the first conductive ends are connected to the depletion elements. [Embodiment] The present invention will be described by way of the following examples. According to the first embodiment of the present invention, referring to FIG. 1 , a modular high frequency detecting card 1 〇〇 mainly includes a probe panel 1 1 〇, a plurality of decommissioning components 130, and a circuit. The carrier board 140 and the interface panel 150 are used as the first electrical transmission substrate for detecting the integrated circuit to be tested. In the embodiment, the probe panel 11 is a dense line. In other embodiments, the probe panel 110 can be selected from one of a glass substrate, a wafer and a printed circuit board. The probe touch panel 110 has a front ill and a back surface. 112 and a plurality of receiving holes 11 3 on the back surface 1 1 2 , preferably, the receiving holes 11 3 are arranged in a matrix. The detecting panel 1 1 includes a plurality of power/ground lines 114 . A plurality of power supply/ground pads 117 and a plurality of signal pads 118 are formed on the back surface 112 of the touch panel 110, and the plurality of signal transmission lines 116 are formed on the back surface 112 of the touch panel 110. The grounding line 114 is connected to the power/ground pads 117 and the pair The power/ground probe end 1 20, the bypass lines 丨5 are tapped to the corresponding power/ground

第9頁 1284205 五、發明說明(4) 線路114 ’該些訊號傳遞線路116係連接該些訊號接墊u 8 與對應之訊號探觸端1 2 0。較佳地,該些旁路線路1 1 5之長 度係小於對應之該些電源/接地線路114之長度,以使該些 解辆元件1 3 0更接近對應之該些電源/接地探觸端丨2 〇。在 本實施例中,該些旁路線路1丨5係為導通孔,以使該些解 輕元件1 3 0垂直向對準於該些電源/接地探觸端丨2 〇。 袓數個板觸端1 2 0係没於該探觸面板11 〇之正面111, 在本實施例中,該些探觸端1 20係為彈性探針,以供接觸 待測#體電路之電極部,例如晶片之銲墊、凸塊或是基板Page 9 1284205 V. Description of the Invention (4) Line 114' The signal transmission lines 116 are connected to the signal pads u 8 and the corresponding signal probe terminals 120. Preferably, the lengths of the bypass lines 115 are smaller than the lengths of the corresponding power/ground lines 114, so that the de-energized components 1 30 are closer to the corresponding power/ground probes.丨2 〇. In this embodiment, the bypass lines 1丨5 are via holes, so that the light-dissolving elements 1 30 are vertically aligned with the power/ground probe terminals 丨2 〇. The plurality of board contacts 1 2 0 are not on the front side 111 of the probe panel 11 , and in the embodiment, the probe terminals 20 are elastic probes for contacting the body circuit to be tested. Electrode portion, such as a pad, bump, or substrate of a wafer

之連接墊或銲球,該些探觸端1 2 〇係可區別為電源/接地探 觸端與訊號探觸端,以分別電性連接至該探觸面板丨丨〇之 電源/接地線路1 1 4與訊號傳遞線路1 1 6。該些解耦元件1 3 〇 係埋設於該些容置穴113,該些解耦元件13〇係可選自於旁 路電容(bypass capacitor)、解耦電容(dec〇upHng capacitor)與超寬頻帶濾波器之其中 ,此 13〇係為獨立元件且、組成可為任意材料,不需要^解建^件 探觸面板110,每一解耦元件丨30係具有一第一電極131以 及第一電極13 2,當該些解耦元件1 3 〇係埋設於該些容置 穴113,其第一電極131係經由該些旁路線路115或/與該些The connection pad or the solder ball, the probe terminals 1 2 can be distinguished as a power/ground probe end and a signal probe end to be electrically connected to the power supply/ground line 1 of the probe panel respectively 1 4 and the signal transmission line 1 1 6 . The decoupling elements 13 are embedded in the receiving holes 113, and the decoupling elements 13 can be selected from a bypass capacitor, a decoupling capacitor (dec〇upHng capacitor), and an ultra-wideband With the filter, the 13 turns are independent components, and the composition can be any material. There is no need to disassemble the probe panel 110. Each decoupling component 30 has a first electrode 131 and a first The electrodes 13 2 are embedded in the accommodating holes 113, and the first electrodes 131 are connected to the bypass lines 115 or/and the

電源/接地線路114電性連接至部分之該些探觸端12〇'(即電 源/接地捸觸端),其第二電極丨3 2係外露於該探觸面板丨丄〇 之背面11 2。The power/ground line 114 is electrically connected to a portion of the probe terminals 12'' (ie, the power/ground contact end), and the second electrode 丨3 2 is exposed on the back surface of the probe panel 11 11 2 .

1284205 五、發明說明(5) 電路板,以承載該探觸面板1 1 〇與該介面板15〇,該電路載 板14 0係具有至少一接地層1 41、複數個在其下表面之内連 接墊142、複數個在其上表面之外連接墊丨44,並以線路 143將部份之内連接墊142連接至該接地層141。該介面板 150係設於該探觸面板11 〇與該電路載板丨4〇之間,在本實 施例中’該介面板1 5 0係為一種具有導通線路之陶究電路 板’在其它實施例中,該介面板1 50係可選自於玻璃基·1284205 V. Inventive Description (5) A circuit board for carrying the probe panel 1 1 〇 and the interface panel 15 系 having at least one ground layer 1 41 and a plurality of layers on the lower surface thereof The connection pads 142, a plurality of pads 44 are connected outside the upper surface thereof, and a portion of the inner connection pads 142 are connected to the ground layer 141 by a line 143. The interface panel 150 is disposed between the probe panel 11 and the circuit carrier ,4〇. In the embodiment, the interface panel 150 is a ceramic circuit board with a conductive line. In an embodiment, the interface panel 150 can be selected from glass substrates.

板、晶圓與印刷電路板之其中之一,該介面板15〇係具有 一遮蓋表面151以及一對應之接合表面152,該介面板丨5〇 之遮蓋表面1 5 1係對準朝向該探觸面板丨丨〇,較佳地,該介 面板150係與該探觸面板110為相同尺寸,該介面板15〇之 接合表面152係對準朝向該電路載板丨4〇之一預定位置,例 如結線凸塊(stud bump)之複數個第一導接端15 3係形成於 該介面板150之遮蓋表面151,例如結線凸塊(stud 之複數個第二導接端154係形成於該介面板15〇之〗妾合表面 1 5 2 +,在模組化結合之後,該介面板丨5 〇之遮蓋表面丨5】係 覆蓋該探觸面板11 〇之背面丨丨2,其中部分之該些第一導接 端153係連接於該些解耦元件丨3〇之第二電極132,其它之 該些第一導接端153係連接於該探觸面板11Q之該些電源/ 接地接墊117與複數個訊號接墊118,該些第二導接端154 係連接於該電路載板丨4〇之内連接墊142,其中部份電性連 接至該些解耦元件13〇之該些第一導接端154係經由該電路 載板140之内連接墊142與線路143電性連接至該接地層 141,而其它電性連接至該些電源/接地墊117與訊號接墊 1284205One of a board, a wafer and a printed circuit board, the interface panel 15 has a cover surface 151 and a corresponding joint surface 152, and the cover surface of the panel 丨5 对准 is aligned toward the probe Preferably, the interface panel 150 is the same size as the probe panel 110, and the interface surface 152 of the interface panel 15 is aligned with a predetermined position toward the circuit carrier 丨4〇. For example, a plurality of first guiding ends 15 3 of the stud bumps are formed on the covering surface 151 of the interface panel 150, such as a junction bump (a plurality of second guiding ends 154 of the stud are formed on the interface) After the modular combination, the cover surface 丨5 of the panel 覆盖5 covers the back surface 丨丨2 of the probe panel 11 , and the portion thereof The first conductive terminals 153 are connected to the second electrodes 132 of the decoupling components ,3, and the other first conductive terminals 153 are connected to the power/ground pads of the sensing panel 11Q. 117 and a plurality of signal pads 118, the second guiding ends 154 are connected to the circuit carrier 丨 4 The first connection terminal 154 electrically connected to the decoupling elements 13 is electrically connected to the line 143 via the connection pads 142 of the circuit carrier 140. Grounding layer 141, and other electrical connections to the power/ground pads 117 and signal pads 1284205

118之該些第二導接端丨54係穿過該接地層141而電性連接 至該電路載板140之外連接墊144。 該模組化高頻探測卡1 〇 〇係另包含有一結合套件丨6 〇以 及複數個導位梢1 7 0,該結合套件1 6 〇係具有一開孔1 61, 其係對準並顯露該探觸面板1 i 〇之正面丨n,該結合套件 1 6 0係結合該探觸面板11 〇與該介面板丨5 〇於該電路載板 140,該些導位梢丨70係穿通該探觸面板11〇在角隅之孔與 a亥介面板1 5 0在角隅之孔,較佳地,該探觸面板丨1 〇之正面 111周邊係形成有一缺口 11 9,以利該結合套件丨6 〇之嵌合 對位’該結合套件160可設有複數個調整栓162,以微量調 整該探觸面板110之χ-γ向位置。 。The second conductive terminals 54 of the 118 are electrically connected to the connection pads 144 outside the circuit carrier 140 through the ground layer 141. The modular high-frequency probe card 1 further includes a coupling kit 丨6 〇 and a plurality of guide pins 170, the coupling kit 16 has an opening 1 61, which is aligned and exposed The front side of the touch panel 1 i is coupled to the touch panel 11 〇 and the interface panel 〇 5 to the circuit carrier 140, and the guide stubs 70 are passed through the The probe panel 11 is formed in a corner hole and a hole in the corner plate. Preferably, the front surface 111 of the probe panel 1 is formed with a notch 11 9 to facilitate the combination kit.嵌合6 〇 Chimeric Alignment 'The splicing kit 160 can be provided with a plurality of adjustment pins 162 to slightly adjust the χ-γ position of the probe panel 110. .

因此,藉由上述之模組化高頻探測卡1 〇 〇可將該些解 耦元件1 30埋設於該探觸面板11 〇且被該介面板丨5〇遮蓋保 護’並能藉由該介面板1 50電性連接至該電路載板丨4〇之接 地層141,以消除該探測卡丨〇〇内部線路所產生之雜訊,並 且不需要内建電容於探觸面板丨丨〇,以一般探觸面板之製 造成本達到尚頻率模組化之功效。Therefore, the decoupling component 1 30 can be embedded in the probe panel 11 by the modular high-frequency probe card 1 described above, and can be protected by the panel 丨 5 并 and can be used by the interface. The board 1 50 is electrically connected to the ground plane 141 of the circuit board 以 4 , to eliminate the noise generated by the internal circuit of the probe cassette, and does not need built-in capacitors on the probe panel 丨丨〇 Generally, the manufacturing cost of the probe panel achieves the effect of modularization.

依據本發明之第二具體實施例,請參閱第2圖,一種 模組化高頻探測卡2 〇 〇主要包含一探觸面板21 〇、複數個解 耦元件230、一電路載板240以及一介面板250,該探觸面 板210具有一正面211、一背面212及複數個在該背面212之 容置穴213,該探觸面板21〇係包含有複數個電源/接地線 路214、複數個旁路線路21 5以及複數個訊號傳遞線路 21 6 ’在該探觸面板2 1 〇之背面21 2另形成有複數個電源/接According to the second embodiment of the present invention, referring to FIG. 2, a modular high frequency detecting card 2 〇〇 mainly includes a probe panel 21 〇, a plurality of decoupling components 230, a circuit carrier 240, and a The panel 250 has a front surface 211, a back surface 212, and a plurality of receiving holes 213 on the back surface 212. The detecting panel 21 includes a plurality of power/ground lines 214 and a plurality of bypass lines. The road 21 5 and the plurality of signal transmission lines 21 6 ′ are further formed with a plurality of power sources/connections on the back surface 21 2 of the probe panel 2 1 〇

第12頁 1284205 五、發明說明(7) 地接墊217與複數個訊號接墊218,該些電源/接地線路214 係連接該些電源/接地接墊2 1 7與對應之電源/接地探觸端 220,該些旁路線路215係分接於對應之該些電源/接地線 路2 1 4 ’該些訊號傳遞線路2 1 6係連接該些訊號接塾2 1 8與 對應之訊號探觸端2 20。較佳地,,該些旁路線路21 5之長度 係小於對應之該些電源/接地線路21 4之長度,以使該些解 耦元件230更接近對應之該些電源/接地探觸端220。 複數個探觸端220係設於該探觸面板21〇之正面211, 在本實施例中,該些探觸端220係為導電凸塊,但該些探 觸端2 2 0亦可為微機電探針,該些探觸端2 2 〇係可區別為電 源/接地探觸端與訊號探觸端,以分別電性連接至該探觸你 面板21 0之電源/接地線路2 1 4與訊號傳遞線路2 1 6。該些解 麵元件230係埋設於該些容置穴213,該些解耦元件230係 矜獨立元件,不需要内建於該探觸面板2丨〇,每一解耦元 件230係具有一第一電極231以及一第二電極232,當該些 解耦元件230係埋設於該些容置穴213,其第一電極231係 經由該些旁路線路2 1 5或與該些電源/接地線路2 14電性連 接至部分之該些探觸端22〇(即電源/接地探觸端),其第二 電極2 3 2係外露於該探觸面板21 〇之背面2 1 2。 請參閱第2圖,該電路載板2 4〇係用以接合至一測試設φ 備之測試頭(圖未繪出),以承載該探觸面板2丨〇與該介面 板250,該電路載板24 0係具有至少一接地層241、複數個 在其下表面之内連接墊242、複數個在其上表面之外連接 塾244 ’並以線路243將部份之内連接墊242連接至該接地Page 12 1284205 V. Description of the Invention (7) Ground pad 217 and a plurality of signal pads 218, the power/ground lines 214 are connected to the power/ground pads 2 17 and corresponding power/ground probes In the terminal 220, the bypass lines 215 are connected to the corresponding power/ground lines 2 1 4 '. The signal transmission lines 2 16 are connected to the signal interfaces 2 1 8 and the corresponding signal probe ends. 2 20. Preferably, the length of the bypass lines 215 is less than the length of the corresponding power/ground lines 214, so that the decoupling elements 230 are closer to the corresponding power/ground probes 220. . A plurality of probe terminals 220 are disposed on the front surface 211 of the probe panel 21, and in the embodiment, the probe terminals 220 are conductive bumps, but the probe terminals 2 2 0 may also be micro Electromechanical probes, the probe terminals 2 2 can be distinguished as a power/ground probe and a signal probe end to be electrically connected to the power/ground line 2 1 4 of the panel 21 Signal transmission line 2 1 6. The decoupling elements 230 are embedded in the receiving holes 213, and the decoupling elements 230 are independent components, and do not need to be built in the detecting panel 2, each decoupling element 230 has a first An electrode 231 and a second electrode 232 are embedded in the accommodating holes 213, and the first electrodes 231 are connected to the power supply/ground lines via the bypass lines 2 15 or 2 14 is electrically connected to a portion of the probe terminals 22 (ie, the power/ground probe end), and the second electrode 2 3 2 is exposed on the back surface 2 1 2 of the probe panel 21 . Referring to FIG. 2, the circuit carrier board is used for bonding to a test head (not shown) for carrying the test panel 2 and the interface panel 250. The circuit The carrier board 205 has at least one ground layer 241, a plurality of connection pads 242 on the lower surface thereof, a plurality of connection pads 244 ′ outside the upper surface thereof, and a portion of the inner connection pads 242 connected to the line 243 The ground

第13頁 1284205 五、發明說明(8) 層241。該介面板2 50係設於該探觸面板21〇與該電路載板 2,40之間’請參閱第3圖,在本實施例中,該介面板250係· 為一種具有導通孔255之陶瓷電路板,該介面板250係具有· 一遮蓋表面251以及一對應之接合表面252,該介面板150 · 之遮蓋表面151係對準朝向該探觸面板21〇,該介面板25〇 、 之接合表面252係對準朝向該電路載板24〇之一預定位置, 複數個第一導接端253係形成於該介面板250之遮蓋表面 251 ’複數個第二導接端254係形成於該介面板25〇之接合 表面252,並以導通孔25 5電性連接該些第一導接端253與 该些第二導接端254,在本實施例中,每一第一導接端253 係包含有一介電彈性塊2 53a以及至少一圍繞於該彈性塊囉 253a之金屬層253b,並且同樣地,每一第二導接端254係 包含有一介電彈性塊2 5 4 a以及至少一圍繞該彈性塊2 5 4 a之 金屬層254b,在模組化結合之後,該介面板25〇之遮蓋表 面251係覆蓋該探觸面板21〇之背面2 12,其中部分之該些 第一導接端253係連接於該些解耦元件230之第二電極 232,其它之該些第一導接端253係連接於該探觸面板21〇 之该些電源/接地接塾21 7與複數個訊號接塾218,該些第 二導接端254係連接於該電路載板240之内連接墊242,其 中部份電性連接至該些解耦元件2 3 〇之該些第二導接端2 5 4 係經由該電路載板2 4 0之内連接墊2 4 2與線路2 4 3電性連接 至該接地層241,而其它電性連接至該些電源/接地墊217 與訊號接墊218之該些第二導接端254係穿過該接地層241 而電性連接至遠電路載板2 4 〇之外連接塾2 4 4。Page 13 1284205 V. Description of the invention (8) Layer 241. The interface panel 2 is disposed between the probe panel 21 and the circuit carrier 2, 40. Referring to FIG. 3, in the embodiment, the interface panel 250 is a via 255. A ceramic circuit board having a cover surface 251 and a corresponding engagement surface 252, the cover surface 151 of the interface panel 150 is aligned toward the probe panel 21, the interface panel 25 The bonding surface 252 is aligned with a predetermined position toward the circuit carrier 24 , and a plurality of first guiding ends 253 are formed on the covering surface 251 of the interface panel 250. The plurality of second guiding ends 254 are formed on the interface The first surface 253 and the second conductive ends 254 are electrically connected to the first and second guiding ends 253. In this embodiment, each of the first guiding ends 253 is electrically connected to the second guiding end 253. The system includes a dielectric elastic block 2 53a and at least one metal layer 253b surrounding the elastic block 253a, and similarly, each second guiding end 254 includes a dielectric elastic block 2 5 4 a and at least one The metal layer 254b surrounding the elastic block 2 5 4 a, after modular combination, the interface The cover surface 251 of the board 25 covers the back surface 2 12 of the touch panel 21 , and some of the first conductive ends 253 are connected to the second electrodes 232 of the decoupling elements 230 , and other The first conductive terminal 253 is connected to the power/ground interface 21 7 of the probe panel 21 and the plurality of signal connectors 218. The second conductive terminals 254 are connected to the circuit carrier 240. The inner connecting pad 242, wherein the second connecting end of the decoupling component 2 3 is electrically connected to the connecting pad 2 4 2 and the line 2 through the circuit carrier 2404 4 3 is electrically connected to the ground layer 241, and the other second conductive terminals 254 electrically connected to the power/ground pads 217 and the signal pads 218 are electrically connected to the ground layer 241 to The remote circuit carrier 2 4 塾 is connected to 塾 2 4 4 .

1284205 五、發明說明(9) , 此外,該模組化高頻探測卡2〇〇係可另包含有一結合 套件260,該結合套件260之開孔261係對準並顯露該探觸 面板210之正面211 ’该結合套件26〇係結合該探觸面板2 1 〇 與該介面板250於該電路載板24〇。 為準本申請專利範圍所界定者 圍内所作之任何變化 明之精神和範 bQ屬於本發明之保護範園。1284205 5, the invention description (9), in addition, the modular high-frequency detection card 2 can further comprise a binding kit 260, the opening 261 of the bonding kit 260 is aligned and reveals the probe panel 210 The front side 211 ′′ is coupled to the touch panel 2 1 〇 and the interface panel 250 to the circuit carrier 24 . Any changes made within the scope defined by the scope of this patent application are intended to be within the scope of protection of the invention.

第15頁Page 15

1284205 圖式簡單說明 【圖式簡單說明】 圖··依據本發明之第一具體實施例 採測卡之元件分解截面示意圖; 第2圖:依據本發明之第二具體實施例 探測卡之元件分解截面示意圖;,及 第3圖:依據本發明之第二具體實施例 測卡之介面板截面示意圖。〜 元件符號簡單說明·· 10 0模組化高頻探測卡 110探觸面板 113容置穴 11 9 缺口 120探觸端 1 3 0解耗元件 140電路載板 14 3線路 150介面板 153第一導接端 160結合套件 170導位梢 21 0探觸面板 一種模組化高類 一種模組化高頻 β亥才莫組化南頻探 111 正面 112 背面 114 電源/接地線路 115 旁路線路 117 電源/接地接墊 118 訊號接墊 131 第一電極 132 第二電極 141 144 接地層 外連接墊 142 内連接墊 151 154 遮蓋表面 第二導接端 152 接合表面 161 開孔 162 調整栓 測卡 211 正面 212 背面 1284205 圖式簡單說明 213 容1穴 214 電源/接地線路 215 旁路線路· 216 訊號傳遞線路 217 電源/接地接墊 218 訊號接墊 220 探觸端 230 解粞元件 231 第一電極 232 第二電極 240 電路載板 241 接地層 242 内連接塾 243 線路 244 外連接墊 250 介面板 251 遮蓋表面 252 接合表面 253 第一導接端 253a 彈性塊 253b 金屬層 254 第二導接端 254a 彈性塊 254b 金屬層 255 導通孔 260 結合套件 261 開孔BRIEF DESCRIPTION OF THE DRAWINGS FIG. 2 is a schematic exploded cross-sectional view of a test card according to a first embodiment of the present invention; FIG. 2 is an exploded view of a probe card according to a second embodiment of the present invention. Cross-sectional schematic view; and FIG. 3 is a schematic cross-sectional view of a dielectric panel according to a second embodiment of the present invention. ~ Simple description of component symbols · 10 0 modular high-frequency detection card 110 probe panel 113 receiving hole 11 9 notch 120 probe end 1 3 0 depletion component 140 circuit carrier 14 3 line 150 interface panel 153 first The guiding end 160 is combined with the sleeve 170 of the kit 170. The detecting panel is a modular high type, a modular high frequency, a high frequency, a south frequency probe 111, a front surface 112, a back surface 114, a power/ground line 115, a bypass line 117. Power/ground pad 118 signal pad 131 first electrode 132 second electrode 141 144 ground layer outer connection pad 142 inner connection pad 151 154 cover surface second guide end 152 joint surface 161 opening 162 adjustment plug test card 211 front 212 Back 1284205 Simple description of the drawing 213 Rong 1 hole 214 Power / ground line 215 Bypass line · 216 Signal transmission line 217 Power / ground pad 218 Signal pad 220 Probe end 230 Decoupling element 231 First electrode 232 Second Electrode 240 circuit carrier 241 ground plane 242 inner connection 塾 243 line 244 outer connection pad 250 interface panel 251 cover surface 252 joint surface 253 first guide end 253a elastic block 253b metal layer 254 second terminal 254a elastic block 254b metal layer 255 through hole 260 bonding kit 261 opening

第17頁Page 17

Claims (1)

1284205 六、申請專利範圍 【申請專利範圍】 1、 一種模組化高頻探測卡,包含·· 探觸面板’其係具有一正面、一背面及複數個在該 背面之容置穴; 複數個探觸端’其係設於該探觸面板之正面; )複數個解搞元件(dec〇upUng c〇mponent),其係埋設 於该些谷置穴並電性連接至部分之該些探觸端; 一 $路載板’用以接合至一測試設備之測試頭;及 一介面板’其係設於該探觸面板與該電路載板之間, 該介面板係具有一遮蓋表面以及複數個在該遮蓋表面之第 一,接端,該遮蓋表面係覆蓋該探觸面板之背面,且部分 之該些第一導接端係連接於該些解耦元件。 2、 如申請專利範圍第丨項所述之模組化高頻探測卡,其 中該電路載板係具有一接地層,其係藉由該介面板電性連 接至該些解麵元件。 3、 如申請專利範圍第2項所述之模組化高頻探測卡,1 面板係ΐ有複數個第二導接端,其係形成於該介面 板ί應於忒遮盍表面之另一表面,以供導接至該電路板之 接地層。 4、 如申請專利範圍第丨項所述之模組化高頻探測卡, 中該介面板係為一陶瓷電路板。 、 5、 如申請專利範圍第丨或4項所述之模組化高頻探 其中該輝觸面板係為一陶瓷電路板。 卞 6、 如申請專利範圍第1項所述之振 俱組化南頻探測卡,其1284205 VI. Scope of Application for Patent Application [Scope of Application] 1. A modular high-frequency probe card, including a probe panel, which has a front surface, a back surface, and a plurality of pockets on the back surface; The probe end is disposed on the front side of the probe panel; a plurality of decupupUng c〇mponent elements embedded in the valleys and electrically connected to the portions of the probes a test board for bonding to a test device; and a panel being disposed between the touch panel and the circuit carrier, the panel having a cover surface and a plurality of At the first end of the covering surface, the covering surface covers the back surface of the detecting panel, and a part of the first guiding ends are connected to the decoupling elements. 2. The modular high frequency probe card of claim 2, wherein the circuit carrier has a ground layer electrically connected to the surface uncoupling elements by the dielectric panel. 3. The modular high-frequency probe card according to claim 2, wherein the panel has a plurality of second guide ends formed on the surface of the cover panel. Surface for guiding to the ground plane of the board. 4. The modular high frequency probe card according to the scope of the patent application, wherein the interface panel is a ceramic circuit board. 5. A modular high frequency probe as described in claim 4 or 4 wherein the glow panel is a ceramic circuit board.卞 6. As set forth in the patent application scope, the vibration-organized south frequency detection card, 、申請專利範圍 中該介面板係選自於玻璃基板、晶圓與印刷電路板之其中 之 ~ 〇 /、 · 7如申μ專利範圍第1項所述之模組化高頻探測卡,其 中該探觸面板係選自於玻璃基板、晶圓與印刷電路板之其 中之一 〇 穴 8、 如申請專利範圍第1項所述之模組化高頻探測卡,其 中該些第一導接端係為結線凸塊(stud bump)。 、 9、 如申請專利範圍第丨項所述之模組化高頻探測卡,里 中该些第一導接端係包含有彈性塊。 1〇 :如申請專利範圍第9項所述之模組化高頻探測卡,其 中该些彈性塊係為介電#,該些第一導接端係另包含至 少一圍繞於該些彈性塊之金屬層。 Μ利範圍&項所述之模組化高頻探測卡,其 β φΪ 4、° 〇套件以供結合該探觸面板與該介面板於 該電路載板。 ^ 1中項所述之模組化高頻探測卡,其 13 了了二ίίΐ二有一開孔,以顯露該探觸面板之正面。 中,;觸圍第"項所述之模組化高頻探測卡,其 件之嵌合對位。㈣料成有—缺口,以利該結合套 14二如申請專利範圍第i項所述之模組化高頻探測卡,其 面板係包含有複數個在該背面之電 J,數個旁路線路與複數個電源/接地線 ; 接地線路係連接該些電泝/垃仏# # 人=I资 ,、接地接墊與對應之電源/接地探 第19頁 1284205In the scope of the patent application, the dielectric panel is selected from the group consisting of a glass substrate, a wafer, and a printed circuit board. 模组/, · 7 The modular high-frequency detection card described in claim 1 of the patent application scope, wherein The touch panel is selected from the group consisting of a glass substrate, a wafer and a printed circuit board. The modular high frequency detection card according to claim 1, wherein the first conductive connection The end system is a stud bump. 9. The modular high frequency probe card of claim 2, wherein the first conductive ends comprise elastic blocks. The modular high-frequency detection card of claim 9, wherein the elastic blocks are dielectric #, and the first guiding ends further comprise at least one surrounding the elastic blocks. The metal layer. The modular high frequency probe card described in the patent range & item has a beta φ Ϊ 4, ° 〇 kit for combining the probe panel with the interface panel on the circuit carrier. ^1 The modular high-frequency detection card described in the middle item has 13 holes and a hole to reveal the front surface of the probe panel. In the middle, the modular high-frequency detection card described in the item "Terminal" is fitted with the fitting. (4) The material is formed into a gap, so as to facilitate the combined sleeve 14 as in the modular high-frequency detection card described in the scope of claim i, the panel comprises a plurality of electric J on the back side, and several bypass lines. Road and a plurality of power/grounding lines; grounding lines are connected to the electrical traceback/garbage ##人=I,, grounding pads and corresponding power/grounding probes, page 19, 1284205 六、申請專利範圍 觸端路 一旁路線路係分接於對應之該些電源/接地線 2 )如申清專利範圍,第1 4項所述之模組化高頻探測卡,其 中邊些旁路線路之長度係小於對應之該些電源/接地線路 之長度。 1 6、如申請專利範圍第1 4項所述之模組化高頻探測卡,其 中該些旁路線路係為導通孔。Sixth, the scope of application for patents is a bypass circuit that is connected to the corresponding power/ground wires. 2) The modular high-frequency detection card described in item 14 of Shenqing Patent Range, some of which are next to each other. The length of the line is less than the length of the corresponding power/ground lines. The modular high frequency probe card of claim 14, wherein the bypass lines are via holes. 第20頁Page 20
TW93125409A 2004-08-24 2004-08-24 Modulized probe head for high frequency TWI284205B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW93125409A TWI284205B (en) 2004-08-24 2004-08-24 Modulized probe head for high frequency

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW93125409A TWI284205B (en) 2004-08-24 2004-08-24 Modulized probe head for high frequency

Publications (2)

Publication Number Publication Date
TW200608025A TW200608025A (en) 2006-03-01
TWI284205B true TWI284205B (en) 2007-07-21

Family

ID=39455033

Family Applications (1)

Application Number Title Priority Date Filing Date
TW93125409A TWI284205B (en) 2004-08-24 2004-08-24 Modulized probe head for high frequency

Country Status (1)

Country Link
TW (1) TWI284205B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI451097B (en) * 2012-06-29 2014-09-01 Universal Scient Ind Shanghai An emi shielding testing device

Also Published As

Publication number Publication date
TW200608025A (en) 2006-03-01

Similar Documents

Publication Publication Date Title
TW454359B (en) Packaging and interconnection of contact structure
TW480692B (en) Contact structure having silicon finger contactors and total stack-up structure using same
CN106233461B (en) Semiconductor device and its manufacturing method
KR101393175B1 (en) Integrated high-speed probe system
US7088118B2 (en) Modularized probe card for high frequency probing
TWI388853B (en) Variety exchanging unit and production method and test device with variety exchanging unit
JP2005524855A5 (en)
JP4252491B2 (en) Module with inspection function and inspection method thereof.
US10753960B2 (en) Probe card and signal path switching module assembly
JP2014074716A (en) Fine pitch interface for probe card
TW201102660A (en) Testing probe
TW200937017A (en) Test system with high frequency interposer
TW442910B (en) Packaging and interconnection of contact structure
TW201643440A (en) Probe module with feedback test function
TW200840150A (en) Probe card including a plurality of connectors and method of bonding the connectors to a substrate of the probe card
CN102472792A (en) Device for measuring integrated circuit current and adapter for measuring integrated circuit current
CN109935248B (en) Memory module card
WO2014036900A1 (en) Electrically connected assembly and detection method thereof
TWI284205B (en) Modulized probe head for high frequency
CN109587933B (en) Circuit adapter plate and testing device
US20040207420A1 (en) Modularized probe card with coaxial transmitters
TW200529346A (en) Fabrication method of semiconductor integrated circuit device
TWI489113B (en) A probe card that switches the signal path
JPH05113451A (en) Probe board
TW201251219A (en) Connector and electric conduction member

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees