TWI283937B - Optoelectronic semiconductor component with high light-emitting efficiency - Google Patents

Optoelectronic semiconductor component with high light-emitting efficiency Download PDF

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Publication number
TWI283937B
TWI283937B TW094145296A TW94145296A TWI283937B TW I283937 B TWI283937 B TW I283937B TW 094145296 A TW094145296 A TW 094145296A TW 94145296 A TW94145296 A TW 94145296A TW I283937 B TWI283937 B TW I283937B
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Taiwan
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wafer
semiconductor
semiconductor component
carrier
optoelectronic semiconductor
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TW094145296A
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Chinese (zh)
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TW200701517A (en
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Chung-Chan Wu
Chen-Hsiu Lin
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Lite On Technology Corp
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Publication of TWI283937B publication Critical patent/TWI283937B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item

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  • Led Devices (AREA)

Abstract

An optoelectronic semiconductor component includes a housing including a light exit opening, a first semiconductor chip installed inside the housing for emitting light, and a second semiconductor chip installed in a position inside the housing where the distance between the second semiconductor chip and the light exit opening is greater than the distance between the first semiconductor chip and the light exit opening.

Description

1283937 九、發明說明: 【發明所屬之技術領域】 本發明係提供一種可增加出光效率之光電半導體元 件,尤指一種將不同晶片以相對於出光口不同距離錯開之 _______________ ................-— ........................................... 方式,來增加出光效率的光電半導體元件。 【先前技術】 近年來高亮度發光二極體(以下簡稱L E D)的應用領域 不斷地被開發。不同於一般白熾燈泡,LED係屬冷發光, 具有耗電量低、元件壽命長、無須暖燈時間、反應速度快 等優點,再加上其體積小、耐震動、適合量產,容易配合 應用需求製成極小或陣列式的元件,因此LED已普遍使用 於資訊、通訊及消費性電子產品的指示燈與顯示裝置上。 LED除應用於戶外各種顯示器及交通號誌燈外,在汽車工 業中也佔有一席之地,另外在可攜式產品,如行動電話、 PDA螢幕背光源的應用上,亦有亮麗成績。尤其是目前當 紅的液晶顯示器產品,在選擇與其搭配的背光模組零件 時,LED更是不可或缺的關鍵零組件。 請參閱第1圖、第2圖、第3圖,以及第4圖,第1 圖為先前一光電半導體元件10之外觀示意圖,第2圖為先 前光電半導體元件10之前視圖,第3圖為先前光電半導 體元件10組裝於一電路板12上之示意圖,第4圖為先前 5 1283937 光電半導體元件ίο内部元件之示意圖。光電半導體元件 , 10係可為一侧光式發光二極體元件,其包含有一殼體14, 其上形成有一出光口 16,兩支架18,安裝於殼體14之外 側,其係可分別為一 L型支架,此外兩支架18上分別設有 . 一外部電性接點P1,設置於支架18之底側與電路板12連 結之處’用來接收電路板12所傳來之外部電源,其中支架 18 係可以表面黏著(surface mounting technique,SMT)之方 φ 式連接於電路板12,藉以使光電半導體元件10形成一表 面黏著元件。 光電半導體7L件10另包含一第一晶片載體2〇以及一 第一晶片載體2卜設置於殼體14内,第_晶片載體2〇與 第二晶片載體21係分別連接於兩支架18,也就是說支架 18係可為第-晶片載體2〇與第二晶片載體^穿過殼體14 之破孔所延伸之結構體’以形成後續表面黏著製程的接 點並接收電路板12所傳來之外部電源;光電半導體元件 1〇另包3第半導體晶片22,安裝於第一晶片載體20 上,用來魏祕料為切乂用,錢可為一發光二極 體晶片,以及-第二半導體晶片24,安裝於第一晶片載體 20上其係可為-—極體保護晶片,以保護第一半導體晶 片22免於接受過大之電、流,例如為一齊納(ζ·)二極體晶 片,其係可用來調整卫作電壓,具有電路穩壓之功能。此 外,光電半導體元件10另包含導線遍、遍、,用來 6 1283937 電連接第一半導體晶片22、第二半導體晶片24、第一晶片 載體20,與第二晶片載體21,以及一光學視窗28,其係 形成於殼體14之内部,且填有變化第一半導體晶片22所 發射光線之光學特性之物質,例如環氧樹脂或矽膠等,並 可内含螢光材料、散光材料,或顏料等。光學視窗28的製 程大多是利用一可透光材質之流動膠體填入殼體14之内 側,並覆蓋在第一半導體晶片22、第二半導體晶片24,與 > 導線26a、26b、26c上,再使其固化成具有保護功能的封 膠,以保護及固定第一半導體晶片22、第二半導體晶片 24,與導線 26a、26b、26c。 然而先前光電半導體元件10於第一半導體晶片22發 射光線至光學視窗28並透射出出光口 16時,常會因為第 — 一半導體晶片22與第二半導體晶片2女督於同一平面,雨 、 ________________ ____________________—- …―——............_ 造成第一半導體晶片22所射出之光線被第二半導i晶片 > 24阻擋,故無法全然有效地將光線投射至光學視窗28或 , *""**—·— 有效地藉由殼體14内側反射光線至出光口 16外,而造成 光電半導體元件10出光之不均勻以及出光效率的降低。 【發明内容】 本發明之申請專利範圍係揭露一種可增加出光效率之 光電半導體元件,其包含有一殼體,其上形成有一出光口, 一第一半導體晶片,設置於該殼體内,用來發射光線,以 7 1283937 及一第二半導體晶片,以較該第一半導體晶片遠離於該殼 體之出光口之方式設置於該殼體内。 【實施方式】 請參閱第5圖、第6圖,以及第7圖,第5圖為本發 明第一實施例一光電半導體元件50之外觀示意圖,第6圖 為本發明第一實施例光電半導體元件50之前視圖,第7 圖為本發明第一實施例光電半導體元件50組裝於一電路 板52上之示意圖。光電半導體元件50係可為一側光式發 光二極體元件,其包含有一殼體54,其上形成有一出光口 56,兩支架58,安裝於殼體54之外侧,其係可分別為一 L 变支架,此外兩支架58上分別設有一外部電性接點P1, 設置於支架58之底侧與電路板52連結之處,用來接收電 路板52所傳來之外部電源,其中支架58係可以表面黏著 (surface mounting technique,SMT)之方式連接於電路板 52,藉以使光電半導體元件50形成一表面黏著元件。 請參閱第8圖與第9圖,第8圖為本發明第一實施例 光電半導體元件50之剖視圖,第9圖為本發明第一實施例 光電半導體元件50内部元件之示意圖。光電半導體元件 50另包含一第一晶片載體60,設置於殼體54内,第一晶 片載體60係連接於其中一支架58,也就是說其中一支架 58係可為第一晶片載體60穿過殼體54之破孔所延伸之結 8 1283937 構體,以形成後續表面黏著製程的接點,並接收電路板52 所傳來之外部電源;光電半導體元件50另包含一第一半導 體晶片62,安裝於第一晶片載體60上,用來發射光線以 作為光源之用,其係可為一發光二極體晶片,第一晶片載 體60與第一半導體晶片62間係可塗佈絕緣材質之黏著 劑,例如銀膠等。光電半導體元件50另包含一第二晶片載 體64,以較第一晶片載體60遠離於殼體54之出光口 56 之方式設置於殼體54内,也就是說第一晶片載體60與第 〆〆-------------------------------- 二晶片載體64間具^^高度;目似於第一晶片載體60, 第二晶片載體64係連 一支架58,也就是說另一支 架58係可為第二晶片載體64穿過殼體54之破孔所延伸之 結構體,以形成後續表面黏著製程的接點,並接收電路板 52所傳來之外部電源;光電半導體元件50另包含一第二 半導體晶片66,安裝於第二晶片載體64上,其係可為一 二極體保護晶片’以保護第一半導體晶片62免於接受過大 之電流,例如為一齊納(zener)二極體晶片,其係可用來調 整工作電壓,具有電路穩壓之功能,第二晶片載體64與第 二半導體晶片66間係可塗佈導電材質之黏著劑,例如導電 膠等,以使第二晶片載體64與第二半導體晶片66呈電性 連接之狀態。 此外,第一晶片載體60上介於第一半導體晶片62與 第二晶片載體64之間具有一第一寬廣空間68a及一第一狹 9 1283937 窄空間70a,以及第二晶片載體64上介於第二半導體晶片 66與第一晶片載體60之間具有一第二寬廣空間68b及一 第二狹窄空間70b,第一晶片載體60之第一寬廣空間68a 及第一狹窄空間70a與第二晶片載體64之第二寬廣空間 68b及第二狹窄空間70b之形成,乃因為第一晶片載體60 與第二晶片載體64間設有一斜向間距72,而造成兩邊(第 一晶片載體60與第二晶片載體64)各劃分出一寬一窄區 域。此外,光電半導體元件50另包含一第一導線74,電 連接於第一半導體晶片62與第一晶片載體60上之一第一 内部電性接點P2,一第二導線76,電連接於第一半導體晶 片62與第二晶片載體64上之第二内部電性接點P3,以及 一第三導線78,連接於第二半導體晶片66與第一晶片載 體60上之第三内部電性接點P4,其中第二内部電性接點 P3係設置於第二寬廣空間68b上,第三内部電性接點P4 係設置於第一寬廣空間68a上。透過第一導線74與第一晶 片載體60之電連接、第二導線76與第二晶片載體64之電 連接、第三導線78與第一晶片載體60之電連接,以及第 二半導體晶片66本身與第二晶片載體64之電連接,可使 第一半導體晶片62與第二半導體晶片66電連接於兩支架 58,且可透過兩支架58接收外部電路板52所傳來之電源。 而由於第二導線76之一端可焊接於第二寬廣空間68b上之 第二内部電性接點P3,以及第三導線78之一端可焊接於 第一寬廣空間68a上之第三内部電性接點P4,故此加大焊 1283937 接接觸區域面積之設計可降低導線焊接之困難度,以讓導 . 線焊接之成功率大幅提高。 光電半導體元件50另包含一光學視窗80,其係形成於 殼體54之内部,且填有變化第一半導體晶片62所發射光 線之光學特性之物質,例如環氧樹脂或矽膠等,並可内含 - 螢光材料、散光材料,或顏料等。光學視窗80的製程大多 是利用一可透光材質之流動膠體填入殼體54之内側,並覆 蓋在第一半導體晶片62、第二半導體晶片66、第一導線 74、第二導線76,以及第三導線78上,再使其固化成具 • 有保護功能的封膠,以保護及固定第一半導體晶片62、第 二半導體晶片66、第一導線74、第二導線76,以及第三 導線78。此外,光電半導體元件50之第一晶片載體60上 係形成有一溝槽82,其係可為一 V型溝槽,其中當第一半 導體晶片62之底部塗佈黏著劑以附著於第一晶片載體 • 60,而該黏著劑滲出於第一半導體晶片62與第一晶片載體 60接觸之介面時,溝槽82可容納滲出之黏著劑,以避免 ^ 黏著劑接觸於第三導線78,而造成導線接觸不良。 綜上所述,由於本發明第一實施例光電半導體元件50 - 之第一晶片載體60與第二晶片載體64間具有一高度差, - 且第二晶片載體64係較第一晶片載體60遠離於殼體54上 之出光口 56,故第二半導體晶片66與第一半導體晶片62 11 1283937 並不會配置於同〜 到第-半導❸面,而第二半導體晶片66也不會遮播 Μ所射出之光所發出之光線,因此第-半導體晶片 藉由殼體54 效地被投射至光學㈣⑽或有效地 训反射至出光口 %外,而 電半導體元件5〇出夹 向了有效地升光 可於本發明設計之光^均勻度以及出光效率。如此-來便 晶片,如齊納二極體日κ導體元件植人複數個不同功能之 一 〜極體晶片,故可增加光電半導體 兀件之應用性’如在植納二㈣晶片以提昇光電半導 體元件之抗靜電性之情况下不會影響發光效率 ,或如植入 600nm〜645nm之發光二極體晶片以增加演色性之情況下不 會影響發光效率。 而本發明之第-半導體晶片62與第二半導體晶片% 亦可設置於同-晶片載體上,請參閱第1〇圖,第1〇圖為 本發明第二實施例—光電半導體元件90之剖視圖,第二實 施例與第-實施例中具有相同標號之元件具有相同結構以 及功用,光電半導體元件9〇與第一實施例之光電半導體元 件50不同之處在於光電半導體元件90之第一半導體晶片 62與第二半導體晶片66設置於同—晶片載體上 ,而光電 半導體it件50之第-半導體晶片62與第二半導體晶片% 係分別設置於第-晶片载體6()與第二晶片載體64上。光 電半導體το件90包含―第三晶片載體92,設置於殼體% 12 1283937 内,相似於第一實施例,第三晶片載體92係連接於其中一 支架58,也就是說其中一支架58係可為第三晶片載體92 穿過殼體54之破孔所延伸之結構體,以形成後續表面黏著 製程的接點,並接收電路板52所傳來之外部電源;光電半 導體元件90另包含一連接件94,設置於殼體54内,相似 於第三晶片載體92,連接件94係連接於另一支架58,也 就是說另一支架58係可為連接件94穿過殼體54之破孔所 延伸之結構體,以形成後續表面黏著製程的接點,並接收 電路板52所傳來之外部電源。第三晶片載體92具有一第 一承載面96,用來承載第一半導體晶片62,以及一第二承 載面98,其係較第一承載面96遠離於殼體54之出光口 56,用來承載第二半導體晶片66,如此一來第一半導體晶 片62與第二半導體晶片66間具有一高度差。第三晶片載 體92之第二承載面98與第二半導體晶片66間係可塗佈導 電材質之黏著劑,例如導電膠等,以使第三晶片載體92與 第二半導體晶片66呈電性連接之狀態。 此外,光電半導體元件90另包含一第四導線100,電 連接於第一半導體晶片62與第三晶片載體92上之一第四 内部電性接點P5,一第五導線102,電連接於第一半導體 晶片62與連接件94上之第五内部電性接點P6,以及一第 六導線104,連接於第二半導體晶片66與連接件94上之 第六内部電性接點P7。透過第四導線100與第三晶片載體 13 1283937 92之電連接、第五導線102與連接件94之電連接、第六 - 導線104與連接件94之電連接,以及第二半導體晶片66 • 本身與第三晶片載體92之電連接,可使第一半導體晶片 62與第二半導體晶片66電連接於兩支架58,且可透過兩 , 支架58接收外部電路板52所傳來之電源。相似於第一實 施例,光電半導體元件90之第三晶片載體92上係形成有 一溝槽106,其係可為一 V型溝槽,其中當第一半導體晶 _ 片62之底部塗佈黏著劑以附著於第三晶片載體92,而該 黏著劑滲出於第一半導體晶片62與第三晶片載體92接觸 之介面時,溝槽106可容納滲出之黏著劑,以避免黏著劑 接觸於導線而造成導線接觸不良。 " 綜上所述,由於本發明第二實施例光電半導體元件90 之第三晶片載體92之第一承載面96與第二承載面98具有 一高度差,且第二承載面98係較第一承載面96遠離於殼 • 體54上之出光口 56,故第二半導體晶片66與第一半導體 晶片62並不會配置於同一平面,而第二半導體晶片66也 ^ 不會遮擋到第一半導體晶片62所發出之光線,因此第一半 . 導體晶片62所射出之光線可有效地被投射至光學視窗80 或有效地藉由殼體54内侧反射至出光口 56外,而可有效 - 地提升光電半導體元件50出光之均勻度以及出光效率。如 - 此一來便可於本發明設計之光電半導體元件之單一晶片載 體上植入複數個不同功能之晶片,如齊納二極體晶片或其 14 1283937 他可發射各種波長(380nm〜700nm)之發光二極體晶片,故 可增加光電半導體元件之應用性,如在植入齊納二極體晶 片以提昇光電半導體元件之抗靜電性之情況下不會影響發 光效率,或如植入600nm〜645nm之發光二極體晶片以增加 演色性之情況下不會影響發光效率。 本發明之光電半導體元件利用將不同晶片以相對於出 光口不同距離錯開配置之設計,而可使發光二極體晶片所 發出之光線不會被另一晶片所阻擋,故可使光電半導體元 件出光更為均勻,以及降低光源耗損而提升出光效率,且 可增加光電半導體元件之應用性,如在植入齊納二極體晶 片以提昇光電半導體元件之抗靜電性之情況下不會影響發 光效率,或植入發射不同波長之光線之發光二極體晶片以 增加演色性之情況下不會影響發光效率。 以上所述僅為本發明之較佳實施例,凡依本發明申請 專利範圍所做之均等變化與修飾,皆應屬本發明專利之涵 蓋範圍。 【圖式簡單說明】 第1圖為先前光電半導體元件之外觀示意圖。 第2圖為先前光電半導體元件之前視圖。 第3圖為先前光電半導體元件組裝於電路板上之示意圖。 15 1283937 第4圖為先前光電半導體元件内部元件之示意圖。 第5圖為本發明光電半導體元件之外觀示意圖。 第6圖為本發明光電半導體元件之前視圖。 第7圖為本發明光電半導體元件組裝於電路板上之示意圖。 第8圖為本發明光電半導體元件之剖視圖。 第9圖為本發明光電半導體元件内部元件之示意圖。 第10圖為本發明第二實施例光電半導體元件之剖視圖。1283937 IX. Description of the Invention: [Technical Field] The present invention provides an optoelectronic semiconductor component capable of increasing light extraction efficiency, in particular, a method of displacing different wafers at different distances from the light exit opening _______________ ..........-- ...................................... ..... Way to increase the light-emitting efficiency of the optoelectronic semiconductor component. [Prior Art] In recent years, application fields of high-brightness light-emitting diodes (hereinafter referred to as L E D) have been continuously developed. Unlike general incandescent bulbs, LEDs are cold-emitting, with low power consumption, long component life, no need for warm-up time, fast response, etc., plus their small size, vibration resistance, mass production, easy to match applications LEDs are commonly used in indicator lights and display devices for information, communications and consumer electronics, as they are required to be made into very small or array components. In addition to being used in outdoor displays and traffic lights, LEDs also have a place in the automotive industry. In addition, LED applications have also achieved outstanding results in portable products such as mobile phones and PDA screen backlights. Especially in the current red liquid crystal display products, LED is an indispensable key component when selecting the backlight module parts that match it. Referring to FIG. 1, FIG. 2, FIG. 3, and FIG. 4, FIG. 1 is a schematic view showing the appearance of a conventional optoelectronic semiconductor device 10. FIG. 2 is a front view of the prior optoelectronic semiconductor component 10, and FIG. 3 is a previous view. A schematic diagram of the optoelectronic semiconductor component 10 assembled on a circuit board 12, and FIG. 4 is a schematic view of the internal components of the prior 5 1283937 optoelectronic semiconductor component. The photo-semiconductor component, the 10-series can be a one-side light-emitting diode component, comprising a housing 14 having a light exit opening 16 formed thereon, and two brackets 18 mounted on the outer side of the housing 14, respectively An L-shaped bracket is further provided on each of the two brackets 18. An external electrical contact P1 is disposed at a side where the bottom side of the bracket 18 is coupled to the circuit board 12 to receive an external power source from the circuit board 12. The bracket 18 is φ-connected to the circuit board 12 by a surface mounting technique (SMT), whereby the optoelectronic semiconductor component 10 forms a surface adhesive component. The optoelectronic semiconductor 7L device 10 further includes a first wafer carrier 2〇 and a first wafer carrier 2 disposed in the housing 14. The first wafer carrier 2〇 and the second wafer carrier 21 are respectively connected to the two brackets 18, respectively. That is, the bracket 18 can be a structure in which the first wafer carrier 2 and the second wafer carrier pass through the holes of the housing 14 to form a joint of the subsequent surface adhesion process and receive the circuit board 12. The external power source; the optoelectronic semiconductor component 1 is further packaged with the third semiconductor wafer 22, is mounted on the first wafer carrier 20, and is used for cutting the secret material, the money can be a light emitting diode chip, and - the second The semiconductor wafer 24, mounted on the first wafer carrier 20, may be a -pole protection wafer to protect the first semiconductor wafer 22 from excessive electrical current, such as a Zener diode. The chip, which can be used to adjust the voltage of the servo, has the function of circuit voltage regulation. In addition, the optoelectronic semiconductor component 10 further includes a wire, a pass, and a second semiconductor wafer 22, a second semiconductor wafer 24, a first wafer carrier 20, a second wafer carrier 21, and an optical window 28 for electrically connecting 6 1283937. It is formed inside the casing 14 and filled with a substance that changes the optical characteristics of the light emitted by the first semiconductor wafer 22, such as epoxy resin or silicone rubber, and may contain a fluorescent material, a astigmatism material, or a pigment. Wait. The process of the optical window 28 is mostly filled into the inner side of the casing 14 by a flow colloid of a light transmissive material, and covers the first semiconductor wafer 22, the second semiconductor wafer 24, and the > wires 26a, 26b, 26c. Further, it is cured into a sealant having a protective function to protect and fix the first semiconductor wafer 22, the second semiconductor wafer 24, and the wires 26a, 26b, 26c. However, when the first semiconductor wafer 22 emits light to the optical window 28 and is transmitted out of the optical port 16, the first semiconductor wafer 22 and the second semiconductor wafer 2 are often in the same plane, rain, ____________________________________ ——————————————— The light emitted by the first semiconductor wafer 22 is blocked by the second semiconductor wafer > 24, so that the light cannot be completely and efficiently projected to The optical window 28 or, *""**-- effectively reflects light from the inside of the casing 14 to the outside of the light exit opening 16, resulting in uneven light emission of the optoelectronic semiconductor component 10 and a decrease in light extraction efficiency. SUMMARY OF THE INVENTION The patent application of the present invention discloses an optoelectronic semiconductor component capable of increasing light extraction efficiency, comprising a housing having a light exit port formed thereon, and a first semiconductor wafer disposed in the housing for use in the housing The light is emitted into the housing at a distance of 7 1283937 and a second semiconductor wafer in a manner away from the light exit of the first semiconductor wafer. [Embodiment] Please refer to FIG. 5, FIG. 6, and FIG. 7. FIG. 5 is a schematic view showing the appearance of an optoelectronic semiconductor device 50 according to a first embodiment of the present invention, and FIG. 6 is a view showing an optoelectronic semiconductor according to a first embodiment of the present invention. The front view of the component 50, and Fig. 7 is a schematic view showing the assembly of the optoelectronic semiconductor component 50 on a circuit board 52 according to the first embodiment of the present invention. The optoelectronic semiconductor component 50 can be a one-side optical LED component, and includes a housing 54 having a light exit 56 formed thereon. The two brackets 58 are mounted on the outer side of the housing 54 and can be respectively The L-bracket is further provided with an external electrical contact P1, which is disposed at a bottom side of the bracket 58 and is connected to the circuit board 52 for receiving an external power source from the circuit board 52. It can be connected to the circuit board 52 in the form of a surface mounting technique (SMT), whereby the optoelectronic semiconductor component 50 forms a surface bonding component. Referring to Figs. 8 and 9, FIG. 8 is a cross-sectional view showing a photo-semiconductor element 50 according to a first embodiment of the present invention, and FIG. 9 is a view showing an internal component of the optoelectronic semiconductor device 50 according to the first embodiment of the present invention. The optoelectronic semiconductor component 50 further includes a first wafer carrier 60 disposed in the housing 54. The first wafer carrier 60 is coupled to one of the brackets 58, that is, one of the brackets 58 can pass through the first wafer carrier 60. The junction of the housing 54 extends the junction 8 1283937 to form a contact for the subsequent surface bonding process and receives an external power source from the circuit board 52. The optoelectronic semiconductor component 50 further includes a first semiconductor wafer 62. Mounted on the first wafer carrier 60 for emitting light as a light source, which can be a light-emitting diode wafer, and the first wafer carrier 60 and the first semiconductor wafer 62 can be coated with an insulating material. Agents such as silver glue. The optoelectronic semiconductor component 50 further includes a second wafer carrier 64 disposed in the housing 54 in a manner that is closer to the exit opening 56 of the housing 54 than the first wafer carrier 60, that is, the first wafer carrier 60 and the third wafer carrier 60. -------------------------------- The two wafer carriers 64 have a height between the two; the same as the first wafer carrier 60 The second wafer carrier 64 is coupled to a bracket 58. That is, the other bracket 58 is a structure in which the second wafer carrier 64 extends through the hole of the housing 54 to form a joint for the subsequent surface bonding process. And receiving an external power source from the circuit board 52. The optoelectronic semiconductor component 50 further includes a second semiconductor chip 66 mounted on the second wafer carrier 64, which can be a diode protection wafer 'to protect the first The semiconductor wafer 62 is protected from excessive current, such as a Zener diode wafer, which can be used to adjust the operating voltage, has the function of circuit voltage regulation, and is between the second wafer carrier 64 and the second semiconductor wafer 66. An adhesive of a conductive material, such as a conductive paste or the like, may be applied to make the second wafer carrier 64 and the second semiconductor Sheet 66 in a state of electrical connection. In addition, the first wafer carrier 60 has a first wide space 68a and a first narrow 9 1283937 narrow space 70a between the first semiconductor wafer 62 and the second wafer carrier 64, and the second wafer carrier 64 is interposed therebetween. The second semiconductor wafer 66 and the first wafer carrier 60 have a second wide space 68b and a second narrow space 70b, a first wide space 68a of the first wafer carrier 60, and a first narrow space 70a and a second wafer carrier. The second wide space 68b and the second narrow space 70b of 64 are formed because an oblique spacing 72 is provided between the first wafer carrier 60 and the second wafer carrier 64 to cause both sides (the first wafer carrier 60 and the second wafer) The carriers 64) are each divided into a wide and a narrow region. In addition, the optoelectronic semiconductor component 50 further includes a first wire 74 electrically connected to the first internal electrical contact P2 of the first semiconductor wafer 62 and the first wafer carrier 60, and a second wire 76 electrically connected to the first semiconductor chip 62. a second internal electrical contact P3 on the semiconductor wafer 62 and the second wafer carrier 64, and a third conductive line 78 connected to the third internal electrical contact on the second semiconductor wafer 66 and the first wafer carrier 60 P4, wherein the second internal electrical contact P3 is disposed on the second wide space 68b, and the third internal electrical contact P4 is disposed on the first wide space 68a. Electrical connection to the first wafer carrier 60 through the first wire 74, electrical connection of the second wire 76 to the second wafer carrier 64, electrical connection of the third wire 78 to the first wafer carrier 60, and the second semiconductor wafer 66 itself The electrical connection with the second wafer carrier 64 allows the first semiconductor wafer 62 and the second semiconductor wafer 66 to be electrically connected to the two brackets 58 and can receive the power from the external circuit board 52 through the two brackets 58. The third internal conductor 76 can be soldered to the second internal electrical contact P3 on the second wide space 68b, and the third end of the third conductive line 78 can be soldered to the third internal electrical connection on the first wide space 68a. Point P4, so the design of the contact area of 1283937 is increased to reduce the difficulty of wire bonding, so that the success rate of wire bonding is greatly improved. The optoelectronic semiconductor component 50 further includes an optical window 80 formed in the interior of the housing 54 and filled with a substance that changes the optical characteristics of the light emitted by the first semiconductor wafer 62, such as epoxy or silicone. Contains - Fluorescent materials, astigmatism materials, or pigments. The process of the optical window 80 is mostly filled into the inner side of the casing 54 by a flow colloid of a light transmissive material, and covers the first semiconductor wafer 62, the second semiconductor wafer 66, the first wire 74, and the second wire 76, and The third wire 78 is cured to form a protective seal to protect and fix the first semiconductor wafer 62, the second semiconductor wafer 66, the first wire 74, the second wire 76, and the third wire. 78. In addition, a trench 82 is formed on the first wafer carrier 60 of the optoelectronic semiconductor component 50, which may be a V-shaped trench, wherein an adhesive is applied to the bottom of the first semiconductor wafer 62 for attachment to the first wafer carrier. • 60, and when the adhesive penetrates the interface where the first semiconductor wafer 62 contacts the first wafer carrier 60, the groove 82 can accommodate the oozing adhesive to prevent the adhesive from contacting the third wire 78, thereby causing the wire Poor contact. In summary, since the first wafer carrier 60 and the second wafer carrier 64 of the optoelectronic semiconductor component 50 - according to the first embodiment of the present invention have a height difference, and the second wafer carrier 64 is farther away from the first wafer carrier 60 The light exit 56 is formed on the casing 54, so that the second semiconductor wafer 66 and the first semiconductor wafer 62 11 1283937 are not disposed on the same to the first semi-conductive surface, and the second semiconductor wafer 66 is not blocked. The light emitted by the emitted light, so that the first semiconductor wafer is efficiently projected by the housing 54 to the optical (4) (10) or effectively reflected outside the light exit port %, and the electrical semiconductor component 5 is pulled out effectively The lightening can be achieved in the design of the present invention and the light extraction efficiency. In this way, the wafer, such as the Zener diode κ conductor element, implants a plurality of different functions, the polar body wafer, so that the application of the optoelectronic semiconductor component can be increased, such as in the second (four) wafer to enhance the optoelectronics. In the case of antistatic property of the semiconductor element, the luminous efficiency is not affected, or the luminous efficiency is not affected if a light-emitting diode wafer of 600 nm to 645 nm is implanted to increase color rendering. The first semiconductor wafer 62 and the second semiconductor wafer % of the present invention may also be disposed on the same-wafer carrier. Please refer to FIG. 1 and FIG. 1 is a cross-sectional view of the second embodiment of the present invention. The second embodiment has the same structure and function as the elements having the same reference numerals in the first embodiment, and the optoelectronic semiconductor element 9 is different from the photo-semiconductor element 50 of the first embodiment in the first semiconductor wafer of the optoelectronic semiconductor element 90. 62 and the second semiconductor wafer 66 are disposed on the same wafer carrier, and the first semiconductor wafer 62 and the second semiconductor wafer 50 of the optoelectronic semiconductor device 50 are respectively disposed on the first wafer carrier 6 () and the second wafer carrier 64 on. The optoelectronic semiconductor component 90 includes a "third wafer carrier 92" disposed in the housing % 12 1283937. Similar to the first embodiment, the third wafer carrier 92 is coupled to one of the brackets 58, that is, one of the brackets 58 The third wafer carrier 92 may pass through the structure extending from the hole of the casing 54 to form a joint of the subsequent surface adhesion process, and receive an external power source from the circuit board 52; the optoelectronic semiconductor component 90 further includes a The connecting member 94 is disposed in the housing 54 and is similar to the third wafer carrier 92. The connecting member 94 is coupled to the other bracket 58, that is, the other bracket 58 can be broken by the connecting member 94 through the housing 54. The structure of the hole extends to form a joint of the subsequent surface adhesion process and receives an external power source from the circuit board 52. The third wafer carrier 92 has a first bearing surface 96 for carrying the first semiconductor wafer 62 and a second bearing surface 98 which is spaced away from the light exit opening 56 of the housing 54 by the first bearing surface 96 for The second semiconductor wafer 66 is carried such that there is a height difference between the first semiconductor wafer 62 and the second semiconductor wafer 66. An adhesive of a conductive material, such as a conductive adhesive or the like, may be applied between the second bearing surface 98 of the third wafer carrier 92 and the second semiconductor wafer 66 to electrically connect the third wafer carrier 92 and the second semiconductor wafer 66. State. In addition, the optoelectronic semiconductor component 90 further includes a fourth wire 100 electrically connected to the fourth internal electrical contact P5 of the first semiconductor wafer 62 and the third wafer carrier 92, and a fifth wire 102 electrically connected to the first A semiconductor wafer 62 and a fifth internal electrical contact P6 on the connector 94, and a sixth conductor 104 are connected to the sixth internal semiconductor chip 66 and the sixth internal electrical contact P7 on the connector 94. Electrical connection through the fourth wire 100 to the third wafer carrier 13 1283937 92, electrical connection of the fifth wire 102 to the connector 94, electrical connection of the sixth-wire 104 to the connector 94, and the second semiconductor wafer 66 itself The electrical connection with the third wafer carrier 92 allows the first semiconductor wafer 62 and the second semiconductor wafer 66 to be electrically connected to the two holders 58 and is permeable to the two, and the holder 58 receives the power from the external circuit board 52. Similar to the first embodiment, the third wafer carrier 92 of the optoelectronic semiconductor component 90 is formed with a trench 106 which may be a V-shaped trench in which an adhesive is applied to the bottom of the first semiconductor wafer 62. To adhere to the third wafer carrier 92, and the adhesive penetrates the interface where the first semiconductor wafer 62 contacts the third wafer carrier 92, the groove 106 can accommodate the oozing adhesive to prevent the adhesive from contacting the wire. Poor wire contact. " In summary, the first bearing surface 96 of the third wafer carrier 92 of the second embodiment of the present invention has a height difference from the second bearing surface 98, and the second bearing surface 98 is the same. A bearing surface 96 is away from the light exit opening 56 of the housing body 54, so that the second semiconductor wafer 66 and the first semiconductor wafer 62 are not disposed in the same plane, and the second semiconductor wafer 66 is not blocked to the first. The light emitted by the semiconductor wafer 62, so that the light emitted by the first half of the conductor wafer 62 can be effectively projected onto the optical window 80 or effectively reflected from the inside of the casing 54 to the outside of the light exit opening 56, and can be effectively The uniformity of the light output of the optoelectronic semiconductor component 50 and the light extraction efficiency are improved. For example, a plurality of wafers of different functions, such as a Zener diode wafer or its 14 1283937, can be implanted on a single wafer carrier of an optoelectronic semiconductor component designed according to the present invention to emit various wavelengths (380 nm to 700 nm). The light-emitting diode chip can increase the applicability of the optoelectronic semiconductor component, such as implanting a Zener diode wafer to improve the antistatic property of the optoelectronic semiconductor component without affecting the luminous efficiency, or implanting 600 nm. A light-emitting diode wafer of ~645 nm does not affect the luminous efficiency in the case of increasing color rendering. The optoelectronic semiconductor component of the present invention utilizes a design in which different wafers are arranged at different distances with respect to the light exit opening, so that the light emitted by the light emitting diode chip can be blocked by the other wafer, so that the optoelectronic semiconductor component can be lighted out. More uniform, and reduce light source loss to improve light efficiency, and can increase the applicability of optoelectronic semiconductor components, such as implanting Zener diode wafers to improve the antistatic properties of optoelectronic semiconductor components without affecting luminous efficiency , or implanting a light-emitting diode wafer that emits light of different wavelengths to increase color rendering without affecting luminous efficiency. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the patent application of the present invention should fall within the scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing the appearance of a conventional optoelectronic semiconductor device. Figure 2 is a front view of a prior optoelectronic semiconductor component. Fig. 3 is a schematic view showing the assembly of a conventional optoelectronic semiconductor component on a circuit board. 15 1283937 Figure 4 is a schematic illustration of the internal components of previous optoelectronic semiconductor components. Fig. 5 is a schematic view showing the appearance of the optoelectronic semiconductor device of the present invention. Figure 6 is a front view of the optoelectronic semiconductor component of the present invention. Figure 7 is a schematic view showing the assembly of the optoelectronic semiconductor component of the present invention on a circuit board. Figure 8 is a cross-sectional view showing the optoelectronic semiconductor device of the present invention. Figure 9 is a schematic view showing the internal components of the optoelectronic semiconductor component of the present invention. Figure 10 is a cross-sectional view showing a photovoltaic element according to a second embodiment of the present invention.

I 【主要元件符號說明】 10 光電半導體元件 12 電路板 14 殼體 16 出光口 18 支架 20 第一晶片載體 21 第二晶片載體 22 第一半導體晶片 24 第二半導體晶片 26a、 26b、26c 導線 28 光學視窗 50 光電半導體元件 52 電路板 54 殼體 56 出光口 58 支架 60 第一晶片載體 62 第一半導體晶片 64 第二晶片載體 66 第二半導體晶片 68a 第一寬廣空間 68b 第二寬廣空間 70a 第二寬廣空間 70b 第二狹窄空間 72 斜向間距 16 1283937 74 第一導線 76 第二導線 78 第三導線 80 光學視窗 82 溝槽 90 光電半導體元件 92 第三晶片載體 94 連接件 96 第一承載面 98 第二承載面 100 第四導線 102 第五導線 104 第六導線 106 溝槽I [Major component symbol description] 10 Optoelectronic semiconductor component 12 Circuit board 14 Housing 16 Light exit port 18 Bracket 20 First wafer carrier 21 Second wafer carrier 22 First semiconductor wafer 24 Second semiconductor wafer 26a, 26b, 26c Wire 28 Optical Window 50 Optoelectronic semiconductor component 52 Circuit board 54 Housing 56 Light exit port 58 Bracket 60 First wafer carrier 62 First semiconductor wafer 64 Second wafer carrier 66 Second semiconductor wafer 68a First wide space 68b Second wide space 70a Second wide Space 70b Second narrow space 72 Diagonal spacing 16 1283937 74 First wire 76 Second wire 78 Third wire 80 Optical window 82 Groove 90 Optoelectronic semiconductor component 92 Third wafer carrier 94 Connector 96 First bearing surface 98 Second Bearing surface 100 fourth wire 102 fifth wire 104 sixth wire 106 groove

1717

Claims (1)

丨日歧(更)正本 1283937 4 十、申請專利範圍: 一種具有高出光效率之光電半導體元件,其包含有·· 一殼體,其上形成有一出光口; 一第一半導體晶片,設置於該殼體内,用來發射光線; -第二半導體晶片’以較該第—半導體晶片遠離於該殼 體之出光口之方式設置於該殼體内; 第曰曰片載體,設置於該殼體内,該第一半導體晶片 係没於该第一晶片載體上;以及 一第二晶片制’以㈣第—晶片㈣_於該殼體之 出光口之方式設置於該殼體内,該第二半導體晶片係 5又於该第^一晶片載體上; 其中’該第-晶片載體上介於該第—半導體晶片與該第二晶片 載體之間具有-第-寬廣空間及一第一狹窄空間,以及該第 二晶片Μ上介概第二半導體U與該第 :具有-第二寬廣空間及-第二狹窄空間,其中該第:二 ^生接點係設置於該第二寬廣空間上,以及該第三内部電性 接點係設置於該第一寬廣空間上。 如^求項1所述之光電半導.件,其另包含有: —第:導線,電連接於該第—半導體晶片與該第一晶 載體上之第一内部電性接點; —第二導線,電連接於該第-半導體晶片與該第二晶 18 2. 1283937 載體上之第二内部電性接點;以及 一第三導線,電連接於該第二半導體晶片與該第一晶片 載體上之第三内部電性接點。 3. 如請求項1所述之光電半導體元件,其中該第一晶片 載體上係形成有一溝槽。 4. 如請求項3所述之光電半導體元件,其中該溝槽係為 一 V型溝槽。 5. 如請求項1所述之光電半導體元件,其另包含兩支架, 分別連接於該第一晶片載體與該第二晶片載體且安裝 於該殼體之外側,其上分別設有一外部電性接點,用 來接收外部電源。 6. 如請求項5所述之光電半導體元件,其中該支架係可 以表面黏著(surface mounting technique,SMT)之方式 連接於一電路板。 7. 如請求項5所述之光電半導體元件,其中該支架係為 一 L型支架。 8. 如請求項1所述之光電半導體元件,其另包含一光學視 窗,其係形成於該殼體之内部,且填有變化該第一半 19 1283937 導體晶片所發射光線之光學特性之物質。 9. 如請求項8所述之光電半導體元件,其中該光學視窗所 填有變化該第一半導體晶片所發射光線之光學特性之 物^係為ί哀乳樹脂或秒膠。 10. 如請求項8所述之光電半導體元件,其中該光學視窗 | 包含螢光材料、散光材料,或顏料。 u•如請求項1所述之光電半導體元件,其中該第一半導 體晶片係為一發光二極體晶片。 如請求項1所述之光電半導體元件,其中該第二半導 體晶片係為一二極體保護晶片。 U.如請求項12所述之光電半導體元件,其中該二極體保 護晶片係為一齊納(Zener)二極體晶片。 14·—種具有高出光效率之光電半導體元件,其包含有: 设體,其上形成有一出光口; 第一半導體晶片,設置於該殼體内,用來發射光線; -第二半導體晶片’以較該第—半導體晶片遠 该殼體之出光口之方式設置於該殼體内; 一第一晶片載體,設置於該殼體内,該第一半導體 20 1283937 - /曰片係設於該第一晶片载體上;以及 一第二晶片載體,以較該第一晶片載體遠離於該殼 體之出光口之方式設置於該殼體内,該第二半導 體晶片係設於該第二晶片載體上; 其中,該第一晶片載體上係形成有一溝槽。 ,I5.如請求項14所述之光電半導體元件,其另包含有: —第-導線’電連接於該第—半導體晶片與該第一晶片 • 載體上之第一内部電性接點; .第一導線,電連接於該第一半導體晶片與該第二晶片 載體上之第二内部電性接點;以及 一第三導線’電連接於該第二半導體晶片與該第一晶片 載體上之第三内部電性接點。 如請求項15所述之光電半導體元件,其中該第一晶片 載體上介於該第一半導體晶片與該第二晶片載體:間 具有一第一寬廣空間及一第一狹窄空間,以及該第二 晶片载體上介於該第二半導體晶片與該第一晶片载體 之間具有一第二寬廣空間及一第二狹窄空間,其中該 第二内部電性接點係設置於該第二寬廣空間上,'該第" 三内部電性接點係設置於該第一寬廣空間上。Λ 其中該溝槽係為 如請求項14所述之光電半導體元件, 一 V型溝槽。 21 17. 1283937 18·如請求項14所述之光電半導體元件,其另包含兩 架,分別連接於該第一晶片載體與該第二身μ 且 曰曰片载體 安裝於該殼體之外側,其上分別設有一外部電性接 點’用來接收外部電源。 19·如請求項18所述之光電半導體元件,其中該支架係可 以表面黏著(surface mounting technique,SMT)之方式 連接於一電路板。 20·如請求項18所述之光電半導體元件,其中該支架係為 一[型支架。 21·如請求項14所述之光電半導體元件,其另包含一光學 視窗’其係形成於該殼體之内部,且填有變化該第一 半導體晶片所發射光線之光學特性之物質。 22·如請求項21所述之光電半導體元件,其中該光學視窗 所填有變化該第一半導體晶片所發射光線之光學特性 之物質係為環氧樹脂或矽膠。 23·如請求項21所述之光電半導體元件,其中該光學視窗 包3鸯光材料、散光材料,或顏料。 22 1283937 A -24·如請求項14所述之光電半導體元件,其中該第一半導 體晶片係為一發光二極體晶片。 25·如請束項14所述之光電半導體元件,其中該第二半導 體晶片係為一二極體保護晶片。 26·如請求項25所述之光電半導體元件,其申該二極體保 • δ蔓晶片係為一齊納(zener)二極體晶片。 27. —種具有高出光效率之光電半導體元件,其包含有: 一殼體’其上形成有一出光口; 一第一半導體晶片,設置於該殼體内,用來發射光線; 一第二半導體晶片,以較該第一半導體晶片遠離於該殼 體之出光口之方式設置於該殼體内;以及 一第三晶片載體,設置於該殼體内,該第三晶片載體具 •有一第一承載面,該第一半導體晶片係設於該第一承 載面上,以及一第二承載面,其係較該第一承载面遠 離於該殼體之出光口,該第二半導體晶片係設於該第 二承載面上; 其中,该第二晶片載體之該第一承載面上係形成有一溝 槽。 28. 如請求項27所述之光電半導體元件,其中該溝槽係為 23 1283937 ^ 一V型溝槽。 29. 如請求項27所述之光電半導體元件,其另包含有: 一連接件,設置於該殼體内; _ 一第四導線,電連接於該第一半導體晶片與該第三晶片 載體上之第四内部電性接點; 一第五導線,電連接於該第一半導體晶片與該連接件上 血 之第五内部電性接點;以及 一第六導線,電連接於該第二半導體晶片與該連接件上 之第六内部電性接點。 30. 如請求項29所述之光電半導體元件,其另包含兩支 架,分別連接於該第三晶片載體與該連接件且安裝於 該殼體之外側,其上分別設有一外部電性接點,用來 接收外部電源。 31. 如請求項30所述之光電半導體元件,其中該支架係可 . 以表面黏著之方式連接於一電路板。 32. 如請求項30所述之光電半導體元件,其中該支架係為 一 L型支架。 33. 如請求項27所述之光電半導體元件,其另包含一光學 24 1283937 視窗,其係形成於該殼體之内部,且填有變化該第一 半導體晶片所發射光線之光學特性之物質。 34. 如請求項33所述之光電半導體元件,其中該光學視窗 所填有變化該第一半導體晶片所發射光線之光學特性 之物質係為環氧樹脂或矽膠。 35. 如請求項33所述之光電半導體元件,其中該光學視窗 包含榮光材料、散光材料,或顏料。 36. 如請求項27所述之光電半導體元件,其中該第一半導 體晶片係為一發光二極體晶片。 37. 如請求項27所述之光電半導體元件,其中該第二半導 體晶片係為一二極體保護晶片。 38. 如請求項37所述之光電半導體元件,其中該二極體保 護晶片係為一齊納(zener)二極體晶片。 十一、圖式: 25丨日歧(more)本本1283937 4 X. Patent application scope: An optoelectronic semiconductor component having high light extraction efficiency, comprising: a housing having an exit opening formed thereon; a first semiconductor wafer disposed on the a second semiconductor wafer is disposed in the housing in a manner away from the light exit of the first semiconductor wafer; the second carrier is disposed on the housing The first semiconductor wafer is not disposed on the first wafer carrier; and a second wafer is disposed in the housing in a manner of (4) the first wafer (four) _ the light exit of the housing, the second The semiconductor wafer system 5 is further disposed on the first wafer carrier; wherein the first wafer carrier has a first-wide space and a first narrow space between the first semiconductor wafer and the second wafer carrier. And the second semiconductor device U and the second chip have a second wide space and a second narrow space, wherein the second contact is disposed on the second wide space, and The third internal electrical A contact is disposed on the first wide space. The photo-electric semiconductor device of claim 1, further comprising: - a wire: electrically connected to the first internal electrical contact of the first semiconductor wafer and the first crystal carrier; a second wire electrically connected to the second internal electrical contact of the first semiconductor wafer and the second crystal 18 2. 1283937 carrier; and a third wire electrically connected to the second semiconductor wafer and the first wafer A third internal electrical contact on the carrier. 3. The optoelectronic semiconductor component of claim 1, wherein the first wafer carrier is formed with a trench. 4. The optoelectronic semiconductor component of claim 3, wherein the trench is a V-shaped trench. 5. The optoelectronic semiconductor component of claim 1, further comprising two brackets respectively connected to the first wafer carrier and the second wafer carrier and mounted on an outer side of the housing, respectively provided with an external electrical property Contact for receiving external power. 6. The optoelectronic semiconductor component of claim 5, wherein the stent is attached to a circuit board in the form of a surface mounting technique (SMT). 7. The optoelectronic semiconductor component of claim 5, wherein the scaffold is an L-bracket. 8. The optoelectronic semiconductor component of claim 1 further comprising an optical window formed in the interior of the housing and filled with a substance that changes the optical properties of the light emitted by the first half 19 1283937 conductor wafer . 9. The optoelectronic semiconductor component of claim 8, wherein the optical window is filled with an optical property that changes the optical properties of the light emitted by the first semiconductor wafer. 10. The optoelectronic semiconductor component of claim 8, wherein the optical window comprises a fluorescent material, a astigmatism material, or a pigment. The optoelectronic semiconductor component of claim 1, wherein the first semiconductor wafer is a light emitting diode wafer. The optoelectronic semiconductor component of claim 1, wherein the second semiconductor wafer is a diode protection wafer. U. The optoelectronic semiconductor component of claim 12, wherein the diode protection wafer is a Zener diode wafer. 14. An optoelectronic semiconductor component having high light extraction efficiency, comprising: a device having an exit opening formed thereon; a first semiconductor wafer disposed in the housing for emitting light; - a second semiconductor wafer The first semiconductor carrier is disposed in the housing, and the first semiconductor carrier is disposed in the housing. The first semiconductor carrier is disposed in the housing. The first semiconductor 20 1283937 - / is mounted on the housing a first wafer carrier; and a second wafer carrier disposed in the housing in a manner away from the light exit of the first wafer carrier, the second semiconductor wafer being disposed on the second wafer On the carrier; wherein a groove is formed on the first wafer carrier. The optoelectronic semiconductor component of claim 14, further comprising: - a first conductor electrically connected to the first internal electrical contact of the first semiconductor wafer and the first wafer carrier; a first wire electrically connected to the second internal electrical contact of the first semiconductor wafer and the second wafer carrier; and a third wire ' electrically connected to the second semiconductor wafer and the first wafer carrier The third internal electrical contact. The optoelectronic semiconductor component of claim 15, wherein the first wafer carrier has a first wide space and a first narrow space between the first semiconductor wafer and the second wafer carrier, and the second a second wide space and a second narrow space between the second semiconductor wafer and the first wafer carrier, wherein the second internal electrical contact is disposed in the second wide space Above, the 'the third internal electrical contact system is disposed on the first wide space. Wherein the trench is an optoelectronic semiconductor component as claimed in claim 14, a V-shaped trench. The optical semiconductor component of claim 14, further comprising two shelves respectively connected to the first wafer carrier and the second body μ and the cymbal carrier mounted on the outer side of the housing An external electrical contact is provided thereon for receiving an external power source. The optoelectronic semiconductor component of claim 18, wherein the stent is attached to a circuit board in the form of a surface mounting technique (SMT). The optoelectronic semiconductor component of claim 18, wherein the scaffold is a [type bracket. The optoelectronic semiconductor component of claim 14, further comprising an optical window formed inside the casing and filled with a substance that changes the optical properties of the light emitted by the first semiconductor wafer. The optoelectronic semiconductor component according to claim 21, wherein the optical window is filled with an epoxy resin or a silicone resin which is adapted to change optical characteristics of light emitted from the first semiconductor wafer. The optoelectronic semiconductor component of claim 21, wherein the optical window package 3 is a calendering material, a astigmatism material, or a pigment. The optical semiconductor component of claim 14, wherein the first semiconductor wafer is a light emitting diode wafer. The optoelectronic semiconductor component of claim 14, wherein the second semiconductor wafer is a diode protection wafer. The optoelectronic semiconductor component of claim 25, wherein the diode δ vine wafer is a Zener diode wafer. 27. An optoelectronic semiconductor component having high light extraction efficiency, comprising: a housing having an exit opening formed thereon; a first semiconductor wafer disposed in the housing for emitting light; and a second semiconductor a chip disposed in the housing in a manner away from the light exit of the first semiconductor wafer; and a third wafer carrier disposed in the housing, the third wafer carrier having a first a first semiconductor wafer is disposed on the first bearing surface, and a second bearing surface is away from the light exit opening of the housing than the first bearing surface, and the second semiconductor wafer is disposed on the second semiconductor wafer The second bearing surface; wherein the first carrier surface of the second wafer carrier is formed with a groove. 28. The optoelectronic semiconductor component of claim 27, wherein the trench is 23 1283937^ a V-shaped trench. 29. The optoelectronic semiconductor component of claim 27, further comprising: a connector disposed in the housing; _ a fourth conductor electrically coupled to the first semiconductor wafer and the third wafer carrier a fourth internal electrical contact; a fifth lead electrically connected to the fifth internal electrical contact of the first semiconductor wafer and the blood on the connector; and a sixth lead electrically connected to the second semiconductor a sixth internal electrical contact between the wafer and the connector. 30. The optoelectronic semiconductor component of claim 29, further comprising two brackets respectively connected to the third wafer carrier and the connector and mounted on an outer side of the housing, wherein an external electrical contact is respectively disposed thereon Used to receive external power. 31. The optoelectronic semiconductor component of claim 30, wherein the support is attachable to a circuit board in a surface-bonding manner. 32. The optoelectronic semiconductor component of claim 30, wherein the scaffold is an L-bracket. 33. The optoelectronic semiconductor component of claim 27, further comprising an optical 24 1283937 window formed within the housing and filled with a substance that changes the optical properties of the light emitted by the first semiconductor wafer. 34. The optoelectronic semiconductor component of claim 33, wherein the optical window is filled with an epoxy or silicone resin that is adapted to change the optical properties of the light emitted by the first semiconductor wafer. The optoelectronic semiconductor component of claim 33, wherein the optical window comprises a glare material, a astigmatism material, or a pigment. The optoelectronic semiconductor component of claim 27, wherein the first semiconductor wafer is a light emitting diode wafer. The optoelectronic semiconductor component of claim 27, wherein the second semiconductor wafer is a diode protection wafer. 38. The optoelectronic semiconductor component of claim 37, wherein the diode protection wafer is a Zener diode wafer. XI. Schema: 25
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