1283556 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種電路板之電性連接端結構及其 A法’尤其係有關於一種利用電鐘方式形成電路板之電性 連接端結構及其製作方法。 【先前技術】 自從IBM公司在i960年早期引入覆晶封裝（Flip chip Package)技術以來，相較於打線（wire Bond)技術，覆晶技 術之特彳政在於半導體晶片與基板間的電性連接係透過銲錫 凸塊而非一般之金線。而該種覆晶技術之優點在於該技術 可提高封裝密度以降低封裝元件尺寸，同時，該種覆晶技 術不需使用長度較長之金線，故可提高電性性能。有鑑於 此，業界在陶瓷基板上使用高溫銲錫，即所謂控制崩解之 晶片連接技術（Control-Collapse Chip Connection, C4)，已 有夕年之久近年來，由於而密度、高速度以及低成本之 半導體元件需求之增加，同時因應電子產品之體積逐漸縮 小的趨勢，將覆晶元件設置於低成本的有機電路板（例如， 印刷電路板或基板），並以環氧樹脂底膠（Underfill 填充於晶片下方以減対晶片與有機電路板之結構間因熱 膨脹差異所產生的熱應力，已呈現爆炸性的成長。 在現打覆晶技術中，半導體積體電路（IC)晶片的表面 上配置有電極銲墊（electronicpad)而有機電路板亦具有 相對應的接觸銲墊在該晶片以及電路板之間可以適當地設 置銲錫凸塊或其他導電黏著材料，使該晶片係以電性接ς 5 17936 1283556 面朝下的方式設置於該電路板上，其中，該銲錫凸塊或導 電黏著材料提供該晶片以及電路板間的電性 ⑽)以及機械性的連接。 幸别出 如第1圖所示，覆晶技術係將複數個金屬凸塊u形 成於晶片13之電極_ 12上，以及數個由銲料所製成的 預銲錫凸塊14形成於電路板16之電性連接墊15上，並在 足以使該預銲錫凸塊14熔融之迴銲溫度條件下，將預銲錫 凸塊14迴鮮至相對應之金屬凸塊n，從而形成辉錫接口。 =後復使用底部填充材料18以實現W與電路板的搞 2確保晶片η與電路板16兩者之電性連接的完整性與 另外 马拉升電子裝置之電性品質，即需於i令 ::如電阻、電容、及電感等被動元件，而該些被動元科 瓜係採用表面黏著技術(SMT)而接置於例 二=’導致預鮮錫凸塊與表面黏著型焊錫元;之並; 同二且兩者所形成之銲錫材料高度及尺寸並不相 /再者，後續將該電路板與半導體晶片及被動元 行封裝製程時，為搓供兮帝 牛寻d 連m二 得以與外界電子裝_ =^以電軸底_設倾銲球1為提球 有效接置其於電路板上， ^ 性遠拯執卜猫止/ 、接置鋅球之電路板電 連接墊上預絲成供接置料之銲錫材料。 戈昂2圖所不，其係於一完成 17936 6 1283556 电路佈、.泉之电路板20上 電性連接墊22，以入 杆層21，亚外露出多數 ㈣22 U令一具有複數個開口〕 於該電路板20之拒輝層21上 广二置 性連接墊22上形成銲錫 開口 23a以在電 或喷灑方式，使銲料在:口 3未= # , ^ ^ ^^ 1 23a内堆積，於該模板23移 後形“錫堆。復進行迴銲製程，使電性連接塾22〔除 鮮錫堆IMb形成銲錫結構。 賴墊22上之 驻、、、而半‘體晶#之微魏發展趨勢使得半導體之封 ^術亦隨之改變’以滿足不斷減小的晶片具有更多輸入 輸出端，惟該變化將縮小晶片承載件之面積，而: 7f載件上電性連接墊之数量，唯有縮小電性連接‘之：： 晶片發展之需求。然電性連接墊之減小 使付核板印刷技術中之模板開口必須隨之減小，如 僅因模板開發不易而造成該模板之製造成本增加，更將因 模板之開口細微而導致銲錫材料難以穿過，造成製程上之 瓶頸:再者’銲錫材料之生成精度除了要求模板印刷技術 中之桓板尺寸大小正確外，尚須確認模板印刷之次數盘清 潔問題。因為銲錫材料具有黏度(viscosity)，而當印刷、次月 數愈多，殘留在模板孔壁内之銲錫材料即相對愈多，導致 下次印刷所使用之銲錫材料數量及形狀與設計規袼不合， 因此，通常在實際操作時，於使用一定印刷次數後即必須 進行模板之擦拭清潔，否則極易產生銲錫材料之形狀、尺 寸不合等問題，造成製程之不便與可靠度之降低。 再者’當諸如電性連接墊等線路之間隙持續縮減時， 17936 7 1283556 该等電性連接塾間絕緣保護層將遮蔽住部分之電性連接藝 巧積，致使外露出該絕緣保護層之電性連接塾尺寸更形縮 連接ίί後：形成銲錫結構之輝錫材料不易附著在該電性 2接墊上，導致銲錫材料與電性連接塾之間的結合力不 匕’同時由於料材料切強度不足 熔融之銲錫材料亦會有溢流之現象。又熱 二td幻？印刷方式於具表面黏著式電性連接塾 青 a )之電路板表面形成㈣材料時，由於 t者式電性連接塾（SMTPad)之表面面積較大，、 一人印刷形成規定高度之銲錫材 …、〆 ::rr迴銲—)，導致= 所；:間增長’同時若對應於具不同尺寸之 次印刷’提高製程複雜性。 肝、丄攻# jy而，或有以電鍍方 =料之技術。如我國專利公告編號第職7f卢所：成銲 :有：電路板上進行「電鑛銲錫之方法」，其主=:::之 3有電性連接墊之有機電路板上“；包順 =成有開口以顯露出電路板上之電性=墊=二 口之電鍍阻層，以外露出覆於電性連接塾具有開 以便電鍍形成銲錫材料。 潯i屬層， 淮其亦同樣面臨前述問題’且因電鍍無法於 :性連接墊上一次電錢不同高度之銲錫材料，、:面積 #者式電性連接塾（⑽⑽上需電心^高度= 17936 1283556 錫材料，而供接置預銲錫凸塊 上卻需要電们〇_至5〇Mm高度(Bump pad) 製程操作困難，不且成本效兴2錫材料，致使電錢 ΐ厚=:層之開口形成，且其高度係藉由電鍍阻層 ，由於在電性連㈣上植設預 t=::::rr接置之_ 多次紫程二sr 因此，習知技術中需分成 尺寸的鮮錫材料。惟分別形成高度及 广于錫材料時’存在增加製程時間及成本之弊 =亚且/刀步製程多次敷設、移除電鐘阻層 外，通常用於電鍍製程之井爲 电曰此 此需W…“ 層厚度在25_左右，因 要知用黏稠度大的光阻膠體、特殊的勻膠機以 =長的曝光機，導致製程成本提高开: 電性連接端不僅增加製程時間，提高製程成^ 錫板印刷習知技術形成電路板之銲1283556 IX. Description of the Invention: [Technical Field] The present invention relates to an electrical connection end structure of a circuit board and an A method thereof, particularly relating to an electrical connection end structure for forming a circuit board by using an electric clock method And its production method. [Prior Art] Since the introduction of flip chip package technology by IBM in the early 960s, the special feature of flip chip technology lies in the electrical connection between the semiconductor wafer and the substrate compared to the wire bond technology. It is soldered through bumps instead of the usual gold wire. The advantage of this flip chip technology is that the technology can increase the package density to reduce the size of the package components. At the same time, the flip chip technology does not require the use of a long length of gold wire, thereby improving electrical performance. In view of this, the industry uses high-temperature solder on ceramic substrates, that is, Control-Collapse Chip Connection (C4), which has been in recent years due to density, high speed, and low cost. The demand for semiconductor components has increased, and in response to the trend of shrinking the size of electronic products, flip-chip components are placed on low-cost organic circuit boards (for example, printed circuit boards or substrates) and filled with epoxy primer (Underfill). The thermal stress generated by the difference in thermal expansion between the structure of the wafer and the organic circuit board under the wafer has been explosively grown. In the current flip chip technology, the surface of the semiconductor integrated circuit (IC) wafer is disposed. Electrode pads and organic circuit boards also have corresponding contact pads. Solder bumps or other conductive adhesive materials may be appropriately disposed between the wafers and the circuit board to electrically connect the wafers. 1283556 is disposed on the circuit board in a face down manner, wherein the solder bump or conductive adhesive material provides the wafer And electrical ⑽ between the circuit board) and a mechanical connection. Fortunately, as shown in FIG. 1, the flip chip technique forms a plurality of metal bumps u on the electrode -12 of the wafer 13, and a plurality of pre-solder bumps 14 made of solder are formed on the circuit board 16. The pre-solder bumps 14 are freshened to the corresponding metal bumps n on the electrical connection pads 15 and at a reflow temperature sufficient to melt the pre-solder bumps 14, thereby forming a tin-tin interface. After the underfill material 18 is used to realize the W and the circuit board 2 to ensure the integrity of the electrical connection between the wafer η and the circuit board 16 and the electrical quality of the other electronic devices, that is, :: Passive components such as resistors, capacitors, and inductors, and these passive meta-cubes are surface-bonded (SMT) and placed in the second example of 'leading to pre-preg tin bumps and surface-adhesive solder bumps; And the same two and the formation of the solder material height and size is not the same / again, the subsequent board and semiconductor wafer and passive yuan line packaging process, for the 兮 兮 牛 寻 d d 得以 得以 得以With the external electronic equipment _ = ^ with the bottom of the electric shaft _ set the tilting ball 1 for the ball to effectively connect it to the circuit board, ^ Sexual Yuanzheng cats / /, the zinc plate of the circuit board electrical connection pad pre- The wire is soldered to the solder material. Goon 2 map does not, it is completed in a 17936 6 1283556 circuit cloth, the spring circuit board 20 electrical connection pad 22, to enter the rod layer 21, the outer part of the outer majority (four) 22 U order one has a plurality of openings] A solder opening 23a is formed on the opaque layer 21 of the circuit board 20 to be electrically or sprayed so that the solder is deposited in the port 3 not = # , ^ ^ ^^ 1 23a. After the template 23 is moved, the shape of the tin stack is repeated. The reflow process is repeated to make the electrical connection 塾22 [except the fresh tin stack IMb to form a solder structure. The residence on the Lai pad 22, and the semi-body crystal ## Wei's development trend has led to the change of semiconductor sealing technology to meet the ever-decreasing wafer with more input and output terminals, but this change will reduce the area of the wafer carrier, and: 7f carrier power-on connection pad Quantity, only the reduction of electrical connection ':: The need for wafer development. However, the reduction of the electrical connection pad makes the template opening in the nuclear printing technology must be reduced, such as due to the difficulty in template development. The manufacturing cost of the template is increased, and the solder material will be caused by the fine opening of the template. Difficult to pass through, causing bottlenecks in the process: In addition, the accuracy of the formation of solder materials, in addition to the correct size of the stencil in the stencil printing technology, must be confirmed the number of times the stencil printing disk cleaning problem, because the solder material has viscosity (viscosity ), and the more the number of printing and the next month, the more solder material remains in the wall of the template hole, resulting in the number and shape of the solder materials used in the next printing and the design specifications, so usually in actual operation After using a certain number of printing times, the template must be wiped and cleaned, otherwise the shape and size of the solder material may be easily generated, which may cause inconvenience and reliability of the process. Further, when a circuit such as an electrical connection pad is used When the gap is continuously reduced, 17936 7 1283556, the electrical connection between the turns of the insulating protective layer will shield part of the electrical connection, so that the electrical connection of the insulating protective layer is exposed to a more compact connection. : The tin-forming material forming the solder structure is not easy to adhere to the electrical 2-pad, resulting in the solder material and the electrical connection. The bonding force is not good. At the same time, due to the insufficient shear strength of the material, the molten solder material will also overflow. The hot two-td magic printing method is formed on the surface of the circuit board with surface-adhesive electrical connection indigo a). (4) When the material is large, the surface area of the SMTPad is large, and one person prints a solder material of a predetermined height..., 〆::rr reflow-), resulting in a growth of If it corresponds to the sub-printing with different sizes, 'improve the complexity of the process. Liver, 丄 attack # jy, or have the technology of electroplating = material. For example, China Patent Announcement No. 7f Lu: Welding: There are: Circuit "Electrical soldering method" on the board, the main =::: 3 has an electrical connection pad on the organic circuit board"; Bao Shun = has an opening to reveal the electrical properties on the board = pad = two The plating resist layer of the mouth is exposed to the electrical connection and has an opening for electroplating to form a solder material.浔i genus layer, Huaiqi also faces the above problems 'and because of the plating can not be: the connection of the pad on the wire of different heights of solder material,: area #人式连接连接((10)(10) on the electric core ^ height = 17936 1283556 Tin material, but for the pre-solder bumps, it needs electricity 〇 _ to 5 〇 Mm height (Bump pad) process operation is difficult, not cost-effective 2 tin material, resulting in electricity money thick =: layer The opening is formed, and the height is formed by the plating resist layer. Since the pre-t=::::rr is placed on the electrical connection (4), the number of times is set to _ multiple times of purple sr. Therefore, the prior art needs to be divided into sizes. Fresh tin material. However, when forming a height and wider than tin material, there is a disadvantage of increasing the process time and cost. = Yahe / Knife process is laid many times, the electric clock is removed, and the well is usually used for electroplating process. For the electric raft, this requires W..." The thickness of the layer is about 25_, because it is necessary to know that the photoresist with a thick viscosity and a special homogenizer can be used for a long exposure machine, which leads to an increase in process cost: Electrical connection Not only increase the processing time, but also improve the process of soldering into the board.
之不便與料材料品f、可#度不佳 I 階Μ產品各電性連接塾間所需之細間距 同時易因銲錫迴銲時受熱炫只、& 1 c c Bridge ) ^ ± ^ ^ ^ ^ ^ ^ ^ 賴性。 姐峪的問碭，嚴重影響製程信 此外’由於輝錫材料形成於電 受限制，致使所形成之銲錫結 之接觸面穿貝 銲錫材料僅係形成在該絕缘 又人土，、即，由於該 巴'毒保護層之開口中’該銲錫材料 17936 9 1283556 銲僅^開口般大小’因此’在後續製程中該 :之推拉二：提:例如晶片、被動元件等與電路板間有 …口力，甚而導致晶片、被動元 脫離或隸連接不完全_題。 -路板間之 因此’黎於上述之θ 料之結合⑽不何避免習知技術中銲錫材 又土衣程複雜、製程所需時間增長、材料 無法於不同面積之電性連接塾上同時電： 尺!?Γ材料、以及電錢、印刷鮮錫材料時 二二，;:::辞;產生之品質不佳'無法提供 貝巳成目W亟欲解決的課題。 【發明内容】 鑒於以上所述習知技術之缺點，本發明之主 =「種電路板之電性連接端結構及其製法，以在電路板 之=連接塾上同時形成不同高度及尺寸之鲜錫材料。板 本發明之另一目^]孫# i 量、降❹1浅材料使用 電路板之電性連接端結構及其製法。 製程提供一種可縮短製程時間、簡化 私之电路板之电性連接端結構及其製法。 合力目的係提供一種有利於提昇銲錫結 力與推拉力之電路板之錄連接端結構及其製法。 連接=二:Γ_ 一種可在細間距之電性 法形成w結構之電路板之電性連接端結構及其製 本發明之又再一目 的係提供一種電路板之電性連接 17936 1283556 構法’得以避免習知電鍍形成電性連接端多次 與二二層及導電層所導致良率降低及製程步驟 浐处拔《 * 目的係提供一種電路板之電性連接 二尺寸避免習知模板印刷技術形成電性連 、 制費用提尚及製程技術上之瓶頸。 連接ίΐίΐ揭及其他目的，本發明提供一種電路板之電性 福叙:、。4之製法’其主要步驟係包括：提供表面形成有 複數電性連接墊雷 成有 成鏤*化 路板，其巾，部分㈣性連接塾中形 今^=，且於該電路板之表面形成有一絕緣保護層， :、，保相具有複數個開口以外露出該電性連 雷禺k 開處表面形成-導電層，並於該導 〜曰形成圖案化阻層，以覆蓋住部分之導電層且 二:之F: 口；以及於該欲電鍍開口中依序電鍍形成有導 板之單：：：：料。其中’該些電性連接墊可分佈於電路 即可：：:時分佈於電路板之上、下表面，且後續 材料進^阻層及為該阻層所覆蓋之導電層，並對該輝錫 锡結γ迴銲’以形成完整包覆該導電凸塊外露表面之銲 係包程導ΐ:明之電路板之電性連接端結構 電性遠姑i 導電凸塊以及銲錫材料。該 係形ίΓ係形成於該電路板之表面，該電性連接势周圍 以外ΪΓ絕緣保護層’且該絕緣保護層具有複數個開口 路出该電性連接墊，而於部分該電性連接塾中形成有 17936 11 1283556 縷工、会口構，5亥導電層係形成於該電性連接塾 ^電凸塊係形成於該電性連接塾上及其鏤空結二 曰上"亥|于錫材料則係形成於該導電凸塊上 书 銲錫材料進行迴鲜，以形成完整包覆該導電凸 之銲錫結構。 兄外路表面 空結接^構復包括有部分未形成有鎮 係形成於二===鏤空結構之電性連接塾 層，該絕緣保護声且複數個門一圍广形成-絕緣保護 汁。隻層具硬數個開口以外露出該電性 η::::空結構之電性連接塾外露表面形成有導電 二材料’並可對該銲錫材料進行迴銲， 以开乂成凡整包覆該導電凸塊外露表于 該未形成有鏤空結構之電性連接墊上所。其中’ 南度係高於該形成有鏤空結構之電性連 錫材料之高度。 呈上所形成的銲 因此’本發明之電路板之電性連接端 主要係在部分電性連接墊中'， 有鎮空結構之電性連接塾與二可在該形成 習知電鏟製程中無錫一^ 不具成本效益等缺^材料所造成的電㈣程複雜， 此本發明之電路板之電性連接 中，係先在電性連接塾表面先形成有導電層及導電 :：， 17936 12 1283556 η::::上電鐘形成有銲錫材料，如此-來，便可 例如銅質之導：低且電鍍速度較快之例如鍍銅材料電鍍出 慢之rl㈣书凸塊’然後再電錄成本較高且電鍍速度較 短制矛。所十1減^~錫材料使用量而降低材料成本並縮 成二=上:;==_有效包覆住該形 力。且本發明可避免採用習知印刷製 性連接熱卜，:黏著式電性連接塾或不同尺寸之電 ’經多次印刷形成銲錫材料㈣經多次迴銲所 二成的銲錫材料品質不佳’製程複 間距之電性連接墊。 尺评以杈仏細 接端發明亦可避免習知電錢技術先後形成電性連‘ 傷，、移除阻層及導電層對電性連接端之損. 路板之良率以及製程步驟與成本增 模板印刷技術形成電性料^ J費用如同及製程技術上之瓶頸。 【實施方式】 · 式，：:=Γ定的具體實施例說明本發明之實施方 式热白此技蟄之人士可由本說明書所揭示之内 ，解本發明之其他優點與功效。本發明亦可藉由以不同 的具體貫施例加以施行或應用，本說明書中的各項 可基於不_點與制，在不悻離本發明 種修飾與變更。 卜進仃各 第Μ至第Μ圖將詳細說明本發明之電路板之電性連 17936 13 1283556 =?構，製法較佳實施例之剖面示意圖。此處須注意的 ”疋^些圖式均為簡化之示意圖，1僅以干咅方H ^發明之基本架構，因此其僅顯示與棒月有； 之構成並非以實際實施時之數目、形狀、及 -種、其貫際實施時之數目、形狀及尺寸比例為 ^ Λ之叹计，且其構成佈局形態可能更為複雜。 性連接::電第二至Γ:，首先提供表面形成有複數個電 > 电路板，其中，該電性連接墊中形成鏤空 且於該電路板之表面形 一 、° 二以外露出該電性連接塾。而該電路板表面 連接塾製程係如第3A圖所示，提# 絕緣層31之雷败妃技斗 表面形成有 H + & 板，於该絕緣層31表面形成導電層32， 要作為後料鏟金料料所需 Γ銘：屬或沉積數層金屬層所構成，如選自銅Inconvenient and material materials f, can not be a good degree of I degree Μ product, the fine spacing required between the electrical connections, and easy to be heated due to solder reflow, & 1 cc Bridge ) ^ ± ^ ^ ^ ^ ^ ^ ^ Lai. Sister's question, seriously affecting the process letter. In addition, because the tin-tin material is formed in the electrical limit, the contact surface of the formed solder joint is only formed in the insulation and human soil, that is, due to In the opening of the 'virus protective layer', the solder material 17936 9 1283556 is soldered only to the size of the opening. Therefore, in the subsequent process, the push-pull two: mention: for example, between the chip, the passive component, etc. Even the wafer, the passive element is detached or the connection is not complete. - Therefore, the combination of the road plates is not the same as the combination of the above materials (10). In the conventional technology, the solder and the soil are complicated, the time required for the process is increased, and the materials cannot be electrically connected to different areas. : 尺!? Γ materials, as well as money, printing tin materials when 22,;::: resignation; the resulting poor quality 'can not provide the subject of the 巳 巳 巳 。 。. SUMMARY OF THE INVENTION In view of the above-mentioned shortcomings of the prior art, the main structure of the present invention is "the electrical connection end structure of the circuit board and the manufacturing method thereof, so as to form different heights and sizes simultaneously on the circuit board = connection port. Tin material. The other object of the invention is the surface of the invention. End structure and its manufacturing method. The purpose of the joint force is to provide a structure for the connection of the circuit board which is beneficial to the improvement of the soldering force and the push-pull force, and the manufacturing method thereof. Connection = two: Γ _ An electrical method capable of forming a w structure at a fine pitch The electrical connection end structure of the circuit board and the further object of the invention provide a circuit board electrical connection 17936 1283556 construction method to avoid the conventional electroplating forming the electrical connection end multiple times and the second and second layers and the conductive layer Lead to lower yield and process steps. * The purpose is to provide a kind of electrical connection between the two boards. Avoid the use of conventional stencil printing technology to form electrical connections, system cost and system. The technical bottleneck of the invention. The invention provides a circuit board for electrical safety: the method of the method of '4' includes the steps of providing a plurality of electrical connection pads formed on the surface.镂 化 化 化 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Forming a conductive layer on the surface of the opening portion, and forming a patterned resist layer on the conductive layer to cover a portion of the conductive layer and two: F: a port; and sequentially forming a conductive plate in the opening to be plated The single:::: material. Where 'the electrical connection pads can be distributed in the circuit::: is distributed on the upper and lower surfaces of the circuit board, and the subsequent material is in the resist layer and covered by the resist layer Conductive layer, and gamma reflow soldering of the tin-tin-junction to form a soldering system package that completely covers the exposed surface of the conductive bump: the electrical connection end structure of the circuit board of the Ming Dynasty is electrically conductive a block and a solder material. The system is formed on the circuit board The surface of the electrical connection is surrounded by an insulating protective layer ′ and the insulating protective layer has a plurality of openings to exit the electrical connection pad, and a portion of the electrical connection is formed with 17936 11 1283556 The mouth structure, the 5H conductive layer is formed on the electrical connection, the electric bump is formed on the electrical connection and the hollow junction is formed on the second node, and the tin material is formed on the conductive bump. The solder material of the above book is re-freshed to form a solder structure completely covering the conductive bump. The surface of the external circuit of the brother is connected with an electrical connection formed by a part of the town system formed in the second === hollow structure. Layer, the insulation protects the sound and a plurality of doors are widely formed to form an insulating protective juice. Only the layer has a hard number of openings to expose the electrical η:::: an electrical connection of the empty structure, the exposed surface is formed with a conductive two material The solder material may be reflowed to form an exposed surface of the conductive bump on the electrical connection pad without the hollow structure. Where the 'Southern degree system is higher than the height of the electrical tin-bonding material forming the hollow structure. The solder formed in the present invention is therefore the 'electrical connection end of the circuit board of the present invention is mainly in a part of the electrical connection pad', and the electrical connection between the air-tight structure and the second can be formed in the conventional electric shovel process. Wuxi·^ is not cost-effective, and the electrical (four) process is complicated. In the electrical connection of the circuit board of the present invention, a conductive layer and a conductive layer are first formed on the surface of the electrical connection::, 17936 12 1283556 η:::: The power-on clock is formed with a solder material, so that, for example, copper can be guided: low and the plating speed is fast, for example, the copper plating material is plated with a slow rl (four) book bump' and then recorded again. The cost is higher and the plating speed is shorter. The amount of tin material used to reduce the material cost is reduced and reduced to two = upper:; == _ effectively covers the shape. Moreover, the invention can avoid the use of the conventional printing system to connect the heat, the adhesive type electrical connection or the different size of the electric 'multiple printing to form the solder material (four) after repeated re-welding of the solder material is not good quality 'Electrical connection pads for process spacing. It is also possible to avoid the conventional electric money technology to form electrical connection damage, remove the resistance layer and the damage of the conductive layer to the electrical connection end. The yield of the road board and the process steps are Cost-increasing stencil printing technology forms electrical materials and costs as a bottleneck in process technology. [Embodiment] The following is a description of the embodiments of the present invention. The other embodiments of the present invention can be used to explain other advantages and effects of the present invention. The present invention may be embodied or applied in various specific embodiments, and the various aspects of the present invention may be modified and modified without departing from the invention. 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 It should be noted here that "these drawings are simplified diagrams, 1 is only the basic structure of the invention, so it is only displayed with the moon; the composition is not the actual number, shape The number, shape, and size ratio of the type, the type, and the size of the singularity are stunned, and the form of the layout may be more complicated. Sexual connection: electricity second to Γ: first, the surface is formed a plurality of electrical > circuit boards, wherein the electrical connection pads are hollowed out and exposed to the surface of the circuit board, and the electrical connection port is exposed outside the second layer; and the surface of the circuit board is connected to the circuit processing system such as the third As shown in the figure, the surface of the lightning-resisting layer of the insulating layer 31 is formed with an H + & plate, and a conductive layer 32 is formed on the surface of the insulating layer 31, which is required as a material for the backing material: genus or Depositing a plurality of layers of metal, such as selected from copper
使用二、鈦、•鉻或錫-鉛等單層或多層結構，或可 使用例如聚乙炔、平贫 ^ J 料’·如第3BS所-錢或有機硫聚合物等導電高分子材 阻C 接著在該導電層32上形成-圖荦化 ⑽〇t_sist)，μ利用為^如乾膜或液態光阻等光阻層 導電層32表面點合等方式形成於該 使綱叫蓋住該電路板表面部分之導電3化，、以 且外露出複數個欲電鑛開口 330;如第3C固所/ 亚 ^(Blectrop]a^ 在進行電鍍時可作為爺、古扁、首 、蜍毛^性，俾 乍為“傳¥路徑，以在該等欲電錄開口 17936 14 1283556 =1電鍍f成有電性連接墊340，#中，該電性連接塾 於先别叉阻層覆蓋處形成有鏤空結構3他，該鎮空 二a可例如為—多邊形鏤空結構或為-環狀鏤空結 層33所 ，_卩可移__33以及該阻 二声32:Γ ^电層32。其中，由於移除該阻層33及導 =之製程係屬習知者，故於此不再為文費述。當然， 形成-般未具鏤空；！：構；電性連接墊時，另可同時 圖示W隹關於電路：开成連接墊及導電線路(未 構之恭乂成¥电線路及一般未具鏤空結構結 稱之电性連接墊之製程技 術，非本發明之^ f衫夕’乃#界所周知之製程技 未再予贅述。為避免模糊本發明之技術特徵，故 凊參閱第3E圖，技塞y-# ^ 之電ί 形成有該電性連接塾340 利用2 Λ 耗制35。於本實施例中，係 於該電路方式將該絕緣保護層35塗覆 340由圖案化製程以使該電性連接墊 例如護層35。其中’該絕緣保護層㈣為 列如以％氧樹脂為基材之 料所製成，並藉由威光；：寻八有縮錫特性之防銲層材 伴護声Μ 料方式加間案化使該絕緣 保4層35形成有複數個 祕及該電性連接墊34〇中之^以外路出該電性連接塾 β q c ’婁二結構340a。其中，該絕 ==層35亦可為有機及無機之抗氧化膜之任-且有缩 層㈣所製成，而非以綠漆為限。 弟3F0，在錢緣保護層^及其對應之開口 17936 15 1283556 電層32，^座連接塾340外表面再形成一導電層32’。該導 徑，其可主要〜作為後述電鍍金屬材料所需之電流傳導路 二列子::或沉積數層金屬層所構成’或可使 阻層：3:閱弟Μ ’接著於該電路板上再形成-圖案化 33,曰可I俾使該阻層33,覆蓋住部分導電層32,。該阻層 係利用e ^如乾膜或液態光阻等光阻層（Ph〇t〇resist)，其 再夢由^刷、旋塗或貼合等方式形成於該導電層32,表面， 雷Γ等方式加以圖案化，以使該阻層㈣ 夂誃Μ命d k 32，亚形成複數個欲電鍍開口 330，，而 位詈:鍍開σ 33G’係形成於相對應該電性連接塾340之 她。’ U開口 330,並顯露出電性連接墊34〇之鎮空結構 請參閱第3H圖，再對該電路板進行電鍍 ===_程’藉由該導電層Μ’作為電流傳導路 二二中電鑛形成有導電凸塊36及 之〒鏤空二二7電凸塊36係充填於該電性連接墊340 材料；。門r成：二W ’另可在該導電凸塊36與銲錫 材料37間形成有—金屬阻障層（未圖示 塊36之材料可為諸如敍、錫、銀、銅、金:紐/録; 鎳、m碌以及錄等金屬之其中—者 :操:::驗’由於銅為成熟之電鐘材料且成本較低二 此，凸塊36以由電鑛鋼所構成者為較佳-為限，且該導電凸塊36係部分形成於該電性連接塾340 】6 17936 1283556 之鏤空結構340a中’且該導電凸塊36於該電性連接墊3扣 之鏤空結構340a處形成下凹之形態；該銲錫材料可為 選自鉛、錫、銀、銅、金、鉍、銻、鋅、鎳、鍅、鎂、銦、、、 碲以及鎵所構成之組群之元素的混合物所構成之合金；該 金屬阻障層係包括形成於該電性連接墊上之鎳黏著層以及| 形成於鎳黏著層上的金保護層，該金屬阻障層亦可由金、 鎳、鈀、銀、錫、鎳/鈀、鉻/鈦、鈀/金或鎳/鈀/金等，藉 由化學製程方式形成。此外’如製程條件許可，亦可採曰用 印刷方式（Stencil printing)於該電鍍開口 33〇，中形成該俨 錫材料37。 請參閱f 31圖，復可利用例如姓刻等方式移除將該阻 層33,以及該阻層33,所覆蓋之導電層32,。其中，由 除該阻層33,及導電層32,之製程係屬習知者，故於此不： 為文贅述。 由於本發明巾係可形成具有-定高度之導電凸塊36 可加速電流通過，更減少銲錫材料37之使用量，且諸如^ 銅之金屬所製成之導電凸塊36具較佳之可靠性，而得以者 :父佳之電鍍效果，並且該導電凸塊％相對該電性連接璧 340之鏤空結構340a處呈下凹之报心^ 、 成於該導電凸塊36上之銲輸二，…加了後續形 接徂、痛材们7的接觸面積，故得以 料37與該電性連接塾閒的良好結合力，俾解決 白知技術製程中之銲錫材料品質不佳等缺失。 電鑛形成成本較低之㈣凸塊％，再在該成本較低之導Ϊ 17936 17 1283556 凸塊36上形成成本較高但使用量較小之銲錫材们 避免習知技術中，由於銲錫材料使用量多且支撐 足，所造μ㈣用之增加，及迴銲過程中由ς 的溢流而造成的電性橋接，盔、本姑 w才'+ 等問題。 μ $朴供細間距之電性連接塾 請參閱第3 J圖，之播，苑^r + 踢材料37稼融之潘度二下復了進在足;^電錄沈積之銲 該録錫材㈣經迴輝而在該導電凸塊％上形成銲:結： =^ H所不，@銲錫結# 37a之銲錫材 過 系凡整包覆料電凸塊36之外露表面。其中 銲錫結構3 7a莴声而^田μ # J視所而之 調整高度上之=㈣雜㈣料37熔融程度，以由此 係包括法所得之電路板之電性連接端結構 銲錫材料”。該電性連接=;2 電性連接墊34〇係形 〆成鏤空結構340a，該 接塾340周圍係步成^书路板之表面’且於該電性連 係具有複數個開”5。::卜=二’:_保護層” 電層-係覆蓋於該等電性卜 36係經電_成而覆，於4〇表面，㈣電凸塊 32〇a結構中之導^ γ連㈣34G上及其鏤空 導電凸塊36上。1;二而該銲錫材料37係形成於該 可為—多邊形鏤空处構^亦4接塾340之鏤空結構3術 ° 亦可為一環狀鏤空結構；該導電 18 17936 1283556 ΪΓ擇:選八，為金屬層或導電高分子材料;該導電凸塊36 屬凸塊’且該導電凸塊36對應該鐘空 、王卜凹之形態。 結構，至㈣，其係顯示本發明之電性連接端 之第—〜f 一貫施例之剖面示意圖，該製法大致與前述 板上同時顯-山^ 隹在°亥弟—貫施例中，該電路 社構之午Γ不出成具鐘空結構之電性連接墊與未具鏤空 、、、口構之電性連接墊。 八安工 400a Ilf乐4A圖’首先提供表面形成有具鏤空結構 ^生連接墊400與未具鏤空結構 的電路板。1Φ傅及电Γ生運接墊401 任咅妒狀Μ 結構她可為一多邊形、環狀或 彻盘去 結構，該具鏤空結構魏之電性連接塾 第一竇祐π 逆按蛩4υι之形成方式與前述 '―相同，故在此不再為文贅述1該些電性 可例如為供與覆晶w相接的預鐸錫凸塊鲜塾 m為較小尺寸之電㈣接墊4G1)，或料與被動元件連 接的表面料銲㈣及料植球_料（例如為較大尺 寸之電性連接塾彻）。此外，應注意者，係 糊，彻除可形成在電路板同一表面外，亦可形成於不同 表面上。 ^請夢閲第4B圖，接著’在該電路板表面形成一絕緣 保護層4卜該絕緣保護層41具有複數個開口训以外露 出該具鏤空結構40〇a之電性連接墊4〇〇與未具鏤空社 電性連接墊401。 ' 17936 19 1283556 410 Γ 'Γ $ 4C圖’在該絕緣保護層41及其對應之開口 供八t 成—導電層42,該導電層42主要作為後述電 ，屬材料所需之電流傳導路徑，其可由金屬、合金或沉 牙貝數層金屬層所構成，哎可使 一 ^ π 便用例如聚乙炔、聚苯胺或有 機k斌合物等導電高分子材料。 43,第4D圖’接著於該電路板上形成圖案化阻層 铲+铲門該：層43覆盍住部分導電層42 ’且形成複數個 名人電鍍開口 430，而命關σ l 以開口 430鉍形成於相對應該電性連 接墊400舁電性連接墊4〇1之位置。 請茶閲第4E圖，再對該電路板進行電鍍 =伽咖㈣製程，藉由該導電層42作為電流傳導路 住以在對應該電性連接執 序雷铲m千 置之阻層開口 430中依 、、又乂成¥电凸塊44與銲錫材料46，以及在對應該 性連接墊401位置之阻層開口㈣中 ^ ::與:錫一 /、 μ ¥笔凸塊44對應該電性連接墊4〇〇之鏤空 結構400a處呈下叩夕以& ,, 之形悲，此外，該導電凸塊44,頂緣由 …U連接塾401中未形成有鏤空結 於具鏤空結構400a^ +叫、击拉批 亥幵/成 較，★亥導命㈣，丄連接整彻上之導電凸塊44相 电鬼44’咼度係較導電凸塊44為高，致使該導 電凸塊从上之銲錫材料价之高度係高於該導電凸塊Ο 上=錫材料46’·當然’若製程條件許可，該些 係可利用印刷方士、，， 十 方式形成。此外，另可在該導電凸塊與銲錫 17936 20 1283556 成有-例如鎳/金之金屬阻障 -. 閲第4F圖’復可利用如餘刻等方°不)。 及-所覆蓋的導電層42移除 式以將該阻層 43之製程係屬f " ’ &於移除該阻層 由於本發明之第為文贅述。 之導電凸塊44,44,而—二列中係可形成具有—定高度 紙价之使用量，而可加速電流通過，減少銲錫材料 具較佳之可屬所製成之導電凸塊 44,4" ^ 後續形成於該導電凸塊44 態，從而增加了 面積’故得以提供銲錫材料46,46，與的接觸 。此外，本發明中無須經多次印刷:電: 料=了解::知r* 連接塾上-構·因而可在不同的電性 習知技術製程中，度之鮮錫材料’俾能解決 同高度及尺寸之銲錫材料:缺：。性連接墊上-次形成不 同日守’本發明係採用在電路板之電性連接墊400,401 ^先^鑛形成成本較低之導電凸塊44,44，，再在該成本較 -之導％凸塊44,44,上形成成本較高但使用量較小之銲錫 材料紙46 ’俾避免習知技術中，由於銲錫材料使用量多 且^樓強度不足，所造成製程費之增加，以及在後續迴銲 k €中由方、銲錫材料的溢流而造成的電性橋接，無法提供 21 17936 1283556 細間距之電性連接墊等問題。 請參閱第4G圖，後續即可在足以使該電鍍沈積之銲 錫材料46,46,熔融之溫度條件下，進行迴銲製程，使該^ 錫材料46,46 ’經迴銲而在該導電凸塊44,44，上形成鲜锡結干 構46a，46a，。如圖所示，該銲錫結構46a，46a，之銲錫材料 係完整包覆該導電凸塊44,44,之外露表面。其中，可視所 需之銲錫結構46a，46a，高度而調整該銲錫材料46,46，熔融 程度，以由此調整高度上之誤差，藉以在該電性連接塾" 400,401上形成高度及尺寸不同之銲錫結構46a，46a，；而該 具較大高度之銲錫結構46a，係可例如作為預銲錫凸塊以供 接置半導體晶片，該具較小高度之銲錫結構術係可供用 以接置例如被動元件之表面黏著元件或以供後續植置 球。 透過前述本發明之製法所得之電路板之電性連接端 結構包括電性連接塾_，4()1、導電凸塊44,44,、導電層 42、以及銲錫材料46,46，。該電性連接墊4〇〇,4〇ι係形成 於4電路板之表面，於該電性連接墊彻，術周圍係形 成有該絕緣保護層4卜該絕緣保護層41係具有複數個開 口 410以外露出該電性連接墊彻，4〇1，另在該電性連接 墊400中形成有鏤空結構4〇〇a。該導電層係覆蓋於該 電，連接墊4GG，4G1表面，該導電凸塊44係經電鍍形成而 覆蓋於該電性連接墊400上及其鏤空400a中之導電層42 上，而該銲錫材料46係形成於該導電凸塊44上，且該電 f生連接墊400之鏤空結構糊a可為—多邊形鏤空結構，亦 17936 22 1283556 ==鏤空結構;相對地，該導電凸塊44,係電鑛形 成復孤方；该電性連接墊4〇1表面之 材料46,係形成於該導電 =’而該銲韻 可選擇為諸如銅層之金屬層::電上高二 塊44 44,可撰遲鱼#上| 材料口亥導笔凸 44 44:夺：Γ1 塊之金屬凸塊，該導電凸塊 料，44表面對應該鏤空結構4〇〇a處呈下凹能， 凸塊4 4，上的鮮錫材料4 6，之高度 電:塊^電 的銲錫材料46之高度。 今电凸塊44上 要係::用板之電性連接結構及其製法中主 由該導電凸塊取代部份銲錫 _ 电凸鬼，以 ,,,,^ /± 干錫材科，俾可有效減少所需之鋥 錫材枓使用量而可降低成本；同 、干 塊之導電凸塊所需之H* Μ / 、电鍍诸如為銅凸 „ , &間係短於電輯錫材料所需之時 二，先_成本較低且 ;斤二 之際更縮短所需製程時間，加：程 1八^入^ 毛明之電路板之電性連接端結構係可在 =:部電性連接塾中形成鏤空結構，因而得以於：二 :小的電性連接塾上同時形成不同高 :上俾:決習知技術製，無法於不電 ： 塾上;:切成不同高度及尺寸之鲜錫材料之缺失接 於且較1面明時，可避免習知模板印刷製程中， 约刷= 接電性連接塾（SMTPad)上妹多 質與=材:=:rr-材： ㈣寻問通’以及避免習知電鑛技 23 Π936 1283556 Λ 術先後形成電性連接端jg & & & 恭料、*拉山 夕次敷設、移除阻層及導電層對 本增加等之良率以及製程步驟與成 之導===:=之:性連接端結構及製* 形怨，增大了後績形成於該導電 凸克上之輝錫材料之接觸 , 該形成於電性連接墊==二 料有效包覆住 ^ 之V毛凸塊，藉以提供銲鍚材料盥 電性連接墊間良好結合力。 •性=先前圖式僅以部分電性連接塾表示，實際上該 $! 生連彳—銲躲構之數目，純實 以設計並分佈於電路板之表面。 而而加 上述實施例僅為例示性說明本發明之原理及其功 效，而非用於限制本發明。任何熟習此技藝之人士均 I違背本發明之精神及範訂，對上述實施例進行修韩與 ，又化。因此，本發明之權利保護範圍，應如後述之 利範圍所列。 明寻 【圖式簡單説明】 第1圖係顯示習知之覆晶元件剖面示意圖； 、第2圖係顯示習知藉由模板印刷技術在電路板之電性 連接塾上沈積鲜錫材料之剖面示意圖； 第3A至第3 J圖係顯示本發明之電路板之電性連接端 、、、口構製法弟一貫施例之剖面示意圖；以及 第4A至第4G圖為本發明之電路板之電性連接 製法之第二實施例之剖面示意圖。 〜構 17936 24 1283556 【主要元件符號說明】 12 電極銲墊 14 銲錫凸塊 16,20 電路板 18 底膠材料 22 電性連接墊 23a 網格 31 絕緣層 33,33，，43 阻層 11 金屬凸塊 13 晶片 15 銲墊 17 録錫接 21 拒録層 23 模板 24 滾輪 32, 32， 導電層 330,330，，430 開口 340a，400a鏤空結構 350,410 開口 37,46,46, 鲜錫材料 42 導電層 340,400,401 電性連接墊 35,41 絕緣保護層 36,44,44’導電凸塊 37a，46a,46a’ 銲錫結構 25 17936Use a single layer or a multi-layer structure such as titanium, chromium, or tin-lead, or use a conductive polymer such as polyacetylene, flat-lean material, such as 3BS-- or organic sulfur polymer. Then, a conductive layer (10) 〇t_sist is formed on the conductive layer 32, and the μ is formed by a surface of the photoresist layer 32 such as a dry film or a liquid photoresist, so that the outline covers the circuit. The surface portion of the plate is electrically conductive, and a plurality of electric ore openings 330 are exposed and exposed; for example, the 3C solids/sub-b (blectrop)a^ can be used as the ge, the ancient flat, the first, the bristles when performing electroplating^ Sexuality, 俾乍 “ “ 传 , , , , , 17 17 17 17 17 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 936 17 17 17 17 There is a hollow structure 3, and the town space 2a can be, for example, a polygonal hollow structure or a ring-shaped hollow layer 33, a _ _ _ _ 33, and a second slab 32. Since the process of removing the resist layer 33 and the lead = is a well-known person, it is no longer described herein. Of course, the formation is generally not hollowed out; When connecting the mats, it is also possible to simultaneously illustrate the W隹 circuit: the connection pads and the conductive lines (the structure technology of the electrical connection pads that are not structured and the electrical connection pads that are not generally hollowed out) The process technology of the invention is not described in detail. In order to avoid obscuring the technical features of the present invention, referring to FIG. 3E, the electric plug of the technical plug y-# ^ is formed with the electrical property. The connection 塾 340 utilizes 2 耗 consuming 35. In this embodiment, the insulating protective layer 35 is coated 340 by the patterning process to make the electrical connection pad such as the sheath 35. The protective layer (4) is made of a material such as a material containing % oxygen resin, and is made of a light-proof material; the anti-welding layer with the characteristics of tin-reducing tin is accompanied by a sound-proof material, and the insulation is ensured. The fourth layer 35 is formed with a plurality of secrets and the electrical connection pads 34 以外 out of the electrical connection 塾β qc '娄 two structures 340a. wherein the absolute == layer 35 can also be organic and inorganic The anti-oxidation film is - and has a shrink layer (4), not limited to green paint. Brother 3F0, in the Qianyuan protective layer ^ The corresponding opening 17936 15 1283556 electrical layer 32, the outer surface of the connection port 340 is further formed with a conductive layer 32'. The diameter can be mainly used as the current conduction path two columns required for the electroplated metal material to be described later:: or Depositing a plurality of metal layers to form 'or a resist layer: 3: reading the Μ' and then forming a pattern 33 on the circuit board, so that the resist layer 33 covers a portion of the conductive layer 32, The resist layer utilizes a photoresist layer such as a dry film or a liquid photoresist, which is formed on the surface of the conductive layer 32 by brushing, spin coating or lamination. The thunder and the like are patterned such that the resist layer (4) is dk 32, and a plurality of openings 330 are formed, and the plated σ 33G' is formed on the corresponding electrical connection 塾 340. Her. 'U opening 330, and revealing the structure of the electrical connection pad 34〇, please refer to the 3H figure, and then plating the board ===_程' by the conductive layer Μ' as the current conduction path 22 The medium electric ore is formed with a conductive bump 36 and a hollow second and two electric bumps 36 are filled in the electrical connection pad 340 material; The gate r is formed as: two W', and a metal barrier layer may be formed between the conductive bump 36 and the solder material 37 (the material of the block 36 not shown may be, for example, Syria, tin, silver, copper, gold: New Zealand/ Recorded; nickel, m and recorded metal, among them: operation::: test 'Because copper is a mature electric clock material and the cost is lower, the bump 36 is preferably made up of electric ore steel. The conductive bumps 36 are partially formed in the hollow structure 340a of the electrical connection 塾 340 6 6 17936 1283556 and the conductive bumps 36 are formed at the hollow structure 340a of the electrical connection pad 3 a concave form; the solder material may be a mixture of elements selected from the group consisting of lead, tin, silver, copper, gold, bismuth, antimony, zinc, nickel, antimony, magnesium, indium, antimony, bismuth, and gallium. The alloy barrier layer comprises a nickel adhesion layer formed on the electrical connection pad and a gold protective layer formed on the nickel adhesion layer, and the metal barrier layer may also be made of gold, nickel, palladium or silver. , tin, nickel/palladium, chromium/titanium, palladium/gold or nickel/palladium/gold, etc., formed by a chemical process. In addition, 'such as process conditions Alternatively, the tin-filled material 37 may be formed in the plating opening 33 by using a printing method (Stencil printing). Referring to the figure f 31, the resist layer 33 may be removed by, for example, a surname or the like. And the resist layer 33, the conductive layer 32 covered, wherein the process of removing the resist layer 33 and the conductive layer 32 is a conventional one, so it is not described herein. The conductive bumps 36 having a constant height can be formed to accelerate the passage of current, and the use amount of the solder material 37 is further reduced, and the conductive bumps 36 made of metal such as copper have better reliability, and the winner is: The electroplating effect is good, and the conductive bump % is concave with respect to the hollow structure 340a of the electrical connection 340, the soldering of the conductive bump 36, and the subsequent connection The contact area of the pain material 7 is so that the good combination of the material 37 and the electrical connection can be solved, and the quality of the solder material in the process of the white technology is not well solved, etc. The formation cost of the electric ore is low (four) convex Block %, then at the lower cost of the guide 936 17936 17 1283556 Soldering materials with higher cost but smaller usage are avoided in the prior art, because the amount of solder material used is large and the support is sufficient, the μ (4) used is increased, and the electricity caused by the overflow of the helium during the reflow process Sexual bridging, helmet, and aunt w'+ etc. μ $Pu for fine pitch electrical connection 塾Please refer to the 3rd J picture, broadcast, Yuan ^r + kick material 37 融融的潘度二下Into the foot; ^ electric recording deposition of the recorded tin material (four) by the Huihui and the formation of the conductive bump % welding: knot: = ^ H not, @焊锡结# 37a of the solder material through the whole The exposed surface of the coating electric bump 36, wherein the solder structure is 7 7a, and the field is adjusted to the height of the (four) impurity (four) material 37, so that the circuit is obtained by the method. The electrical connection structure of the board is soldered." The electrical connection=2 is electrically connected to the hollow structure 340a, and the periphery of the interface 340 is formed as a surface of the book board and has a plurality of openings in the electrical connection. : Bu = two ': _ protective layer" The electric layer - the system covers the electricity, the 36 series is electrically covered, on the surface of the 4 ,, (4) the electric bump 32 〇 a structure of the γ 连 (4) 34G Upper and its hollow conductive bumps 36. 1; Secondly, the solder material 37 is formed in the hollow structure 3 which can be a polygonal hollow structure, and is also a ring-shaped hollow structure; the conductive 18 17936 1283556 choice: eight , the metal layer or the conductive polymer material; the conductive bump 36 belongs to the bump ' and the conductive bump 36 corresponds to the shape of the bell and the Wang Bu. Structure, to (4), which is a schematic cross-sectional view showing the first embodiment of the electrical connection end of the present invention, which is substantially simultaneous with the above-mentioned board-mountain The electrical structure of the circuit structure does not produce an electrical connection pad with a clock-empty structure and an electrical connection pad without a hollow, and a mouth structure. The Ba Angong 400a Ilf Le 4A diagram first provides a surface-formed hollowed-out structure with a mating pad 400 and a circuit board without a hollow structure. 1Φ Fu and electric pick-up mat 401 咅妒 咅妒 Μ structure She can be a polygon, ring or plate to structure, the open structure of the electrical connection Wei 塾 first 佑 π reverse 蛩 4 υ 之The formation method is the same as the above-mentioned, and therefore, the electrical properties can be, for example, the pre-tind bumps that are connected to the flip-chip w, which are small-sized electric (four) pads 4G1. ), or the surface material welding (4) and the material ball (for example, the electrical connection of a larger size) connected to the passive component. In addition, it should be noted that the paste can be formed on the same surface of the circuit board or on different surfaces. ^Please dream of Figure 4B, then 'form an insulating protective layer 4 on the surface of the circuit board. The insulating protective layer 41 has a plurality of opening trainings to expose the electrical connection pads 4〇〇 with the hollow structure 40〇a There is no hollowed out electrical connection pad 401. ' 17936 19 1283556 410 Γ 'Γ $ 4C diagram' in the insulating protective layer 41 and its corresponding opening for eight to become a conductive layer 42, the conductive layer 42 is mainly used as a current, the current conduction path required for the material, It may be composed of a metal, an alloy or a metal layer of a plurality of layers, and a conductive polymer material such as polyacetylene, polyaniline or organic k-bend may be used for the π. 43. FIG. 4D' is followed by forming a patterned barrier shovel + shovel on the circuit board. The layer 43 covers a portion of the conductive layer 42' and forms a plurality of celebrity plated openings 430, and the gate s1 is opened 430. The crucible is formed at a position corresponding to the electrical connection pad 400舁 electrical connection pad 4〇1. Please refer to FIG. 4E, and then perform electroplating=gamma (four) process on the circuit board, and the conductive layer 42 is used as a current conduction path to block the opening 430 of the lightning shovel m-spot corresponding to the electrical connection. In the middle, and then into the electric bump 44 and the solder material 46, and in the resistance layer opening (four) at the position of the corresponding connection pad 401 ^ :: with: tin one /, μ ¥ pen bump 44 corresponds to electricity The hollow structure 400a of the connecting pad 4 is in the form of a lower surface, and the shape of the conductive bump 44 is further formed by the U-connecting 401 without a hollowed-out structure 400a. ^ +叫,打拉批幵幵/成比,★亥导命(四), 导电Connected on the conductive bump 44 phase electric ghost 44' 咼 degree is higher than the conductive bump 44, resulting in the conductive bump The height of the solder material from above is higher than that of the conductive bumps = = tin material 46'. Of course, if the process conditions permit, the systems can be formed by using the printing alchemist, ten ways. In addition, the conductive bump and the solder 17936 20 1283556 - for example, a metal barrier of nickel / gold - can be used as the balance of the 4F. And the conductive layer 42 is removed to remove the process of the resist layer 43 from f "'& removing the resist layer as described in the first section of the present invention. The conductive bumps 44, 44, and the two columns can form a use of a fixed height paper price, and can accelerate the passage of current, and reduce the solder material with a preferred conductive bump 44, 4 " ; ^ Subsequent formation in the conductive bump 44 state, thereby increasing the area 'to provide the solder material 46, 46, in contact with. In addition, in the present invention, there is no need to print multiple times: electricity: material = understanding: knowing that r* is connected to the upper structure - and thus can be used in different electrical conventional technology processes, the degree of fresh tin material can not be solved Soldering materials of height and size: missing:. The invention is based on the use of electrical connection pads 400, 401 ^ first in the circuit board to form lower cost conductive bumps 44, 44, and then in the cost of - lead% convex On the block 44, 44, a solder material paper 46 having a higher cost but a smaller amount of use is formed. 俾 In the prior art, due to the large amount of solder material used and the insufficient strength of the building, the process cost is increased, and In the reflow k €, the electrical bridging caused by the overflow of the square and the solder material cannot provide the problem of 21 17936 1283556 fine pitch electrical connection pads. Referring to FIG. 4G, the reflow process can be performed after the solder material 46, 46 of the electroplated deposition is melted, so that the tin material 46, 46 ′ is reflowed at the conductive bump. Blocks 44, 44 are formed with fresh tin junctions 46a, 46a. As shown, the solder structure 46a, 46a, the solder material completely encapsulates the conductive bumps 44, 44, the exposed surface. Wherein, the solder materials 46, 46a can be adjusted in height according to the required solder structures 46a, 46a, and the degree of melting can be adjusted to adjust the height error, thereby forming different heights and sizes on the electrical connection 400"400,401. The solder structure 46a, 46a; and the solder structure 46a having a larger height can be used, for example, as a pre-solder bump for mounting a semiconductor wafer, and the solder structure having a smaller height can be used to connect, for example. The surface of the passive component is attached to the component or for subsequent implantation of the ball. The electrical connection end structure of the circuit board obtained by the foregoing method of the present invention comprises electrical connections 塾_, 4() 1, conductive bumps 44, 44, conductive layer 42, and solder materials 46, 46. The electrical connection pads 4〇〇, 4〇ι are formed on the surface of the 4 circuit board, and the electrical connection pads are formed, and the insulation protection layer 4 is formed around the surgery. The insulation protection layer 41 has a plurality of openings. The electrical connection pad is exposed to the outside of 410, and the hollow structure 4〇〇a is formed in the electrical connection pad 400. The conductive layer covers the surface of the pad 4GG, 4G1, and the conductive bump 44 is formed by electroplating to cover the conductive pad 400 on the electrical connection pad 400 and the conductive layer 42 in the hollow 400a. 46 is formed on the conductive bump 44, and the hollow structure paste a of the electrical connection pad 400 can be a polygonal hollow structure, also 17936 22 1283556 == hollow structure; relatively, the conductive bump 44, The electric ore is formed into a complex orphan; the material 46 of the surface of the electrical connection pad 4〇1 is formed on the conductive=' and the soldering rhyme can be selected as a metal layer such as a copper layer:: an electric upper two blocks 44 44,撰迟鱼#上|Materials mouth guide pen convex 44 44: 夺: Γ1 block of metal bumps, the conductive bump material, 44 surface corresponding to the hollow structure 4〇〇a concave energy, bump 4 4 , the high tin material on the 4, 6, the height of electricity: the height of the solder material 46. The current electric bump 44 is to be:: the electrical connection structure of the board and the manufacturing method thereof, the main solder is replaced by the conductive bump _ electric convex ghost, to,,, ^ / ± dry tin material, 俾It can effectively reduce the amount of tin-bismuth material required to reduce the cost; the same as the H* Μ / of the conductive bump of the dry block, the plating is such as copper convex, and the inter-system is shorter than the electric tin material. When the time is required, first, the cost is lower; and the time required for the process is shortened by the second time; plus: 1 1 ^ ^ ^ ^ The electrical connection structure of the board of Mao Ming can be in the =: part of the electrical The hollow structure is formed in the connecting raft, so that it can be formed at the same time as: 2: small electrical connection 同时 on the same height: upper 俾: ruling technical system, can not be used without electricity: 塾;; cut into different heights and sizes When the missing tin material is connected and is more clear than the first side, it can avoid the conventional stencil printing process, about brush = electrical connection 塾 (SMTPad) on the sister multi-quality and = material: =: rr-material: (four) looking Asking 'and avoiding the knowledge of electric mining technology 23 Π 936 1283556 Λ 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 先后 j j j 先后 先后 j j j j j j j j j j j j j j j And the conductivity layer increases the yield and the process steps and the process of the formation ===:=: the structure of the sexual connection end and the formation of the shape, and increase the after-performance of the tin-forming material formed on the conductive bump Contact, the formation of the electrical connection pad == two materials effectively cover the V hair bumps of the ^, in order to provide a good bonding force between the soldering material and the electrical connection pads. • Sex = the previous pattern is only partially electrical The connection 塾 indicates that the number of the ! 彳 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 焊 , , , , , , , , , , , , Rather than limiting the invention, any person skilled in the art will be able to modify the above embodiments in accordance with the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as described later. Listed in the range of interest. Brief introduction [Simplified description of the drawings] Figure 1 shows a schematic cross-sectional view of a conventional flip-chip device; Figure 2 shows the conventional deposition of a freshly deposited electrode on a circuit board by stencil printing. Schematic diagram of tin material; 3A to 3 J The figure shows a schematic cross-sectional view of an electrical connection end of the circuit board of the present invention, and a conventional embodiment of the port construction method; and 4A to 4G are second embodiment of the electrical connection manufacturing method of the circuit board of the present invention. Schematic diagram of the structure. ~ Structure 17936 24 1283556 [Main component symbol description] 12 electrode pad 14 solder bump 16, 20 circuit board 18 primer material 22 electrical connection pad 23a grid 31 insulation layer 33, 33, 43, resistance Layer 11 Metal bumps 13 Wafer 15 Solder pad 17 Tin-plated 21 Rejected layer 23 Template 24 Roller 32, 32, Conductive layer 330, 330, 430 Opening 340a, 400a Hollow structure 350, 410 Opening 37, 46, 46, Tin material 42 Conductive layer 340, 400, 401 Electrical connection pad 35, 41 Insulating protective layer 36, 44, 44' Conductive bump 37a, 46a, 46a' Solder structure 25 17936