TWI277854B - Switching controller having output power limitation and brownout protection - Google Patents
Switching controller having output power limitation and brownout protection Download PDFInfo
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^277854 九、發明說明: 【發明所屬之技術領域】 一種具有輸出功率關與低電壓保護之切換式控織置,尤指一種可 J力率輸出與低輸入電源電壓保護之切換式控制裝置。 【先前技術】 卜在電源供應器中,PWM切換技術係為一習知制支術,其係可以用來控制 ”穩疋调整輸it;功率。各種保護雜如過電壓與過電流保護仙建在電源 供應器中,用來保護該電源供應器與周邊電路,以避免造成永久性的傷害。 電源供應H之輸ilj神關的魏通於過賴短路保護。 參考第-圖,係、為習知的電源供應II電路示意圖。其中切換式控制器 Ui由力率限制比較器53、振盪态56及驅動訊號產生單元54組成,係作為 電源供應器5驅動訊號之來源,例如pwm控制積體電路3842,該PWM控制 積體電路3842在商業化應用上已經廣泛地使用在電源供應器的場合。在電 源供應器5中’輸入電源VlN會透過一串聯的啟動電阻RST開始對一維持電容 Cst進行充電’等到維持電容Cst上之電壓Va到達一啟動電壓時,切換式控制 器仂開始動作,用來驅動整個電源供應器5。 電源供應器5啟動後,切換式控制器仏工作所需要之供應電壓Vcc,係 由變壓器Τι的輔助繞組Να透過一整流器Da對維持電容CST充電所提供。此 時,一檢知電阻Rs串聯連接於功率開關Qi,係檢測流過功率開關仏之變壓 器Τ! 一次側電流Ip,作為決定電源供應器5的最大輸出功率。實現的方法 是將檢知電阻Rs上的電壓(即一電流感測§TL號Vcs)傳送到功率限制比較器53 1277854 的負端。假使電流感測訊號vesA於設定之最大功率限卿位%,例如 的電壓準位,娜動碱產轉元54將簡⑽制_碱 > 的輪出, 並且也將限制電源供應ϋ 5的最大輸出辨。儲存於變壓器Τι電感上的能 量ε為: :-xLxl2 =ΡχΤ 2 ..........(1) 最大輸出功率P可以表示如下:^277854 IX. Description of the invention: [Technical field of invention] A switching control woven device with output power off and low voltage protection, especially a switchable control device capable of J force rate output and low input power voltage protection. [Prior Art] In the power supply, the PWM switching technology is a conventional branching technology, which can be used to control the "steady adjustment of the input power; power. Various protections such as overvoltage and overcurrent protection Xianjian In the power supply, it is used to protect the power supply and peripheral circuits to avoid permanent damage. The power supply H is transferred to the ilj Shenguan Weitong in the short circuit protection. Refer to the figure - diagram, system A schematic diagram of a conventional power supply II circuit, wherein the switching controller Ui is composed of a force rate limiting comparator 53, an oscillating state 56, and a driving signal generating unit 54, and serves as a source of driving signals for the power supply 5, such as a pwm control integrated body. The circuit 3842, the PWM control integrated circuit 3842 has been widely used in commercial applications for the power supply. In the power supply 5, the input power supply V1N starts to maintain a capacitor Cst through a series of starting resistors RST. When charging is waited until the voltage Va on the sustain capacitor Cst reaches a starting voltage, the switching controller 仂 starts to operate to drive the entire power supply 5. The power supply 5 After the operation, the switching controller 仏 requires the supply voltage Vcc to be supplied by the auxiliary winding Να of the transformer 透过α through a rectifier Da to charge the holding capacitor CST. At this time, a detecting resistor Rs is connected in series to the power switch Qi It detects the transformer flowing through the power switch Τ! The primary side current Ip is used as the maximum output power of the power supply 5. The method is to detect the voltage on the resistor Rs (ie, a current sense § TL number Vcs Passing to the negative terminal of the power limit comparator 53 1277854. If the current sense signal vesA is at the set maximum power limit, for example, the voltage level, the nano-alkali transfer unit 54 will be simple (10) system_alkali> The turn-off, and will also limit the maximum output of the power supply ϋ 5. The energy ε stored on the transformer inductance is: -xLxl2 = ΡχΤ 2 ..........(1) Maximum output power P can be expressed as follows:
Ip :Ip :
LpLp
•X t〇N ····⑵ -(3)• X t〇N ·····(2) -(3)
Lp 2 ViN2xt〇N2 _x |p _____Lp 2 ViN2xt〇N2 _x |p _____
2xT 2 x Lp x T 其中Ip與Lp分別地表示為變壓器Ti的—次側電流與—次側電感值⑶ 係為功率_㈣通時’卿峨Vpw的導姉a1 ;τ係為功率開_之切 換週期。 由方程式(3)可以發現,輸出功率ρ將隨著輸入龍的改變而產生變 化。當考慮到安規(safety)時,電源供應器的輸入電源電壓範圍係由驗 到264Vac。在較高的輸入電源電壓(264Vac)時的輸出功率限制通常高於在 較低的輸人電職壓⑽ac)__,而高健之間往往有數倍的差異。 雖然透過電雜絲_授控制迴路可自祕難導稱間^,而使得輸 出功率保制錄。也就是說,當電域職號I高於最大辨限制準位 V4,例如VQ1V (Ip xRs g lv),此時最大導通時間^將受到限制,並 達成限制該電源供應器之一次側電流。 1277854 再者,最大輸出功率也受到驅動訊號產生單元54 所影響。 的傳輸延遲時間 td2xT 2 x Lp x T where Ip and Lp are respectively represented as the secondary side current and the secondary side inductance value (3) of the transformer Ti are the power _ (four) pass time 'Q峨 峨 Vpw guide 姊 a1; τ system is power on _ The switching period. It can be found from equation (3) that the output power ρ will change as the input dragon changes. When considering safety, the input supply voltage range of the power supply is determined by 264Vac. The output power limit at higher input supply voltages (264Vac) is usually higher than at lower input voltages (10) ac)__, while there are often several times the difference between high and healthy. Although the electric control wire can be used to control the circuit through the electric wire, the output power can be recorded. That is to say, when the electric field number I is higher than the maximum discriminating limit level V4, for example, VQ1V (Ip xRs g lv), the maximum on-time ^ will be limited at this time, and the primary side current of the power supply is limited. 1277854 Furthermore, the maximum output power is also affected by the drive signal generating unit 54. Transmission delay time td
配合第-B,街帛:_,爾㈣日_成編輸入電源 下之輪㈣報鮮撼異示意圖。電·絲5相定的最大功率限制 準^下,蝴輸靡:_會細輪峨_訊號^與 持續導通時間U較短_訊號ν_。再者,於低壓輪人電#作時合產 生斜率較緩的電流感測峨“與持續導通時間㈣長的驅動訊號ν_。 貝際上’當電流感測訊號Vcs高於最大功率限制準位%的瞬間(^ X匕^ IV) ’該驅動訊號產生單元54的驅動訊號Vto會經過一段傳輸延遲時間七 後才會截止。在該傳輸賴_ td之内,鱗_㈣持鱗通,並且繼 續傳遞功率。因此’實_鶴峨Vral的導通時間域等於純d。也就 是說,當輸入電源電壓較高時,功率開關Q1實際的導通時間。也隨之增 加,因而實際的功率關雜VM讀高,進轉致電雜絲5輸出功料 加甚多。需制說_是,無論是在較高與較低之輸人電源電壓下,於相 同的電源供應器中,其傳輸延遲時間七的大小是相同的。 當輸入電源電壓較低時,功率開關③實際的導通時間Wd也會隨之增 加,實際的功率限制準位VM,LV會比輸入電源電壓較高時之功率限制準位U 低。因而導致魏絲!I 5在很域_輸人電壓下,會產生數倍差異之 輸出功率。而實際的輸出功率p如下所示·· _ V2INx(t〇N +tp)2 ~2^ΓΰχΤ~ ...................... ...................................(4) 1277854 比車乂上述綱之式子⑶與⑷,由於ic内部的值 L 丨的傳輪延遲時間td將會使 激磁·比理論值多上(VlN / Lp)*td,因此 隹阿壓輪入電源時將會有較大 的力率_雜。軸轉輸延 丑通常介於250ns到300ns _圍’而較高的的操作鮮下,該傳輪延遲時心所造成的影響更形加 ,。所以輸场綱v咖當师,軸_砸v„不會影響 敢大輸出功率。 【發明内容】With the first -B, street 帛: _, er (four) day _ into the input power supply under the wheel (four) report fresh and strange. The maximum power limit of the electric wire 5 is determined. The output of the wire is _ _ will be thin 峨 _ signal ^ and the continuous conduction time U is shorter _ signal ν_. Furthermore, in the case of the low-voltage wheel, the current sense is generated with a slower slope, and the drive signal ν_ with a continuous on-time (four) is longer. When the current sense signal Vcs is higher than the maximum power limit level % of the moment (^ X匕^ IV) 'The drive signal Vto of the drive signal generating unit 54 will be turned off after a transmission delay time of seven. Within the transmission _td, the scale _(4) is scaled, and Continue to transmit power. Therefore, the on-time field of 'real_峨峨Vral is equal to pure d. That is to say, when the input supply voltage is high, the actual on-time of the power switch Q1 is also increased, so the actual power is mixed. The VM reads high, and the incoming and outgoing calls are mixed with 5 output materials. It needs to be said _ Yes, whether it is at the higher and lower input power supply voltage, the transmission delay time in the same power supply. The size of the seven is the same. When the input power supply voltage is low, the actual on-time Wd of the power switch 3 will also increase. The actual power limit level VM, LV will be higher than the power limit of the input power supply voltage. Bit U is low. This leads to Wei !I 5 will produce several times the difference in output power under the very domain _ input voltage. The actual output power p is as follows... _ V2INx(t〇N +tp)2 ~2^ΓΰχΤ~ ... ................................................. ....(4) 1277854 Than the above formulas (3) and (4) of the rut, the propagation delay time td of the value L 内部 inside the ic will cause the excitation to be more than the theoretical value (VlN / Lp)*td Therefore, when the pressure roller is turned into the power supply, there will be a large force rate. The shaft transfer delay is usually between 250ns and 300ns _ circumference, and the higher operation is fresh, and the transmission is delayed. The impact is even more complicated. Therefore, the output of the class is a teacher, the axis _砸v„ will not affect the output power. [Summary of the Invention]
有鐘於此’本發明具有輸出功率限制與低電堡保護之切換式控制裝 置八主要目的在於當電源供應器之輸入電源電堡變動時,係可以動態的 進行輸出功率之_。再者,若是輸人電源電壓過低下 應杰之輸出,如此係可達成低輸人電源電壓之保護。 ’則會停止電源供 ”本發明使用-磁滞比較電路透過輸入電阻接收等比例之輸入電源電 堡’磁滞比較電路將過低之輸人電源霞與磁滯臨界電壓顧值進行比較 '用^輸&低私壓磁_峨’低電壓磁滯tfl號控制驅動訊號產生單 讀止驅動峨之輸ίϋ,料電賴絲輸人電源賴過低之保護。 同時’本發明使用-箝制電壓產生單元透過輸入電阻接收等比例之輸 入包源電壓’用以輸出-最大辨限制電壓。—功率限制比較器接收該最 大功率限制電壓與-電流感測峨,並進行比較運算,用以輸功率限 制訊號,作為電源供應器輸出之功率限制。 再者’本發明使用一連接於該功率限制比較器與功率開關之驅動訊號 產生單兀來接㈣功率限制訊號,係可輸出驅動訊號到功率開關。藉此, 1277854 當輸^電源·變動時,該最大功率_電壓會隨之改變,進而促使該驅 動《產生早7L5周整驅動訊號之工作週期,以限制電源供應器之一次側電 流,並且達到輸出功率之限制。 在輸電源電壓過低的狀況下,遲滯比較電路會將過低的輸入電源電 壓與磁滯臨界電壓範圍值進行比較運算,即產生低電壓遲滞訊號,用以控 制驅動訊號產生單元停止驅動訊號輸出,作為低輸入電源電壓保護。 為了使貴審查委員能更進一步瞭解本發明特徵及技術内容,請參閱以 下有關本發明之詳細說明與附圖,然而所附圖式僅提供參考與說明用,並 非用來對本發明加以限制。 【實施方式】 凊參考第三圖,係為本發明較佳實施例之電路示意圖,本發明使用於 -電源供應器6中,係跟隨—輸人電源電壓%的變化,進而控制一功率開 關Qi之切換動作’包括有··磁滯比較電路6〇、箝制電壓產生單元62、功 率限制比較1 63及鶴訊號產生單元64。獅味 6()透過輸入電阻 艮與r2之分塵以取得等比例的輸入電源電壓Vin,並將該#比例的輸入電 源電壓Vw與一磁滯臨界電壓範圍值(電壓下限臨界值Vl〜電壓上限臨界值 Vh)進行比較運算。同時,當等比例的輸入電源電壓Vin低於電壓下限臨 界值vjf,磁滯比較電路60輸出一低準位的低電壓磁滯訊號ds,並在高 於電壓上限臨界值VH時輸出高準位的低電壓磁滯訊號Ds,以形成訊號磁 滯現象。上述說明中,該磁滯臨界電壓範圍值係為相對於輸入電源電壓 90Vac的一電壓上限臨界值Vh到相對於輸入電源電壓7〇Vac之一電壓下限 1277854 臨界值Vj^。 …復參考第三圖,該箝制電壓產生單元62由—加法細連接—限制電 壓源Vr所組成’係透過輸入電阻Ri與心取得自輸入電源電壓^分壓後 —的—V_ET ’該補償電壓vOTFSET與該關電魏Vr透過加法器 ㈣進仃加法運算後,係細—最切率關電壓。級輸入電源電 壓為一變動值,如在高輸入電源電壓至低輸人電源電壓· 鲁之間之變化。所以最大辨關電壓v贿也為可變練。透過該箝制電壓 產^單70 62的電細制魏’在高輪人電源電壓下可以制最大功率限制 •電壓Vl_v ’在低輸入電源電壓下可以得到最大功率限制電壓Vlmtlv,其 中Vlmt,lv係大於vLMTHV的電壓準位。 該功率限制比較器63連接於該箝制電壓產生單元62,係接收變動的該 最大功率限制電壓VLMT,並將變動的該最大功率限制電壓乂題與一電流感 須號Vcs進行比較運异’用以輸出一變動的功帛限制訊號v〇c。 φ 纟參考第二圖’驅動訊號產生單元64連接於該磁滯比較電路6〇、該功 率限制比較1 63、該功率開關Q及該電源供應器之回授端,係接收該低電 壓磁滯訊號DS與該功率限制訊號v〇c,以輸出一驅動訊號¥_到該功率 開關Qi。其中驅動訊號產生單元64包括有:一 PWM比較器642、一邏輯 電路644、一正反器646及一振盪器648。 該PWM比較器642連接到該功率限制比較器63與該電源供應器之回 授端,用以接收一電壓回授訊號vFB與該電流感測訊號Vcs,同時比較運算 該電堡回授sfL號Vfb與$亥電流感測號Vcs,用以輸出一調變輸出 1277854The present invention has a switching power control device with an output power limitation and a low electric castle protection. The main purpose of the control device is to dynamically output the power when the input power supply of the power supply is changed. In addition, if the input power supply voltage is too low, the output of the generator should be achieved, so that the protection of the low input power supply voltage can be achieved. 'The power supply will be stopped.' The invention uses a hysteresis comparison circuit to receive an equal proportion of the input power through the input resistor. The electric hysteresis comparison circuit compares the input power of the input power to the hysteresis threshold voltage. ^ lose & low private pressure magnetic _ 峨 'low voltage hysteresis tfl control drive signal to generate a single read drive 峨 ϋ 料 料 料 料 料 料 料 料 料 料 料 料 料 料 料 料 料 料 料 输 输 输 输 输 输 输 输 输 输 输 输 输 输 输 输 输 输The voltage generating unit receives an equal ratio of the input packet source voltage through the input resistor for outputting - the maximum discriminating limiting voltage. The power limiting comparator receives the maximum power limiting voltage and current sensing, and performs a comparison operation for the input. The power limit signal is used as the power limit of the power supply output. Furthermore, the present invention uses a driving signal generated by the power limiting comparator and the power switch to generate a single power supply (four) power limiting signal, which can output the driving signal to the power. Switch. By this, 1277854 when the power supply changes, the maximum power_voltage will change accordingly, which will cause the drive to generate an early 7L5 week full drive signal. The duty cycle is to limit the primary current of the power supply and reach the limit of the output power. In the case that the power supply voltage is too low, the hysteresis comparison circuit will perform the input voltage and the hysteresis threshold voltage value that are too low. The comparison operation generates a low voltage hysteresis signal for controlling the driving signal generating unit to stop driving the signal output as a low input power voltage protection. In order to enable the reviewing committee to further understand the features and technical contents of the present invention, please refer to the following related The detailed description of the present invention and the accompanying drawings are only for the purpose of illustration and description, and are not intended to limit the invention. [Embodiment] Referring to the third figure, it is a circuit diagram of a preferred embodiment of the present invention. The present invention is used in the power supply 6 to follow the change of the input power supply voltage %, thereby controlling the switching operation of a power switch Qi, including the hysteresis comparison circuit 6〇, the clamp voltage generating unit 62, Power limit comparison 1 63 and Hexun generating unit 64. Shiwei 6 () through the input resistor 艮 and r2 dust to take An equal ratio of the input power supply voltage Vin, and the ratio of the input power supply voltage Vw is compared with a hysteresis threshold voltage range value (the lower voltage threshold value V1 to the upper voltage threshold value Vh). Meanwhile, when the input is proportional The power supply voltage Vin is lower than the lower voltage threshold value vjf, and the hysteresis comparison circuit 60 outputs a low-level hysteresis signal ds of a low level, and outputs a low-level hysteresis signal Ds of a high level when the voltage upper limit value VH is exceeded. In order to form a signal hysteresis phenomenon, in the above description, the hysteresis threshold voltage range value is a voltage upper limit threshold value Vh with respect to the input power supply voltage of 90Vac to a voltage lower limit of 1,127,854 with respect to the input power supply voltage of 7〇Vac. Vj^. . . Referring to the third figure, the clamp voltage generating unit 62 is composed of -adding a fine connection - the voltage source Vr is formed by the input resistance Ri and the heart is obtained from the input power supply voltage ^ -V_ET ' The compensation voltage vOTFSET and the off-power Wei Vr are added to the adder (4), and then the fine-closed rate is turned off. The input power supply voltage is a variable value, such as a change from a high input supply voltage to a low input supply voltage. Therefore, the maximum discriminating voltage v bribe is also variable. Through the clamp voltage production, the electric fine system of the single-seat 70 62 can make the maximum power limit under the high-voltage power supply voltage. • The voltage Vl_v ' can obtain the maximum power limit voltage Vlmtlv under the low input power supply voltage, wherein Vlmt, lv is greater than The voltage level of vLMTHV. The power limit comparator 63 is connected to the clamp voltage generating unit 62, and receives the changed maximum power limit voltage VLMT, and compares the changed maximum power limit voltage problem with a current sense number Vcs. To output a variable power limit signal v〇c. φ 纟 refers to the second figure 'the driving signal generating unit 64 is connected to the hysteresis comparison circuit 6 〇, the power limit comparison 1 63, the power switch Q and the feedback end of the power supply, receiving the low voltage hysteresis The signal DS and the power limit signal v〇c are used to output a driving signal ¥_ to the power switch Qi. The driving signal generating unit 64 includes a PWM comparator 642, a logic circuit 644, a flip-flop 646 and an oscillator 648. The PWM comparator 642 is connected to the power limiting comparator 63 and the feedback terminal of the power supply for receiving a voltage feedback signal vFB and the current sensing signal Vcs, and simultaneously comparing and calculating the sfL number of the electric castle feedback Vfb and $Hai current sensing number Vcs for outputting a modulated output 1278854
Vp〇。3亥繼輸出喊VP0傳送到連接於功率限制比較器63輸出端之邏輯 電路644 ’鋪輯電路644取得該功率關峨ν。。麟雛輸ώ訊號Vp〇, 並執行及’_之賴’續出—重置峨^。 該正反器646連接於該磁滞比較電路6〇、該邏輯電路644、鎌盪器 648及該功率開關Ql,係接收該低電壓磁滞訊號ds、該重置訊號v脱及一 振盪訊號CLK ’駄輸出雜動峨νρ·_神開關^。 述兄种4正反益646為一 D型正反器,其一重置端⑻連接到該 邏輯電路644之輸出端敎接收該重置訊號%,其—時脈端(㈤連接到 麵請树_缝_ CLK,其—輸人端峨娜滯比較電 路6〇的輸出端用以接收該峨磁滞訊號ds,其—輸出糊連接到該功 率開關Q,之控制端用以輸出__號。 碌很盥訊號CLK控制 ^ 、,Q 八…八w八峒⑼取得該低電壓磁滯訊號 ’亚呈觸㈣(Q),„,娜魏 =-型正反器之重置,可於過功率—^ 夠挪爾犧做型™ 由於隶大功率限制链v聰 合 之功率限制賴V㈣_崎_= = _3輸出 號%之輸出,以達到輸出功率之限制。再者,=46用以調整驅動訊 控制正反器646輪出或1磁减號DS係可 配合第辱—嶋她輪物妓綱輸入 l277854 電源下之輸出功率限制準位«示意圖。箝制糕產生單以2在“ 源電壓與低以電源種谓產生最大辨關龍v “Vp〇. The circuit relay VP0 is transferred to the logic circuit 644 of the power limit comparator 63 output circuit 644 to obtain the power switch ν. . Lin Hsin lost the signal Vp〇, and the implementation and the '_之赖' continued - reset 峨 ^. The flip-flop 646 is connected to the hysteresis comparison circuit 6〇, the logic circuit 644, the undulator 648, and the power switch Q1, and receives the low-voltage hysteresis signal ds, the reset signal v and an oscillation signal. CLK '駄 output noise 峨νρ·_ God switch ^. The brother type 4 positive and negative benefit 646 is a D-type flip-flop, and a reset terminal (8) is connected to the output end of the logic circuit 644, and receives the reset signal %, and the clock-end ((5) is connected to the surface. Tree_slot_CLK, the output end of the input terminal 〇 滞 comparison circuit 6 用以 is used to receive the 峨 hysteresis signal ds, the output paste is connected to the power switch Q, and the control end is used to output __ No. 碌 盥 CLK CLK control ^,, Q 八... eight w 峒 (9) to obtain the low voltage hysteresis signal 'Asian touch (four) (Q), „, Na Wei =- type flip-flop reset, Over power - ^ enough Norman sacrifice type TM due to the power limit of the power limit chain v Conghe rely on V (four) _ _ = = _3 output number % of the output to reach the output power limit. Again, = 46 Used to adjust the drive signal control forward and reverse device 646 round or 1 magnetic minus DS system can be used in conjunction with the humiliation - 嶋 her wheel material input line l277854 power supply under the power limit level « schematic. The clamp cake produced by 2 “The source voltage is low with the power source to produce the largest identification dragon”
金 v , VLMT,HV ” _ν ’而檢知電阻Rs取得的電流感測訊號vcs則分別為Vcshv與 。針電流感測訊號Vcshv、Vcslv會分別透過功率限制比較器㈣ 取大功率關籠Vl_v、^砂進槪較運算,而制導辦間分別為 W與W之驅動峨Vp侧,取、VpwM,Lv。於上述說明中,若是同時考慮切 換式控制叫中各元件所產生的延遲,高輸人電源電壓與低輸人電源電壓 實際導通時間分別Swtd與w+td。 由上述可知,透過該箝制電壓產生單元62的電壓箱制功能,讓電源供 應器6在高觀健.魏下鶴較變最大辨_賴V聰,作為 電源供應器6輸出功率之補償甘' 、, 刀半之補仏,其貫際的最大功率限制電壓VLMT係為相 同’並可以得到穩定且相同的輸出功率P。 復配。第_圖’雜考第五圖,係為本發明磁滯比較電路波形示意圖。 在時間tl到t3時’輸人電源電壓VIN小於電壓上限臨界值VH,此時,輸入 電源電壓VIN即透過該磁滞比較電路6〇開始進行磁滯比較運算,時間^ 時,輸入«輕W該電壓下限臨界值%,此時該麟比較電路6〇 即輸出低準位之該低電壓磁滞訊號仍,肋控制該正反器_停止驅動訊 唬VPWM之輸丨,另外於日㈣㈣,輸人電源電壓㈣賴上限臨界 值VH此時a磁坪比電路6G即輸出高準位之該低電壓磁滯訊號ds,用 以控制該正反H 646恢復驅動訊#uV_之輸出。 本毛月八有輸iii功率聞與低電壓保護之切換式控織置,在電源供 12 1277854 應器之輸人電源龍_時,麟的進行輸出神之_,若是輸入電源 電塵過低下,則會停止電源供應器之輸出,如此係可達成低輸入電源電應 之保護。 惟,以上所述,僅為本發明最佳之一的具體實施例之詳細說明與圖式, 惟本發明之特徵並不侷限於此,並非用以限制本發明,本發明之所有範圍 應以下述之申請專利範圍為準,凡合於本發明申請專利範圍之精神^類 似變化之實施例,皆應包含於本發明之範缚中,任何熟悉該項技藝者在本 ^ 發明之領域内,可輕易思及之變化或修飾皆可涵蓋在以下本案之專利範圍。Gold v, VLMT, HV _ ν ' and the current sense signal vcs obtained by the detection resistor Rs are respectively Vcshv and the pin current sensing signals Vcshv, Vcslv will pass through the power limit comparator (4) to take the high power shut cage Vl_v, ^ sand into the 槪 comparison operation, and the guidance office is W and W drive 峨 Vp side, take, VpwM, Lv. In the above description, if you consider the delay generated by the switching control, the high-speed input The actual power-on voltage of the human power supply voltage and the low input power supply voltage are respectively Swtd and w+td. From the above, it can be seen that the voltage supply function of the clamp voltage generating unit 62 allows the power supply 6 to become the largest in Gao Guanjian. _ _ V V, as the power supply 6 output power compensation Gan ',, the knife half complement, its continuous maximum power limit voltage VLMT is the same 'and can get stable and the same output power P. The fifth figure of the first picture is the waveform diagram of the hysteresis comparison circuit of the present invention. At time t1 to t3, the input power supply voltage VIN is smaller than the upper voltage limit value VH. At this time, the input power supply voltage VIN is transmitted. The magnetic The comparison circuit 6〇 starts the hysteresis comparison operation, and at the time ^, the input «light W is the lower limit value of the voltage threshold value. At this time, the sir comparison circuit 6 〇 outputs the low-level hysteresis signal of the low level, and the rib control The flip-flop _ stops the driving of the VPWM, and in the other day (four) (four), the input power voltage (four) depends on the upper limit threshold value VH. At this time, the magnetic flat ratio circuit 6G outputs the low-voltage hysteresis signal ds of the high level. In order to control the output of the forward and reverse H 646 recovery drive signal #uV_. This month has eight input iii power and low voltage protection switching control weaving, in the power supply for 12 1277854 When _, Lin's output is _, if the input power is too low, the output of the power supply will be stopped, so that the protection of the low input power supply can be achieved. However, as described above, it is only the present invention. The invention is not limited to the details of the present invention, and is not intended to limit the scope of the invention, and all the scope of the invention should be determined by the following claims. The essence of the patent application scope of the present invention ^ Similar variations of the embodiments are to be included in the scope of the present invention cuff, any person skilled in the art in the present invention ^ the art, and can easily think of variations or modifications encompassed Jieke patentable scope of the following case.
13 1277854 【圖式簡單說明】 第一圖為習知的電源供應器電路示意圖; 第二圖為傳輸延遲時間造成高低壓輸入電源 -立θ· 、 輸出功率限制準位差異 第二圖為本發明較佳實施例之電路示意圖; 第四圖為本發明傳輸延遲時間造成高低壓輸入 电銶下之輸出功率限制準 位差異示意圖;及13 1277854 [Simple diagram of the diagram] The first diagram is a schematic diagram of a conventional power supply circuit; the second diagram is the transmission delay time caused by the high and low voltage input power - the vertical θ ·, the output power limit level difference is shown in the present invention The circuit diagram of the preferred embodiment; the fourth figure is a schematic diagram of the difference of the output power limit level under the high and low voltage input power caused by the transmission delay time of the present invention;
第五圖為本發明磁滯比較電路波形示意圖。 【主要元件符號說明】The fifth figure is a waveform diagram of the hysteresis comparison circuit of the present invention. [Main component symbol description]
5電源供應器 56振盪器 62箝制電壓產生單元62〇加法器 64驅動訊號產生單元642 PWM比較器 646正反器 仏切換式控制器 Q1功率開關 V〇FFSET補償電壓 Voc功率限制訊號 Vcs電流感測訊號 CLK振盪訊號 53功率限制比較器 6電源供應器 648振盪器 RsT啟動電阻 Da整流器 %限制電壓源 Vrst重置訊號 54驅動訊號產生單元 60磁滞比較電路 63功率限制比較器 644邏輯電路5 power supply 56 oscillator 62 clamp voltage generating unit 62 〇 adder 64 drive signal generating unit 642 PWM comparator 646 forward and reverse 仏 switching controller Q1 power switch V 〇 FFSET compensation voltage Voc power limit signal Vcs current sensing Signal CLK oscillation signal 53 power limit comparator 6 power supply 648 oscillator RsT start resistor Da rectifier % limit voltage source Vrst reset signal 54 drive signal generating unit 60 hysteresis comparison circuit 63 power limit comparator 644 logic circuit
Cst維持電容 變壓器 V»最大功率限制電壓 Vpo調變輸出訊號 DS低電壓磁滯訊號 V酬驅動訊號 14Cst maintenance capacitor Transformer V»Max power limit voltage Vpo modulation output signal DS low voltage hysteresis signal V compensation drive signal 14
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CN102468742A (en) * | 2010-11-11 | 2012-05-23 | 日隆电子股份有限公司 | Current limit signal generation method applied to flyback power converter |
TWI427884B (en) * | 2010-05-18 | 2014-02-21 | Leadtrend Tech Corp | Control methods, power control methods, power supplies, controllers and power supply controllers |
US9405354B2 (en) | 2011-09-20 | 2016-08-02 | Leadtrend Technology Corp. | Controlling method, power controller, and power controlling method |
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TWI382636B (en) * | 2008-06-06 | 2013-01-11 | Richtek Technology Corp | And a control method and a device for controlling the maximum output power of the power supply |
US11867732B2 (en) * | 2021-05-10 | 2024-01-09 | Mediatek Singapore Pte. Ltd. | Output voltage protection controller using voltage signal dynamically adjusted by offset voltage for controlling output voltage protection of voltage regulator and associated method |
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Publication number | Priority date | Publication date | Assignee | Title |
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TWI427884B (en) * | 2010-05-18 | 2014-02-21 | Leadtrend Tech Corp | Control methods, power control methods, power supplies, controllers and power supply controllers |
CN102468742A (en) * | 2010-11-11 | 2012-05-23 | 日隆电子股份有限公司 | Current limit signal generation method applied to flyback power converter |
US9405354B2 (en) | 2011-09-20 | 2016-08-02 | Leadtrend Technology Corp. | Controlling method, power controller, and power controlling method |
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