!276278 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種電源備援系統，特別是一種應用在先進架 構電源介面標準(Advanced Configuration & P〇wer Interface，ACPI) 電源模式下之記憶體電源備援系統。 【先前技術】 隨著資訊處理時代的來臨，電腦系統廣泛地運用於各行業， 一般來說，在一些重視通訊品質的地方，如，電信公司、數據中 心、銀行政府機關及軍事單位等等，都藉由高階伺服器、刀鋒伺 服器等’將重要資訊儲存於電腦系統中，因此，電腦系統的運作 品質是非常重要的，例如，#銀行正在進行交㈣帳款或傳輸的 資料時，若發生電源中斷情形，這些交易中的資料都將瞬間消失， 所以成的㈣不可預期’若能在電源情時，將電腦系統中暫 存的資料進行備援’藉雜護正在存取的龍，將可提高電腦系 統運作的品f ’岭_資料大部分較暫存於記鋪當中。 所以’為了使資料能在電源中斷時，保留當時未結束工作3 資料，需提供電_援，讓電職騎尚未財駐作完成獅 援資料’常見的方式係採用不斷電(驗__ P〇wer Supply， UPS)系統來解決這_問題，但稍職統的成本較高。 另，〜參知中華民國專利公告號第Μ53%號，該專利揭屬 =備极電源系統因應復電而自動唤醒電器之電源供應方法，》 包含下列步驟：於—斷電發生時，使,自動進人-省電模式 1276278 模 1自^列摘電之、，束，而於麵電排除時使該電器從該省電棋 輕_正歧作料，細觀魏顯' 的，機’同時可免除使用上的_，_專利並未針對電 統中記憶體m部分，提出相_電源備援系統架構。 因此，如何絲採職成柄对，來保魏憶财暫存的 貧料，避免當電源供應異常中斷時所造成的損害，且於電源供應 恢復正常時’讓電腦系統的工作程序恢復到斷電前的狀態，細 提焉電腦系統的可靠離e譲_穩定度(staw%)，成為研究 人員待解決問題之一。 【發明内容】 有鑑於先前技術存在之缺點與無法解決的問題，本發明提出 -種記憶體之電輯援系統，於f源供射_，透過電源備援 系統提供記憶體保存處理中的資料所需的電源，於電祕應恢復 正常時’讓f腦系統的工作程序恢復到斷電前的狀態，藉以提高 電腦系統之可靠度與穩定度。 所以為達上述目的，本發明所揭露之記憶體電源備援系統， 於電源供射斷時，提供備份電源給記紐，以暫存記憶體中之 資料，包含有：電源偵測單元、電源備援控制單元、電源備援單 元及電源供應切換單元。 電源偵測單元，用以偵測電源供應之狀態，若電源供應狀態 為異常中斷時，產生一電源中斷訊號。 1276278 電源備援控制單元，依據電源供應之狀態，產生一電源備援 之控制讯號，以啟動備份電源，並準備進行供電。 電源供應切換單元，依據控制訊號，用以切換電源供應之路 徑。 電源備援單元，用以提供備份電源，以暫存記憶體中的資料。 其中電腦系統更進入先進架構電源介面標準(ACH)的第三 (S3)权式，在此模式下電腦系統僅保留記憶體的資料，故僅需對記 憶體供電即可，如此，備份親的供電時間更能延長，且在電源 供應恢復正常時，對獅備援供應單元進行充電，藉以確保電源 備援供應單元的供電能力。 所以為達上述目的，本發明所揭露之電腦系統之電源備援系 統，包含有： 記憶體，用以暫存電腦系統中等待處理的資料。 中央處理斋單元，為電腦系統中的核心模組，用以處理記憶 體中暫存的資料。 人晶片組，用以控制電腦系統中的訊號傳輸作業，而晶片組包 έ有南橋晶片與北橋晶片。 供電單元，接收電源供應，以提供電腦系統中工作所需的電 源'。 電源债測單元，用以铜電源供應的狀態。 電源備援控制單元，依S電源供應的狀態，以產生-備份電 1276278 源之控制訊號。 電源供應切換單元，依據控制訊號，用以切換電源供應的供 電路徑。 電源備援供應單元，用以提供備份電源，以使記憶體暫存電 月自糸統中等待處理的資料。 另外，為達上述目的本發明更揭露一種記憶體之電源備援供 應方法，包含有下列步驟： 首先，偵測電源供應狀態，以判斷目前電源供應是否中斷， 若偵測電源供射斷，電源侧單元產生電源中斷訊號給電源備 援控制單元，並準備進行備份電雜應程序。 接下來，使電腦系統進入先進架構電源介面(ACpi)模式下的 第三(S3)模式，並啟動電源備援供應單元準備進行供電；於電腦系 、、先進入第二(S3)模式後，切換電源供應路徑由電源備援供應單元供 電，以提供記憶體暫存資料所需的電源。 偵測電源供應是碰復正常，若電雜應恢復正常時，則切 換電源供應路徑由正常電源供電；_電源備援供應單元，以對 電源備援供應單元進行充電，_確保電源備援供應單元的供電 能力。 *猎由這種記憶體f源備援彡統，#獅供齡統發生電源中 斷時，透過啟紐祕電_援供應系統，以提供記憶體暫存資 料所需的電源，讓記雜储未完成工狀_，於電源恢復正 1276278 常供應時，使電腦系統透過記憶體中保存的資料，恢復至斷電前 的狀怨，以繼續處理未完成的工作，藉以提高電腦系統可靠度與 穩定度。 有關本發明的特徵與實作，茲配合圖示作最佳實施例詳細說 明如下。 【實施方式】 請參照「第1圖」，係為本發明之系統方塊圖，包含有：電源 偵測單兀10、電源備援控制單元20、電源供應切換單元3〇及電籲 源備援供應單元40。 電源偵測單元1〇，用以偵測電源供應狀態，若電源供應狀態 U中斷(例如’知電或非正常關機等），則產生一電源中斷訊號 (例如不了《罩式中辦指令Non-Maskable Interrupt，NMI)，此時， 電腦系統必須巾斷正在處理巾駐作指令，並執行不可遮罩式中 斷(NMI)指令’此類型的中斷會讓中央處理器單元9〇優先處理， 並蓋過所有工作指令。 | 電源備援控制單元2〇，與電源偵測單元1〇連接，依據電源 中斷减’產生-備份電源控制訊號，以啟動輯備援供應單元 40其中於電源供應正常狀態時，更控制充電迴路(圖中未示)對電· 源備援供應單元40進行充電。 電源供應切換單元3〇，與電源備援控制單元2〇連接，依據. 電源備板控制單το 2G產生的控制訊號，肋切換獅供應迴路為 1276278 電源備援供應迴路，藉以提供記憶體5G暫存㈣所需的電源。 電源備援供應單元4〇，分別與t原備援控制單元20、電源供 應切換單元3G連接，由電源備援控制單元2()的控制訊號觸發啟 動’並透過電源供應切換單元3〇提供記憶體5〇暫存資料所需之 電源’其中電源備援供應單元⑽係為電池，例如，Μ伏特直流 電壓源電池。 另外，於電源供應正常狀態下，電源備援控制單元2〇透過正 系電源對電源備板供應單元40進行充電，以確保電源備援供應單 元40的供電能力。 記憶體5〇，與電源供應切換單元％連接，用以暫存電腦系 統中等待處理的資料’而記憶體5Q可分為暫存(Registercd)與非暫 存(Non-Registered)的類型，另外，記憶體5〇依照存取方式又可分 為唯讀記憶體(Read only Memory，R〇M)及隨機存取記憶體 (Random Access Memory，RAM)。 供電單元60，與電源供應切換單元3〇連接，於正常供電狀 悲下，負責提供記憶體50暫存資料所需的電源(例如，〜3.3伏 特直流電壓源)及電腦系統中其他模組(例，南橋晶片7〇、北橋晶 片80及中央處理器單元90等)所需的工作電源。 南橋(SouthBridge)晶片70，與電源偵測單元10、電源備援控 制單元20連接，用以負責控制電腦系統中週邊介面的訊號傳輸作 業，包含有：工業標準匯流排（Industry Standard Architecture， 1276278 ISA)、整合驅動電子介面(Integrated Device Electronics，IDE)、萬 用序列匯流排(Universal Serial Bus，USB)、週邊控制器介面 (Peripheral Controller Interface，PCI)、低腳數介面(Low Pin Count Interface ’ LPC)及系統管理匯流排(System Management Bus，SM Bus)、鍵盤及滑鼠。 其中南橋晶片70更接收電源偵測單元10產生的電源中斷訊 號，以產生電源管理模式的觸發訊號，藉以使電腦系統進入先進 架構電源介面標準(ACPI)的第三(S3)模式。 北橋(North Bridge)晶片80，與南橋晶片70連接，用以負責 控制電腦系統中幾個主要模組的訊號傳輸作業，包含有：中央處 理為、心隱體、週邊控制器介面（peripheralC〇_llerInterfaee， ?。1)及圖形加速介面(^(^1^(1(}哪脱？〇11，八(}1>)。 中央處理為單元90，與北橋晶片80連接，係為電腦系統中 的核心模組，用以負責各模組的訊號處理作業。 接下來，本發明之電源備援供應係在一種先進架構電源介面BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power backup system, and more particularly to an application in an Advanced Configuration & P〇wer Interface (ACPI) power mode. Memory power backup system. [Prior Art] With the advent of the information processing era, computer systems are widely used in various industries. Generally speaking, in places where communication quality is important, such as telecommunications companies, data centers, banking government agencies, and military units, etc. The high-order servers, blade servers, etc. 'store important information in the computer system. Therefore, the quality of the computer system is very important. For example, if the bank is in the process of paying (4) accounts or transmitting data, In the event of a power outage, the data in these transactions will disappear in an instant, so the (4) unpredictable 'if the power supply situation, the temporary storage of data in the computer system will be used to support the dragon being accessed. Most of the products that will improve the operation of the computer system are temporarily stored in the store. Therefore, in order to make the data in the event of power interruption, retain the data that was not finished at the time. 3, you need to provide electricity _ aid, so that the electric vocational riding has not yet been stationed to complete the lion aid data. The common way is to use continuous power (test __ P〇wer Supply, UPS) system to solve this problem, but the cost of a little job is higher. In addition, ~ know the Republic of China Patent Announcement No. 53%, the patent is a = the power supply system for the standby power system automatically wakes up the appliance in response to the re-power, "including the following steps: - when the power outage occurs, Automatic entry - power saving mode 1276278 modulo 1 from the ^ column to pick up the electricity, bundle, and when the surface is removed, the appliance is made from the power saving chess _ qi, the details of Wei Xian ', machine' Can be exempted from the use of _, _ patent does not target the m part of the memory, the phase _ power backup system architecture. Therefore, how to take advantage of the job, to protect Wei Yicai temporary storage of poor materials, to avoid damage caused by abnormal power supply interruption, and when the power supply returns to normal, 'let the computer system work program return to power failure before The state of the computer system is more reliable than the e譲_stability (staw%), which has become one of the problems to be solved by researchers. SUMMARY OF THE INVENTION In view of the shortcomings of the prior art and the problems that cannot be solved, the present invention proposes a memory-assisted system for memory, which provides the data in the memory storage process through the power supply backup system. The required power supply should restore the reliability of the computer system to the reliability of the computer system when the audio system should return to normal. Therefore, in order to achieve the above objective, the memory power backup system disclosed in the present invention provides backup power to the note when the power source is powered off, to temporarily store the data in the memory, including: the power detection unit and the power supply. Backup control unit, power backup unit and power supply switching unit. The power detecting unit is configured to detect the state of the power supply, and if the power supply state is abnormally interrupted, a power interruption signal is generated. 1276278 The power backup control unit generates a power backup control signal according to the status of the power supply to start the backup power supply and prepare for power supply. The power supply switching unit switches the path of the power supply according to the control signal. A power backup unit for providing backup power to temporarily store data in the memory. Among them, the computer system enters the third (S3) right of the advanced architecture power interface standard (ACH). In this mode, the computer system only retains the data of the memory, so it only needs to supply power to the memory, thus, the backup pro The power supply time can be extended, and when the power supply returns to normal, the lion spare supply unit is charged to ensure the power supply capability of the power backup supply unit. Therefore, in order to achieve the above objective, the power backup system of the computer system disclosed in the present invention comprises: a memory for temporarily storing data waiting to be processed in the computer system. The central processing unit is a core module in the computer system for processing data temporarily stored in the memory. The human chipset is used to control the signal transmission operation in the computer system, and the chipset includes the south bridge wafer and the north bridge wafer. The power supply unit receives the power supply to provide the power required to operate in the computer system'. Power supply debt measurement unit for the state of copper power supply. The power backup control unit, according to the state of the S power supply, generates a control signal for the backup source 1276278. The power supply switching unit switches the power supply path of the power supply according to the control signal. The power backup supply unit is used to provide backup power to temporarily store the data waiting for processing in the memory. In addition, the present invention further discloses a power supply backup supply method for a memory, which includes the following steps: First, detecting a power supply state to determine whether the current power supply is interrupted, and if the power supply is detected to be cut off, the power supply The side unit generates a power interruption signal to the power backup control unit and prepares to perform a backup electrical hybrid program. Next, the computer system is put into the third (S3) mode in the advanced architecture power interface (ACpi) mode, and the power supply supply unit is activated to prepare for power supply; in the computer system, after entering the second (S3) mode, The switching power supply path is powered by the power backup supply unit to provide the power required for the memory to temporarily store the data. The power supply is detected to be normal. If the power supply should return to normal, the switching power supply path is powered by the normal power supply. _ The power backup supply unit is used to charge the power backup supply unit. _ Ensure the power backup supply The power supply capability of the unit. * Hunting is supported by this memory source. When the power supply is interrupted, the lion supply system will provide the power required for the memory to temporarily store the data. Unfinished work _, when the power supply is being restored 1276278, the computer system restores the data stored in the memory to the grievance before the power failure, so as to continue to process the unfinished work, so as to improve the reliability of the computer system. stability. The features and implementations of the present invention are described in detail with reference to the preferred embodiments. [Embodiment] Please refer to "Figure 1", which is a block diagram of the system of the present invention, including: power detection unit 10, power backup control unit 20, power supply switching unit 3, and power supply backup Supply unit 40. The power detecting unit 1 is configured to detect the power supply state. If the power supply state U is interrupted (for example, 'knowing power or abnormal shutdown, etc.), a power interruption signal is generated (for example, the cover type instruction No. Maskable Interrupt (NMI), at this time, the computer system must wipe out the processing instructions and execute the non-maskable interrupt (NMI) command. 'This type of interrupt will cause the central processing unit 9 to prioritize and cover Pass all work orders. The power backup control unit 2〇 is connected to the power detecting unit 1〇, and according to the power interruption minus the “generating-backup power control signal”, the backup backup supply unit 40 is started to control the charging circuit when the power supply is in a normal state. The power supply backup supply unit 40 is charged (not shown). The power supply switching unit 3〇 is connected to the power backup control unit 2〇, according to the control signal generated by the power backup board control unit το 2G, the rib switching lion supply circuit is 1276278 power backup supply circuit, thereby providing memory 5G temporary Save (4) the required power. The power backup supply unit 4 is connected to the original backup control unit 20 and the power supply switching unit 3G, and is triggered by the control signal of the power backup control unit 2 () and provides memory through the power supply switching unit 3 The power supply required for temporary storage of data 'where the power backup supply unit (10) is a battery, for example, a volt-volt DC source battery. In addition, in the normal state of the power supply, the power backup control unit 2 charges the power supply board supply unit 40 through the positive power supply to ensure the power supply capability of the power backup supply unit 40. The memory 5〇 is connected to the power supply switching unit % for temporarily storing data waiting to be processed in the computer system' and the memory 5Q can be classified into a type of temporary storage (Registercd) and a non-registered (Non-Registered) type. The memory 5 can be divided into read only memory (R〇M) and random access memory (RAM) according to the access method. The power supply unit 60 is connected to the power supply switching unit 3〇, and is responsible for providing the power required for temporarily storing the data in the memory 50 (for example, a ~3.3 volt DC voltage source) and other modules in the computer system under the normal power supply ( For example, the south bridge wafer 7 〇, the north bridge wafer 80 and the central processing unit 90, etc.) require the working power. The South Bridge (SouthBridge) chip 70 is connected to the power detecting unit 10 and the power backup control unit 20 for controlling the signal transmission operation of the peripheral interface in the computer system, including: Industry Standard Bus (Industry Standard Architecture, 1276278 ISA) ), integrated drive electronics (IDE), Universal Serial Bus (USB), Peripheral Controller Interface (PCI), Low Pin Count Interface 'LPC ) and System Management Bus (SM Bus), keyboard and mouse. The south bridge chip 70 further receives the power interruption signal generated by the power detecting unit 10 to generate a power management mode trigger signal, so that the computer system enters the third (S3) mode of the Advanced Architecture Power Interface Standard (ACPI). The North Bridge chip 80 is connected to the south bridge chip 70 for controlling the signal transmission operations of several main modules in the computer system, including: central processing, heart-invisible, peripheral controller interface (peripheralC〇_ llerInterfaee, ?. 1) and graphics acceleration interface (^(^1^(1(} which is off? 〇11, 八(}1>). The central processing is unit 90, connected to the Northbridge chip 80, in the computer system The core module is responsible for the signal processing operation of each module. Next, the power backup supply of the present invention is in an advanced architecture power interface.
Intetfaee ’ Acpi)的電源運作模式 下，、對記行供餘序，故以下絲轉構f源介面(Acpi) 的電源運作模式中的休眠(Sleeping)狀態作一說明： 首先’休眠狀態又可分6個層級，依序為第零师莫式至· 五(S5)模式，第零(S〇)模式為正常作 ^ “ ^巾賤&，即未叙休眠狀| ，、、、先中的所有裝置為正常工作狀態。 11 1276278 苇寸在由電細糸統將暫存資料讀取出，其中電腦系統會檢查 暫存資料疋否有更正碼錯誤(ECC Error)的訊息，若暫存資料有錯 。吳枭心則予以刪除，以避免錯誤的記憶體資料導致週邊裝置 錯誤動作。 凊芩照「第2圖」，係為本發明之步驟流程圖，首先，偵測電 源供應狀態(步驟100)，以判斷目前電源供應是否中斷，若债測電 源供應中斷，電賴醇元1G產生賴帽碱給賴備援控制 單7L 20，並準備進行備份電源供應程序。 接下來，使電腦系統進入先進架構電源介面(Acpi)模式下的 第二(S3)模式(步驟1〇1)，並啟動電源備援供應單元4〇準備進行供 電於電腦系統進入第二糊模式後，切換電源供應路徑由電源備 援供應單元40供電(步驟102)，以提供記憶體5〇暫存資料所需的 電源。 偵測電源供應是否恢復正常(步驟！〇3)，若電源供奮随正常 時，則切換電源供應路徑由正常電源供電(步驟1〇4)，即由供電單 兀60供電給記憶體50，並關閉電源備援供應單元，以對電源 備援供應單元⑼進行充電(步驟奶），藉蝴呆電源備援供應單 元40的供電能力。 請麥照「第3圖」’係為本發日狀騎、備缝鮮元之電路示 意圖’包含有：及間開關2卜第—緩衝器22、第二緩衝器^、反、 間開關24、D型正反器25、第一電晶體開闕26及第一電阻幻〜 13Intetfaee 'Acpi''s power operation mode, for the recording of the remaining sequence, so the following wire transfer f source interface (Acpi) power operation mode in the sleep (Sleeping) state to explain: First of all, 'sleep state can be It is divided into 6 levels, which are in the order of the zero division to the fifth (S5) mode, and the zeroth (S〇) mode is normal. ^^^贱&, that is, the unspoken dormancy | , , , , first All the devices in the middle are in normal working condition. 11 1276278 The data is read out by the electric system, and the computer system will check the temporary data if there is any error correction error (ECC Error) message. There is something wrong with the information. Wu Xinxin deletes it to avoid the wrong memory data causing the peripheral device to malfunction. Referring to "2nd picture", it is a flow chart of the steps of the present invention. First, the power supply status is detected (step 100), in order to judge whether the current power supply is interrupted, if the power supply of the debt test is interrupted, the electric alcohol 1G generates a base of 7L 20 and prepares for the backup power supply. Next, the computer system is put into the second (S3) mode in the advanced architecture power interface (Acpi) mode (step 1〇1), and the power backup supply unit 4 is started, ready to supply power to the computer system to enter the second paste mode. Thereafter, the switching power supply path is powered by the power backup supply unit 40 (step 102) to provide the power required for the memory 5 to temporarily store the data. Detect whether the power supply is restored to normal (step! 〇 3). If the power supply is normal, the switching power supply path is powered by the normal power supply (step 1〇4), that is, the power supply unit 60 supplies power to the memory 50. And the power backup supply unit is turned off to charge the power backup supply unit (9) (step milk), and the power supply capability of the power supply supply unit 40 is reserved. Please take a photo of "Photo 3", which is a circuit diagram of a Japanese-style riding and a fresh-sealing element. It includes: and a switch 2 - a buffer 22, a second buffer ^, an anti-interval switch 24 , D-type flip-flop 25, first transistor opening 26 and first resistance illusion ~ 13