TWI270247B - Brushless motor drive device - Google Patents

Abstract

A Hall sensing circuit generates a positional detection signal representative of a positional relationship between a rotor and a phase coil of a motor. A signal synthesizing circuit transforms the positional detection signal to a driving signal. Based on a comparison of the driving signal and a high-frequency reference signal, a pulse signal is generated for controlling a switching circuit to drive the motor. A current error signal modulates by feedback a relative relationship between an amplitude of the drive signal and an amplitude of the high-frequency reference signal, thereby changing a duty cycle of the pulse signal. A duty limiting circuit is provided to limit the duty cycle of the pulse signal for ensuring a reliable rotation of the motor.

Description

1270247 IX. Description of the Invention: [Technical Field] The present invention relates to a motor driving device for driving a brushless motor of a motor driving device. t [Prior Art] Fig. 1(a) shows a circuit block diagram of a conventional brush driver, s #", and a heart motor driving device. Referring to Fig. 1 (a), the motor Μ has a second door and has a Three-phase DC brushless motor with phase coils U, V, and W. The Hall-Sensor Thunder, , , 隹 _ Α劂 circuit 11 is placed around the motor , to detect and detect the rotor position of the horse ' Three position detection signals, HV, and ηW are generated. In response to the position signal measurement signal, π, and hw, L. The circuit 12 generates two driving sine wave signals su, sv, and sw.

Subsequently, the sine wave signal SU s V and the SW input pulse width modulation (PWM) comparison circuit 13 are used to individually compare the high frequency triangular wave signal τ generated by the oscillation circuit 14 independently. Based on the comparison between the driving sine wave signals SU, SV, and sW and the high frequency triangular wave signal, the PWm comparison circuit 13 generates three pulse signals ρ υ , pv , and pw , which are respectively supplied to three pre-driver circuits (Pre_driver) Nb. N2, and N3. In response to the pulse signal PU, the pre-driver circuit N1 generates the switching signals UH and UL. In response to the pulse signal pv, the pre-driver circuit N2 generates switching signals VH and VL. In response to the pulse signal p w , the pre-drive circuit N3 generates switching signals WH and WL. The three-phase switching circuit 15 has switches S1 and S2, switches S3 and S4, 6 1270247 x and switches S5 and S6, which are controlled by switching signals UH and UL, VH and VL, and WH and WL, respectively. When the switch § 丨 forms a short circuit, the motor drive current Im can flow from the drive voltage source vdd into the coil u, and when the switch S2 forms a short circuit, the motor drive current Im can flow from the coil port to the ground $ bit. When the switch S3 forms a short circuit, the motor drives current to flow from the drive private voltage source vdd to the coil v, and when the switch S4 forms a short circuit, the motor motor current Im can flow from the coil v to the ground potential. When the switch s5 forms a short circuit, the motor is driven. The current Im can flow from the driving voltage source Vdd into the coil w. When the field switch S6 forms a short circuit, the motor driving current can flow from the coil to the ground potential. In order to detect the motor drive current Im, the series resistance Rs is set between the common connection point of the switches S2, S4, and S6 and the ground potential. The potential difference caused by the motor drive current 1 flowing through the series resistor Rs is supplied to the inverting input terminal of the error amplifying circuit EA as a negative feedback. The error amplifying circuit ea compares the potential difference of the motor drive current Im with the current command signal 匕 (4) to generate a current error signal Ierr. The signal synthesizing circuit 12 adjusts the amplitude of the sine wave signal, sv, and amplitude according to the current error signal. Figure 1 (bU, the brushless motor drive of the white port; the timing diagram of the operation of the operation. Since the three-phase coils U, v, and w of the motor are operated in a similar waveform, Therefore, in order to simplify the explanation, FIG. 1(b) only shows the waveform timing chart of the coil u associated with the motor 于 during operation. Referring to FIG. 1(b), the sine wave signal su and the high frequency triangular wave signal τ are passed. The pulse signal ρ 产生 is generated after the comparison circuit 13. Specifically, the high level 2 of the pulse signal ρ υ 1270247 corresponds to the driving sine wave signal su is greater than the high frequency triangular wave signal. The lower condition of the pulse signal pu corresponds to the driving chord. The wave signal SU is smaller than the frequency double-wave signal τ. In response to the pulse signal PU, the pre-drive circuit N1 generates switching signals 1111 and UL for respectively controlling the switches S 1 and s 2. In order to adjust the motor drive current Im Equal to the current command signal Icom, the error amplifying circuit EA outputs a current error signal (6) to the signal j circuit 12' for adjusting the amplitude of the driving sine wave signal su. For example, when the motor driving current Im is smaller than the current command signal I(3)m, Current The error signal control signal synthesizing circuit 12 is such that the amplitude k of the drive sine wave signal §1 is large to drive the sine wave signal su'. It can be clearly seen from the figure i(b) that the amplitude-driven sine wave signal su is such that The PWM comparison circuit 13 generates a relatively large pulse signal pu. In response to the relatively large pulse signal PU, the two-phase switching circuit 丨5 increases the motor drive current &amp; to be closer to the current command signal IC0m. In the case where the motor drive current 1m and the current command signal Icom are too large, for example, the motor drive current is almost zero when the motor M is just started, and the signal synthesizing circuit 12 responds to the extremely large current error signal. The Ierr may even generate a drive sine wave signal SU" whose amplitude exceeds the high frequency triangular wave signal T. As a result, the PWM comparison circuit 13 generates a pulse signal PU" having a frequency lower than the 2nd Γ Γ: τ. This low frequency pulse signal k The motor torque is too large, and the motor is not smooth. The low-frequency pulse signal pu, for a long time, continues to be in the -level state or the low level state, resulting in three The switching circuit 15 is maintained for a long time Ϊ 270247 to maintain or not supply the motor drive power 15 , or because the temperature is too high j motor drive current im operation state. Long-time flow Im may burn the motor Μ and the three-phase switching circuit and trigger the protection mechanism to force The operation of the circuit is closed. [Invention] In view of the foregoing problems, the motor drive of the present invention is provided with a brushless %-moving device, which can limit the working ratio of the pulse signal. The purpose is to provide a kind of brushless motor drive to prevent 'low frequency pulse signal generation. One of the purposes of::: Month is to provide a brushless motor to drive the installed energy pulse signal for a long time at a high level According to one aspect of the present invention, the state or the low level is used for a brushless motor driving device, and the port has a working ratio limiting circuit for limiting the working ratio of the pulse signal. Hall 1 m ^ ^ t position (four) signal ' represents the motor between the rotor and the coil. "The tiger synthesis circuit converts the position detection signal into a drive =°. The pulse is generated by comparing the drive signal with the high-frequency reference signal. The second is to control the switching circuit to drive the motor. The current error signal is feedback. The relative relationship between the amplitude and the amplitude of the high-frequency reference signal 'hunting changes the duty ratio of the pulse signal. In the case where the amplitude of the drive signal becomes the amplitude of the over-high-frequency reference signal due to the extremely large current error signal, The limiting circuit ^ is fabricated, and the generated pulse signal still has sufficient frequency and proper working ratio. Therefore, the 'serving ratio limiting circuit ensures that the motor operates reliably: 1270247 effectively prevents the disadvantages caused by the prior art. The work ratio limit circuit has #53⁄4十行包合弟一 comparator and the first half of the state. The brother-one comparator is based on the high-frequency reference brother ~ than the level comparison to produce a positive half-week work limit limit level time system Limit to less than or equal to 彳. 高 高 高 高 唬 唬 唬 高 高 工作 工作 工作 工作 工作 工作 工作 周 周 周 周 周 周 周 周 周 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二The low reference time of the reference nickname and the predetermined squatting is limited to the small punctuality of ^^^ 乂 于 in the negative + week work ratio P 艮 丨丨 。 。 。 。 。 。 较佳 较佳 较佳 较佳 较佳 较佳 较佳 较佳The weekly limit level is set to the maximum value of the slightly smaller multi-test signal. Preferably, *r has only the negative half-cycle limit level of 疋 疋 略 slightly larger than the minimum value of the high-frequency reference signal. The above and other objects, features, and advantages of the present invention will become more apparent from the embodiments of the invention. Circuit block diagram of a brushless motor driving device according to the present invention. See Fig. 2(a) 'Motor Μ is a two-phase DC brushless motor with three-phase coil υ, ν, and w. Hall sensing circuit u The Hall sensing circuit is included as a Hall amplifier. The Hall sensing circuit 11 is disposed on the circumference of the motor to generate three position detecting signals HU, HV, and HW, respectively representing the rotor of the motor and the three Positional relationship between phase coils υ, ν, and w. Position detection signals HU, HV, and Hw Each of them is a sine wave signal, and the same step 27 247 runs on the motor M, and has a phase difference of 120 degrees from each other. In response to the position debt measurement signals HU, HV, and HW, the signal synthesizing circuit 12 generates a drive signal SU. SV, and SW. In one embodiment of the present invention, the driving signals SU, SV, and SW ^ are implemented by phase offsets of the corresponding position detection signals HU, HV, and HW by 3 degrees, so the waveform remains Maintained in the sine wave signal. In another embodiment of the present invention, the 'drive signals SU, sv, and SW are corrected by the corresponding position detection signals HU, HV, and HW by a phase offset of 3Q degrees and superimposed. The chemical number is used to compensate for the 碥 voltage offset caused by the Turn-On Delay, so the waveform becomes a superposition of the sine wave signal and the correction signal. </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; In an embodiment of the present invention, the high frequency reference signal τ is implemented by a single triangular f signal, wherein the amplitude average of each period of the triangular wave signal is consistently coincident with the driving signals su, sv, or sw. The average amplitude of the period. In another embodiment of the present invention, the high frequency reference signal T has: an upper triangular wave signal and a lower triangular wave signal of the same frequency: mutual cc plus "fe', wherein the valley of the upper triangular wave signal substantially corresponds to the The peak of the lower triangular wave signal, and it seems to coincide with the amplitude average of the driving signal I sv: or sw. The superposition of the upper triangular wave signal and the lower two-dimensional wave signal has been disclosed in the US Patent No. 7, 7 This technical document is also incorporated herein by reference. 11 1270247 Referring to Figures 2(a) and 2(b), the drive signals su, sv, and sw are input to the PWM comparison circuit 13 for individually independent of the oscillating circuit 14 The generated frequency reference signal τ is compared. Specifically, the pwM comparison circuit 13 includes two comparators CU, CV, and cW, wherein the non-inverting input terminals are respectively used to receive the driving signals SU, SV, and SW, The inverting input terminal is used to receive the high frequency reference signal τ. Based on the comparison between the driving signal su and the high frequency reference signal τ, the pulse signal pu is generated by the vehicle paying $(3). Based on the driving signal su and the high frequency reference signal. In comparison, the comparator cv generates a pulse signal PV. Based on the comparison between the drive signal and the high frequency reference signal τ, the comparator CW generates a pulse signal pw. The brushless motor drive device according to the present invention is provided with a guard ratio limiting circuit. 16' is used to limit the working ratio of the pulse signals pu, pv, and the cap. The comparator CH is used to compare the high frequency reference signal τ with a predetermined positive half cycle limit level ν Η to generate a positive half cycle guard ratio limit signal ^ The comparison is used to compare the high frequency reference signal T with a predetermined negative half cycle limit level to generate a negative half cycle duty ratio limit signal pL. Subsequently, the pulse signals pu, pv, and p generated by the comparison circuit 13 are generated. ^Into the comparison, to achieve the effect of the ratio of the guard. In one aspect, in order to prevent the pulse, the signal PU, PV, 盥 long time gate n V and PW horse level state continues to be too week work ratio limit (four) PH provides - The longest possible time 'applies to the leveling state. In another PU, PV, fish Pw. In order to prevent the pulse signal -, the low level of the evil lasts too long, the negative half cycle 12 1270247 is the ratio limiting signal p L k for a longest possible time For the low level state. By means of the work 丨, 匕 limit circuit 16, even in the case where the difference between the motor drive current Im and the current command pass τ C〇m is too large, the brushless motor according to the present invention The driving device can still effectively limit the working ratio and frequency of the pulse signals PU, PV, and PW, thus ensuring that the motor operates reliably. , /, body and δ, and logic gate A1 is compared with the pulse signal pu and the positive half cycle. The limit signal PH is AND logic operation, so that the pulse between the fork and the positive half cycle is higher than the limit signal PH. The 0R logic gate 01 is for the pulse signal PU and the negative half cycle system L諕PL The 〇R logic operation is performed such that the low-level time of the pulse signal pu is limited to the negative half-cycle operation of the limit letter 1 &amp; After taking the 0R logic gate 04, the output signal of the AND logic gate A1 and the output signal of the 0R logic gate 01 are combined to obtain the desired working ratio finite pulse signal pud. Because A, the positive half cycle work ratio limit u#u PH effectively limits the duty ratio corresponding to the drive signal su 'half cycle in the pulse signal PUd, and the negative half cycle duty ratio limit signal PL effectively limits the pulse signal PUd Corresponds to the duty ratio of the negative half cycle portion of the drive signal SU. The AND AND logic gate A2 performs an AND logic operation on the pulse signal pv and the positive half cycle duty ratio limit signal PH such that the high pulse timing pv is limited by the positive half cycle guard time than the limit signal pH high level time. The OR logic gate 2 performs a 〇R logic operation on the pulse signal pv and the negative half cycle duty ratio limit signal PL, so that the low level of the pulse signal Pv is between 13 Ϊ 270247 and the negative half cycle is operated. Time is limited. =, (10) Logic Gate 5 combines the AND logic gate output signal with the output signal of (10) Logic Gate 02 = finite pulse signal PVd. Therefore, the 'positive half-cycle work ratio limit signal is called to effectively limit the duty ratio of the pulse signal PVd corresponding to the portion of the drive signal sv, and the checksum is used to limit the signal PL effectively = Ή PVd corresponds to The operation of the negative half-cycle portion of the drive signal sv AND logic gate A3 performs an AND logic operation on the pulse signal pw and the positive half-cycle work PH, so that the high level of the pulse signal PW (% to the positive half cycle work ratio limit signal pH The high level time limit is limited to two? L 1 gate 〇 3 for the pulse signal PW and the negative half cycle work ratio limit WPL 0R logic operation, so that the pulse signal 蹲 low level 日 士 = to negative half cycle work ratio limit signal The low level time limit is limited. "'〇R logic gate 06 will AND logic gate A3 output signal logic gate 03 wheel seven&gt; [古赛έ曰人 recognition i 翰出&lt; The desired duty ratio is the finite pulse signal PWd. Therefore, the positive half cycle duty ratio limit signal print effectively limits the duty ratio of the pulse signal PWd corresponding to the positive portion of the drive signal sw, while the negative half cycle duty ratio limit signal pL is effectively Limit pulse signal P Wd corresponds to the ratio of the negative half-cycle of the drive signal. 1 verbally &gt;, 3⁄4 Figure 2(a) ' :!! is supplied to the two pre-drivers than the finite pulse signals pUd, pVd, and Wd Circuits N丄, N2, and N3. Back to deer 14 1270247

In the pulse signal pud, the present version; A pre-drive circuit N1 generates switching signals UHd and ULd. In response to the pulse signal pVd, the pre-driver circuit generates a switching signal 3 Tiger VHd and VLd. Q /3⁄4 t port should be in pulse ##PWd, pre-drive circuit N3 produces switching U Tiger WHd and WLd. The pre-drive circuits N1, N2, and n3 not only have the ability to drive the strong pulse number, but also include the time delay private path. The switching signals generated by the call are called the team, called and %, and (4) and WLd. Both pairs have non-overlapping waveform features. The one-phase switching circuit 15 has switches S1 and S2, switches S3 盥 S4, and switches 85 and 86, which are respectively switched between the switching signal and the team, the % coil, and the source Vdd and the coil U, and the switch S2 is coupled. Between line U and ground potential. The switching signal UHd is input to the terminal m to control the switch Si, and the switching signal ULd is input to the terminal U2 to control the switch S2. Therefore, when the switch S1 forms a short circuit, the motor sweat can flow from the driving voltage source Vdd into the line &quot; 眛, 杳, 杳, and the switch S2 forms a short circuit, and the driver can flow from the coil to the ground. Potential. The switch S3 =:=source and coil", and the switch S4_ is between the loop V and the ground potential. The switching signal VHd is input to the end &quot; control switch S3' and the switching signal % is input to the end switch good, therefore, when the switch _ Short material, material\control can flow from the driving voltage source Vdd into the coil v, and when the machine m, the motor driving current Im can flow from the coil v to the ground electricity: the opening and the wide road are lightly coupled to the driving voltage source Vdd and the coil w And switch S 6::= 15 1270247 to make Im coil W and ground potential. Cut Shi # 4 said WHd input to the end point W1, control switch S 5, and switch to iron? For L on WLd input To the end point W2, to control the switch S6. Therefore, when the switch swims a field to form a short circuit, the motor drive current can be input from the drive voltage source Vdd η, ^ into the coil w, and when the switch S6 forms a short circuit, the motor is driven The current Im can flow from the coil w to the ground potential. In one embodiment of the invention, each of the switches s丨, S3, s5 is implemented by a PMOS transistor, and each of the switches S2, S4, % is derived from an NMOS. The transistor is implemented. In another embodiment of the invention, each of the switches S1 to S6 has Implemented by NM〇s transistors.

In an embodiment of the present invention, each pair of switches S1 and S2, switch S3 S4, and switches S5 and S6 are correspondingly extracted by each pair of switching signals UHd and ULd, VHd and VLd, and ... The η — Chopping) method performs the modulation operation. The hard-switching modulation operation means that when the upper switch (ie, switches S1, S3, and S5) performs PWM switching between on and 0FF, the lower switch (ie, switches S2, S4, and S6) is at the same time. Conversely, the p WM switching of 〇FF and 〇N is performed. In another embodiment of the present invention, 'each pair of switches S1 and S2, switches S3 and S4, and switches S5 and S6 are soft-ended by each pair of switching signals UHd and ULd, VHd and VLd, and WHd and WLd. Take the (s〇ft Chopping) method to make changes. Soft-tuning modulation operation means. During the positive half cycle of the drive signals SU, SV, and SW, the upper switches S1, S3, and S5 perform PWM switching of 0N and OFF, while the lower switches s2, s4, and S6 are maintained in the 〇FF state, and During the negative half cycle of the drive signals SU, SV, and SW 16 1270247

Medium, upper switch SI n i % ^ ηΐ717 &amp; A S2, S4, and S6 are the PWM switching of the 隹, N, and 〇FF. The operation method of the stone 彳斩 盥敕 铋 or 铋 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Reference. In order to detect the horse's sag, the six-th power hL Im ’ series resistor Rs is placed on the lower side of the switch S2, S4, 盥u + u, and the common connection point of 6 and the ground potential. In another embodiment of the invention, the series resistor Rs is also placed on top:

The common connection point of the switches S1, S3, 盥4 gate soil 1J, and 5 is between the driving voltage source Vdd. = The potential difference caused by the current Im flowing through the series resistor Rs is supplied to the inverting input of the large circuit EA as a negative feedback. The error amplifying circuit EA compares the potential difference between the motor driving current Im and the current command signal to generate a current error signal Ierr. The signal synthesizing circuit 12 adjusts the amplitudes of the drive signals su, Μ, and 依 according to the electric w error 彳 § Ierr. Although the current error signal Ierr is supplied to the L旒 synthesis circuit i2 in the embodiment shown in Fig. 2(a) for feedback adjustment of the amplitudes of the drive signals su, sV, /, the present invention is not limited thereto. As described above, the PWM comparison circuit 13 determines the pulse widths of the pulse signals pu, p V and p w based on the relative relationship between the amplitudes of the drive signals υ, sv, and SW and the amplitude of the reference signal T. Therefore, in another embodiment, the current error signal Ierr is supplied to the oscillating circuit 14 for feedbacking the amplitude of the adjustment reference signal T, thereby achieving the effect of adjusting the amplitude relative relationship. In still another embodiment, the electrical/4 error signal Ierr is supplied to the Hall sensor n for feedback adjustment of the amplitude of the 17 1270247 position debt measurement signals HU, HV, and HW to cause the signal synthesis circuit; The drive letter generated? The technology of tiger su, sv, and the amplitude of the request is indirectly adjusted. The technique for achieving the relative amplitude relative relationship of the amplitude-adjusted relationship has been disclosed in U.S. Patent No. No. 8, which is also incorporated in the specification. Used as a reference. Fig. 2(c) is a waveform timing chart showing the operation of the brushless motor driving apparatus according to the present invention. Since the three-phase coils u, v, and % of the motor M are operated in a similar waveform, "for the sake of simplicity of explanation, only the waveform timing of the coil U associated with the motor M is displayed. Figure. Referring to FIG. 2(c), the positive half cycle limit level is set to be substantially equal to the peak value of the high frequency reference signal T, and is preferably set to be slightly smaller than the peak value, and is supplied to FIG. 2(b). The comparator CH is used to generate a positive half cycle duty ratio limit signal. The negative half cycle limit level % is set to be substantially equal to the wave value of the high frequency reference UT' and is preferably set to be slightly larger than the valley value for supply to the comparator of FIG. 2(b) to generate a negative The half cycle duty ratio limit signal PL 〇 When the amplitude of the drive signal SU is less than the amplitude of the high frequency reference signal τ, the 'operation ratio limit circuit 16 has no practical effect, that is, the generated work is substantially identical to the finite pulse signal Pud. Pulse mark pu. However, when the amplitude of the drive signal su becomes larger as the feedback of the current error signal 〜: becomes larger, so that the drive signal SU" whose amplitude exceeds the high-frequency reference signal T is formed, the PWM comparison circuit 13 generates a low-frequency pulse signal. PU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, The quasi-time limit (for example, is achieved by the AND logic gate A1 of Fig. 2(b)), and its low level time is limited by the negative half cycle of the lower limit level than the limit signal PL (example = by Fig. 2 (8) OR logic idle 01 is achieved. As a result, the low frequency pulse ^PU" is adjusted to be converted into the working ratio finite pulse signal pUd", having the same frequency as the high frequency reference signal T and the appropriate working ratio, by d to ensure: The present invention has been described with reference to the preferred embodiments. It should be understood that the invention is not limited to the disclosed embodiments. Instead, the invention is intended to cover For those skilled in the art, there are obvious modifications and similar configurations. Therefore, the scope of the patent application for W &quot; A τ month should be based on the interpretation of the wide-ranging to accommodate all such modifications and similar configurations. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1(4) shows a circuit diagram of a conventional brushless motor driving device. FIG. 1(8) shows a conventional brushless motor θ. When the waveform is known, FIG. 2(4) shows a brushless motor driving device according to the present invention. Figure 2(b) shows a detailed circuit diagram according to the present invention. An example of the operation ratio limiting circuit is shown in Figure 2. (C) shows the waveform timing of the brushless motor 19 1270247 according to the present invention. Fig. [Description of main component symbols] 11 Hall sensing circuit 12 Signal synthesizing circuit 13 PWM comparison circuit 14 Oscillation circuit 15 Two-phase switching circuit 16 Operation ratio limiting circuit A1 ^ -A3 AND Logic gate 01 -06 OR logic gate CU , CV, CW, CH, CL Comparator D1~D6 Diode EA Error Amplifier Μ Brushless Motor Ν1~Ν3 Pre-Driver Circuit

Rs series resistor S1 ~ S6 switch U, V, W three-phase coil

Ul, U2, VI, V2, Wl, W2 Switch control terminal HU, HV, HW Position detection signal PH Positive half cycle work ratio limit signal PL Negative half cycle work ratio limit signal PU, PV, PW, PU, PU Pulse signal 20 1270247 PUd? PVd? PWd Working ratio finite pulse signal su, sv, sw, su,, su" Synthetic signal T High frequency reference signal UH, UL, VH, VL, WH, WL Switching signal UHd? ULd? VHd ? VLd5 WHd? WLd work ratio limited switching signal

Ierr current error signal

Icom current command signal

Im motor drive current

Vdd drive voltage source VH positive half cycle limit level VL negative half cycle limit level

Vo amplitude average

twenty one

Claims (1)

1270247 X. Patent Application Range·· 1 · A brushless motor driving device, comprising: comparing a driving signal with a reference signal to generate a pulse 彳1 2, wherein the driving signal is associated with a The brushless motor is operated and the frequency of the reference is greater than the frequency of the driving signal; the switching circuit is consuming between a driving voltage source and the brushless motor, and is controlled by the pulse signal to drive the brushless motor; The shock is used to adjust the relative relationship between the amplitude of the drive signal and the amplitude of the reference signal according to a current error signal, the current error signal representing a difference between a current command signal and a motor drive current; The working ratio limiting circuit is used to limit the working ratio of the pulse signal. 2. The brushless motor driving device of claim 2, wherein: the driving signal is a sine wave signal. 3. The brushless motor driving device of claim 2, wherein: the driving signal is superimposed with a correction signal for compensating for the conduction delay. The brushless motor driving device of claim 1, wherein: the reference signal is a triangular wave signal, wherein an average amplitude of the amplitude of the triangular wave signal substantially coincides with an average value of the amplitude of the driving signal. 1270247 5. The brushless motor driving device of claim 1, wherein: the reference signal is formed by an upper triangular wave signal and a lower triangular wave signal, wherein a valley of the upper triangular wave signal substantially corresponds to the valley The peak of the lower triangular wave signal and substantially coincides with the amplitude average of the drive signal. 6. The brushless motor driving device of the patent application scope includes: - a Hall sensing circuit for generating a position detecting signal, representing a positional relationship between the rotor and the coil of the brushless motor, and - And a synthesizing circuit for generating the driving signal in response to the position detecting signal. 7. For the brushless motor drive unit of patent application No. 6, in the basin: The current error signal is supplied to the Talker _ sensing circuit for adjusting the amplitude of the edge position detection signal. 8. The brushless motor drive split of claim 6 wherein: the current error signal is supplied to an amplitude of the combined signal. Forming a circuit for adjusting the drive I such as ==1 (the brushless device) wherein: the intermediate switch and the upper switch are coupled to the drive voltage source and the brushless motor 23 1270247 lower switch, which is integrated Between the brushless motor and a ground potential, wherein: when the upper switch is switched between ON and OFF according to the pulse signal, the lower side switch is switched OFF and ON according to the pulse signal. 10. The brushless motor driving device of claim 1, wherein: the switching circuit comprises: an intermediate switch, and an upper switch is coupled between the driving voltage source and the brushless motor, wherein: the lower switch, the surface When the upper side switch is turned ON and 0FF according to the pulse signal, the lower side switch is maintained at 〇F, and the pulse signal is switched between (10) and 0FF in the OFF state. According to the Μ AT7T7 mountain hair on the 1 open relationship to maintain 11 · as claimed in the scope of the first item I, brush motor drive installed the work ratio limit circuit contains: where: a device for generating a positive half cycle and The ratio limit signal is used by the device to generate a negative half cycle duty ratio limit signal. 12. For the scope of patent application 、..., brush motor drive, wherein: 24 1270247 This work includes more than the limit circuit: ^ a device to prevent the high level of the pulse signal from being greater than the positive half cycle ratio Limiting the high level timing of the signal, and, a means for preventing the low level time of the pulse signal from being greater than the low level time of the negative half cycle duty ratio limiting signal. 13. The brushless motor driving device of claim 5, wherein: the current error signal is used to adjust the amplitude of the driving signal. 7. 14. As claimed in the patent scope! The brushless motor driving device, wherein: &quot;Hai current error signal is used to adjust the amplitude of the reference signal. 1 5 · A brushless motor driving device, comprising: a rutting circuit for comparing a driving signal with a reference signal to generate a pulse signal, wherein the driving signal is associated with the operation of a brushless motor and 4 reference The frequency of the signal is greater than the frequency of the driving signal; the switching circuit is coupled between a driving voltage source and the brushless motor, and is controlled by the pulse signal to drive the brushless motor; and a device for using a current error signal And adjusting the relative relationship between the amplitude of the driving signal and the amplitude of the reference signal, the current error signal representing a difference between a current command signal and a motor driving current; and a limiting circuit for preventing the frequency of the pulse signal This frequency is lower than the reference k number. 25 1270247 16. Drive unit, #中装置, used to generate a positive-period-limit signal, and a device to generate a signal for the weekly limit. The driving device, wherein: 17· the brushless motor of claim 16 is further included: the device is configured to prevent the pulse from being used as the original&gt; The high level timing of the weekly limit signal, and the device, use r to prevent the low level of the pulse signal from limiting the low level of the signal to the negative half cycle. 18) The brushless motor driving device of claim 15 further includes: - a Hall sensing circuit for generating a position detecting signal representing a positional relationship between the rotor and the coil of the brushless motor, And driving a synthesis circuit for generating the dynamic signal in response to the position detection signal. 19. The brushless motor driving device of claim 18, wherein: the current error signal is supplied to the Hall sensing circuit for adjusting an amplitude of the position detecting signal. I 26 1270247. The brushless motor driving device of claim 18, wherein: the current error signal is supplied to the synthesizing circuit for adjusting an amplitude of the driving signal. 27