1269231 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種減少開機時間的方 關於一種可延伸式韌體介面之架構下減少 法。 【先前技術】 電腦系統中具有一韌體，一般熟知的是 (BIOS ， Basic Input/Output System)，其 而來的，並且是存放於唯讀記憶體（ROM，Re 上面的一段程式，其中包含了許多電腦輸 式。而在電腦電源開啟之後，會先執行基 進行初值設定及開機自我測試（即P 〇 S T ’ Test)，並且，讀取互補式金屬氧化物半_ Complementary Metal-Oxide Sem i conduct 憶體大小、是否有軟碟機及硬碟機、系統 由於電腦科技進步相當快速，隨著電腦 的基本輸出入系統（LegacyBIOS)也發展3 為了克服傳統的基本輸出入系統在發展上 公司（Intel Corporation)已發展出一種$ 面（即 EFI ， Extensible Firmware Inte] 可免除基本輸出入系統的先天限制。而且 韌體介面容許使用標準的程式語言工具加 更佳的擴充性，並且其係以C語言編寫， 閱讀等優點。 326\專利說明書(補件)\94-08\TF944519 5 法，且特別是有 開機時間的方 基本輸出入系統 是伴隨電腦主機 ad Only Memory) 出入的基本副程 本輸出入系統以 Power-on Self ^ 體（CMOS ， o r )中的資料（記 時間等資訊）。 系統發展之傳統 4達極限。因此， 的瓶頸，英特爾 「延伸式韌體介 r f a c e )之規格， ，此種可延伸式 入新元件，具有 程式容易維護、 1269231 電腦在開啟電源後，CPU(Central Processing Unit， 中央處理單元）會從儲存在唯讀記憶體（例如FLASHPART) 中之可延伸式韌體介面讀取所需要的驅動程式來進行自我 測試及輸出入介面搜尋、設定等工作，因此可延伸式韌體 介面在發展的階段中，要確認所發展的可延伸式韌體介面 可以正常的動作。1269231 IX. Description of the Invention: [Technical Field] The present invention relates to a reduction method for an extendable firmware interface. [Prior Art] A computer system has a firmware, which is generally known as (BIOS, Basic Input/Output System), and is a program stored in a read-only memory (ROM, Re, which contains A lot of computer transmissions. After the computer is turned on, the base is initialized and the self-test is started (ie, P 〇 ST ' Test), and the complementary metal oxide half is read _ Complementary Metal-Oxide Sem i conduct Recalling the size of the body, whether there is a floppy disk drive and a hard disk drive, the system is progressing quite fast due to computer technology, and the basic output system (LegacyBIOS) of the computer is also developed. 3 In order to overcome the traditional basic input and output system, the company is developing. (Intel Corporation) has developed a face-to-face (ie EFI, Extensible Firmware Inte) that eliminates the innate limitations of basic input and output systems, and the firmware interface allows for the use of standard programming language tools plus better scalability, and C language writing, reading and other advantages. 326 \ patent specification (supplement) \94-08 \ TF944519 5 law, and especially have boot time The basic input and output system is the basic sub-process that is connected to the system with the Ad Host's access code. The data in the Power-on Self (CMOS, or ) is recorded in the system (time and other information). Therefore, the bottleneck, the specification of Intel's "extension firmware", this extension can be extended into new components, with easy program maintenance, 1269231 computer after turning on the power, CPU (Central Processing Unit) The extended driver interface is being developed by reading the required drivers from the extensible firmware interface stored in the read-only memory (for example, FLASHPART) for self-testing and import-input interface search and setting. In the stage, it is necessary to confirm that the developed extendable firmware interface can perform normal operations.
電腦系統應用於可延伸式韌體介面的架構下時，在開機 程序之階段，電腦系統會先執行PEI (Pre-EF I Initialization)階段的各個 PEIM(PEI Module)，以對電 腦系統較主要的架構如記憶體、匯流排及系統時脈（C 1 〇 c k ) 等進行初始化設定，接著，電腦系統會執行D X E ( D r i v e r Execution Environment) P皆段的各個驅動程式（Driver)， 以對電腦系統的其他架構如週邊介面等進行初始化設定。 由於電腦系統在開機的程序中需要分派（D i s p a t c h )數十個 甚至百個P E I M及驅動程式，都會影響到並增加電腦系統開 機時間，例如可延伸式韌體介面的Ρ Ε I Μ為各自獨立的狀 態，執行時將由Ρ Ε I核心（Ρ Ε I C 〇 r e )個別分派。個別獨立 分開的Ρ Ε I Μ之分派次數會較多，而且整體程式容量會較 大，徒增使用者等待使用電腦的開機時間。 【發明内容】 如上所述，本發明之目的在於提供一種可延伸式韌體介 面之架構下減少開機時間的方法，係在程式開發的階段， 對Ρ Ε I階段的各個Ρ Ε I Μ進行模擬，以找到Ρ Ε I Μ的組合方 式，在依照可延伸式韌體介面之架構下，不改變原有流程， 6 326\專利說明書(補件)\94-08\TF944519 1269231 可減少P E I階段的分派次數，以達到減少電腦系統的開機 時間與程式大小之目的。 本發明在於提供一種可延伸式韌體介面之架構下減少 開機時間的方法，係在程式開發的階段，模擬執行該可延 . 伸式韌體介面之複數個開機程式，該方法包含下列步驟： 首先，依序讀取目前所要執行的開機程式之相依資料；接 著，判斷目前所要執行的開機程式之相依資料是否僅相依 一個另一開機程式；其次，當目前所要執行的開機程式之 » 相依資料僅相依一個另一開機程式時，則在對應該相依資 料中得知目前所要執行的開機程式所相依之另一開機程 式；以及，將目前要執行的開機程式合併在所相依之另一 開機程式之後。 本發明在於提供一種電腦可讀取之記錄媒體，係用於具 有一可延伸式韌體介面之電腦系統，在程式開發的階段， 模擬執行該可延伸式韌體介面之複數個開機程式，該電腦 I 可讀取之記錄媒體可使電腦執行下列步驟：首先，依序讀 取目前所要執行的開機程式之相依資料；接著，判斷目前 所要執行的開機程式之相依資料是否僅相依一個另一開機 程式；其次，當目前所要執行的開機程式之相依資料僅相 依一個另一開機程式時，則在對應該相依資料中得知目前 所要執行的開機程式所相依之另一開機程式；以及，將目 前所要執行的開機程式合併在所相依之另一開機程式之 後。 本發明之其他目的及優點將由隨後之詳細說明及隨附 7 326\專利說明書(補件)\94-08\TF944519 1269231 之申請專利範圍當可更加明白。 【實施方式】When the computer system is applied to the architecture of the extendable firmware interface, in the booting process, the computer system will first perform the PEI (PEI Module) in the PEI (Pre-EF I Initialization) phase, which is mainly for the computer system. The architecture, such as memory, bus and system clock (C 1 〇 ck ), is initialized. Then, the computer system executes the DXE (D river Execution Environment) P driver, which is used to the computer system. Other architectures such as the peripheral interface are initialized. Since the computer system needs to dispatch (D ispatch) dozens or even hundreds of PEIMs and drivers in the boot process, it will affect and increase the boot time of the computer system. For example, the extended firmware interface is independent. The status will be assigned individually by Ρ Ε I core (Ρ Ε IC 〇re ). Individually separate Ρ Μ I Μ will be dispatched more frequently, and the overall program capacity will be larger, increasing the user's waiting time for using the computer. SUMMARY OF THE INVENTION As described above, an object of the present invention is to provide a method for reducing the boot time under the architecture of an extendable firmware interface, which simulates each Ρ Ε I Ρ of the Ε Ε I stage during the program development phase. In order to find the combination of Ρ Ε I ,, under the framework of the extendable firmware interface, the original process is not changed, 6 326\patent specification (supplement)\94-08\TF944519 1269231 can reduce the PEI stage The number of dispatches is used to reduce the boot time and program size of the computer system. The present invention provides a method for reducing boot time under the architecture of an extendable firmware interface. In the stage of program development, a plurality of boot programs for executing the extendable firmware interface are simulated. The method includes the following steps: First, the dependent data of the boot program currently to be executed is sequentially read; then, it is determined whether the dependent data of the boot program to be executed currently depends on only one other boot program; secondly, when the currently executed boot program » dependent data When only one booting program is used, the other booting program that depends on the booting program currently being executed depends on the dependent data; and the booting program to be executed is merged into another dependent booting program. after that. The present invention provides a computer readable recording medium for a computer system having an extendable firmware interface, and simulates a plurality of boot programs for executing the extendable firmware interface during a program development phase. The computer I readable recording medium can cause the computer to perform the following steps: First, sequentially read the dependent data of the currently executed boot program; and then, determine whether the dependent data of the currently executed boot program is only dependent on one another. Program; secondly, when the dependent data of the boot program to be executed currently depends on only one other boot program, another boot program that depends on the boot program currently being executed depends on the corresponding data; and, The boot program to be executed is merged after another boot program that depends on it. Other objects and advantages of the present invention will become apparent from the following detailed description and the claims of the appended <RTIgt; </RTI> <RTIgt; </ RTI> </ RTI> <RTIgt; [Embodiment]
為了使電腦的開機時間縮短，可延伸式韌體介面可在程 式開發階段，在模擬執行PE I階段之各個PE I Μ及DXE階段 的各個驅動程式時，例如模擬執行Ρ Ε I Μ，找出彼此間有相 關聯或相依（Dependency)的ΡΕΙΜ而將其合併，可於日後燒 錄在電腦系統的記憶體中，以執行可延伸式韌體介面架構 下的開機程序。以下將詳明描述本發明之方法流程。 PEIM可經由一介面向另一 PEIM求助，該介面為PPI (PEIM to PEIM Interface)，該介面是由 GUID(Globally Unique Identifier)來命名的。PPI係定義為包含函數、 資料或二者的組合等結構。Ρ Ε I Μ必須記錄具有PE I核心 (Ρ Ε I C ο I* e )之其Ρ Ρ I，Ρ Ε I核心管理已記錄之Ρ Ρ I的資料 庫，一 Ρ Ε I Μ欲使用一指定的Ρ Ρ I則可以詢問Ρ Ε I核心以找 到所需要的介面。ΡΡΙ具有兩種類型：（1)服務（Service) 及（2)通知（Notification)，PPI服務乃允許一 PEIM提供 函數或資料以作為另一 PEIM的使用，PPI通知在另一 ρρι 記錄於Ρ Ε I核心時乃允許一 ρ Ε I Μ作為呼叫返回（C a 1 1 B a c k) 之記錄。 如圖1為本發明合併PE I Μ之流程圖所示，本發明係在 程式開發的階段，模擬執行該可延伸式韌體介面之複數個 PEIM，為了方便說明下述的流程，將以系統匯流排（SmBus) 之PEIM以及時脈產生器（ciockGenerator)之PEIM為例。 首先，依序讀取到目前所要執行的時脈產生器之P E丨M， 8 326\專利說明書(補件)\94-〇8\TF944519 1269231 在執行該PE I Μ時，會讀取其本身所記錄是否與其他PE I Μ 有相依關係之一相依資料（步驟S 1 Ο )。若目前執行之ρ Ε I Μ 與其他的Ρ Ε I Μ並無相依的關係，則在目前執行之Ρ Ε I Μ係 無相依式的資料；若目前執行之PE I Μ與其他的PE I Μ有相 依的關係，依據目前執行之Ρ Ε I Μ相依幾個其他之Ρ Ε I Μ， 則會讀取到同樣數目的G U I D，再依據該些G U I D可找到同 樣數目的PPI，而從這些ppi内的函數或資料可得知相依 的 PE I Μ 〇 接著，判斷目前所執行的時脈產生器之Ρ Ε I Μ之相依式 是否僅相依一個Ρ Ε I Μ (步驟S 1 2 )。由於時脈產生器必須經 由系統匯流排來執行硬體指令，所以時脈產生器之Ρ Ε I Μ 的相依式只有一個PEI_SMBUS_PPI_GUID，再根據 PEI_SMBUS—PPI一GUID 找到 PEI—SMBUS—PPI，由 PEI_SMBUS_PPI的函數或資料得知其為系統匯流排之PEIM 所產生的，所以時脈產生器之Ρ Ε I Μ僅相依系統匯流排之 ΡΕΙΜ(步驟S14)，而無再相依於其他的ΡΕΙΜ。 因為時脈產生器之Ρ Ε I Μ僅相依系統匯流排之ρ £ I μ，可 利用可延伸式韌體介面用以合併Ρ Ε I Μ之 EFI一PEIM — ENTRY一POINT 函數（function)來將時脈產生器 之？£1%的£?1一？£1肘_^『1^_?01时函數加在系統匯流排之 PEIM 的 EFI—PEIM —ENTRY-POINT 函數之結尾（步驟 S16)。經 組合之時脈產生器之ρ Ε I Μ及系統匯流排之ρ £ I μ ,可減少 在Ρ Ε I階段中二者的分派次數，以達到減少電腦系統的開 機時間與程式大小。 9 326\專利說明書(補件)\94-08\TF944519In order to shorten the boot time of the computer, the extendable firmware interface can be found in the program development stage when simulating the various PE I and DXE stages of the PE I stage, such as the simulation execution Ε Μ I Μ They are merged with each other and associated with each other, and can be burned in the memory of the computer system in the future to execute the boot process under the extensible firmware interface architecture. The method flow of the present invention will be described in detail below. PEIM can be turned to another PEIM for help. The interface is PPI (PEIM to PEIM Interface), which is named by GUID (Globally Unique Identifier). PPI is defined as a structure containing functions, data, or a combination of both. Ρ Ε I 记录 must record the database with the PE I core (Ρ Ε IC ο I* e ), Ρ Ε I core management records Ρ Ρ I, one Ε I Μ want to use a specified Ρ Ρ I can ask Ρ Ε I core to find the interface you need. There are two types: (1) Service and (2) Notification. The PPI service allows a PEIM to provide functions or materials for use as another PEIM. PPI notifications are recorded in another ρρι The I core allows a ρ Ε I Μ to be recorded as a call return (C a 1 1 B ack). 1 is a flow chart of a combined PE I 为本 according to the present invention. The present invention simulates a plurality of PEIMs executing the extensible firmware interface at the stage of program development, and the system will be described in order to facilitate the description of the following process. Take the PEIM of the bus (SmBus) and the PEIM of the clock generator (ciockGenerator) as an example. First, the PE 丨M of the current clock generator to be executed is sequentially read, 8 326\patent specification (supplement)\94-〇8\TF944519 1269231, when the PE I 执行 is executed, it reads itself Whether the data is dependent on one of the other PE I Μ dependencies (step S 1 Ο ). If the currently implemented ρ Ε I Μ has no relationship with other Ρ Ε I ,, then there is no dependent data in the current implementation ; I ;; if the currently implemented PE I Μ and other PE I Μ Dependent relationship, according to the current implementation Ε I Μ depends on several other Ε I Μ, will read the same number of GUID, and then according to the GUID can find the same number of PPI, and from these ppi The function or data can be used to know the dependent PE I Μ 〇 , , , , , , 判断 判断 判断 判断 判断 判断 判断 判断 判断 判断 。 。 。 。 。 。 。 。 。 。 。 。 。 。 Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Since the clock generator must execute the hardware command via the system bus, the dependency of the clock generator Ε I 只有 is only one PEI_SMBUS_PPI_GUID, and then the PEI_SMBUS_PPI is found according to the PEI_SMBUS_PPI-GUID, and the PEI_SMBUS_PPI is obtained by the PEI_SMBUS_PPI The function or data knows that it is generated by the PEIM of the system bus, so the clock generator Ε I Μ only depends on the system bus (step S14), and no longer depends on other ports. Because the clock generator Ε I Μ only depends on the system bus ρ £ I μ, the extendable firmware interface can be used to combine the FI Ε I Μ EFI-PEIM — ENTRY POINT function (function) Clock generator? £1% £1? The £1 elbow_^"1^_?01 time function is added to the end of the EFI_PEIM_ENTRY-POINT function of the PEIM of the system bus (step S16). The combined clock generator ρ Ε I Μ and the system bus ρ £ I μ can reduce the number of dispatches in the Ρ Ε I phase to reduce the computer system's turn-on time and program size. 9 326\Patent specification (supplement)\94-08\TF944519
1269231 當目前所要執行的PEIM之相依式不是僅相依一個 P E I Μ，或者將如時脈產生器之P E I Μ合併在系統匯流4 PE I Μ之後（步驟S 1 6 )時，則判斷是否已執行每一 PE I Μ 取其相依式結束（步驟S 1 8 )，當未執行每一 Ρ Ε I Μ並讀 相依式結束時，則將下一個所要執行的Ρ Ε I Μ指定為目 要執行的ΡΕΙΜ(步驟S20)，並回到步驟S10;當已執 一 Ρ Ε I Μ並讀取其相依式結束時，則結束所有流程。 本發明之優點係在程式開發的階段，對Ρ Ε I階段的 Ρ Ε I Μ進行模擬，以找到Ρ Ε I Μ的組合方式，在依照可 式韌體介面之架榛下，不改變原有流程，可減少Ρ Ε I 的分派次數，以達到減少電腦系統的開機時間與程式 之目的。 本發明可在不離開本發明之精神及基本特徵下作成 種特定之例示。本發明之範圍為由隨附之申請專利範 限定，而並非由上述說明所限制，所有與申請專利範 義相等之#化均應包含於本發明中。 【圖式簡單說明】 圖1為本發明合併Ρ Ε I Μ之流程圖。 326\專利說明書(補件)\94-08\TF944519 10 之 並讀 取其 前所 f每 各個 έ伸 階段 大小 各 圍所 圍意1269231 When the correlation of PEIM currently to be executed is not dependent on only one PEI, or after the PEI of the clock generator is merged into the system convergence 4 PE I ( (step S 16 6), it is judged whether each execution has been performed. A PE I 结束 takes its dependent end (step S 18), and when each Ε Μ I 未 is not executed and the read dependent end ends, the next Ρ Ε I 要 to be executed is designated as the target execution ΡΕΙΜ (Step S20), and returning to Step S10; when one Ε Μ I 已 has been executed and the dependent expression is finished, all the processes are ended. The advantage of the present invention is that at the stage of program development, the Ρ Ε I Μ of the Ε Ε I stage is simulated to find the combination of Ρ Ε I ,, and the original interface does not change under the framework of the configurable firmware interface. The process can reduce the number of dispatches of Ρ Ε I to reduce the boot time and program of the computer system. The invention may be embodied in a specific form without departing from the spirit and scope of the invention. The scope of the present invention is defined by the accompanying claims, and is not limited by the above description, and all equivalents to the patent application are included in the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a flow chart showing a combination of the present invention. 326\patent specification (supplement)\94-08\TF944519 10 and read the f, each of the various stages of expansion, the size of each enclosure