1268050 16987twf.doc/y 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種自動增益控制之方法與裝置，且 特別是有關於一種用於脈波訊號之自動增益控制的方法與 裝置。 卜、 【先前技術】 眾所皆知的，自動增益控制能夠在輸入訊號變動的情 況下，而維持固定的輸出訊號功率。由於在電子系統中， 輸入訊號很容易隨著溫度或環境而改變，因此就需要自動 增益控制的技術，使得輸出訊號的功率維持一定。 一般來說，自動增益控制的技術常常使用在通訊系統 中，用來5周整射頻成號轉為中頻訊號，例如美國專利第 5339454號專利。然而，習知的自動增益控制電路或方法， 都疋應用在連續訊號的領域而設計。而目前為脈波(pulse) 訊號而設計的自動增益控制電路或技術卻非常稀少。 【發明内容】 因此，本發明的目的就是在提供一種脈波訊號自動增 益控制之裝置與方法，可以在輸入脈波訊號變動的情況 下，使輸出訊號的功率能夠維持在一定的位準。 本發明提供一種脈波訊號自動增益控制之裝置，用來 接收一輸入脈波訊號而產生一輸出脈波訊號。本發明包括 了數位可變哀減器、方向搞合摘測器、比較模組和處理單 元。其中，數位可變衰減器會接收輸入脈波訊號，並且依 據一N位元控制訊號而將輸入脈波訊號進行衰減再送至方 6 1268050 16987twf.doc/y 向麵合债測|§，而N為正整數。當方向輕合债測器接收到 數位可變衰減器的輸出之後，會產生輸出脈波訊號和一偵 測電壓。比較模組會接收此偵测電壓，並且將其與一第一 參考電壓和-第二參考電壓分別進行比較，並輸出一比較 結果。而處理單元就是依據此比較結果而產生^^位元控制 訊號至數位可變衰減器，以控制輸入脈波訊號的衰減量。 在本發明的實施例中，第一參考電壓係大於第二參考 電壓，而比較模組則包括了第一放大器和第二放大器。其 中，第一放大器是用來比較偵測電壓與第一參考電壓。當 债測電壓大於弟一參考電壓時，則第一放大器會產生邏輯 1之輸出。反之，當债測電壓小於第一參考電壓時，則第 一放大器會產生邏輯〇之輸出。另外，第二放大器是用來 比較偵測電壓與第二參考電壓。當偵測電壓大於第二來考 電壓時，第二放大器會產生邏輯〇之輸出。反之，當偵測 電壓小於第二參考電壓時，則第二放大器就會產生邏輯i 之輸出。 此外，處理單元具有一計數器，用來產生一計數值當 作N位元控制訊號。當第一放大器產生邏輯1的輸出時， 計數器會向上計數計數值，以使數位可變衰減器增加輸入 脈波訊號的哀減置。當第二放大器產生邏輯1之輸出時， 則計數器會向下計數計數值，以使數位可變衰減器減少輸 入脈波訊號的衰減量。而當第一放大器和第二放大器都產 生邏輯0之輸出時，則計數器會維持目前之計數值，使數 位可變衰減器維持對輸入脈波訊號的衰減量。 1268050 16987twf.doc/y 從另一觀點來看，本發明提供一種波訊號自動增益控 制之方法，適於控制一輸入脈波訊號而產生一輸出脈波訊 號。本發明包括產生一前脈波訊號在輸入脈波訊號之前， 並且轉換前脈波訊號為一偵測電壓。接著，比較偵測電壓、 一第一參考電壓和一第二參考電壓之間的關係，並且產生 一 N位元控制訊號，其中N為正整數。然後依據N位元 控制訊號來決定輸入脈波訊號的衰減量，以使輸出脈波訊 號的功率維持固定。 在本發明的實施例中，決定輸入脈波訊號之衰減量的 步驟，包括了判斷偵測電壓是否大於第一參考電壓。當偵 測電壓大於第一參考電壓時，則向上計數一計數值來調整 N位元控制訊號，以增加輸入脈波訊號的衰減量。若是偵 測電壓小於第一參考電壓時，則判斷偵測電壓是否小於第 二參考電壓。而當偵測電壓小於第二參考電壓時，則向下 計數計數值來調整N位元控制訊號，以減少輸入脈波訊號 的衰減量。而若是偵測電壓小於第一參考電壓且大於第二 參考電壓時，則維持目前對輸入脈波訊號的衰減量。 由於本發明會在輸入脈波訊號之前會產生一前脈波訊 號，而處理單元會依據前脈波訊號所轉換成的偵測電壓與 第一參考電壓和第二參考電壓比較的結果，來調整]^位元 控制訊號以控制數位可變衰減器對輸入脈波訊號的衰減 4。因此，本發明就能夠使輸出脈波訊號的功率維持一定， 而不受輸入脈波訊號變動的影響。 為讓本發明之上述和其他目的、特徵和優點能更明顯 1268050 16987twf.d〇c/y 易懂’下文特舉較佳實_，並配合所_式，作詳細說 明如下。 ββ 【實施方式】 圖1緣示了依照本發明之—較佳實施例的—種脈波訊 號自動增益控制之裝置的電路方塊圖。請參照圖丨，本發 ，括了數位可變衰減器⑻、方向轉合偵測器1〇3、“ 杈組105和處理單元107。其中，數位可變衰減器ι〇ι會 接收輪入脈波訊號Si，並且將其輸出送至方向耦^偵測^ 1 曰03。其中’輸入脈波訊號Si可以為無載波的脈波訊號或 疋有載波的脈波訊號。而在本實施例中，數位可變衰減器 101的輸出還可以透過放大器109而送至方向搞合偵測= 103。而放大器105可以利用單一的放大元件， 放大級所組成的電路來實現。 一 另外，方向耦合偵測器1〇3的輸出係耦接至比較模組 105。而比較模組1〇5可以產生2位元的輸出至處理單元 107,以致於處理單元107會依據比較模組1〇5的輸出而產 生N位元控制訊號至數位可變衰減器，其中n為正整 數。 ”、 圖2繪示了依照本發明之一較佳實施例的一種訊號時 序圖。請合併參照圖1和圖2，在本發明中，在輸入脈波 訊號Si的主脈波訊號201之前，會在ti時，產生例如2〇3 的前脈波訊號。當前脈波訊號203被送至數位可變衰減器 101後，數位可變衰減器101可以依據預設衰減值而將前 脈波訊號203進行衰減。接著，放大器109會將數位可變 1268050 16987twf.doc/y 脈波訊號Si的衰減量。 、田比較口口 111產生邏輯！的輸出到處理單元而時， 、det大於參考電壓（灿，也就是說，輸 出喊訊號S。的功率可能大於所需要的範圍。因此，計 朝向增加數位可變衰減器ι〇ι對輸入時脈訊 m 趨勢計數’並且產生對應的計數值當作Ν 控3fl#U ’以控制該數位可變衰減H 1G1。而當計數器 至處理單元ig7時，則代表輸出時 二的功率可能小於所需要的範圍。因此計數器⑵ 2 = 數位可變衰減器101對輸入時脈訊號Si之衰 '里、H並且產生對應的計數值當作N位元控訊 是比較器U1和113都產生邏輯G的輸出，則表 ^出㈣賴SG的功枝在需要的預設範圍内，因此 1„121不會動作’以維持數位可變衰減器1G1對輸入 曰7脈訊就Si的衰減量。 以轉例說明計數器121的動作模式。#比較器ιη ▲生邏輯1之輸出至處理單元1〇7時，計數器i2i會向上 所Ϊ生的計數值來調整^^位元控制訊號，以使數位可 =衣減器101增加對輸入時脈訊號以之衰減量。而當比較 為113 5生邏輯1之輸出至處理單元107時，計數器121 ，向下巧所產生的計數絲調㈣位元控制訊號，以使 ^位可ί衰減器1〇1減少對輸入時脈訊號以之衰減量。而 =比車乂111和113都產生邏輯Q的輸出至處理單元⑺7 日守，則計數1 121 t維持所產生的計數值，使得數位可變 11 1268050 16987twf.doc/y 衰減器101對輸入時脈訊號si的衰減量維持不變。 在較佳的情況下，當計數器121向上計數計數值至一 上限值，或是向下計數計數值至一下限值時，處理單元107 會產生警示訊號FDFI，以告知輸入時脈訊號si已超過系 統所能進行自動增益控制的範圍。 將以上的說明作一整理，可以如圖3所示，其繪示了 一種依照本發明之一較佳實施例的一種脈波訊號自動增益 控制的方法。請參照圖3，當一輸入脈波訊號被產生時， 本發明會在輸入脈波訊號的主脈波訊號之前’增加前脈波 訊號，就如步驟S301所述。此時，本發明會如步驟S303 所述，將前脈波訊號轉換成一偵測電壓，然後如步驟S305 所述，比較偵測電壓與一第一參考電壓和第二參考電壓之 間的關係，其中第一參考電壓可以大於第二參考電壓。接 著，如步驟S307所述，依據步驟S305的比較結果產生一 N位元控制訊號，來控制輸入脈波訊號的衰減量。 詳細地說，當接收到偵測電壓、第一比較電壓與第二 比較電壓時，本發明會如步驟S31l所述，判斷偵測電壓 是否大於第一參考電壓。若是偵測電壓大於第一參考電壓 時(就是步驟S311所標示的“是”），則向上計數一計數值 來調整N位元控制訊號，以進行步驟8315，就是増加輸入 脈波訊號的衰減量，以使輸出脈波訊號的功率維持固定。 若是在步驟S311中，偵測電壓小於第一參考電壓時 (就是步驟S311所標示的否），則繼續進行步驟S317， 就是判斷偵測電壓是否小於第二參考電壓。而當偵測電壓 12 1268050 16987twf.doc/y 小於第二參考電壓時(就是步驟S317所標示的“是”），則 本發明會如步驟S319所述，下數上述的計數值來調整N 位元控制訊號，以如步驟S321所述，減少輸入脈波訊號 的衰減量，以使輸出脈波訊號的功率維持固定。 雖然上述是先進行步驟S311後，再進行步驟S317。 然而熟習此技藝者當知，步驟S311和S317的順序並無^一 定。而在較佳的情況下，步驟S311和S317可以同時進行。 φ 承上述，若是偵測電壓小於第一參考電壓並且大於第 二參考電壓時，則如步驟S323所述，維持目前輸入脈波 δίΐ 5虎的哀減量。 綜上所述，本發明至少有以下優點： 1·本發明可以依據偵測電壓、第一參考電壓與第二參 考電壓之間的關係，來控制輸入脈波訊號的衰減量。因此， 就可以使輸出脈波訊號的功率維持固定，而不受輸入脈波 訊號變動的影響。 _ 2·本發明在輸入時脈訊號在超過系統所能自動增益控 ，的範圍時，可以產生警示訊號來告知使用者，讓使用者 • 能夠及早進行調整。 ： 雖然本發明已以較佳實施例揭露如上，然其並非用以 限=本發明，任何熟習此技藝者，在不脫離本發明之精神 $範圍内，當可作些許之更動與潤飾，因此本發明之保護 摩巳圍當視後附之申請專利範圍所界定者為準。 ° 【圖式簡單說明】 圖1繪示了依照本發明之一較佳實施例的一種脈波訊 13 1268050 16987twf.doc/y 號自動增益㈣之裝置的f路方塊圖。 圖2!會不了依照本發明之一較佳實施例的一種訊號時 序圖。 圖3、會示了 一種依照本發明之一較佳實施例的一種脈 波訊號自動增益控制的方法。 【主要元件符號說明】 101 :數位可變衰減器 103 :方向耦合偵測器 105 :比較模組 107 :處理單元 109 :放大器 111、113 :比較器 121 :計數器 S301 :產生一前脈波訊號 S303 :將前脈波訊號轉換成一偵測電壓 S305 :比較偵測電壓、第一參考電壓和第二參考電壓 S311 :偵測電壓是否大於第一參考電壓 S313 :上數一計數值來調整n位元控制訊號 S315 :增加對輸入脈波訊號的衰減量 S317 :偵測電壓是否小於第二參考電壓 S319 :下數一計數值來調整N位元控制訊號 S321 :降低對輸入脈波訊號的衰減量 S323 ··維持目前對輸入脈波訊號的衰減量1268050 16987twf.doc/y IX. Description of the Invention: [Technical Field] The present invention relates to a method and apparatus for automatic gain control, and more particularly to a method for automatic gain control of pulse signals Device.卜, [Prior Art] It is well known that automatic gain control can maintain a fixed output signal power in the case of input signal fluctuations. Since the input signal is easily changed with temperature or environment in an electronic system, an automatic gain control technique is required to maintain the power of the output signal constant. In general, automatic gain control techniques are often used in communication systems to convert a full-scale RF signal to an intermediate frequency signal for five weeks, such as U.S. Patent No. 5,339,454. However, conventional automatic gain control circuits or methods are designed for use in the field of continuous signals. The current automatic gain control circuit or technology designed for pulse signals is very rare. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide an apparatus and method for automatic enhancement of pulse wave signals that maintains the power of an output signal at a certain level in the event of a change in the input pulse signal. The invention provides a device for automatic pulse gain control of pulse wave signals, which is used for receiving an input pulse wave signal to generate an output pulse wave signal. The present invention includes a digital variable attenuator, a direction finder, a comparison module, and a processing unit. Wherein, the digital variable attenuator receives the input pulse signal, and attenuates the input pulse signal according to an N-bit control signal to the square 6 1268050 16987twf.doc/y face-to-face bond test|§, and N Is a positive integer. After the direction of the signal detector receives the output of the digital variable attenuator, an output pulse signal and a detection voltage are generated. The comparison module receives the detection voltage and compares it with a first reference voltage and a second reference voltage, respectively, and outputs a comparison result. The processing unit generates a ^^ control signal to the digital variable attenuator according to the comparison result to control the attenuation of the input pulse signal. In an embodiment of the invention, the first reference voltage is greater than the second reference voltage, and the comparison module includes the first amplifier and the second amplifier. The first amplifier is used to compare the detected voltage with the first reference voltage. When the debt measurement voltage is greater than the reference voltage, the first amplifier will generate the output of the logic 1. Conversely, when the debt measurement voltage is less than the first reference voltage, the first amplifier produces a logical chirp output. In addition, the second amplifier is used to compare the detected voltage with the second reference voltage. When the detected voltage is greater than the second reference voltage, the second amplifier produces a logical chirp output. Conversely, when the detected voltage is less than the second reference voltage, the second amplifier produces the output of the logic i. In addition, the processing unit has a counter for generating a count value as an N-bit control signal. When the first amplifier produces the output of Logic 1, the counter counts up the count value so that the digital variable attenuator increases the sag of the input pulse signal. When the second amplifier produces the output of Logic 1, the counter will count down the count value to cause the digital variable attenuator to reduce the amount of attenuation of the input pulse signal. When both the first amplifier and the second amplifier produce a logic 0 output, the counter maintains the current count value, allowing the digital variable attenuator to maintain the attenuation of the input pulse signal. 1268050 16987twf.doc/y From another point of view, the present invention provides a method of automatic gain control of a wave signal, which is adapted to control an input pulse signal to generate an output pulse signal. The invention comprises generating a pre-pulse signal before inputting the pulse signal, and converting the pre-pulse signal to a detection voltage. Next, the relationship between the detected voltage, a first reference voltage and a second reference voltage is compared, and an N-bit control signal is generated, where N is a positive integer. Then, the attenuation of the input pulse signal is determined according to the N-bit control signal, so that the power of the output pulse signal is maintained constant. In an embodiment of the invention, the step of determining the amount of attenuation of the input pulse signal includes determining whether the detected voltage is greater than the first reference voltage. When the detection voltage is greater than the first reference voltage, a count value is counted up to adjust the N-bit control signal to increase the attenuation of the input pulse signal. If the detection voltage is less than the first reference voltage, it is determined whether the detection voltage is less than the second reference voltage. When the detection voltage is less than the second reference voltage, the count value is counted down to adjust the N-bit control signal to reduce the attenuation of the input pulse signal. If the detection voltage is less than the first reference voltage and greater than the second reference voltage, the current attenuation of the input pulse signal is maintained. Since the present invention generates a pre-pulse signal before inputting the pulse signal, the processing unit adjusts according to the result of comparing the detected voltage converted by the pre-pulse signal with the first reference voltage and the second reference voltage. The ^ bit control signal controls the attenuation of the input pulse signal by the digital variable attenuator 4 . Therefore, the present invention can maintain the power of the output pulse signal constant without being affected by the fluctuation of the input pulse signal. The above and other objects, features and advantages of the present invention will become more apparent from the description of the <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> <RTIgt; Ββ [Embodiment] Fig. 1 is a circuit block diagram showing an apparatus for automatic gain control of a pulse wave signal in accordance with a preferred embodiment of the present invention. Referring to the figure, the present invention includes a digital variable attenuator (8), a directional rotation detector 1〇3, a “杈 group 105 and a processing unit 107. Among them, the digital variable attenuator ι〇ι will receive the wheel in. The pulse signal Si is sent to the directional coupling ^1 曰 03. The 'input pulse signal Si can be a carrier wave signal or a carrier wave signal. In this embodiment. The output of the digital variable attenuator 101 can also be sent to the direction of the detection by the amplifier 109 = 103. The amplifier 105 can be realized by a single amplifying element and a circuit composed of the amplification stages. The output of the detector 1〇3 is coupled to the comparison module 105. The comparison module 1〇5 can generate a 2-bit output to the processing unit 107, so that the processing unit 107 is based on the comparison module 1〇5. The output generates an N-bit control signal to a digital variable attenuator, where n is a positive integer." Figure 2 illustrates a signal timing diagram in accordance with a preferred embodiment of the present invention. Referring to FIG. 1 and FIG. 2 together, in the present invention, before the main pulse signal 201 of the pulse signal Si is input, a pre-pulse signal of, for example, 2〇3 is generated at ti. After the current pulse signal 203 is sent to the digital variable attenuator 101, the digital variable attenuator 101 can attenuate the pulse signal 203 according to the preset attenuation value. Next, the amplifier 109 will vary the amount of attenuation of the 1268050 16987 twf.doc/y pulse signal Si. , Tian compares mouth 111 produces logic! When the output is output to the processing unit, det is greater than the reference voltage (can, that is, the power of the output signal S may be greater than the required range. Therefore, the meter is oriented toward increasing the digital variable attenuator ι〇ι input The pulse m trend counts 'and generates a corresponding count value as the control 3fl #U ' to control the digital variable attenuation H 1G1. When the counter reaches the processing unit ig7, the power representing the output two may be less than needed Therefore, the counter (2) 2 = the digital variable attenuator 101 detects the falling of the input clock signal Si, and generates the corresponding count value as the N-bit control. Both the comparators U1 and 113 generate the logic G. Output, then the table (4) depends on the SG's power branch within the required preset range, so 1 „121 does not operate' to maintain the digital variable attenuator 1G1 to input 曰7 pulse on the attenuation of Si. The operation mode of the counter 121 will be described. # comparator ιη ▲ When the output of the logic 1 is output to the processing unit 1〇7, the counter i2i will adjust the ^^ bit control signal to the count value generated so that the digit can be = Reducer 101 increases the input The signal is attenuated by the signal. When the comparison is 113 5 the output of the logic 1 to the processing unit 107, the counter 121, the counter is generated by the count (four) bit control signal, so that the bit can be attenuator 1 〇1 reduces the amount of attenuation of the input clock signal, and = produces a logical Q output to the processing unit (7) 7 than the rudders 111 and 113, then the count 1 121 t maintains the generated count value, making the digital variable 11 1268050 16987twf.doc/y The attenuator 101 maintains the attenuation of the input clock signal si. In the preferred case, when the counter 121 counts up the count value to an upper limit value, or counts down the count value. When the limit value is reached, the processing unit 107 generates an alert signal FDFI to inform that the input clock signal si has exceeded the range in which the system can perform automatic gain control. The above description can be summarized as shown in FIG. A method for automatic pulse gain control of pulse wave signals according to a preferred embodiment of the present invention is shown. Referring to FIG. 3, when an input pulse signal is generated, the present invention generates a main pulse wave of a pulse signal. Signal The pre-incremental pulse signal is as described in step S301. At this time, the present invention converts the pre-pulse signal into a detection voltage as described in step S303, and then compares the detection voltage with the detection voltage as described in step S305. a relationship between a first reference voltage and a second reference voltage, wherein the first reference voltage may be greater than the second reference voltage. Then, as described in step S307, an N-bit control signal is generated according to the comparison result of step S305. Controlling the attenuation of the input pulse signal. In detail, when receiving the detection voltage, the first comparison voltage and the second comparison voltage, the present invention determines whether the detection voltage is greater than the first reference voltage as described in step S31l. . If the detection voltage is greater than the first reference voltage (ie, "Yes" indicated in step S311), then counting up the count value to adjust the N-bit control signal to perform step 8315, which is to increase the attenuation of the input pulse signal. Decrease to keep the power of the output pulse signal fixed. If the detection voltage is less than the first reference voltage in step S311 (that is, no in step S311), then step S317 is performed to determine whether the detected voltage is less than the second reference voltage. When the detection voltage 12 1268050 16987twf.doc/y is smaller than the second reference voltage (that is, YES indicated in step S317), the present invention adjusts the N bit by counting the above-mentioned count value as described in step S319. The element control signal reduces the attenuation of the input pulse signal as described in step S321 so that the power of the output pulse signal remains fixed. Although the above is the first step S311, the process proceeds to step S317. However, those skilled in the art will recognize that the order of steps S311 and S317 is not certain. In the preferred case, steps S311 and S317 can be performed simultaneously. In the above, if the detection voltage is less than the first reference voltage and greater than the second reference voltage, the current input pulse δίΐ 5 tiger's sag is maintained as described in step S323. In summary, the present invention has at least the following advantages: 1. The present invention can control the attenuation of the input pulse signal according to the relationship between the detection voltage, the first reference voltage and the second reference voltage. Therefore, the power of the output pulse signal can be kept constant regardless of the fluctuation of the input pulse signal. _ 2· The present invention can generate a warning signal to inform the user when the input clock signal exceeds the range of automatic gain control of the system, so that the user can make adjustments early. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and those skilled in the art can make some modifications and refinements without departing from the spirit of the invention. The protection of the present invention is defined by the scope of the patent application appended hereto. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an f-channel of a device for automatic gain (4) of pulse wave signal 13 1268050 16987 twf.doc/y according to a preferred embodiment of the present invention. Figure 2! A timing diagram of a signal in accordance with a preferred embodiment of the present invention. FIG. 3 illustrates a method of pulse wave automatic gain control in accordance with a preferred embodiment of the present invention. [Major component symbol description] 101: Digital variable attenuator 103: Directional coupling detector 105: Comparison module 107: Processing unit 109: Amplifier 111, 113: Comparator 121: Counter S301: Generates a pre-pulse signal S303 Converting the pre-pulse signal into a detecting voltage S305: comparing the detecting voltage, the first reference voltage and the second reference voltage S311: detecting whether the voltage is greater than the first reference voltage S313: counting the count value to adjust the n-bit Control signal S315: increase the attenuation amount of the input pulse signal S317: whether the detection voltage is smaller than the second reference voltage S319: the next count value to adjust the N-bit control signal S321: reduce the attenuation amount of the input pulse signal S323 · Maintain the current attenuation of the input pulse signal