TWI261870B - Method of forming a polysilicon layer - Google Patents

Abstract

A surface of a semiconductor wafer has a first gate oxide area and a second gate oxide area. A first gate oxide layer and a photoresist layer are formed on the surface of the semiconductor wafer. A wet etching process is performed to remove the first gate oxide layer not in the first gate oxide area on the surface of the semiconductor wafer. The photoresist layer is then removed. After performing a wet cleaning process, a second gate oxide layer is formed on the surface of the semiconductor wafer. Finally, a two-step polysilicon deposition process is performed, the resultant polysilicon layer covering the first gate oxide area and the second gate oxide layer. The two-step polysilicon deposition process involves a first-step low temperature amorphous silicon (alpha-Si) deposition process, and a second-step high temperature polysilicon deposition process so as to avoid the formation of particles and defects when forming the polysilicon layer.

Description

1261870 ^一一——————一～~一 _________ _ _______________ V. OBJECTS OF THE INVENTION Field of the Invention The present invention provides a method for producing a polycrystalline germanium film. BACKGROUND OF THE INVENTION Polysilicon is an indispensable material in the fabrication of semiconductor components. Depending on the process conditions, polysilicon can be fabricated into materials of different properties and conform to the material specifications of various component designs for application to various gates such as transistors, upper and lower electrodes of capacitors, resistors, and memory. In the semiconductor components of the floating and control gates, etc., the deposition process of the polycrystalline material is very sensitive to the surface condition of the wafer, especially when the so-called double gate ((11^1431^) process is performed. Since the double-electrode process must produce gate oxide layers of different thicknesses, the double-gate process is relatively easy to produce parts and residues. Before the formation of the second gate oxide layer, it is necessary to perform some relatively easy processes, such as particles and residues, such as photoresist overlay in the photolithography process ( ing ) development and photoresist stripping step, etching process of the gate oxide layer. 1261870 5 'Inventive description (2) Therefore, the photoresist is completed After the step, it is generally necessary to perform the me gas on ic scrubbing process and the wet RC A cleaning process to perform the deposition of the second gate oxide layer. In order to achieve the purpose of removing photoresist, cleaning wafers and neutralizing acid and alkali, it is necessary to remove the microparticles, organic matter, metal particles and microroughness attached to the wafer as much as possible to avoid the breakdown voltage of the gate oxide layer. (breakdown voltage) reduction, junction leakage current increase, oxidation rate change, etc. Please refer to Figure 1 to Figure 5, Figure 1 to Figure 5 is a conventional double gate on the semiconductor wafer 10 The method is not intended. As shown in FIG. 1, the semiconductor wafer 10 includes a substrate 12 having a surface including a first gate oxide region 13 and a second gate oxide region 14. The first gate oxide region 1 3 and a second gate oxide region 14 4, further comprising a plurality of field emulsion layers 16' defining a beta active region 15 formed on the surface of the substrate 12. The conventional method first utilizes a A dry oxidation process is performed to form a first gate oxide layer 18 having a thickness of about 5 7 A on the surface of the semiconductor substrate 12. Then, as shown in FIG. 2, a photoresist layer 22 is first formed on the surface of the substrate 12. Then, a yellow light process is performed, and the active region 15 of the first gate oxide region 13 is covered by the photoresist layer 22. As shown in FIG. 3, a wet etching process is subsequently performed, 'using the buffer oxide etching solution. (buffer oxide etchant, Β0Ε) as a money engraving solution 'to remove the first gate oxide layer not covered by the photoresist layer 2 2

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The photoresist layer 22 is then removed. When the photoresist layer 22 is removed, a so-called SPM (sulfuric acid hydrogen peroxide mixture solution) is usually used. When the photoresist layer 22 is removed, a % cleaning process is usually performed first, and then the semiconductor wafer 1 is removed. Spin dry. The purpose of this is to hope that before the semiconductor wafer 10 enters the photoresist solution, all the particles/loss dyes such as cracked oxide layer, residual money solution and organic particles can be removed as much as possible to avoid affecting the photoresist. Remove the process. After the photoresist removal process, a wet cleaning process is then performed. The book will first perform a megasonic scrubbing process, using ultrasonic vibration to remove contaminants from the wafer, and then perform a SC-1 cleaning process. The SC-1 cleaning process utilizes a high pH APM (ammonium hydrogen peroxide mixture) solution to remove organic contamination and particulates by oxidation at temperatures between 80 and 90 C. Subsequently, an SC-2 cleaning process is carried out, and a low pH value (HPM (hydroch1 oric acid hydrogen peroxide mixture) solution is used to form a soluble counter ion at a temperature of 80 to 90 ° C to remove metal contamination. As shown in Fig. 4, a second gate oxide layer 24 having a thickness of about 33 A is formed on the surface of the semiconductor substrate 12 by another dry oxidation process. When the second gate oxide layer 24 is formed, a portion of the first gate oxide layer 1 8 is first consumed, so that the thickness of the first gate oxide layer 18 formed is greater than the second gate. Oxide layer 2 4 thickness, but will

Page 8 1261870 V. INSTRUCTIONS u) Less than the sum of the two oxidation thicknesses.

As shown in FIG. 5, a polycrystalline germanium (p ο 1 ysi 1 ic ο η) deposition process is performed by a low pressure chemical vapor deposition (LPCVD) to the first gate oxide region 13 And forming a polysilicon layer (not shown) over the second gate oxide region 14. The LPCVD process can be carried out in a batch type of apparatus or in a device that processes only a single wafer at a time. The process conditions of the former are as follows: using stanane (si lane (Si Η 4) as the reaction gas' temperature is set between 580 ° C and 630 ° C, and the pressure is about 〇 2 torr (torr). The latter process conditions are as follows: si lane (s 1 HJ is the reaction gas, the temperature is set between 680 ° C and 7 Torr, and the pressure is about 40 to 80 torr. The latter has the advantage of a fast deposition rate 'but only one wafer can be processed at a time. Then a yellow process and a etch process are performed for the first gate oxide region 丨3 and the first gate oxide region of the semiconductor wafer. The first gate 26 and the second gate 28 are formed on the upper surface of the first and second gates. However, although the purpose of performing various cleaning processes for the polycrystal track is repeated, the polycrystalline stone is often used. There is a partial or full particle contamination needle form in the presence of M and a cleaning process. Before the process can be carried out, the deposition process can be carried out to achieve the removal of various particle contamination deposition processes, and the wafer dyeing situation will be discovered. Even some particles are. This phenomenon is due to the limit of the current brushing power, so the washed crystal

1261870 V. INSTRUCTIONS (5) There may still be traces of particulates, metal ions, organic matter, etc. on the circle. Under the premise of mass production in the semiconductor industry, only the cleaning standards can be set and used as the process of each production line. It is used for control so that the number of particles before the polysilicon deposition process can meet the test standards. In addition, in the formation of polycrystalline germanium layer, the higher the process temperature, the faster the deposition rate, the more obvious the crystallinity will be. Even when the process temperature is too high, the reaction tends to nucleate with uniformity (homogeneous nucleation). The way is to form more grains. Therefore, in the deposition process of the polycrystalline stone, the crystal orientation tends to cause local or total particulate contamination of the surface of the deposited polycrystalline germanium layer along the crystal grains which have existed before. As shown in FIG. 6 and FIG. 6, FIG. 6 is a cross-sectional view of a conventional sinusoidal surface after forming a first gate and a second gate on the semiconductor wafer 10. The protrusion 3 2 in Fig. 6 is a microparticle, and when the polycrystalline layer 2 βόί), the ±A 4 f w e product has a thickness of about 2 kW, the height of the microparticle is as small as 111. Referring to FIG. 7, FIG. 7 is a particle distribution diagram of the first gate pad / / / and the first gate formed on the semiconductor wafer 10 . It becomes more cumbersome and does not increase. When a new polycrystalline deposition is developed, it takes a part or a whole to become a very important lesson. Therefore, how can the film be produced without the cost of the cleaning process plus the cleaning process? Spears are formed to avoid particle contamination of the polycrystalline silicon film on the surface, as well as needle-like contamination.

I26l870 -----

V. INSTRUCTIONS (6) SUMMARY OF THE INVENTION The main object of the present invention is to provide a polycrystalline germanium film and method for solving the problems of particulate contamination and acicular contamination. In a preferred embodiment of the present invention, there is provided a method for forming a polycrystalline germanium film on a semiconductor wafer, the surface of the semiconductor wafer comprising a first gate Oxidation zone and a second gate oxidation=丄 The method comprises the steps of: forming a pole oxide layer and a photoresist layer on the surface of the semiconductor wafer, and performing a wet etching process to remove the surface of the semiconductor wafer a first gate oxide layer other than a gate oxide region, and then removing the photoresist layer, after performing a plurality of wet cleaning processes, forming a second gate oxide layer on the surface of the semiconductor wafer, and finally performing a two-stage process a polycrystalline germanium deposition process, and the polycrystalline germanium layer is overlaid on the first closed, oxidized region and the second gate oxide region, the two-stage polycrystalline/child chloride path comprises a first stage low temperature type The amorphous process (amrph 〇us si 1 icon, 〇: -Si ) deposition process, and a second-stage high temperature polylith 1 iCOn deposition process are used to avoid the formation of polycrystalline germanium layers simultaneously form Case of granules (Particle) and the defect (Defect) is. Since the present invention utilizes a two-stage polycrystalline germanium deposition process to form a polycrystalline germanium layer composed of a combination of an amorphous layer and a polycrystalline layer, it is possible to form amorphous crystals (crysta 1 1 inity). Insignificant characteristics 'to effectively inhibit the formation of crystal nuclei, thereby avoiding crystallization

1261870 V. In the description of the invention (7), the crystal grains grow along the particles of different sizes attached to the surface of the wafer. Therefore, the present invention can significantly improve the formation of various shapes of particles and defects in the prior art without increasing the cost of the cleaning step in the prior art. DETAILED DESCRIPTION OF THE INVENTION Referring to Figures 8 through 13, Figures 8 through 13 are schematic views of a method of fabricating dual gates on a semiconductor wafer 100 in accordance with the present invention. As shown in FIG. 8, the semiconductor wafer 100 includes a substrate 102 having a surface including a first gate oxide region 103 and a second gate oxide region 1 〇 4. The first gate oxide region 1 0 3 and the second gate oxide region 1 〇 4 further comprise a plurality of field oxide layers 106 defining the active region 105 formed on the surface of the substrate 1〇2. The method of the present invention firstly forms a first gate oxide layer having a thickness of about 57 A on the surface of the semiconductor substrate 1 利用 2 by a dry oxidation process, and then first on the surface of the substrate ι 2 as shown in FIG. A photoresist layer 112 is formed, and then a yellow light process is performed to cover the active region 1 〇5 of the first inter-polar oxide region 103 by the photoresist layer 112. As shown in FIG. 10, a wet etching process is subsequently performed, and a buffer oxide etchant (B0E) is used as a solvent to remove the first gate not covered by the photoresist layer n 2 . Oxide layer 1 〇8. f performing an SC-1 cleaning process, and then spinning the semiconductor wafer 100 to remove particulate contamination sources, such as a broken oxide layer.

1261870 V. INSTRUCTION DESCRIPTION (8) Solution and organic fine particles, and then using SPM (sul furic acid - hydrogen peroxide mixture) solution to remove the photoresist layer 112° After removing the photoresist layer 11 2, a wet cleaning process is then performed. Usually, a megasonic scrubbing process is performed to remove contaminants from the wafer by ultrasonic vibration, and then a high-pH APM (ammoniuin hydrogen peroxide mixture) solution is used at 80 to 90 ° C. Under the temperature, organic pollution and particulates are removed by oxidation. Finally, an SC-2 cleaning process is performed to form a soluble counterion at a temperature of 80 to 90 ° C using a low-hydrogen HCM (hydrochloric acid hydrogen peroxide mixture) solution to remove metal contamination. As shown in FIG. ,, another dry oxidation process is then performed to form a second gate oxide layer 11 4 having a thickness of about 3 3 A on the surface of the semiconductor substrate 102. Since the first gate oxide layer 1 〇 8 is partially consumed when the second gate oxide layer 1 14 is formed, the thickness of the first gate oxide layer formed at the end is greater than The thickness of the second gate oxide layer 114 is less than the sum of the two deposition thicknesses. As shown in FIG. 12, a two-stage low pressure chemical vapor deposition (LPCVD) process is then used in the first gate oxide region 103 and the second gate oxide region.

Page 13 1261870 V. Description of the Invention (9) A polysilicon layer 116 is formed over ^04. This two-stage LPCVD process is performed in a device that processes only a single wafer (singie Mkr) at a time. The process conditions of the second stage of the corpse are: i methane (si iane, siH4) as the reaction = body, the temperature is set between 55 ° C and 65 ° C, the pressure is 4 〇 8 8 ears (torr) The deposited first amorphous germanium layer has a thickness of about ι〇〇^ (angStr〇mS). Then, the second stage of the polycrystalline stone deposition system is made up of 矽 methane as the reaction gas, the temperature is set between 680 degrees and 710 degrees, and the pressure is 40 to 80 Torr (torr The deposited second polycrystalline layer 116b has a thickness of 2 〇〇〇 25 〇〇 angstr 〇 ms. The first amorphous germanium layer 116a and the second polysilicon layer n6b are combined into a polysilicon layer 116. The advantage of the two-stage polycrystalline germanium deposition process of the present invention is that it is first deposited at a lower temperature, crystallinity ( Crystal丨inity) Z apparently tends to form an amorphous germanium (amorph〇us si 1 icon, a —Si ) structure, thus effectively inhibiting the formation of crystal nuclei, thereby avoiding the “grain” along the crystallization process. The case where the particles attached to the surface of the wafer are not the same grows, and the protrusions and defects as shown in Fig. 6 occur. Further, the composite polycrystalline germanium layer of the present invention can also be subjected to batch-type LPCVD process equipment by appropriate parameter adjustment. Finally, as shown in FIG. 13, a yellow light process and an etching process are performed to form a first surface on the first gate oxide region 1 〇3 and the second gate oxide region 104 of the semiconductor wafer 1 (10). Gate n 8 and second gate 1 22 .

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The sheet 100 is formed on the surface of the invention. (10) 4 Referring to Fig. 14, Fig. 14 is a diagram showing the distribution of particles in the semiconductor after the first gate and the second gate of the semiconductor are crystallized.曰 曰 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶 晶Before the deposition, mention the situation. The polycrystalline germanium layer is deposited in such a way that a polycrystalline crystallinity is formed at a process temperature lower than the lower process temperature, so that the wafer surface can be avoided. Needle-shaped (need 1 e ) particles of different sizes. Even if it is not processed, such as wet residual, and the cleaning step before the photoresist is removed, the formation of various shape layers can be remarkably improved without increasing the cleaning. Because of it, it can be! In the case of crystallization, the change or enthalpy and the particles consumed in the second process are

Pb p ΐ ί _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ A polycrystalline germanium layer is formed at a higher process temperature. 〉Amorphous crystallinity (crysta 1 1 inity) is not obvious, so =f effect inhibits the formation of nucleation, and thus avoids the crystal grain attached to the surface of the wafer when crystallization is performed. The situation in which the particles grow. Therefore, the two-stage polycrystalline germanium deposition process of the present invention can significantly improve the formation of various shapes of particles and defects in the prior art without increasing the cost of cleaning in the prior process.

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1261870 Brief Description of the Drawings Brief Description of the Drawings Figures 1 to 5 are schematic views of a conventional method for fabricating double gates on a semiconductor wafer. Figure 6 is a schematic cross-sectional view showing the formation of a first gate and a second gate on a semiconductor wafer. Figure 7 is a diagram showing the distribution of particles after forming a first gate and a second gate on a semiconductor wafer. 8 to 13 are schematic views showing a method of fabricating a double gate on a semiconductor wafer in accordance with the present invention. Figure 14 is a diagram showing the distribution of particles after forming a first gate and a second gate on a semiconductor wafer in the present invention. Illustrated symbolic description 10 semiconductor wafer 12 substrate 13 first gate oxide region 14 second gate oxide region 15 active region 16 field oxide layer 18 first gate oxide layer 22 photoresist layer 24 second gate oxide layer 26 First gate 28 second gate 32 protrusion 100 semiconductor wafer 102 substrate 103 first gate oxide region 104 second gate oxide region 105 active region 106 field oxide layer

Page 17 1261870 Schematic description 108 114 116b 118 First first gate oxide layer 112 Photoresist layer two gate oxide layer 116a First amorphous germanium layer two polysilicon layer 116 Polycrystalline germanium layer one pole 122 Second gate pole

Page 18

Claims (1)

1261870 6 'Patent Patent Scope 1 · A method for fabricating a polysilicon film on a semiconductor wafer, and the surface of the semiconductor wafer comprises a plurality of particles (partic 1 e ), the method comprising the following steps: A two-stage (two-step) polycrystalline germanium deposition process, and the two-stage polycrystalline germanium deposition process comprises: a first stage low temperature amorphous silicon (α-Si) deposition process; a second stage high temperature polycrystalline germanium deposition process; wherein the first stage low temperature amorphous germanium (a-S i) deposition process is used to prevent a plurality of particles of the crystal nucleus of the polycrystalline germanium film along the surface of the semiconductor wafer ( Partic 1 e ) crystal growth to suppress the occurrence of needle-like particles and defects on the surface of the polycrystalline silicon film. 2. The method of claim 1, wherein the semiconductor wafer surface is subjected to at least one lithography process and a wet etching process prior to performing the two-step polysilicon deposition process. Process, a photoresist removal, a wet cleaning process, and a thermal oxidation process. 3. The method of claim 2, wherein the wet etching process package comprises a buffer oxide etchant (Β0Ε) etching process and an SC-1 cleaning process. 4. The method of claim 2, wherein the wet cleaning process comprises a megasonic scrubbing process, 1261870 6. Patent application scope SC-1 cleaning process and an SC-2 cleaning process. 5. The method of claim 1, wherein the particles comprise microparticles, organic matter, metal particles, and microroughness attached to the surface of the semiconductor wafer. 6. The method of claim 1, wherein the first stage low temperature amorphous germanium deposition process has a process temperature range of 550 to 650 ° C, and the amorphous germanium deposition process generates a non- The thickness of the wafer layer is about 100 A. 7. The method of claim 1, wherein the second stage high temperature polysilicon deposition process has a process temperature range of 680 to 710 °C. 8. The method of claim 1, wherein the two-stage polycrystalline deposition process is carried out in a single-wafer type low pressure chemical vapor deposition (L P C V D ) apparatus. 9. A method of fabricating a polysilicon film on a semiconductor wafer, the semiconductor wafer surface comprising a first gate oxide region and a second gate oxide region, the method comprising the steps of: Forming a first gate oxide layer (GOX Layer) on the surface of the wafer; performing a photolithography process and a surname Page 20 1261870 6. Applying an etching process to remove the first gate oxide layer on the surface of the second gate oxide region; performing a cleaning process; and performing a two-stage (tw 〇-step) a polycrystalline deposition process, and covering the polysilicon layer over the first gate oxide region and the second gate oxide region; The two-stage polycrystalline germanium deposition process comprises a first-stage low-temperature amorphous silicon (α-Si) deposition process for avoiding the formation of particles simultaneously with the formation of a polycrystalline germanium layer. The case of a defect, and a second-stage high-temperature polycrystalline germanium deposition process. The method of claim 9, wherein the etching process is a wet etching process. 11. The method of claim 1, wherein the wet etching process utilizes a buffer oxide etchant (Β0Ε) as the etching solution. 1 2. The method of claim 9, wherein the cleaning process is a wet cleaning process. 1 3. The method of claim 12, wherein the wet cleaning process comprises: Page 21 1261870 VI. Scope of Application Patent A megasoni c scrubbing process is performed; an SC-1 cleaning process is performed; and an S C - 2 cleaning process is performed. The method of claim 9, wherein the first stage low temperature amorphous germanium deposition process has a process temperature range of 550 to 650 °C. 1 5. The method of claim 9, wherein the second stage high temperature polysilicon deposition process has a process temperature range of 680 to 710 °C. The method of claim 9, wherein the two-stage polycrystalline germanium deposition process is carried out in a single wafer type low pressure chemical vapor deposition (LPCVD) apparatus. 17. The method of claim 9, wherein the defects comprise needle-1 ike defects. Page 22