TWI258289B - Microprocessor apparatus and method for providing configurable cryptographic block cipher round results - Google Patents

Abstract

The present invention provides an apparatus and method for performing cryptographic operations on a plurality of input data blocks within a processor. In one embodiment, an apparatus for performing cryptographic operations is provided. The apparatus includes a cryptographic instruction and execution logic. The cryptographic instruction is received by a computing device as part of an instruction flow executing on the computing device. The cryptographic instruction prescribes one of the cryptographic operations, and also prescribes that an intermediate result is generated. The execution logic is operatively coupled to the cryptographic instruction. The execution logic executes the one of the cryptographic operations, and generates the intermediate result.

Description

* 1258289 IX. Invention Description: [Reciprocal Reference for Related Applications] The application for priority of this application is based on US Patent Application No. 10/826435, and the filing date is 〇4/16/2〇〇4. BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to microelectronics Fan Tianshou, and more particularly to an apparatus and method for performing cryptographic operations with intermediate results on a computer device. [Prior Art] Early computer systems operated independently of other computer systems. Therefore, the application data executed in the early computer system may be located on the computer. 8 series, charging, or by the application designer, and; 浐:: The second program is generated by the output data, and the post-execution knot ί-m is usually written in writing, or in the form of a slot , written in the magnetic tribute machine, disk or other located in the computer to pull the meat eve + θ ^ set. The round is from Allah #包月自糸,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, It can then be provided to a non-two-sigma transport, mass storage device, and application. 11 to incompatible computer systems for the demand for information, and in the computer system, it has been confirmed that the development of the protection system and the protection of the code program of the I 4 code will be stored. . In general, decryption. Clear the encryption of the data in a large number of storage devices and before 1258289,! Users find links to network computers to provide access

Hi land 2 road structure, operating system and data transfer assistance, and so on? Taking 6 the ability to share information, and developing to * is only an important role to play a secret. For example, in today's: the user of the parent-small workstation, can use the green device to slaughter, use _ take different cases, servo Tianmu use the Internet to get news and 苴TongTeng, name check computer transfer and receive electronic $ from r Nüwa, He Bei ▲ is provided in hundreds of computer systems for business; electronic:: wide connection to the sale and purchase between suppliers, or in the meal: machine two to carry out - Πΐ: move, are Quite the usual thing. Therefore, it is sighed that the sensitive information of the chrome is not revealed and the user is in a given computer multi-layer;; sensitive; material: more and more cases. At present, Tuen Mun _5 〃 才 才 才 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 》 : Wai (four) ringing, related to the == should hand = reaction in the computer information compromise processing has a fixed mind, financial system, military corpse: there is a prominent theme of the government. In the case of secure access to information - the techniques and devices can make the message only skin == gradually developed - some of the cryptography stored or transmitted between computers, =: used to protect the poor, it is known "Clear text, (cleartext) or '':: conveys sensitive messages (Plaintext) to the unrecognized 1258289 form (such as "ciphertext"). The transfer of plaintext to ciphertext is called "encryption", "enciphering", or "ciphering", and the transfer process of ciphertext to plaintext is called "decryption", "deciphering", Or "inverse ciphering". In the context of passwords, several steps and rules have been developed that can be used to allow users to perform cryptographic operations without requiring much knowledge or effort, and to enable these users to transmit or The message is provided to other users in other ways, such as in encrypted form. By encrypting the message, the sender generally provides the recipient with a message that does not allow the recipient to unencrypt the message. The password is encrypted, so the recipient cannot remove or otherwise increase the access to the unencrypted original message. There are techniques for password protection, mathematical operations, and specially designed application forms. Encrypt or decrypt high-sensitivity messages. Some types of operations are used to encrypt or decrypt data. The first type of operation mentioned here (such as public key cryptography: RSA operation) uses two types of passwords (a public key) And a private key) to encrypt or decrypt the data. Refers to the public key operation, a public key used to encrypt the data transmitted to the recipient. The user public and private keys have a mathematical calculus relationship, accept The private key must be used to decrypt the transmitted data to recover the data. Although such cryptographic operations are widely used today, the encryption and decryption operations are still too slow, even if only a small amount of data is encrypted and decrypted. The second type of operation, such as Symmetric key algorithms provide data security to a greater degree and speed. These operations are called symmetric key operations because they use cryptographic keys to encrypt and decrypt messages. There are three common practices for primary cryptographic operations: data encryption 1258289 standard rules (data enciypticm standard, DES), triple data plus poor standards Rules (T_eDES) 'and advanced encryption standard rules (_fiber / enCiyPti〇nStandard, AES). Because these algorithms contain high sensitivity data, they are now used by the US government and its agencies. But these two technologies can be expected At least one technology will become a commercial or private delivery standard in the future. According to these symmetric key operations, the plaintext and ciphertext are respectively encrypted or decrypted by a special size. For example, the advanced encryption standard rules in the 128-bit 兀 size interval complete the encryption operation, and use the encryption keys of ^28, 192, and 256 bits. Other symmetric key operations allow for advanced encryption standards for 192 and 256-bit metadata sets. Referring to block ciphers, it is known that a 1024-bit plaintext message is like eight 128-bit tuples. All symmetric key operations use a sub-operation of the same form to encrypt a plaintext block. There are still more commonly used symmetric key operations, such as an initial cryptographic key to extend multiple keys (such as a "key directory,"), each such as the secondary operation password "round, (nmnd) in the plaintext area Completed in the block. For example, the first key of the key directory is used to complete the first-password round of the last operation of the plaintext block, where the second round uses the #th key of the golden record directory to generate the second result. A specific number of sub-unit rounds is completed ^ to produce a final result of a cipher text. Advanced Encryption = The second operation in each round of the operation, there are sub-bits (or s_b〇x), ShiftRows, MixC〇lum, AddRoundKey And other terms. During each round, a ciphertext block is decoded. Except for the ciphertext input conversion password and the conversion sub-operation (mixing field, shifting conversion), the final result of each round is the plaintext block. Data Encryption Standard Rules and Triple Data Encryption Standard Rules utilize different • 1258289 feature sub-operations, but sub-operations are similar to these advanced encryption standard rules because they convert a plaintext block into a ciphertext block in a similar manner. The cryptographic operations are performed on multiple consecutive test groups, and all symmetric golden records use the same mode. These modes include an electronic code book (ECB) mode, a cipher block chaining (CBC) mode, a cipher feedback (CFB) mode, and an output feedback (OFB) mode. During the completion of the secondary operation, some modes utilize an additional initialization vector, and some use the ciphertext output completed in the first plaintext block to encrypt the first location, such as an additional input to the encrypted second location completed in the second plaintext block. . For more technical details, see FIPS-46-3, October 25, 1999, which discusses in detail the Data Encryption Standard Rules, Triple Data Encryption Standard Rules; and FIPS-197, November 26, 2001. It explains in detail the advanced encryption standards. The aforementioned standard rules were promulgated and promulgated by the National Institute of Standards and Technology (NIST). In addition, individual instructions, white papers, kits and countermeasures can be found in the National Institute of Standards and Technology's Computer Security Response Center (CSRC) at http://csrc.nist.gov/. Those skilled in the art will recognize that most applications can be effectively executed on a computer to perform cryptographic operations (such as encryption and decryption). In fact, some operating systems (such as Microsoft®, WindowsXP®, Linux) provide encryption/decryption services directly in the original password form, password application interface, and the like. In any case, there are still some shortcomings in today's computer password technology. Please refer directly to the first figure to highlight and discuss these shortcomings below. The first picture is an architecture diagram 100 of today's computer password application, describing a first computer workstation 101 connected to the regional network 105, a 1258289 second computer workstation l〇2, a cigarette, οσ 1Λ^, and a road The file storage device 10ό, a routing state ω7, or other network connection with the wide area network (WAN彳:, and - wireless network router (10) such as == network = line network 1〇9: Every 104 uses unfocused, - a second route, a; domain: road ^ interface. Capture a brother two computer workstations 103 An II I: multiple times during the work period (four) - a workstation m; users ϊ ;; ί= 喿 控制 控制 要 要 要 要 要 要 要 要 要 要 要 要 要 要 要 要 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站 工作站It is also required; if the power is immediate (such as an immediate message) or encrypted message, the user can also obtain or provide his/her final data (such as credit card 2 = network 110, etc.) or Other forms of sensitive data. When walking, cup transfer, regional network 5 shared resources J = any one, should workstation 101, user, s, can represent the home computer or remote computer 103 workstations in line with the implementation of the encryption / decryption operation 112 examples::, want - Qing is now normal Sex is provided in the coffee shop, airport, hotline network, so the notebook computer 104 user's and other public is his/her message transmission/reception other:: = need: secret = 1258289 by wireless network路 l〇9 $Helmets, 々丄, 知知祁--to secret or decrypt all messages. Station iom understands that 'every of the above activities need to work/solve ϋ"9 w also has a corresponding The light is an immediate encryption of the mountain. Therefore, the computer 101-104 may further operate hundreds of passwords in the same day. On how, there are some immediate encryption/unlocking in the computer system. Second - 丄 ~ $ Restriction. Xing n and complete the password operation method - by = two two software program to complete a previous function 'relative /,; secret line speed is slow. Every - encryption == type: can be in this paragraph Must be suspended during the time, and the encryption system To the encryption / solution: two, etc.) parameters must be operated through the operation of the control, and "two wood for 112" to perform the encryption operation. And because the encryption operation - must include "the temple special group data several times, the = line contains the execution of multiple computer extension instructions, so all = ^ degrees have an adverse effect. If the general knowledge of the technology can be made fΓ _ Transfer - a small encrypted electronic material will be 5 times slower than the transfer - un-twisted email. Also, 'because of interaction with the operating system;:=. Many applications do not provide the second production 2 application ί complete In addition to the system or plug-in program, in today's computer system 101_〗 and in the microprocessor previously appeared in the floating-point unit two =; by the point of the difference between the implementation of the software, the implementation is quite slow. Like floating point 1258289 = "The password operation is done via software. ίπ = Let the common message processing in the floating point. 2 = Two Cii machines perform floating-point operations. The software is faster than the completion, but still the rendezvous bus (such as the universal serial bus) Join to the main:: interest";: After receiving these common message processor execution, complete the mother's operation = *., but the password common message processing material is all trustworthy. Complete the password altogether '=this,' need to improve Existing place (4) code function, for example, code can be directly operated on the microprocessor to perform password operation via a single micro-density: password operation, and thus limit the operating system intervention and level: and provide the main microprocessor The cryptographic hardware of the structure is used in a more tangible and combined cryptographic instruction in the subsequent operation of the method. It is more necessary to provide a kind of prevention without multiple devices and methods, which can support and sequence the tube:::2: Test the specific implementation of the special password to enter the gold supply, such as self-generation support for multiple data groups, large and poor models, and provide codeable group encryption/decompression, codebook, cipher string mode,密玛回回模式模式 and transmission [Summary of the Invention] 12 1258289 The present invention is to directly solve the prior art of a more superior technology to complete the crying, point in the micro-processing. The present invention provides an embodiment to provide a password operation ^ Code operation. A device with a password command circuit and an execution logic circuit. The device includes a password command received by a computer device to make a loop of the command flow processed by the circuit. Code finger;::] The brain device is executed: and the intermediate result is also specified. Execution: Series:::; (4) The circuit is valid pure. The execution logic circuit executes the I code to make an intermediate result. Operation and production

The device word is executed by the cryptographic operation. The control word processed by the unit is used to indicate the intermediate result produced between the two. Password-Acceptance (4) According to the -instruction process, whether or not the circuit is used to execute the code for the phase code command circuit is executed. F /, γ mountain code is also controlled by the sun

Another embodiment of the present invention is a method of code operation. The method of hitting the 兀 兀 指 一 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由 经由This is the case when the cryptographic operation is performed. [Embodiment] The following is an example of the present invention which is manufactured or used with specific applications and needs in the application of the prior art. However, the various modifications mentioned in the examples are intended to highlight differences from the prior art, which are used in other embodiments. Therefore, the present invention is not limited to the following: the technical background of the above-mentioned cryptographic program and the related technologies for encrypting and decrypting data used by today's electric power, I I: continue to explore these technologies and their limitations. Next, the present invention will be further discussed with reference to the second:; fifteenth diagram. Finance = Please refer to the second picture 'a block diagram 200 series describes the above-mentioned current electric technology. The block diagram 200 includes - a microprocessor less /, captures the instruction circuit, and accesses the data, and the accessed data is recorded in the system memory area of the body 203 by the ^ chapter system " The program control and data access in the body 203 are managed by the operating system 202, and the system is protected by the operating system. (For example, an emperor _, if an application code is being executed, , * ^ sub-material or - (four) storage program) requires the implementation of a secret code operation * in the application of the program must be ordered by the microprocessor 201: program: or: fixed command circuit. These instruction circuits may also be: a part of the application itself being executed, which is connected to the application program being provided by the application system 202. Regardless of the relevance of the road, anyone familiar with the art will have the circuit to reside in the memory for certain specified or assigned = shore discussion purposes, the area of these memory will not be in the application 4 body 203 And including - the mega-gold generation program 14 1258289 204, generally generates or accepts a cryptographic key, and extends the cryptographic key to a key schedule 205 for use in the cryptographic round operation. For heavy block cryptographic operations, a block cipher 2 〇 6 is motivated. Encryption program 206 executes a plurality of instructions that can access blocks of plaintext 21, key schedule 205, and cryptographic parameters 209, while cryptographic parameters 2 〇 9 further specify special block cryptographic operations (eg, mode), keys The position of the schedule ^ 疋 $ ° If a specific mode is required, the force σ dense material 2 〇 6 will also access an initial inward 208. The encryption program 2〇6 executes the instructions here to generate a plurality of blocks corresponding to the ciphertext 211. Similarly, a decryption program is invoked to perform the zone and decryption operations. The decryption program 2〇7 also executes a plurality of instructions, including a block of ciphertext 211, a key schedule of 2〇5, and a password parameter of 2〇9, and a password of 209 can further specify a special block. The decryption operation, and if the mode, is, will also access an initial vector 2〇8. The decryption program 2〇7 executes 7 these instructions to generate a plurality of blocks corresponding to the plaintext block 210. In order to generate a password golden wheel and encrypt or decrypt the text, a large number of cases are executed. The aforementioned chat specification contains a number of virtual edits, and the second is to estimate the approximate number of instructions required. Therefore, people who are familiar with the feathers will understand that 'complete a simple block encryption operation, and they will deduct 7 and each. The instructions must be operated by the password required by the microprocessor. Moreover, the reference to "Chiba Code" is usually regarded as an application in the main application, instant messaging, e-mail, remote slot, and execution. ^ So the user of the application in execution In the sense that the execution of the application is not efficient. In an independent operation or plug-in 15-1258289 encryption program 206 and decryption program 2〇7, the order 206 and 207 must be based on the operation of the commander And some incidents that will aggravate the problem. Furthermore, the per-parallel cryptographic operations required on the computer system, in the case of Shi and Zhe, must be separately configured on the memory 2q, it can be expected The number of operations required by the microprocessor 2 〇 = code will continue to increase over time. 仃 In the inventor of the present invention, the _* more confirmed two microprocessors perform the cryptographic operation. According to the present invention, the present invention provides a microprocessor, via exclusive: code early; and performs a cryptographic operation and related methods. When the card is open, the heart is passed through a single-dense; The code will now refer to the third picture to The twelfth figure discusses the implementation of the 岔石马 operation. Please refer to M = 1 to perform the cryptographic operation:: Process one:: Figure:: According to the invention, the microprocessor is used for the microprocessor such as ==== The execution logic circuit 3 〇 3 曰 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 302 The execution unit of the logic circuit 303. The component for performing the operation of the circuit can be shared by the other circuits, microcodes, etc. of the different functions in the 16 Ί 25 « 289 301. According to the scope of application, the micro code A term representing at least one microinstruction. A microinstruction (also referred to as a native instruction) is an instruction that controls the class in which a component or device performs an action. For example, a microinstruction is by a reduced instruction set computer , RISC) microprocessor directly executes. For a complex instruction set computer (CISC) microprocessor, such as an x86 compatible microprocessor, the x86 instructions are translated into corresponding microinstructions, And the corresponding microinstructions are directly executed by components or devices in the complex instruction set microprocessor. The translation logic 303 is coupled to a microinstruction queue 304. The microinstruction queue 304 has a plurality of microinstruction items 305, 306. The microinstruction is provided by the microinstruction queue 304 to the scratchpad hierarchy execution logic circuit including the scratchpad file 307. The scratchpad file 307 has a plurality of registers 308-313, wherein the contents of the scratchpad are first set. Preferably, a specified cryptographic operation is performed. The registers 308-313 point to corresponding addresses 323-327 on the memory 321 where the memory contains the data needed to perform the specified cryptographic operations. The scratchpad hierarchy is coupled to load execution logic 314, which loads the execution logic circuitry as an interface to data cache 315 for use as a data capture for performing specified cryptographic operations. The data cache memory 315 is connected to the memory 321 via the memory bus 319. Execution logic 328 is coupled to load execution logic circuit 314 and performs the actions specified by the microinstructions passed by the previous level. The execution logic circuit 328 includes an execution logic circuit, a device or a microcode (such as a microinstruction or a native instruction), or a combination of an execution logic circuit, a device or a microcode, or an instruction to perform an action specified by the instruction. A condition of 17 Ί 258289. Execution logic circuit 328 uses 1 different functions in the microprocessor: =: etc.: - from - load execution logic: :;:;: unit; 16: crypto unit operation required data. Microfinger eight: Received to execute the specified password file block 326 #~t Weight unit 316 for multiple input rounds of file blocks, code (8) such as microinstruction or local = way: circuit, device or microprogram The code * person:) or 疋 疋 逻辑 逻辑 logic equivalent components. The cryptographic unit, the middle wheel, can be shared by the microprocessor 3, his =, the code operation element, the stone horse, and the like. In the circuit, the other execution units such as the 316 system and the execution logic shown in the figure are operated in parallel. Early 兀, floating-point units, etc. (non-embodiments include execution logic • path = use range - "unit" or native instructions), or code (such as microinstructions ^ or are used to perform specific functions or Specific—In the specific unit, the component used to perform the specific work. The components that are made by other different functions in the microprocessor 301 can be coded and shared. For example, the name-hanging> $ * Circuit, microprogramming logic, device or microprogram: unit contains execution = yes: row logic circuit, device or microprogram: horse::= this: instruction), the equivalent component of the integer instruction. - floating, or used

A circuit, device, or microcode (such as a microinstruction or line logic J or 1258289 that performs a combination of logic, device, or microcode, or an equivalent component used to execute a floating-point instruction. In an integer unit The component used to execute the integer instruction may be shared by the circuit, the microcode, etc. used to execute the floating point instruction in the floating point unit. In an embodiment compatible with the χ86 structure, the cryptographic unit 316 is A 86 integer unit, a 86 floating point unit, a 86 Multi-media extension (ΜΜΧ) unit, and an x86 Streaming SIMD extension (SSE) unit operate in parallel. According to the scope of the application, An embodiment is compatible with the x86 architecture _ if the embodiment can correctly execute most of the applications used to execute on an x86 microprocessor. If an application is executed correctly, the expected results can be obtained. Alternatively, the x86 compatible embodiment contemplates that the cryptographic unit operates in parallel with a subset of the x86 execution units described above. The cryptographic unit 316 is coupled to the storage execution logic 317 and a corresponding plurality of output file blocks 327 are provided. The storage execution logic circuit 317 is also connected to the data cache memory 315, and the data cache memory 315 transfers the output file data 327 to the system memory 321 for storage according to the path. Execution_logic circuit 317 is coupled to writeback execution logic 318. When the specified cryptographic operation is complete, write back execution logic 318 updates register 308-313 in register file 307. In an embodiment, The microinstruction synchronously passes through each of the above-described execution logic circuit levels 302, 303, 304, 307, 314, 316-318 with a clock signal (not shown), so these actions are substantially similar to being performed simultaneously on an assembly line. In the system memory 321, an application that requires a specified password operation 19 1258289 ^:: two/two password command is used to command the microprocessor to execute the processor 3〇1. :τ) The instruction circuit to command the micro-inclusion - specify the 'cryptographic instruction 322 packet password' command in the example; 2; Γ: 2 ί2 in the condensed instruction set embodiment, the middle, the poor code 疋Microinstruction . In the embodiment i: use two or two to use the remaining or finger = instruction opcode in an existing instruction set architecture. In the -x86 compatible embodiment, the RFp #, - time tuple instruction includes -_ repeat preamble

Prefix) field (for example, 0xF3), followed by the byte opcode field (for example, 〇x〇FA7 X - detailed - during the execution of a specific cryptographic operation), the binary block plus 4 4 Specific area used

1^+/. In the embodiment, the "instruction 32H = cryptographic instruction circuit" according to the present invention can be implemented in an application: and: a spoonful of class ' can therefore be designed to be provided to the microprocessor, =, provided by the program Or the operating system 32 control program stream 2 requires a password command 322 to control the microprocessor execution finger; , =: in Lai Tong 32. For this, the micro-home operation system 320 requires an application. Executed on ^ - 301. As the application executes, however, before the execution of the password instruction 322, the instruction flow specifies that the benefit 301 first initializes the contents of the register 312 to the 4-way memory 321 Address 323-327, where memory 32 ι 20 1258289 3 code control character 323' - initial password gold input or one gold record directory two = chemical vector 325 (if necessary) ... "file first output file 327. Before executing the password command, you need to save the crying ~312 initialization, because the password command 322 will refer to the temporary:::-Γ and a total of the total number of blocks included, temporary storage, the area is encrypted in the file 326 area Or the number of blocks that are decrypted. The mussel two-row logic circuit 303 is self-operating to execute the logic circuit. The following is a sequence of micro-instructions to control the micro-indication of the first code #. In the corresponding microinstruction sequence, the password loop for loading the number of the 255, 306, and 306 special control cryptographic units is generated, and is generated in the memory 315 stored in the memory 2 to be stored in the memory 2 329. In the corresponding micro-instruction sequence 2:: the round-out text sub-block is shown in the figure) in the control microprocessor and = several micro-instructions (not shown in the figure), perform other necessary two ^ = unit The configuration register contains,; the management, (4) the update of the registers 3, 312, after the - input = wheel and the output point to the temporary secret, the initialization vector points to the temporary: 326 encryption / solution update, where the interrupt is determined ;:1〇 (if necessary) One of the structural temporary storage is defined in the instruction set architecture (H register, Yang, Yang, zhong), for the specific micro-location 21 1258289 In one embodiment, the cryptographic unit 316 is divided into a plurality of levels for use in the pipeline operation of the continuous input text block 326. The block diagram 300 in the second figure illustrates the essential components of the present invention, thus = part of today's micro The execution logic in processor 3G1 has been omitted for the purposes of the present invention. However, anyone skilled in the art will appreciate that in current microprocessor 301, multiple levels are included, depending on the particular scope of use. Logic components, some of which are received The present invention is set forth to illustrate the present invention: For example, load execution logic circuit 314 includes an address generation hierarchy following a layer of cache memory (4), followed by a cache (four) body interface level. It is to be noted that, according to the present invention, a cryptographic operation is performed on a plurality of input text blocks 326 by a single cipher command 322, wherein the operation of the single cipher command 322 is not considered Knowing the operating system 32(), a single cryptographic command 322 is executed by a dedicated cipher list = 316, and the cryptographic unit operates in parallel and synchronously with other executing units of the 301 in the microprocessor. The present invention contemplates the structure of the embodiment. The cryptographic unit 316 can be substituted for the embodiment, similar to the special point unit hardware of the micro-processing H towel in recent years. The operation of the cryptographic unit and the associated code reading instruction 322 can be completely and currently used as described above. System 320 and Application Compatibility are described in more detail below. Referring now to Figure 4, an embodiment of a micro-cipher instruction 400 is disclosed in accordance with a block diagram of the present invention. 4〇〇 includes a selective pre-field Uptionalprefixfleld) 401, followed by a repeating pre-column 22 1258289 (repeat prefix field) 402, field ) 403, followed by - mode field ) 404 , in a real x86 instruction The set architecture is consistent. The instruction set architecture. Next, let's wait for the code to be placed (〇pC〇de block encryption mode block (block cipher example, the contents of the 401-404 and alternative embodiments) Considering other operations, the selective pre-blocking block 4〇1 is used in many instruction set wood structures. Also, an execution feature in the host microprocessor is enabled or disabled, such as controlling 16-bit or 32-bit operations, controlling execution or access to specific memory segments, and the like. The repeat pre-block 4〇2 is used to indicate that the cipher operation specified by the cipher command 4GG is to be performed on at least one input material (for example, an unencrypted file or an encrypted file) block. Repetitive pre-blocking is also implicitly controlled - a commensurate microprocessor that uses the contents of the complex ^ structure register as an indicator of the address in the system memory, where the memory contains the encrypted data and parameters, Complete the specified ^ code operation. As mentioned above, in an x86 compatible embodiment, the value of the repeated preamble is 0xF3. Moreover, according to the x86 architecture protocol, the cryptographic instructions are similar to the form of a repeated string instruction (for example) in an x86 architecture. For example, when an embodiment of a 86 compatible microprocessor in the present invention performs a repeating preamble, the repeated preamble will be referenced to the second block of the structure, and the second block is the representative block count variable in the ECX. The source address indicator in ESI (pointing to the input data of the password operation), and the destination address indicator (pointing to the W field of the output data in the memory) stored in the temporary crying EDI. In an x86 compatible embodiment, the present invention further expands the concept of a conventional repeated string instruction, and further refers to a control character indicator stored in the temporary crying 23 1258289 EDX, which is stored in the temporary register. The password in EBX is full: two in the register EAX pointing to the initialization direction, (= the required weight mode is required). (If = work: block 403 specifies the password operation of the microprocessor =:; Γ control word, said w through control two (10) pendulum use this rabbit to consider the operation code block 403 better choice, to As an existing value of the finger 隹 隹 隹 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , For example, 'as mentioned above—χ86 is compatible::: The number one is used in the embodiment to control the specific MM drop: Block Encryption Mode Shelf 404 specifies that the specific password has been operated::::Specific area In the block encryption mode, please refer to the fifth figure to display a numerical example of the block encryption module ^ table 500 according to the micro-password instruction of the fourth figure. The numerical QxC8 mosquito code operation uses the electronic name code book ( ECB) modulo ^. The value QxD () is the specified password operation using the encrypted block chain (CBC) mode. The value (4) specifies the password operation system uses the password feedback (CFB) mode, and the numerical secret ^ password operation system uses the output feedback (QFB) mode. Number of tears in all other block encryption modes All of them are preserved. Some of these modes are described in the above Hps slot case. Tian now looks at the sixth figure, which details a 6-compatible microprocessor in a block diagram according to the present invention. The cryptographic unit 617. The microprocessor 60 executes the logic circuit 6〇1, and the execution logic circuit 6(1) 24 1258289 retrieves the instruction to be executed from the memory (not shown in the figure). Logic circuit 602. Translation execution logic circuit 2, circuit, device or micro code (such as micro-instruction or local = public or execution logic, device or micro-code combination, or instruction translated into corresponding An equivalent component of the microinstruction sequence. The circuitry, microcode, etc. used to perform the translation function of the logic circuit 602 to perform other different functions of the translation operation: the circuit 602 includes a microcode read-only memory , to the microcode code read-only memory 604 translator 6〇3, and the bus bar connection interrupt execution logic circuit 62 circuit 602. The number of 鲈 鲈 鲈 绿 绿 绿 “ <Knowledge# 琏軏 逻辑 Logic Logic 627 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The translation execution logic circuit 605 is connected to successive levels in the gamma 600, including the scratchpad hierarchy ΖΓΊ _, the load hierarchy 607, the execution hierarchy _, and the storage hierarchy 619. Each of the successive classes is packaged; two:: the execution logic of the force, wherein these functions are executed according to the instructions of the second turn (10). The execution logic circuit was discussed in the microprocessor of the second brother. The sixth x86-compatible micro-processing crying, the field, and the execution logic in 曰_ are characterized by the execution level (four)... path 632, where the execution level _ contains parallel execution units _, 612, tick, 616, 617. A set (10) cut from the micro finger _ positive number a few floats Helmet® ^ Press the sigh positive number to snap the 7 circuit to perform it. A number of 612 received the floating-point micro-instruction from the micro-instruction column 6 to execute 25 Ί 258289. A multimedia extension set unit 614 receives the multimedia extension set microinstructions from the microinstruction queue 613 for execution. A stream extension set unit 616 receives the stream extension set microinstructions from the microinstruction queue 615 for execution. In the illustrated x86 compatible embodiment, a cryptographic unit 617 is coupled to the stream extension unit 616 by a load bus 620, a delay signal 621, and a storage bus 622. The cryptographic unit 617 shares the microinstruction queue 615 of the stream extension set unit 616. An alternative embodiment contemplates parallel independent operations of cryptographic unit 617, similar to the manner of units 610, 612, and 614. Integer unit 610 is coupled to an x86 flag (EFLAGS) register 624. Flag register 624 includes an X bit 625 that sets the state of X bit 625 to indicate whether a cryptographic operation is in progress. In one embodiment, X bit 625 is the 30th bit in an x86 flag register 624. In addition, integer unit 610 accesses a machine specific register 628 to determine the status of an E bit 629. The state of the E bit 629 indicates whether or not the cryptographic unit 617 is present in the microprocessor 600. Integer unit 610 also accesses D bit 631 in a feature control register 630 to enable or disable crypto unit 617. As an embodiment of a microprocessor 301 in the third figure, the microprocessor 600 of the sixth figure is characterized by the necessary elements, the invention is illustrated in an x86 compatible embodiment, and for the sake of clarity, the micro is collected. The necessary components in the processor 600 are omitted and other unnecessary components are omitted. Anyone skilled in the art will appreciate that other components are used to complete their interface, such as a data cache (not shown), a bus interface unit (not shown), and a clock generator. And distribution execution logic circuits (not shown in the figure) and so on. 26 1258289 The f-operation command is synchronously retrieved from the memory tape to the translation execution logic circuit 602 by the capture logic circuit 6G1 along with the clock signal (not shown in the figure). The translation execution logic circuit 6〇2 translates each instruction into a corresponding microinstruction sequence, and the sequence is sequentially provided to the subsequence of the microprocessor in the synchronization with the clock signal, 618, 619 ° - microinstruction Each microinstruction in the sequence is controlled to perform the subactions necessary for the operation corresponding to the entire instruction, for example, an address is generated by the address level _, and the two operands of the integer unit 61 相 are added (already The page is taken from the temporary register (not shown in the figure) specified in the tier 605, and is stored by the execution logic 618, which is generated by one of the execution units 610, 6i2, 614, 616, 617. The result is stored in § Recall. According to the instruction for translation, the translation execution logic circuit 602 directly uses the translator, 6〇3 to directly generate the microinstruction sequence, or the sequence from the microcode read-only memory, or directly generates a portion. The sequence of microinstructions, and the other parts of the sequence are extracted from the microcode source=memory_. Micro-instructions through micro-processing :: Continuation of the class 605, 618, 619, with the synchronization of the clock signal: the ground into the 仃. Although the microinstructions arrive at the execution level _, they will execute the logic: path 632 and their operands (taken from the scratchpad still in the scratchpad hierarchy 6, or generated by the execution logic 632 in the address hierarchy 606: Alternatively, the manned execution logic circuit 632 retrieves the data from the data micro-instruction in the manner of the corresponding micro-instruction 609, 611, 613, 615, and sends it to the calibration execution along the way. Units 61A, 612, 614, 616, 617. Execution units 61〇, 612, 614, 27 1258289 执行 are executed and the results are provided to storage hierarchy 618. In the shell target case, the microinstruction contains some areas that may or may not be executed in parallel with other actions. ^ For the response of capturing a password command as described above, the translation execution logic % path 602 generates a corresponding microinstruction, and the microinstruction controls the execution logic circuit in the subroutine ^6. 5_6() 8, 618, 619 of the microprocessor. To perform the weighting of the fingertips. Then the first plurality of corresponding micro-instructions are directly sent to the cryptographic unit 617, and the control cryptographic unit 617 loads the data provided by the loading bus, or loads an input data block and starts execution. The specified encryption round I $士人," is used to generate an output tribute block, or a generated round-out data block is provided on the storage to store it in the memory through the reserve 4 circuit 632. The micro-instructions are sent along the way to other execution units 61〇, 612, to your Μ6 towel' to perform other sub-actions necessary to complete the specified cryptographic operations, such as the test of the Ε bit _, enabling the D bit to 31 _ Bit 625 is defined to indicate that the cryptographic operation is in progress, updating the suffix;: : in the scratchpad (eg, count register, input file:: = text: metric register) 'processing is performed by interrupt Logic;: 626 proposed interrupt 627 平, squash circuit - some integer unit micro-instruction set two operations, so the integer operation can be 舆: two fell good: two ^ ^ ^ instruction is included in the corresponding micro-instruction Accept interrupts. The shape of micro 627. Since all indicators pointing to the password parameter 28 1258289 are in the X86 structured register, when the state of the interrupt service is executed, the value of the interrupted service is 六 + + + + + + ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ ’ Whether or not the micro-instruction will measure the state of the song bit 625 to determine that the execution is in progress. If yes, the interruption occurs. In the n-person data block, the password will be executed 4 = the register and the sequence of the password operation for the round-in file block:: The seventh picture of the tea, and the sixth picture The field in the instance of the microinstruction 700 of the processor _ code. Contains the field of the -ρ shell example. The microinstruction 700 22f private semaphore 701, a data register 702, and an i:::: 7 〇 3. Microcode Blocker 7〇1Specific Description-Specific Sub (4) Assign microprocessor_ at least one level of the execution logic of the pole to the ambition to know the value of a (3) 疋 的 — — — — Haizi action. The microcode stops the special code in 7〇1. In the cryptographic unit according to the present invention, the microprogramming value is calculated. The first value is "Load 2: The body address t is fetched, and the structure 2 is stored as the content of the field 702. The temporary storage of the zizhu θ, the MM manned to the crypto unit data " 曰The beneficiary is specified by the register field 703. The captured bounce (for example, the password gold data only takes the initialization vector) is sent to the & second system, the input file data, ::Γ )" indicates that The data generated by the monument is stored in the memory address 29 1258289 specified by the contents of the structure register, wherein the structured register is specified by the contents of the data register (XSTOR) field 702. . In one of the multi-level embodiments of the cryptographic unit, the contents of the temporary storage (XSTOR) block 703 are assigned a plurality of output data blocks for storage in the memory. The cryptographic unit generates an output data block in the data (XSTOR) block 704 for storage access to the execution logic circuit. Referring now to the eighth and ninth figures, it is further discussed with more specific details regarding the loading and storing of microinstructions performed by a cryptographic unit in accordance with the present invention. Referring to the eighth diagram, the load microinstruction value table 800 is a description of the value in the register field 703 for loading a microinstruction circuit in accordance with the present invention. As previously discussed, a sequence of microinstructions can be generated via a translation operation of a cryptographic instruction circuit. The microinstruction sequence includes a first plurality of microinstruction circuits executed by the cryptographic unit, and a second plurality of microinstruction circuits executed by at least one of the parallel operating units in addition to the cryptographic units in the microprocessor. The second plurality of microinstructions control sub-actions such as updating the counter, the temporary scratchpad, the structured scratchpad, the determination and setting of the status bits in the machine specific register. The first plurality of microinstructions send the key data, the password parameter, and the input data to the password unit, and the control password unit generates a gold record directory (or loads the key directory that has been retrieved from the memory) to load the input file. Data or encrypt (or decrypt) the input file data, and store the output file data. The load microinstruction in a crypto unit is used to load the control character data, load a cryptographic key or key directory, load the initialization vector data, load the input file data, and control the cryptographic unit to start execution. The specified password action. A value of the ObOlO control cipher unit is loaded into the scratchpad block 703 in the microinstruction, and a control character is loaded into the crypto unit internal 30'1258289 word slot register. When the microinstruction is executed along the pipeline operation, the structured control character index register in the access-storage hierarchy: the address of the second control register character. The translation execution logic circuit will: stop 羿# into a physical address for memory access. 1 = The control character is retrieved from the body and the control word 2:: and the control character is then transferred to the crypto unit. Similarly, the value of the control block is changed. The control password unit loads the input file data from the data=bit=, and then (4) executes the specified cryptographic device. The data is transmitted through the structure-storage port. The data loaded into the first internal register called load into = ^曰^ can be the input file data (when the pipeline operation 2::::: vector is executed. The values 0bl10 and 0b111 control the password single-chip weight key The lower or higher bit or the money in the reading list produced by the user. According to the present example, a specific function or a specific operator. The user can be a hand = for::: operating system, - machine, Or a person. Therefore, the ranks generated by the rank generation = are generated by an application. The catalogue generated by a system can be operated by one person in one embodiment. The number of column digits is OblOO and 〇_, and it is considered that one has two levels - the material block can be used as a pipeline for 2 consecutive operations, in which the continuous round-in file operation is operated by you. Therefore, In order to tube ", ^ - a continuous input data block Execute the first 31 1258289 to load the micro-instruction circuit to input the -1, and then send the human file data block to the scratchpad input file data block to the temporary storage = load micro-instruction circuit to The second element is executed to perform the specified password operation. ° ° rain into -0, and the control password list = use a user-generated gold - some corresponding to the user generated gold stub * code known as the work, was sent along the way In the password unit: D Meng Yu's load command will be returned every time. The crypto unit is loaded into the gold input directory and the micro-instruction is loaded. All the register 7 values will be retained. T /, For his number, please refer to the ninth figure, which is stored in the Η Η 士 703 for a skirt 笙 / "#值表9〇〇1| shows the register value. - The format of the map Save the micro-instruction 7. Number: The 700-storage system is sent to the password unit for extraction (such as encrypted or unpacked). The m-file block in the trace channel is stored to the storage execution logic in the memory. Arranged by the data register block 702. Therefore, 'in the case of - rounded file block generation - load financial input = translation according to the present invention A logic circuit corresponding to the line II; bar gauge material microinstruction register bit value 7G3 square surface.  The = code is presumed to correspond to the output of its first internal output register output _〇, which is provided to the storage execution logic for storage. The output-0 is provided to the input file block provided to the wheel. Similarly, the value of the second internal wheeled register output corresponds to the input file block provided to the input]. Therefore, after the loading of the gold remainder and the control character data, a plurality of rounded file blocks can be used by 32 1258289 to generate a megagram unit by generating, for example, loading (by private, η 亲1 into storage, round-in - 〇作)^ Sample control (4) Code list (4) Start to perform confidential operation:: Wheel ", store · turn out _1, load. Enter d, load to start the password operation for the next two rounds of the file block) the micro-password command in the special order to complete the pipeline operation. Referring now to the tenth figure, the +th password is used as an example of the character format format according to the present invention. The control falls: and: t - the user is designed in the memory, the password is executed and the format indicator is provided to the symmetrical processor. As with the micro-instruction configuration order corresponding to the part of the -Mimma instruction, the microprocessor is controlled to read the completion s containing the indicator: 5H index is converted into a physical memory bit: w: 'From the record-(cache) The control character side is retrieved from the memory and the control word is loaded into the internal control character temporary buffer in the crypto unit. Control character face contains -reserved (RSVD) blocker, one gold record size 1 child 疋 (KSIZE) block delete, one encryption / / decrypt (e / d) placement 1003, an intermediate result (IRSLT) block Face, a key generation (KGEN) block deletes an algorithm (ALG) to block Cong, and a round count (RCN) block 1〇07. All values in the reserved padding are preserved. Gold Size Dimension 臓 Content Specification - The size of the cryptographic key used to perform an encryption or decryption operation. In one embodiment, the key size block 1002 specifies a gold margin of a bit size, - a gold input of 192 bit size or a key of a attack bit size. The encryption/decryption block 1003 specifies that the password operation is an encryption action 33 1258289 or a decryption action. The key generation block 1005 indicates a key directory generated by a user in the memory, or a single cryptographic key. If the one provided in the memory is a single cryptographic key, then the microinstruction is transmitted to the cryptographic unit along with the cryptographic key, according to the cryptographic algorithm specified by the content of the algorithm field 1006, the microinstruction The control crypto unit will add the key to a key directory. In one embodiment, the particular value in algorithm field 1006 specifies a data encryption standard algorithm, a triple data encryption standard algorithm, or an advanced encryption standard algorithm. Alternative embodiments consider other encryption algorithms such as the Rijndael encryption algorithm, the Twofish encryption algorithm, and the like. The content of the round count field 1007 specifies the number of times the password round used to execute each data input block is performed according to the specified algorithm. Although the standard of the above algorithm specifies a fixed number of password rounds for each input file block, the provision of the round count field 1007 allows the user to change the number of password rounds specified by the standard. In an embodiment, the user can specify that each block performs a password round of 0-15 times. Finally, the content of the intermediate result field 1004 specifies whether the encryption/decryption of an input file block is to execute the number of password rounds specified in the round count block 1007 (according to the cryptographic algorithm standard specified in algorithm field 1006). Or, the number of rounds specified for the round count block 1007 is to be executed, wherein the final round executed represents an intermediate result rather than the final result (according to the algorithm specified in algorithm block 1006). Anyone skilled in the art will appreciate that many cryptographic algorithms can perform the same sub-actions in each cipher round, except that they are executed in the final round. Therefore, the intermediate result block 1004 is designed to produce intermediate results instead of 34 Ί 258289 I, winter results, which allows the programmer to have intermediate steps. For example, the results of the algorithm between Zhang Yi and Shi Yi, can be changed by the brother, used to change the operation of the algorithm, by the swearing, the code round in a password round at the same ° Α, Λ, : After executing the two file blocks, then execute the two methods to get.徂π# A In the code round, etc. Using the 7/style round and intermediate results, the user can change the effect of the password execution and eliminate the difficulty of the remote key structure and the total number of rounds. ",, change k, please see the eleventh. To give the tenth figure in the figure of the feng feng - café ^ block value table _ display,,. The value and example of the intermediate result block 1004 of pq is given to 兀1000. The value of the intermediate result block 1004 is only the arithmetic component, which is the Sr疋 cryptographic operation according to the tenth figure of the present invention (according to the normal result of the above-mentioned "! horse tea number" as discussed above. The brain + "technology" is an intermediate result of an operational element in accordance with the present invention that produces a particular number of passwords according to the tenth figure discussed above. / Now, please refer to the twelfth first cryptographic unit instance 1200. A microcode register 1203 causes the bus 1214 to receive the microcode). The cryptographic unit 1200 is also input to the temporary storage device (input _〇-1) 1206 'a first golden key register (key 4). When the micro-instruction is specified, a block diagram is used to illustrate The details of this issue. The cryptographic unit 1200 includes a 'microcode register 12' through a micro-finger, a code command (eg, load and store micro-finger includes a control character register 1204, a first) 1205, a second round The scratchpad (input register (key-0) 1207, and a second 12〇8. When the microinstruction register 12〇3 is loaded with a greedy material through a load bus 1211, 35 1258289 Provided to the scratchpad. "The unit also includes a block encryption execution logic circuit 12G1, and the block encryption execution logic is connected to each of the scratchpads, and is also connected to the (four) tangent random access memory 202. Block plus pure line circuit will also provide - delay signal 13 ' and provide block results to the first - output temporary memory | | and the second output s state 1210. These output registers through a storage sink Row (2) 2 routes a content to successive levels in a compatible microprocessor. In one embodiment, microinstruction register 1203 is 32 bits in size and each of the other registers has a size of 128. Bit _ In the operation, the micro-cipher command follows the control character register 1204, and one round enters the temporary state 1205 -1206, or one of the key registers 12 〇 7_12 〇 8 is provided to the microinstruction register 12 连 3 in a continuous manner. In the embodiment of the eighth or ninth embodiment, - The control character is loaded into the control sub-register 12 〇 4 through the manned micro-instruction. Then the password record or the gold input directory will be: continuous loading micro-instruction to load. If it is loaded a 128 The secret key of the bit is stunned for a load microinstruction to specify the scratchpad gold record 2. If it is a strong 128-bit password record, the next step is to register the scratchpad gold. Record the _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ -0 1207 load microinstruction.  .  Each key loaded in the directory of the key is sequentially stored in its corresponding password-based memory (10), and the data is loaded (if the initialization vector is used for the access to the gold (four) machine) (if It is not necessary to input the main register input 1 1200. If 36 Ί 258289 = L:: start = quantity, then the initialization vector is transmitted through the - load «曰 command to be loaded into the register input _u. - About the register input - 0 1205 load micro-instruction control cipher unit, load the input file data into the register input - G12G5 towel 'and use the register to enter the initial vector in the _u application Or use two initialization vectors in the scratchpad 'If the input lean is operated in the pipeline operation mode, according to the parameters provided by the control character content, start in the register input _〇12〇5 For the operation of the input file Γ2〇:: 密匕. After receiving the - specified register input "-, input 镟 command, the block cipher execution logic circuit 1201 begins to bind, the password specified by the word element content Operation. If you need to add a single-password record, then the block encryption execution logic Road 12 SI record: every money and stored in the gold random access memory no block plus read line logic circuit 12G1 is to generate a gold surplus == memorize loading the gold balance directory, the first round of the gold Fast = to block plus 岔 execution logic circuit, so the first block encryption back 5 can be executed without accessing the gold random access memory (10). Once the initial pure 'block encryption execution logic circuit coffee Will enter at least one of the specified password operations' and continuously retrieve the alloys that must be used in the cryptographic algorithm from the 赖 己 体 腿 腿 到 到 到 到 到 到 到 到 到 。 。 。 。 。 。 。 。 。 。 。 。 。 The block cipher operation of the file. The continuous input file block system is encrypted or decrypted corresponding to the execution of the _in and store microinstructions. If the specified output data (such as input or output) is not completed, the connection is not completed. Down block encryption execution logic 1258289 circuit 1201 will present a delay signal 1213. Once the output data is generated and stored in the corresponding output data register 12〇9_121〇, the contents of the output data temporary storage area 1209-1210 will be transmitted to Storage sink Flowchart 1212. Referring now to a thirteenth diagram, a block diagram shows an embodiment of a block cipher execution logic 1300 for performing cryptographic operations in accordance with an advanced cryptographic standard algorithm in accordance with the present invention. Block Encryption Execution Logic 13〇〇 includes a pass bus 1311-1314 and a bus 1316_1318 connected to a round engine 132 controlled by the round engine control 1310. The round engine controller 131 includes an intermediate execution logic circuit 1330 and accesses a micro instruction. The memory 13〇1, a control character register 1302, a first-golden (golden record-0) register 1303, and a second key (key-1) register 13〇4 are stored. Take the key data, the micro-order, and the parameters of the debited password operation. The contents of the input buffer 13〇5_13〇6 are provided to the round engine, and the round engine generates the corresponding output file to the output register 13〇7_13〇8. The output register i3〇7_i3〇8 is also connected to the round engine controller 131〇 through the bus bars 1316-1317, so that the return δ engine control state 1310 can access the result of each successive password round, wherein the result is transmitted through the bus bar 1318 Provided to the round engine 132 for use in the next password round. The cryptographic key is retrieved from the key Ik machine through the bus 1315. The encryption/decryption signal U11 controls the round engine to perform encryption (such as s-BOX) or decryption (such as reverse S-BOX) using sub-actions. Corresponding to the content of an intermediate result block in the control character, the intermediate mode execution logic circuit 1330 sets the state of the round count bus 1312 to control the round engine 1320 to execute the first advanced encryption standard round, an intermediate advance. The level encryption standard round, or a final advanced encryption standard 38 ^ 258289 quasi-round. The bank bus 1313 is also used to provide each back alloy key to the round engine 1320 when performing each corresponding encryption round. The round engine 1320 includes a first key exclusive exclusion (XOR) execution logic circuit 1321 coupled to the first scratchpad temporary store _0 1322. The first register 1322 is coupled to the S-BOX execution logic 1323, wherein the S-BOX execution logic 1323 is coupled to a shift execution logic (ShiflRowlogic) 1324. The shift execution logic circuit 1324 is coupled to the second scratchpad temporary storage - 1 1325. The second register 1325 is coupled to the MIX Column execution logic circuit 1326, wherein the hash execution logic circuit 1326 is coupled to the third register REG-2 1327. The first key execution logic circuit 1321, the S-BOX execution logic circuit 1323, the shift execution logic circuit 1324, and the hash execution logic circuit 1326 are constructed to perform sub-actions of the same name on the input file material, such as the FIPS advance discussed earlier. The operation specified by the level encryption standard. The hybrid execution logic circuit 1326 is additionally used in the inter-round process to perform an Advanced Encryption Standard Mutual Exclusion (AES XOR) function on the input data using the return alloy provided by the key bus 1313. In the decryption step of the encryption/decryption level 1311, the first key mutual exclusion execution logic circuit 1321, the S-BOX execution logic circuit 1323, the shift execution logic circuit 1324, and the hash execution logic circuit 1326 are also constructed to perform their corresponding Reverse advanced encryption standard subactions. Anyone skilled in the art will appreciate that the intermediate round of data is passed back to the round engine 1320, in which a particular block cipher mode is designated by the control character register 1302. The initialization vector data (if needed) is transmitted to the round engine 1320 via the bus NEXTIN 1318. Anyone skilled in the art can also understand that although the intermediate mode execution logic 39 '1258289 circuit coffee is performed according to the advanced and pure, the cryptographic operation is performed with an explicit architecture' and is specifically displayed in the block encryption execution logic circuit, however, According to other block cryptographic algorithms discussed above, the generation of intermediate results can be accomplished with respect to the substantially similar embodiments of the present invention. In the embodiment shown in the thirteenth figure, the round engine is divided into two levels. The first level is between the temporary milk and the temporary milk; the second level is between the temporary storage _1 1325 Between the temporary storage _2 1327. Intermediate capital:: With a pulse signal (not shown in the figure), in the second order μ - Li 'Wan type; synchronous insertion. When the - the key operation on the data block is completed, the output of the corresponding brother is temporarily The contents of the output register 13〇7_13〇8 of the register are reversed to 锉6仃0 (not shown in the figure). I is conveyed to a storage busbar and now see the fourteenth figure, a process The process of saving the password parameter during the interruption event is started by the microprocessing::, method, *an instruction (10) according to the present invention. The instruction flow may not have to be executed: Go to decision block 1404. Yamagata 5. Then the flow is in block 1404, which is right worm (for example, 庐I 斗 ^ " " " " " " " " " " " " " " " " " " " " " " " " " " " " " Interruption, non-observable disputes, switching, etc.) The evaluation that is taking place, t-displacement in t, = order flow to another instruction flow (in the middle of the matter: will switch the original event. If there is an interruption If it is executed, the interrupt will be executed. If no interruption occurs, proceed to the block. Wood/claw stomach formation loop 40 ^ 258289 continued in the decision block 14 〇 4 into the 耔 ^ y event occurred, the implementation of (four) command circuit direct financial - interrupt in block H06 'because - interrupt event occurred In the replacement of the system into a corresponding interrupt ", the road will clear the flag in the flag register. Clearing is used to ensure that jumping from the interrupt processing to the raft is in progress, it will be specified - Or multiple block plus operation operations have been completed by the input indicator register contents, and before the block block encryption operation is continued, the control word must be reloaded. Flow proceeds to block 1408. In block 1408, with respect to - the block cryptographic operation in accordance with the present invention, all structured temporary stores 11 containing indicators and counters are stored in the ge body. Any familiar with this The technician, ί is generally completed in today's data transport before converting (4) to interrupt processing. Therefore, the present invention makes use of this overview of the current data structure to make the execution of the entire interrupt event clear. After storing the temporary cry, 'take down The flow proceeds to block 141. °°, in block 1410, the 'program flow is switched to interrupt processing. The flow proceeds to block 1412. In block 1412, the method p 6 has been 7L. Anyone familiar with the art can understand the method in Figure 14 and the method will start again in block 1402 when jumping back from the process of Zhongyin Kaida. Please refer to the fifteenth. Figure 1, a hexagram diagram depicting a cryptographic operation on at least one input 41 1258289 data block in accordance with the present invention 'in the presence of at least one of the cakes , used to specify and generate - intermediate fruit, see, used to control according to the block encryption mode refers to the second r has been omitted 'where the block encryption mode needs to update the sub-wide search for the initialization vector parameters (such as output feedback Mode feedback mode); although those other block encryption modes are based on the party according to the present invention, the step τ #, the stipulation process starts from block 15G2, and the second private I is used to control the password according to the present invention. Password command for operation : Oral order. The execution of the password instruction may be the first execution action, or the interrupt execution of the interrupt event is followed by the first execution event, and the program control right is returned to the encryption file after the execution of the interrupt processing. . The flow then proceeds to block 1504. In block 1504, a poor block in the input index register according to the present invention is loaded from the memory and starts to be: Lpi疋# . In an embodiment, the specified password is passed to decision block 1506. - In the decision block 1506, there is an evaluation of whether or not the value of the X bit in the flag register is "set". If the value of the X bit is "set", it means that the control character disk entry directory of the manned to encrypted unit towel is valid according to the present invention. If the value is "clear", it means that the control character and the gold balance directory loaded into the plus 6, early is invalid. As mentioned above in the fourteenth figure, when the interrupt event occurs, the : bit: value is "clear". In addition, as mentioned above, # needs to load a new control word cutting directory, or g to load both of them, before the password command is transmitted in 42 1258289, the instruction must be executed to clear the bit. . If there is an interrupt, then the flow will proceed to the block if/and an interrupt occurs, then the flow will form a loopback, crying in decision block 1404, and the instruction will be executed until there is an interrupt event. Soon. In the embodiment compatible with the use of the 固86 flag register, the 固86 is the same as the 固86 compatible ,86, the p 〇 pFD instruction can be executed, and the P_ instruction can be used to clear the χ bit. However, it will be appreciated by those skilled in the art that other instructions must be used in the alternative embodiment to remove the bits. If the value of the bit is "set", then the flow proceeds to: decision block m2. If the value of the bit is "clear", then the flow proceeds to decision block 15〇8. In the block 1508, a control character is loaded from the memory because a cleared χ bit has indicated that there is a - interrupt 2 occurrence or a person to be loaded - a new control character and / or money data, a control character is loaded from the memory And the password operation originally opened in block (10) will be restarted. In an embodiment, the manned control character two = secret: the cell performs the secret case specified as described above (reference block 15〇4), starting in block 1504 - the cryptographic operation, thinking of a plurality of blocks The optimization of the encryption operation can be assumed that a positive font 70 and money data are to be used, and the electronic codebook mode is used in the block encryption mode, thus using an electronic codebook; The flow proceeds to block 151〇. In block 1510, the input file = the remaining data in block 15〇4 is again loaded, and the cryptographic operation is started according to the newly loaded sub- and meta-data. The flow then proceeds to decision = 43 Ί 258289 1512. In decision block 1512, an intermediate result field in the control character is detected to determine whether a normal result is to be generated for the loaded round block or an intermediate result is to be generated. If a normal result is to be generated, then the flow proceeds to block 1516. If an intermediate result is to be generated, then the flow proceeds to block 1514. In block 1516, a pair of output blocks that should be input to the block are generated. For encryption, the input block is an unencrypted file block and the output block corresponds to an encrypted text block. For decryption, the input block is an encrypted text block and the output block corresponds to an unencrypted text block. A specified number of rounds of rounds are executed on the input block based on the contents of a round count field in the control character. However, instead of a normal result, the generation of an intermediate result has been discussed previously. The flow then proceeds to block 1518. In block 1514, an output block corresponding to the loaded input block is generated. A specified number of password rounds are executed on the input block based on the contents of a round count block in the control character. A normal result is generated based on the specified cryptographic and block cipher modes. The flow proceeds to: Block 1518. In block 1518, the resulting output block is stored in memory. The flow then proceeds to block 152. In block 1520, the contents of the input and output block indicator registers are changed to point to the next input and output block. In addition, the content of the block count register is changed to indicate that the cryptographic operation performed on the current input data block has been 44 Ί 258289. In the embodiment discussed in the fourteenth figure, the value of the block count is saved. . However, anyone skilled in the art will appreciate that alternative embodiments consider the operation and testing of the contents of the block count register and perform the cryptographic operations of the input file block in the manner of the sampled pipeline job. The flow then proceeds to decision block 1522. In the decision block help, there is an evaluation to determine whether there is still an input data area to be imposed. In the embodiment shown here, the block counter is detected to see if its value is zero for the purpose of highlighting. If there are no zones, the block is to perform a cryptographic operation, then the flow proceeds to block 1526. If there are still blocks to perform the cryptographic operation, then the flow proceeds to block 1524. In block 1524, as indicated by the contents of the input indicator register, the next input data block will be loaded. The flow proceeds to the block coffee. In block 1526, the method has been completed. Although the invention and its objects, features and advantages have been described in detail, other embodiments can be practiced in accordance with the invention. In the case of I, the invention has been discussed in terms of x86 compatibility. However, it will be discussed in such a manner that the X86 structure is generally known, so that the present invention will be specifically described. However, the present invention includes embodiments that are applicable to other instruction architectures such as PowerPC®, Deletion 8, and other entirely new instruction set architectures. Furthermore, this service explicitly includes the execution of a cryptographic operation in the components of the -computing system (and not in the microprocessor itself). For example, the cryptographic instructions according to the present invention can be easily applied to an cryptographic unit embodiment, wherein the cryptographic unit is not an integrated circuit that operates part of the computer system (eg, "Micro-Section 2 45 1258289 II: = Ming" Is the embodiment intended to be a dedicated bridge integrated into the microcode operation or is it passed as an execution secret to the dedicated processing? : The second processor refers to the annual controller and the chapter: II. It is also contemplated that the present invention is suitable for use in the control of the crying, signal processor, array processing, etc., and performs the cryptographic operations described herein. Such a device embodiment does provide a low rate option to exclusively perform (four) code operations as a pass/decrypt processor. For the sake of clarity, the inventors will discuss these alternative processing elements as described above. In addition, although the present invention has described 128-bit blocks, it is also considered that blocks of different sizes can be used, as long as the storage rounds are greedy, output data, gold remainder, and control characters are temporarily changed. The size of the register can be. Furthermore, although the specification of the present invention particularly highlights the data encryption standard algorithm, the triple data encryption standard algorithm, and the advanced encryption standard algorithm. The inventors have pointed out that the present invention also includes less well-known block cipher algorithms, such as MARS cipher, Rijndael cipher (Rijn (jaei cipj^), Pisces plus 灵) (Twofish cipher), Blowfish encryption algorithm (Blowfish cipher), Serpent coronation, algorithm (Serpent cipher), and RC6 encryption algorithm (RC6cipher). It is fully understood that the present invention provides a dedicated block cipher device and The theory of processors, in which the 46 1258289 micro-block cryptographic action can be triggered by the execution of a single instruction. And 'Although the invention has described block cipher algorithms and performing block cipher techniques, it is noted that the present invention It can also be completely called the encryption method other than the block addition. You can observe the solution of a single instruction: etc. You can control a compatible microprocessor to perform encryption or specialization and the microprocessor contains A dedicated password 兀 ' is used to perform the cryptographic function indicated by the single-instruction circuit. The round of the attack of the layer: the device can perform the pipeline operation of the two input data blocks, and the other ones are added. The embodiment takes into account more than two orders. 12 = Expected to be the class Segmentation to support more input data blocks: :: The same way can be extended to other classes in the compatible micro-processing branch. Finally, although the invention supports a single password with a single password The unit is specifically discussed, but the present invention also covers one phase; , at: benefit: mention: a plurality of passwords that are linked in parallel with other execution units.: 2:: Ceremony: The soap element is constructed to perform specific block encryption. The first unit is constructed to perform the advanced encryption standard method, the second unit is constructed to perform the data encryption standard algorithm, etc. Although the present invention has been disclosed in the foregoing preferred embodiments, However, it is not intended to limit the invention, and it is to be understood that those skilled in the art can make various changes and modifications within the spirit and scope of the present invention. Scope ^ 47 1258289 [Simple Description of the Drawings] In order to make the above and other objects of the present invention, the following description of the preferred embodiments of the present invention will be described in more detail below: The diagram is a block diagram illustrating the application of the password today; C is a block diagram of the technique for performing the password operation.  The present invention is a micro-processing device for performing a cryptographic operation according to the present invention; the Lefour diagram is an exemplary block cryptographic module for the micro-password instruction mentioned in the block diagram of the micro-password instruction of the present invention. (2) An x86, password module demonstration in a capacitive microprocessor (5) 5 = Directly in the processor, the fan map is the cousin of the device recorded in accordance with the format of the seventh figure. The figure is shown in the seventh figure. And storage micro device records (4) sexual control adjustments The present invention refers to the encryption operation refers to the eleventh figure to illustrate the tenth figure refers to the control text table; the definite password parameters demonstrate the intermediate result category = figure for the present invention refers to the exemplary The code of the twelve brothers is illustrated in the description of the present invention, 田 °, '田 @ 二, to perform under the advanced encryption standard (4) ^ horse rape group specific embodiment of the fourteen brothers to illustrate the A flowchart for retaining the state of the parameter 48 258 289 289 in the event of an interruption; the fifteenth figure illustrates a reference to the designation or generation of one or more input data when performing cryptographic operations in the event of one or more current impediments Flowchart of the method of the result. Main component symbol description 100 Block diagram 101 First computer workstation 102 Second computer workstation 103 Third computer workstation 104 Notebook 105 Regional network 106 Network file storage device 107 First router 108 Wireless Router 109 Wireless Network 110 Wide Area Network 111 Second Router 112 Encryption/Decryption Operation 200 Block Diagram 201 Microprocessor 202 Operating System 203 Application Memory 204 Password Key Generation Program 205 Key Directory 206 Encryption Program 207 Decryption Program 208 Initialization Vector 209 Password Parameter 210 Unencrypted File 211 Encrypted File 300 Block Diagram 301 Microprocessor 302 Instruction Scratchpad 303 Translation Execution Logic Circuit 304 Microinstruction Array 305 Microinstruction Item 306 Microinstruction Item 307 Scratchpad File 308, 309 , 310, 3U, 312, 313 register 314 load execution logic circuit 49 1258289 315 data cache memory 317 storage execution logic circuit 319 memory bus 321 memory 323 control character 325 initialization vector 327 output file 400 micro password Instruction 402 Repeat Preamble Field 404 Block Encryption Kernel Placement 600 Microprocessor 602 Translation Execution Logic Circuit 604 Microcode Code Read Only Memory 606 Address Level 608 Execution Level 610 Integer Unit 614 Multimedia Extension Set Unit 616 Streaming Extended set unit 618 storage level 620 loaded bus 622 storage bus 625 X bit 627 interrupt 629 E bit 316 crypto unit 318 write back execution logic circuit 320 operating system 322 password command 324 initial encrypted record or gold directory 326 Input file 328 execution logic circuit 401 pre-block 403 operation code field 500 block encryption mode value table 601 capture execution logic circuit 603 translator 605 register level 607 load level 609, 611, 613, 615 micro-instruction伫 612 floating point unit 617 crypto unit 619 write back 621 delay signal 624 flag register 626 interrupt execution logic circuit 628 machine specific register 630 feature control register 50 1258289 631 D bit 632 execution logic circuit 700 micro-instruction 701 micro-code block 702 data register field 704 data block 703 register field 800 load micro-instruction value table 900 storage micro Let the value table 1000 control character 1001 reserved field 1002 key size block 1003 encryption / decryption field 1004 intermediate result field 1005 gold 鍮 generate block 1006 algorithm field 1007 round count field 1100 intermediate result block Value table 1200 back to unit 1201 block encryption execution logic circuit 1202 back key random access memory 1203 micro code register register 1204 control word register 1205, 1206 input register 1207, 1208 key register 1209 output data register 1210 output data register 1211 load bus 1212 storage bus 1213 delay signal 1214 micro-instruction bus 1300 block encryption execution logic circuit 1301 micro-instruction register 1302 control character register 1303 First key register 1304 second key register 1305 first input register 1306 second input register 1307 first output register 1308 second output register 1310 round engine controller 1311 encryption / decryption signal 1312 round count bus 51 Ί 258289 1313 key bus 1314 key generation bus 1315, 1316, 1317, 1318 bus 1320 round engine 1321 first key mutual exclusion Logic circuit 1322 first register 1323 S-BOX logic 1324 shift execution logic circuit 1325 second register 1326 hash execution logic circuit 1327 third register 1330 intermediate mode execution logic circuit 1400 flow chart 1402 start 1406 clear X Bit 1410 Interrupt Processing 1500 Flowchart 1404 Interrupt Determination 1408 Storage Structured Register 1412 Complete 1502 Start 1504 Load Input Block and Start Operation 1506X Bit Determination 1508 Load Control Character and Restart 1510 Load Gold The key data is loaded into the input block, and the operation 1512 is restarted to determine whether the intermediate output block 1516 which generates a total number of specified rounds for a normal result 1514 generates a normal output block 1518 for generating the total number of rounds to store the output block to the memory 1520. Update block counter and indicator 1522 to determine whether the block counter value is zero 1524 loaded into the input block and start operation 52 Ί 258289 1526 completed

53

Claims (1)

1258289, the scope of patent application: - a device for performing a password operation, comprising: - a password command circuit for generating a password command received by a computing device, the password command being a command flow executed on the computing device a portion of the cryptographic instruction circuit that specifies one of a plurality of cryptographic operations and specifies an intermediate result to be generated; and an execution logic circuit that is operatively coupled to the cryptographic instruction circuit for execution by 2·4· The cryptographic operation operates and produces the intermediate result that is specified. The apparatus of claim 1, wherein the specified W code operation further comprises: - an encryption operation comprising encrypting at least one of the at least one plaintext block to generate at least one corresponding ciphertext block. The device of claim 1, wherein the fingerprint and code operations further comprise: - decrypting, the decrypting operation comprising decrypting at least one ciphertext block to generate at least one corresponding plaintext block. The device of item 1, wherein the execution logic is to interrupt the control of one of the references by the cryptographic instruction - an intermediate result block.円 中 中 中 中 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利In the device of claim 1, the circuit is used to interrupt the reference in the password command:: ^3 - round count block. In the device according to item 7 of the patent application scope, the value of the bean stop position specifies a plurality of password rounds, and when the password operation is designated at = 54 1258289, it is in an input block. 9· 10. 11. 12. 13. Κ ϋ 'ί?, the device described in item 1, which is specified: by i 系 is based on the advanced encryption standard calculation. The device specified in item 1 is designated in accordance with the x86 instruction format. Participation: to? The device according to item 1, wherein the password command is at least one or more temporary crying in the second or third ten clothes. The device described in the item n, "the above register contains: like - ί The memory of the first register includes a first indicator corresponding to one of f: a memory address, and the first location in the first memory location is specified, and the first location in the memory is specified. The weight is completed by accessing at least one of the input text blocks corresponding to the first location. The device of claim 11, wherein the at least one slave register comprises: 1U 3 - 2 memory, wherein the content of the second register = first, one of the memory addresses, the second indicator, The second =, second, and a second position in the memory are stored to the corresponding output text block, and the output text = the living system is based on at least one of the input characters = being deducted Password command. The device of claim 11, wherein the at least one of the registers comprises: 〆 The content of the third register is indicated in the block. In the input text block, the plurality of text areas in the range of the device described in item 11, the at least one of the above-mentioned registers contains ····························· a third indicator, the third in-different indicates a third position in the memory, and the address is detailed; and is used to complete the designated 4;:; the code-in-gold number is declared as described in Item 11 of the patent The device, the register above 1 includes: /, the at least one - the third device, wherein the fifth register includes a fourth indicator corresponding to one of the four 5 k addresses, the fourth memory address a fourth position, the fourth position comprising two 'T to 2', the content of the initial vector position comprising an initial vector equivalent 'used to complete the device specified by the item 17. a state in which the sixth register contains a corresponding password - corresponding to the fifth body ii: ΐΓ ΐΓ ΐΓ ΐΓ ΐΓ ΐΓ ΐΓ ΐΓ 指明 指明 , , , 第五 第五 第五 第五 第五 第五 第五 加密 加密 加密 加密 加密 加密 加密 加密 加密 加密Parameters, and include: ^ intermediate result field to indicate a positive Results or intermediate results generated during whether the designated cryptographic operation is performed. 18. The device of claim 1, wherein the execution logic τ 码 if ' is used to generate a corresponding number of passwords in each of the at least one input text block, thereby generating a corresponding at least one of the children The block 'where the password rounds are specified by the round count field of one of the two control elements of the cryptographic unit 19. • A device for performing a cryptographic operation, comprising: a control character generator for generating a control character, 56 1258289 during a cryptographic operation, a ―:: unit 'in the - component, for receiving a command The execution of the second password command is specified. This resource is used to specify a part of the specified parameter, and the password refers to the specified password command. The memory location is specified by the content of the temporary register as claimed in the patent application. According to the advanced encryption standard: the cryptographic unit is root 41: work = item:, the device, wherein Whether the cryptographic unit produces an intermediate result block to determine the 2S ^ ^ ten result or the intermediate result. . = Please refer to the patent scope of item 19 to solve the problem in the batch in 丨丨 - -~, i /, r into the code as early as the commanded round count block to determine that the - round text block is executed. ~ In the code round block must be in • as described in the scope of claim 19 The instruction format is set to 'the password instruction The execution of the password operation in the device is via the -Murma command, and the method of the method includes: generating a "intermediate gate" line with the specified password operation period T between the results; and receiving the password instruction circuit, generating the intermediate The result is performed in the execution of the password operation. The method of claim 25 includes: the method described by the member, wherein the specifying step is configured via the password instruction, and specifically indicates whether the production is in the first step The interception produces a normal result or produces the intermediate result of the 57 1258289. • As contained in claim 25, the method includes a method in which the receiving step scale loads the control character from the memory. Item 25 includes: 1 the method, wherein the receiving step is performed according to the advanced encryption standard 291: Please refer to the 25th item of the patent scope; 30. According to χ86, if the patent application includes: t order, Provide this password instruction. The method of claim 25, wherein the specified step By means of the second intercept in the cipher command, it is indicated how many cipher rounds are executed in the block of the _ wheeled text within one of the control characters referenced during the cryptographic operation. 58