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Priority claimed from US10/633,021external-prioritypatent/US7495343B1/en
Priority claimed from US10/633,004external-prioritypatent/US7453158B2/en
Application filed by Nvidia CorpfiledCriticalNvidia Corp
Publication of TW200504929ApublicationCriticalpatent/TW200504929A/en
Application grantedgrantedCritical
Publication of TWI256702BpublicationCriticalpatent/TWI256702B/en
Internal Circuitry In Semiconductor Integrated Circuit Devices
(AREA)
Abstract
An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer is meshed. Further, another integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer may define a frame with an outer periphery and an inner periphery.
TW93114432A2003-07-312004-05-21Pad over active circuit system and method
TWI256702B
(en)