TWI254269B - Active display driving circuit - Google Patents

Active display driving circuit Download PDF

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Publication number
TWI254269B
TWI254269B TW93101123A TW93101123A TWI254269B TW I254269 B TWI254269 B TW I254269B TW 93101123 A TW93101123 A TW 93101123A TW 93101123 A TW93101123 A TW 93101123A TW I254269 B TWI254269 B TW I254269B
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transistor
voltage
voltage source
source
current
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TW93101123A
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TW200525478A (en
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Ruey-Shing Weng
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Wintek Corp
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Abstract

An active display driving circuit is disclosed in the present invention. Each pixel drive circuit contains a light-emitting element, a connection transistor connected to the light-emitting element, a driving transistor, a storage capacitor, and two switching transistors connecting an end of the storage capacitor to two voltage levels to reach the effects of capacitor coupling and changing gate voltage of the driving transistor. The circuit can be used as pixel current-driving type circuit for poly-silicon electro-luminance device featuring variation of device characteristics for improving image flaws caused by non-uniformity of threshold voltage of thin-film transistor and IR drop as well as eliminating the drawback of long period of time for charging and discharging at low current input.

Description

1254269 五、發明說明(1) 【發明所屬之技術領域】 本發明係有關一種電致發光元件(E 1 e c t r 〇 — lumincence device ; EL device)顯示器之晝素驅動電路 ,尤指一種可改善主動式多晶矽薄膜電晶體電致發光元件 (E L d e v i c e )因薄膜電晶體臨界電壓(v t h )特性不均勻與導 線電阻壓降(IR drop)所造成之影像缺陷,及在低電流輸入 時充放電時間過長等問題之驅動電路。 【先前技術】 電致發光元件(Electro-Luminescence Device ;EL device)顯示器依其驅動方式可分為被動式(Passive1254269 V. INSTRUCTION DESCRIPTION OF THE INVENTION (1) Technical Field The present invention relates to a pixel driving circuit for an electroluminescent element (E1 ectr luminescence device; EL device) display, and more particularly to an active type Polycrystalline germanium thin film transistor electroluminescent device (EL device) has image defect caused by uneven thickness voltage (vth) of film transistor and IR drop, and charge and discharge time is too long at low current input The driving circuit of the problem. [Prior Art] Electro-Luminescence Device (EL device) display can be divided into passive (Passive)

Matrix, PM-EL Display)與主動式(Active Matrix ; AM-EL Display)。而所謂的主動式驅動EL Display(AM-EL Display) ’ 即是利用薄膜電晶體(Thin Film Transistor ; TFT)搭配電容來儲存信號,藉此控制EL display的亮度灰 階表現。 雖然被動式EL Display的製作成本及技術門檻較低, 卻受制於驅動方式,解析度無法提高,因此應用產品尺寸 偈限於約5英吋以内,產品將被限制在低解析度小尺寸市 場。若要得到高精細及大晝面則須以主動驅動方式為主, 所謂的主動式驅動是以電容儲存信號,所以當掃描線掃過 後畫素仍然能保持原有的亮度;至於被動驅動下,只有被 掃描線選擇到的晝素才會被點亮。因此在主動驅動方式下 ’ EL Device並不需要驅動到非常高的亮度,因此可達到較 佳的壽命表現,也可以達成高解析度的需求。EL Device結Matrix, PM-EL Display) and Active (AM-EL Display). The so-called active display EL Display (AM-EL Display) ’ is to use a thin film transistor (TFT) with a capacitor to store signals, thereby controlling the brightness gray scale performance of the EL display. Although the production cost and technical threshold of the passive EL Display are low, it is subject to the driving method, and the resolution cannot be improved. Therefore, the application size is limited to about 5 inches, and the product will be limited to the low-resolution small-size market. In order to obtain high-definition and large-faced surfaces, active driving is required. The so-called active driving is to store signals by capacitors, so the pixels can still maintain the original brightness when the scanning lines are swept; as for passive driving, Only the pixels selected by the scan line will be illuminated. Therefore, in the active drive mode, the EL Device does not need to be driven to very high brightness, so it can achieve better life performance and achieve high resolution. EL Device junction

1254269 五、發明說明(2) 合TFT的技術可實現主動式驅動EL Display,可符合對目前 顯示器市場上對於畫面播放的流暢度,以及解析度越來越 南要求’充分展現EL Di splay上述之優越的特性。 在玻璃基板上成長TFT的技術,可為非晶石夕(amorphous silicon, a Si)製程與低溫多晶石夕(l〇w Temperature poly-silicon ;LTPS)製程,LTPS TFT 與a-Si TFT 的最大分 別,在於其電性與製程繁簡的差異。LTPS TFT擁有較高的 載子移動率,較高載子移動率意味著TFT能提供更充份的電 流’然而其製程上卻較繁複;而a — Si TFT則反之,雖然a-Si的載子移動率不如ltps,但由於其製程較簡單且成熟, 因此在成本上具有不錯的競爭優勢。 如是,由於低溫多晶矽(LTPS)製程能力的限制,導致 所製造出來的薄膜電晶體(TFT)元件其臨界電壓(1254269 V. Invention Description (2) The technology of TFT can realize active driving EL Display, which can meet the fluency of the screen display in the current display market, and the resolution is getting more and more south. 'Full display of EL Di splay above superiority Characteristics. The technique of growing TFT on a glass substrate can be an amorphous silicon (a Si) process and a low temperature polycrystalline silicon (LTPS) process, LTPS TFT and a-Si TFT. The biggest difference lies in the difference between its electrical and process complexity. The LTPS TFT has a higher carrier mobility, and the higher carrier mobility means that the TFT can provide a more sufficient current. However, the process is more complicated; while the a-Si TFT is the opposite, although the a-Si is loaded. The sub-mobility rate is not as good as ltps, but because of its simple and mature process, it has a good competitive advantage in terms of cost. If so, due to the limitation of the process capability of low temperature polysilicon (LTPS), the critical voltage of the fabricated thin film transistor (TFT) device (

Threshold Voltage,Vth)及電子遷移率(Mobility)會 產生變異,因此每個TFT元件的特性會有所不同。當驅動系 統使用類比電壓調變方式以表現灰階時,因不同畫素之τρτ 之特性不同,所以即使輸入相同之資料(Data )電壓信號 ,卻會使不同畫素之TFT產生不同之輸出電流,造成顯^;面 板上不同畫素之電致發光元件(EL device)發出之亮度不 同。這個現象會使有機發光二極體面板顯示出灰階不良之 影像’嚴重破壞面板影像之均勻性(image UnifQFmity^。 所以現階段AM-EL Display最迫切需要解決的問題,是 如何減輕低溫多晶矽薄膜電晶體特性不均勻所帶來的不良 影響。由於這些不良影響會從面板顯示出來的影像馬上=Threshold Voltage, Vth) and electron mobility (Mobility) can cause variations, so the characteristics of each TFT component will be different. When the drive system uses the analog voltage modulation method to represent the gray scale, the characteristics of τρτ of different pixels are different, so even if the same data (Data) voltage signal is input, the TFTs of different pixels will generate different output currents. , causing the display; the electroluminescent elements (EL devices) of different pixels on the panel emit different brightness. This phenomenon will cause the organic light-emitting diode panel to display a gray-scale image that seriously destroys the uniformity of the panel image (image UnifQFmity^. So the most urgent problem to be solved at this stage of AM-EL Display is how to reduce the low-temperature polysilicon film. The adverse effects of uneven transistor characteristics. Because of these adverse effects, the image displayed from the panel will be immediately =

1254269 五、發明說明(3) 能察覺,因此,不解決這個問題就很難進行下一步的開發 應用。 於是,為解決上述之缺點,美國專利US 6, 373, 454 「Active matrix electroluminescent display devices 」(Apr. 26, 2002)、美國專利 US 6,229, 506 「Active matrix light emitting diode pixel structure and concomitant method」 (May 26, 2001)與Toshiba所發表- 之論文「A Novel Current Programmed Pixel for Active Matrix OLED Displays」 (Society for Information Display 2003 (SID 20 03 ) )。 · 在上述專利、論文中’資料線的輸入電流與最後輸出 給電致發光元件使用的輸出電流是一比一(1 ·· 1 )的大小 ,因此在低電流輸入時,會造成電容與寄生電容的充放電 時間過長的缺點。 又,美國專利 US 6, 359,605「Active matrix electroluminescent display devices」 (Mar. 26, 2002 )、美國專利 US 6,501,466「Active matrix type display apparatus and drive circuit thereof」 (Dec. 26, 2002)與美國專利 US 6,535,185 「Active driving · circuit for display panel 」(Mar. 26, 2003)。 在上述專利中,其特徵在於利用電流鏡(c u r r e n t m i r r〇r )原理,達到輸入電流與輸出電流比是n比1 ( n ·· 1 ) 的關係。但是電流鏡電路中的兩顆TFT的特性必須匹配( … matched ),否則輸入電流與輸出電流的關係,將受到TFT 、1254269 V. Description of invention (3) It can be detected, so it is difficult to carry out the next development and application without solving this problem. Therefore, in order to solve the above disadvantages, U.S. Patent No. 6,373,454 "Active Matrix Electroluminescent Display Devices" (Apr. 26, 2002), US Patent No. 6,229, 506 "Active Matrix Light emitting diode pixel structure and concomitant method" ( May 26, 2001) and Toshiba's paper "A Novel Current Programmed Pixel for Active Matrix OLED Displays" (Society for Information Display 2003 (SID 20 03)). · In the above patents and papers, the input current of the data line and the output current used for the final output to the electroluminescent element are one to one (1 ·· 1 ), so capacitance and parasitic capacitance are caused at low current input. The shortcomings of charging and discharging time are too long. Further, U.S. Patent No. 6,359,605, "Active Matrix Electroluminescent Display Devices" (Mar. 26, 2002), U.S. Patent No. 6,501,466, "Active Matrix Type display apparatus and drive circuit thereof" (Dec. 26, 2002) And US Patent 6,535,185 "Active driving circuit for display panel" (Mar. 26, 2003). In the above patent, it is characterized in that the ratio of the input current to the output current is n to 1 (n··1) by the principle of the current mirror (c u r r e n t m i r r〇r ). However, the characteristics of the two TFTs in the current mirror circuit must match ( ... matched ), otherwise the relationship between the input current and the output current will be affected by the TFT,

第7頁 1254269 五、發明說明(4) 元件臨界電壓(Threshold Voltage ;Vth)變異與電子遷移 率(Mobi 1 i ty )變異的影響,因此對TFT製程的要求較高。 綜合上述之電路,其共通之缺點為若要達到全暗之畫 素亮度,需要使儲存電容電壓放電至驅動電晶體之閘、源 極電壓(Vgs)小於驅動電晶體之臨界電壓(vth),使驅動電 晶體不產生電流。然而此放電時間太長,導致寫入時間過 後’驅動電晶體之閘、源極電壓(V g s )大於驅動電晶體之臨 界電壓(V th ),因此仍有微小電流產生給予電致發光元件發 光,使得顯示面板對比變差。Page 7 1254269 V. Description of the invention (4) The variation of the threshold voltage (Vth) of the component and the variation of the electron mobility (Mobi 1 ty ), so the requirements for the TFT process are high. In combination with the above circuit, the common disadvantage is that to achieve full dark pixel brightness, it is necessary to discharge the storage capacitor voltage to the gate of the driving transistor, and the source voltage (Vgs) is smaller than the threshold voltage (vth) of the driving transistor. The drive transistor does not generate current. However, this discharge time is too long, causing the gate of the driving transistor and the source voltage (V gs ) to be larger than the threshold voltage (V th ) of the driving transistor after the writing time elapses, so that a small current is generated to give the electroluminescent element light. , making the display panel contrast worse.

又,Samsung公司所發表之論文「a New Current Programmable Pixel Structure for large-Size and High-Resolution AMOLEDs」 (International Display Workshops 20 02 (I DW 20 0 2 ))。在該論文中提出利用兩個 電容,以電容耦合原理改變驅動用之TFT的閘極電壓(Vg )Also, the paper "a New Current Programmable Pixel Structure for large-Size and High-Resolution AMOLEDs" published by Samsung Corporation (International Display Workshops 20 02 (I DW 20 0 2 )). In this paper, it is proposed to use two capacitors to change the gate voltage (Vg) of the TFT for driving by the principle of capacitive coupling.

’以達到輸入電流與輸出電流之間的關係為「輸出電流二 Ax 輸入電流+Β」(其中A、Β為常數)。但是由於製程或 佈局的影響改變了兩個電容的電容值,而會使得電容耦合 電壓值產生變異,影響驅動電晶體的輸出電流。因此該論 文所述之驅動方法對電容值的精準度、電容製程與佈局的 要求較咼之缺點。且一晝素驅動需兩個電容,將會使得晝 素之開口率較小。 【發明内容】 羡是’本發明之主要目的在於解決上述習知之缺點, 避免缺點存在,本發明係一可改善因薄膜電晶體臨界電壓'To achieve the relationship between the input current and the output current is "output current two Ax input current + Β" (where A and Β are constant). However, due to the influence of the process or layout, the capacitance values of the two capacitors are changed, which causes the capacitance coupling voltage value to mutate, which affects the output current of the driving transistor. Therefore, the driving method described in this paper has disadvantages in terms of accuracy of capacitance value, capacitance process and layout. And the two-capacitor drive requires two capacitors, which will make the aperture ratio of the halogen smaller. SUMMARY OF THE INVENTION The present invention is directed to solving the above-mentioned disadvantages and avoiding the disadvantages. The present invention can improve the critical voltage of the thin film transistor.

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(^1^)特性不均勻與導線電阻壓降(IR dr〇p)所造成之影傻 及解決低電流輸入時充放電時間過長等問題。 與每= *本發明之顯示面板上每一條掃描線 路包括Γ二枓線父叉構成一畫素,其中該畫素内之驅動電 描電曰舻Γ第一掃描電晶體與一第二掃描電晶體,該二掃 :^之閘極(G )與掃描線連接,源極(s )則連接至資料 接i驅動電晶體,該驅動電晶體之源極(S)與電壓源相連(^1^) The problem of unevenness in characteristics and the resistance drop of the wire resistance (IR dr〇p) and the problem of excessive charging and discharging time at the time of low current input. Each of the scanning lines on the display panel of the present invention includes a second line of the parent fork to form a pixel, wherein the driving electrogram in the pixel scans the first scanning transistor and the second scanning battery The crystal, the second scan: the gate (G) is connected to the scan line, and the source (s) is connected to the data-driven i-drive transistor, and the source (S) of the drive transistor is connected to the voltage source.

第一電^開關電晶體’該第-開關電晶體之源極(S)接— 電壓源,閘極(G) -端同時與上迷第 另一知同時與上述 該2二二(;)則連接至掃描線;-第二開關“體 目…: 晶體之源極⑻接-第 則連接至發光控制線。 :儲存電容’該儲存電容有兩端, 一、第二開關電晶體之汲極( 第一掃描電晶體之連接,力一端同時與上』 —發光元件,該;Γί/一驅動電晶體之閘極⑹相連接 體之汲極(D)相連接,7" %為陽極,與上述連接電晶 該電晶體全部係丄===該陰極接地。其中, 相同於上述驅動電 —= 接入,而該第二電壓^1 ^ f —電壓源亦可由發光控制線 電壓,原可由掃描線接入。或,只有第一電The first electric switch transistor 'the source (S) of the first switch transistor is connected to the voltage source, and the gate (G) terminal is simultaneously with the other one and the above 2 22 (;) Then connected to the scan line; - the second switch "body...: the source of the crystal (8) is connected - the first is connected to the light control line. : storage capacitor 'the storage capacitor has two ends, one, the second switch transistor The pole (the connection of the first scanning transistor, the end of the force is simultaneously with the upper side) - the light-emitting element, the Γί/-the gate of the driving transistor (6) is connected to the drain (D) of the connecting body, and the 7"% is the anode, Connected to the above-mentioned electrified crystal, the transistor is all 丄=== the cathode is grounded, wherein, the same as the above-mentioned driving power -= access, and the second voltage ^1 ^ f - the voltage source can also be controlled by the illuminating control line voltage, the original Can be accessed by the scan line. Or, only the first

1254269 五、發明說明(6) ^源可改由電壓源接入。或,該第一電壓源可改 接入,而該第二電壓源可由掃描線接入。 源 再一驅動電路實施例為將電日 化半導體⑽0S)電晶體。該驅動電^括金屬氧 第二掃描電晶,,該二择體二 動電晶體之源極(S)接地;一連接雷曰_ β /體 驅 之源極(S)與上述驅動t曰h s曰體’ s亥連接電晶體 夕^代η B之汲極(D)及第一掃描電晶體 之汲極(D)相連接,閘極(㈨與—發光控制線連接。 2 -開關電晶體’該第一開關電晶體之源極 第;;壓源’問極⑹則連接至掃描線;一第二開關電 則!:::!電晶體之源極⑻接—第二電壓源,閉極⑹ 只J連接至發光控制線。 一、:儲存電容,㈣存電容有㈣,—端同時與上述第 第二關電晶體之汲極(D)相連接,另-端同時與上述 ;=ϊ ΐ 體之汲極(D)及驅動電晶體之閘極(㈧相連接 ,另一 =70件,該發光元件一端為陽極,與電壓源相連接 -端為陰極,該陰極與上述連接電晶體之沒極(D)相連1254269 V. Description of the invention (6) ^ The source can be changed by the voltage source. Alternatively, the first voltage source can be re-enabled and the second voltage source can be accessed by a scan line. The source further drive circuit embodiment is an electro-optical semiconductor (10) OS) transistor. The driving circuit comprises a metal oxygen second scanning electron crystal, wherein the source (S) of the binary electrodynamic transistor is grounded; and a source (S) connected to the Thunder_β/body drive and the driving device The hs body 's hai connection transistor ^ ^ generation η B's drain (D) and the first scan transistor's drain (D) are connected, the gate ((9) is connected with the illuminating control line. 2 - Switching The crystal 'the source of the first switching transistor; the source 'question pole (6) is connected to the scan line; the second switch is electrically!:::! The source of the transistor (8) is connected to the second voltage source, Closed pole (6) Only J is connected to the light-emitting control line. 1. The storage capacitor, (4) the storage capacitor has (4), the - terminal is simultaneously connected with the drain (D) of the second off-cell transistor, and the other end is simultaneously with the above; =ϊ ΐ The body of the body (D) and the gate of the driving transistor ((8) are connected, the other = 70 pieces, the light-emitting element is an anode at one end, connected to the voltage source - the cathode is the cathode, the cathode is connected with the above The transistor is connected to the pole (D)

第一電壓源亦可由發光控制線 掃描線接入。或,只有第一電 電壓源改為接地,而該第二電 相同於上述驅動電路該 接入’而該第二電壓源可由 壓源改為接地。或,該第一 壓源可由掃描線接入。 【實施方式】The first voltage source can also be accessed by the illumination control line scan line. Or, only the first voltage source is changed to ground, and the second power is the same as the above-mentioned driving circuit, and the second voltage source can be changed from the voltage source to the ground. Alternatively, the first source of pressure can be accessed by a scan line. [Embodiment]

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茲有關本發明 明如下: 之詳細内容及技術說明 ’現配合圖式說 第一實施例: 係尽货明之第 靖=閱『第1圖』所示 η 電路示思圖。如圖所示:一― 描線1〇與每一條資料㈣本發為顯不面板上母-條掃 該驅動電路包括 交叉構成之晝素驅動電路,其中 該二掃 10連接 描雷曰辦1M U興一弗一谉描電晶體T2 ^ 、 2之閘極(G)與掃描線(Scan line ,源極(S)則連接至資料線(Data line) 20。 輙描電晶體τι與一 VDD V ^ V\Z' " ^ ^ .L ^ 運接電日日體T4,違連接電晶體T4之源極(S) m動電晶體Τ3及第二掃描電晶體Τ2之&極⑻相連接 ,閘極(G)與一發光控制線(Emission line ) 30連接。 第一開關電晶體T5,該第一開關電晶體T5之源極(s) 接一第一電壓源VI,閘極(G)則連接至掃描線1〇。一第二 關電晶體T6,該第二開關電晶體T6之源極(s)接一第二^ ^ 源V2,閘極(G)則連接至發光控制線3〇。其中上述第一掃描 電晶體τι、第二掃描電晶體以、驅動電晶體T3、連接電晶田 體Τ4、第一開關電晶體15及第二開關電晶體Τ6係為ρ通 屬氧化半導體(PM0S)電晶體。 一儲存電容Cs ’該儲存電容Cs有兩端,一端同時與上 述第一、第二開關電晶體T 5、T 6之汲極(D)相連接,另、一端 同時與上述第一掃描電晶體τι之汲極(D)及驅動電晶體5之 1254269 五、發明說明(8) 閘:(G)相連接。—發光元件40 ’該發光元件4。一端為陽極 ,,、上述連接電晶體以之汲極⑶)相連接, 二陰極接地。其中該發光元件40係為一電致發光;極’ Llectro-Luminescence Device ;EL device)。 電曰=位條掃描線1G的晝素驅動電路,其第—掃描 、ΐ二掃描電晶體T2之問極(G)端是由釉條掃描 ,電晶體T1、第二掃描電晶體”之源極 C S)螭則連接至資料線2 〇。 30 ^連Ϊ電晶㈣與之問極⑹端係由第n條發光控制線 之A 過發光元件4〇的電流大小,會由驅動電晶體η 之閘極(G)端的電壓所決定。 捭刹而ΐ Γ開關電晶體T5之閘極(G)端是由第11條掃描線1〇 ^30控制Ϊ開關電晶體T6之閘極(G)端是由第n條發光控制 其電路動作原理說明如下: j、t系統執行掃描動作到針條掃描線1〇時,第n條掃 二的電位為低電位(Vs l ) ” ,因此第一掃描電晶體τ ^、 ^垃描電晶體T2和第—開關電晶體T5呈導通⑽)狀態。 拉第η條發光控制線3〇的電位為,,高電位(% η)",因此, 晶體T4和第二開關電晶體T6為截止(〇FF),所以在這 =2並不會有電流通過發光元件4〇,以避免資料電流寫 入儲存電容Cs時有錯誤動作。 =時儲存電容Cs 一端連接驅動電晶體τ3之閘極(G)端且 透過%描電晶體了丨連接至資料線2〇,另一端透過第一開關BRIEF DESCRIPTION OF THE DRAWINGS The present invention will be described as follows: Detailed Description and Technical Description ‘The present embodiment is the same as the first embodiment: The first embodiment is the same as the quotation of the quotation of the η circuit shown in Fig. 1 . As shown in the figure: A - line 1 〇 and each piece of information (4) This is a display of the parent-strip on the panel. The drive circuit consists of a cross-structured pixel drive circuit, where the two sweeps are connected to the mine. Xingyifu, a gate transistor T2^, a gate (G) and a scan line (Scan line, source (S) are connected to a data line 20. Data transistor τι and a VDD V ^ V\Z' " ^ ^ .L ^ The connection of the solar system T4, the source (S) of the connected transistor T4, the electromagnet Τ3 and the second scanning transistor Τ2 & pole (8) The gate (G) is connected to an emission control line (Emission line) 30. The first switching transistor T5, the source (s) of the first switching transistor T5 is connected to a first voltage source VI, and the gate (G) ) is connected to the scan line 1〇. A second off transistor T6, the source (s) of the second switch transistor T6 is connected to a second source V2, and the gate (G) is connected to the illumination control line. The first scanning transistor τι, the second scanning transistor, the driving transistor T3, the connection transistor Τ4, the first switching transistor 15, and the second switching transistor Τ6 ρ is an oxidized semiconductor (PM0S) transistor. A storage capacitor Cs 'The storage capacitor Cs has two ends, one end of which is simultaneously connected to the drains (D) of the first and second switching transistors T 5 and T 6 , Further, one end is simultaneously connected to the first scanning transistor τ1 (D) and the driving transistor 5 to 1254269. The invention (8) gate: (G) is connected to the light-emitting element 40. One end is an anode, the above connecting transistor is connected with a drain (3)), and the second cathode is grounded. The light-emitting element 40 is an electroluminescence; an electrode 'Llectro-Luminescence Device; EL device. Electron 曰 = bit line scan line 1G of the pixel drive circuit, the first (G) end of the first scan, the second scan transistor T2 is the source of the glaze scan, the transistor T1, the second scan transistor The pole CS) is connected to the data line 2 〇. 30 ^ Ϊ Ϊ Ϊ 四 四 四 四 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 The voltage at the gate (G) is determined by the voltage at the gate (G) terminal. The gate (G) terminal of the switching transistor T5 is controlled by the eleventh scanning line 1〇^30, the gate of the switching transistor T6 (G). The end is controlled by the nth illumination control circuit as follows: j, t system performs the scanning action to the needle scan line 1〇, the potential of the nth sweep is low (Vs l) ”, so the first The scanning transistor τ ^, the scanning transistor T2, and the first switching transistor T5 are in a conducting (10) state. The potential of the 3rd light-emitting control line 3〇 is, high potential (% η)", therefore, the crystal T4 and the second switching transistor T6 are off (〇FF), so there is no such a =2 The current passes through the light-emitting element 4〇 to prevent erroneous action when the data current is written into the storage capacitor Cs. When the storage capacitor Cs is connected to the gate (G) terminal of the driving transistor τ3 and connected to the data line 2〇 through the % trace transistor, the other end is transmitted through the first switch.

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電晶體T5連接至第 )由資料線透過第 儲存電容CS進行充 電壓(Vg3 )等於第一 一電壓源V1。同時部 一掃描電晶體T1 、第 放電的動作,此時驅 電壓源VI電壓減儲存 份資料電流(IData 一開關電晶體T5對 動電晶體T3之閘極 電容Cs電壓(VI — 所以此時通過驅動電晶體T3的驅動電 r / 1 / Π \ ^ ;IL ^ ^Drive ^ ^=(1/2) X /3 X (Vsg3 —Vth3)2,(其t万為驅動電晶體n之 電導係數(Transconductance parameter),其中驅動電 晶體T3之源、閘極電壓Vsg3 = VDD — L = vdd — (νι — L ) )此時,貝料電流(Il)ata )等於經過儲存電容Cs的電流 (Ics )加上經過驅動電晶體T3的驅動電流(),即 •Data = iCS + IDrive 。 2、當儲存電容Cs的電壓為L時,使得通過驅動電晶 體T3的驅動電流(lDrive )等於資料線2〇上的資料電流,The transistor T5 is connected to the first voltage source V1 which is charged by the data line through the first storage capacitor CS (Vg3). At the same time, the scanning transistor T1 and the discharge operation are performed. At this time, the voltage of the driving source VI is reduced by the stored data current (IData, the switching transistor T5, the gate capacitance Cs of the moving transistor T3 (VI - so pass at this time) The driving voltage of the driving transistor T3 is r / 1 / Π \ ^ ; IL ^ ^Drive ^ ^=(1/2) X /3 X (Vsg3 - Vth3)2, (its t is the conductance coefficient of the driving transistor n (Transconductance parameter), in which the source of the driving transistor T3, the gate voltage Vsg3 = VDD - L = vdd - (νι - L )) At this time, the bedding current (Il) ata is equal to the current passing through the storage capacitor Cs (Ics ) plus the drive current () of the drive transistor T3, ie • Data = iCS + IDrive. 2. When the voltage of the storage capacitor Cs is L, the drive current (lDrive) through the drive transistor T3 is equal to the data line 2 The data current on the raft,

(l/2) x 々 x (Vsg3 — Vth3)2 ,其中 Vsg3 = VDD — V L Data :VDD -(Vl -ycs)(l/2) x 々 x (Vsg3 - Vth3)2 , where Vsg3 = VDD — V L Data : VDD -(Vl -ycs)

此時貝料寫入動作完成。因此Cs儲存電容的電壓為L =(2 X ^ata / β )〇/2) _(VDD -VI -V )。 T th3 7 ” j、最後,當第n條掃描線i 〇的電位由”低電位(Vs l ),,轉 為南電位(vS H)”時,第一掃描電晶體Tl、第二掃描電晶體 T2和第一開關電晶體T5呈”截止(〇FF)”狀態。此時第n條發 光控制線30的電位由”高電位(Veh)”轉為”低電位(Vel)” , 因此’連接電晶體T4和第二開關電晶體T6呈導通(0N)狀態At this time, the bedding write operation is completed. Therefore, the voltage of the Cs storage capacitor is L = (2 X ^ata / β ) 〇 / 2) _ (VDD - VI - V ). T th3 7 ′ j, finally, when the potential of the nth scanning line i 由 is changed from “low potential (Vs l ) to south potential (vS H)”, the first scanning transistor T1 and the second scanning power The crystal T2 and the first switching transistor T5 are in a "off (〇FF)" state. At this time, the potential of the nth light-emitting control line 30 is changed from "high potential (Veh)" to "low potential (Vel)", so ' The connecting transistor T4 and the second switching transistor T6 are in a conducting (ON) state

1254269 五、發明說明(10) ' — --—1 此時儲存電容Cs —端連接驅動電晶體T3之閘極(G)端, 另一端透過第二開關電晶體T6連接至第二電壓源V2。所以 驅動電晶體T3之閘極電壓(vgs)為第二電壓源V2電壓減儲存 電容Cs電壓(V2 — Ves)。 於是通過驅動電晶體T3的驅動電流為Ii)rive =(1/2) χ冷χ (Vsg3^h3)2,其中V⑷=VDD-Vg3=VDD—(V2—Vcs)。此時驅 動電流(〖Drive )透過連接電晶體T4流經發光元件40,使發 光元件4 0發光。 /綜合上述,可得資料電流()與驅動電流()的 關係為 IDrive = (l/2)x /5x 〔(2x IData/ 万)(1/2) + νι 一 V2〕2。 由上述之驅動原理及數學式,得知輸出于發光元件4 〇 電肌之大小與驅動電晶體τ3本身之臨界電壓值()無關 ’只與寫入之資料電流(iData )大小有關,所以可以補償 薄膜電晶體(TFT)因製程因素所造成的臨界電壓之變異。 此外’由於第一電壓源V1與第二電壓源v 2的電壓差, 造成驅動電晶體T3之閘極(G)端電壓(vg3)有偏移量( offset)。所以若第二電壓源V2的電壓大於第一電壓源vi之 電壓,在低灰階之小驅動電流(iDrive )時,可以輸入較大 的資料電流(Id—)以降低電流對儲存電容Cs、寄生電容 的充電時間,可同時解決充放電時間過長的問題。 第二實施例: 睛參閱『第2圖』所示,係本發明之第二實施例晝素内 電路示意圖。如圖所示··本發明係為顯示面板上每一條掃 描線1 0與每一條資料線20交叉構成之畫素驅動電路,其中1254269 V. INSTRUCTIONS (10) ' — --—1 At this time, the storage capacitor Cs is connected to the gate (G) end of the driving transistor T3, and the other end is connected to the second voltage source V2 through the second switching transistor T6. . Therefore, the gate voltage (vgs) of the driving transistor T3 is the voltage of the second voltage source V2 minus the storage capacitor Cs (V2 - Ves). Then, the driving current through the driving transistor T3 is Ii)rive = (1/2) χ cold χ (Vsg3^h3) 2, where V(4) = VDD - Vg3 = VDD - (V2 - Vcs). At this time, the driving current (〖Drive) flows through the light-emitting element 40 through the connection transistor T4, and the light-emitting element 40 emits light. / In summary, the relationship between the data current () and the drive current () is IDrive = (l/2)x /5x [(2x IData/million)(1/2) + νι_V2]2. According to the driving principle and the mathematical formula described above, it is known that the magnitude of the output muscle of the light-emitting element 4 is independent of the threshold voltage value () of the driving transistor τ3 itself, and is only related to the size of the written data current (iData), so Compensating for variations in the threshold voltage caused by process factors in thin film transistors (TFTs). Further, due to the voltage difference between the first voltage source V1 and the second voltage source v 2 , the gate (G) terminal voltage (vg3) of the driving transistor T3 is offset. Therefore, if the voltage of the second voltage source V2 is greater than the voltage of the first voltage source vi, a small data current (Id-) can be input to reduce the current to the storage capacitor Cs at a low driving current (iDrive) of the low gray level. The charging time of the parasitic capacitor can solve the problem of too long charging and discharging time. SECOND EMBODIMENT: The eye is shown in Fig. 2, which is a schematic diagram of the circuit in the second embodiment of the present invention. As shown in the figure, the present invention is a pixel driving circuit formed by crossing each scanning line 10 on the display panel and each of the data lines 20, wherein

第14頁 1254269 五、發明說明(11) 該驅動電路與第一實於 只在於該第二開關心D驅動電路大致相同,不同之處 改由發光控制線30接乂體:之源極⑻原來接第-電壓源Vi 來接一第二電壓源V2改V第一開關電晶體了6之源極(S)原 第由掃描線10接入。 第一 1實?,广動作原理說明如下: 描線10 的 , ^niMf 第二掃描電晶體了2和第Y ’因此第一 ~描電晶體T1、 此時第η條發光控制線3f) /關電晶韻呈導通(0N)狀態。 連接電晶體T4和第Λ ;7位為”高電位心)"’因此’ 電流通過發光元件40,以避免資料電流% 入儲存電容Cs時有錯誤動作。 電㈣寫 此時儲存電容C S _LA . _ 透過掃描電曰體連接驅動電晶體13之閘極(G)端且 電m Ϊ曰曰體連接至資料線20,另一端透過第一開關 曰曰、接至第η條發光控制線3 〇。同時部份資料電流 二7;?乂資料一線透過第一掃描電晶體τι、第-開關電晶 „ 子電谷CS進行充放電的動作,此時驅動電晶體T3 甲=電壓(Vg3)等於發光控制線3〇之高電位)減 谷 Cs 電壓(VpH—Vrc)。 ’ 所以此時通過驅動電晶體T3的驅動電流(丨^)為丨^ = x点x (Vsg3 一 Vth3)2,(其中/5為驅動電晶體T3之電導{ ,驅動電晶體T3之源閘極電壓= VDD _、3 = VDD 一Page 14 1254269 V. Description of the Invention (11) The driving circuit is substantially the same as the first driving circuit of the second switching core D. The difference is changed by the light-emitting control line 30: the source (8) is original. Connected to the first voltage source Vi to connect a second voltage source V2 to V. The first switching transistor 6 source (S) is originally connected by the scan line 10. The first one is real? The principle of wide operation is as follows: For the line 10, ^niMf the second scanning transistor has 2 and the first Y', so the first ~ tracing transistor T1, at this time the nth illuminating control line 3f) / turn off the crystal crystallization (0N) status. Connect the transistor T4 and the Λ; 7 bits are "high potential" " 'so' the current passes through the illuminating element 40 to avoid the wrong action when the data current % enters the storage capacitor Cs. (4) Write the storage capacitor CS _LA at this time _ connected to the gate (G) end of the driving transistor 13 through the scanning electrode body and connected to the data line 20 by the electric m body, and the other end is connected to the nth light emitting control line 3 through the first switch 曰曰〇 At the same time, part of the data current is 2; 乂 一 一 一 一 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 It is equal to the high potential of the light-emitting control line 3〇, and the valley Cs voltage (VpH-Vrc). ' So at this time, the driving current (丨^) through the driving transistor T3 is 丨^ = x point x (Vsg3 - Vth3) 2, (where /5 is the conductance of the driving transistor T3 {, the source gate of the driving transistor T3 Pole voltage = VDD _, 3 = VDD

CsE’H )。因此,資料電流(kta )等於經過儲存電容 s的電流(Ics )加上經過驅動電晶體T3 驅動流 x Drive ^CsE’H ). Therefore, the data current (kta) is equal to the current through the storage capacitor s (Ics) plus the drive current through the drive transistor T3 x Drive ^

1254269 五、發明說明(12) ,即 Lata 2、當儲存電容Cs的電壓為vcs時,使得通仍賊^ T3的驅動電流(I )望认次丨, 使付通過騙動電晶體 (Drive )專表-貝料線2〇上的資料電 L V 111254269 V. Inventive Note (12), that is, Lata 2. When the voltage of the storage capacitor Cs is vcs, the driving current (I) of the thief ^T3 is still recognized, and the circuit is passed through the spoofing transistor (Drive). Special table - the data line on the 2 line of the shell material line LV 11

Drive I Da taDrive I Da ta

DriveDrive

vg3 = VDD-(VE (1 / 2 ) x /3 x ( ν· 一 t rcs sg3Vg3 = VDD-(VE (1 / 2 ) x /3 x ( ν· a t rcs sg3

V th3V th3

,其中V sg3, where V sg3

lData ^ VDD '(2Bt l! ^ !(t;D ^ ^ ^ t cslData ^ VDD '(2Bt l! ^ !(t;D ^ ^ ^ t cs

V 3最後,當第n條掃描線1 〇的電位由,,低雷v λ 為,,高電位(νςΗ)”時,笛一卢 > 雨 由低電位(VS,L),f轉 T2 ^ ^ M t a ^T5 ^ I " f ^ ^ ’連接電晶體T4和第二開關電晶體T6呈導通⑽E)L狀態 =儲存電容Cs -端連接驅動電晶體 電晶體T6連接至掃描線"。所上 J曰曰體Τ3之閘極電壓(Vg3)等於掃 壓減儲存電容Cs電壓(Vs h —Vcs)。 之-電位d)電 (v ^ s: th3 其中 Vsg3 —VDD — Vg3 =VDD —(vs H —vcs)。此時 β電流(lDrive)透過連接電晶體T4流經發光元件40,使發 光元件4 0發光。 ,合上述,可得資料電流Uata)與驅動電流(i_e)的關 '、·.、、 Drive =(1/2) x ^ χ 〔(2 X IData / /3 )(w) +νΕ Η — Vs Η〕2 。 由上述之驅動原理及數學式,得知輸出于發光元件4〇V 3 Finally, when the potential of the nth scanning line 1 由 is , , low ray v λ is , high potential ( ν ςΗ ) ” , 笛 卢 & 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨 雨^ ^ M ta ^T5 ^ I " f ^ ^ 'Connecting transistor T4 and second switching transistor T6 are conducting (10) E) L state = storage capacitor Cs - terminal connection driving transistor transistor T6 connected to scan line " The gate voltage (Vg3) of the upper body is equal to the voltage of the storage capacitor Cs (Vs h - Vcs). - potential d) electricity (v ^ s: th3 where Vsg3 - VDD - Vg3 = VDD —(vs H —vcs) At this time, the β current (lDrive) flows through the light-emitting element 40 through the connection transistor T4, so that the light-emitting element 40 emits light. In combination, the data current Uata) and the drive current (i_e) are obtained. Off ', ·.,, Drive =(1/2) x ^ χ 〔(2 X IData / /3 )(w) +νΕ Η — Vs Η〕2. The output principle and mathematical formula are used to know the output. Light-emitting element 4〇

五、發明說明(13) ”i大小f驅動電晶體T3本身之臨界電壓值(㈣無關, S曰許/ί 貝電流(L )大小有關,所以可以補償薄膜 電BB體^?1!)因製程因素所造成的臨界電壓之變異。 此=,由於掃描線10之高電位(Vs η)與發光控制線3〇之 ^位(VE,H)的電壓差,造成驅動電晶體T3之閘極⑹端電 =偏移量(offset)。所以若掃描線1〇之高電位(Vs “大於 發先控制線30之南電位(ve h) ’在低灰階之小驅動電流( ;Γς ’可以輸入較大的資料電流(iData)以降低電流對儲 f :谷Cs、寄生電容的充電時間’可同時解決充 過長的問題。 第三實施例: 雷踗請ί ^『第3圖』所示,係本發明之第三實施例畫素内 少η。如圖所示··本發明係為顯示面板上每-條掃 :' 、母一條資料線2 〇交叉構成之畫素驅動電路,其中 以,動電路與第一實施例之驅動電路大致相同,不同之處 =ί於該第一開關電晶體Τ5之源極(S)原來接第一電壓源VI 電Μ源VDD接入;$第二開關電晶體了6之源極⑻還是 與第一實施例相同接一第二電壓源V2。 第三實施例電路動作原理說明如下··V. Description of invention (13) "I size f drive transistor T3 itself's threshold voltage value ((4) independent, S曰/ 贝 shell current (L) size, so it can compensate for the film BB body ^? 1!) The variation of the threshold voltage caused by the process factor. This = due to the voltage difference between the high potential (Vs η) of the scanning line 10 and the position (VE, H) of the light-emitting control line 3, causing the gate of the driving transistor T3 (6) Terminal power = offset (offset), so if the scan line is 1 高 high potential (Vs "greater than the south potential of the first control line 30 (ve h)" in the low gray level of the small drive current (; Γς ' can Entering a large data current (iData) to reduce the current charging time for storing f: valley Cs and parasitic capacitance can solve the problem of overcharging at the same time. Third embodiment: Thunder please ί ^ "3rd picture" According to the third embodiment of the present invention, there is less η in the pixel. As shown in the figure, the present invention is a pixel driving circuit formed by a crossover of each of the scanning strips: ' and a parent data line 2 , on the display panel. Wherein, the dynamic circuit is substantially the same as the driving circuit of the first embodiment, and the difference is that the first switching transistor The source (S) of 5 is connected to the first voltage source VI, and the source VDD is connected; the source of the second switching transistor 6 is connected to the second voltage source V2 as in the first embodiment. The principle of the circuit operation of the embodiment is as follows:

Jn、#系統執行掃描動作到第“条掃描線1〇時,第η條掃 第L捃!!電位&⑮電位(Vs,l”,因此第-掃描電晶體τι、 此^ 1電/曰丄體T2和第一開關電晶體T5呈導通(〇N)狀態。When the Jn and # systems perform the scanning operation until the first "scanning line 1", the ηth sweeps the first L!! potential & 15 potential (Vs, l", so the first-scanning transistor τι, this ^ 1 electricity / The body T2 and the first switching transistor T5 are in a conducting (〇N) state.

^ ^ ^ ^ ^ f ^(Ve'h)" ' ® J 日曰 和第—開關電晶體T6為截止(off),所以在這 1254269 五、發明說明(14) Γ11 ί不會有電流通過發光元件40 ’以避免資料電流寫 入儲存電容Cs時有錯誤動作。 =時儲存電容Cs 一端連接驅動電晶體T3之閘極(g)端且 電m!體τι連接至資料線2〇,另一端透過第-開關 料:透過第;;㊈!、=。同:部份資料電流由資 ☆ 知柄電aB體11、第一開關電晶體T5對儲存電 广二二放電的動作,此時驅動電晶體T3之閘極電壓( 83 ;電壓源VDD電壓減儲存電容Cs電壓(VDD — Vcs)。 …二以此二通二動電 數,驅動雷曰(其中々為驅動電晶體T3之電導係 (VDD 原問極電魔Vsg3 = VDD-V- = VDD- 的電产(T)力L身料電流(I一)等於經過儲存電容Cs 的電:“ics力:上經過驅動電晶體η的驅動電流(U,即 lData ics + IDrive 〇 2、 當儲存電容Cs的電壓為vcs時,使得 ㈣的驅動電流uDrive)等於 電動電, =Ι〇Ηνβ = (1/2) X β χ (V — ν 、2 7 ^ ^ ^ IData VDD - (VDD - Vcs)。 邮 th3 ,、令如=VDD — Vg3 ^cs 此時資料寫人動作完成1此 =(2x L / 好 1/2)-(vdd〜vdd—v )。,電壓為Vc 3、 最後’當第η條掃描線 7 為"高電位(Vs,„)”時,第 二由,電fd)轉 T2 ^ ^ F.1 ^ f .¾ ^T5 μ :;f, , ,; ^ ^ ^ 光控制線30的電位由”高電 )狀態。此時第η條發 田回電位(vEH)”轉為”低電位(U丨丨, 第18頁 1254269^ ^ ^ ^ ^ f ^(Ve'h)" ' ® J Sun and the first switch transistor T6 are off (off), so here 1254269 V, invention description (14) Γ11 ί will not have current The light-emitting element 40' prevents an erroneous action when the data current is written into the storage capacitor Cs. When the storage capacitor Cs is connected to the gate (g) end of the driving transistor T3 and the electric m! body is connected to the data line 2〇, the other end is transmitted through the first-switch material: through the first; , =. The same: part of the data current by the ☆ 柄 handle electric aB body 11, the first switch transistor T5 on the storage of electricity wide two two discharge action, at this time drive the transistor T3 gate voltage (83; voltage source VDD voltage minus Storage capacitor Cs voltage (VDD - Vcs). ... 2 This two-way two-electrode number drives the Thunder (where 々 is the conductance system of the driving transistor T3 (VDD is the original electric magic Vsg3 = VDD-V- = VDD - The output of the electric (T) force L (I) is equal to the electricity passing through the storage capacitor Cs: "ics force: the drive current through the drive transistor η (U, ie lData ics + IDrive 〇 2, when stored When the voltage of the capacitor Cs is vcs, the drive current uDrive) of (4) is equal to the motor power, =Ι〇Ηνβ = (1/2) X β χ (V — ν , 2 7 ^ ^ ^ IData VDD - (VDD - Vcs) Post th3,, such as = VDD — Vg3 ^cs At this point, the data writes the action to complete 1 this = (2x L / good 1/2) - (vdd ~ vdd - v )., the voltage is Vc 3, the last 'when When the nth scanning line 7 is "high potential (Vs, „)”, the second is, electric fd) turns to T2 ^ ^ F.1 ^ f .3⁄4 ^T5 μ :;f, , ,; ^ ^ ^ The potential of the light control line 30 is in a "high power" state. η article Shibata return potential (vEH) "to" low potential (U Shu Shu, pp. 181,254,269

因此連接電晶體T4和第二開關電晶體T6呈導通(〇N)狀態 1時儲存電容Cs —端連接驅動電晶體T3之閘極(G)端, 另一端透過第二開關電晶體T6連接至第二電壓源V2。所以 驅動電晶體T3之閘極電壓(Vg:3)為第二電壓源V2電壓減儲存 電容Cs電壓(V2 — Vcs)。 於是通過驅動電晶體T3的驅動電流為= (1/2) x召χ (ν_ :Vth3)2,其中Vsg3 =VDD -Vg3 =VDd -(V2 — Vcs)。此時驅 動電流(IDrive )透過連接電晶體74流經發光元件4〇,使發 光元件4 0發光。 鲁 ^綜合上述,可得資料電流(Lata )與驅動電流(〖Drive )的關 係為 Live = (l/2)x 〔(2x lData/ 卢)(1/2) +VDD — V2〕2。 由上述之驅動原理及數學式,得知輸出于發光元件4 〇 電流之大小與驅動電晶體T 3本身之臨界電壓值(v t h )無關 ’只與寫入之資料電流(lData )大小有關,所以可以補償 薄膜電晶體(TFT )因製程因素所造成的臨界電壓之變異。 此外,由於電壓源VDD與第二電壓源V2的電壓差,造成 驅動電晶體T3之閘極(G)端電壓有偏移量(〇f f set)。所以若 第二電壓源V2的電壓大於電壓源Vj)D之電壓,在低灰階之小籲 驅動電流(iDrive )時,可以輸入較大的資料電流(lData )以 降低電流對儲存電容C s、寄生電容的充電時間,可同時解 決充放電時間過長的問題。 第四實施例: 請參閱『第4圖』所示,係本發明之第四實施例畫素内Therefore, when the connection transistor T4 and the second switching transistor T6 are in the on state (〇N) state 1, the storage capacitor Cs is connected to the gate (G) end of the driving transistor T3, and the other end is connected to the second switching transistor T6. The second voltage source V2. Therefore, the gate voltage (Vg: 3) of the driving transistor T3 is the voltage of the second voltage source V2 minus the storage capacitor Cs voltage (V2 - Vcs). Then, the driving current through the driving transistor T3 is = (1/2) x χ (ν_ : Vth3) 2, where Vsg3 = VDD - Vg3 = VDd - (V2 - Vcs). At this time, the driving current (IDrive) flows through the light-emitting element 4 through the connection transistor 74, and the light-emitting element 40 emits light. Lu combines the above, and the relationship between the data current (Lata) and the drive current (Drive) is Live = (l/2)x [(2x lData / Lu) (1/2) + VDD - V2] 2. According to the driving principle and the mathematical formula described above, it is known that the magnitude of the current output to the light-emitting element 4 is independent of the threshold voltage value (vth) of the driving transistor T 3 itself, and is only related to the size of the written data current (lData). It can compensate for the variation of the threshold voltage caused by the process factors of the thin film transistor (TFT). Further, due to the voltage difference between the voltage source VDD and the second voltage source V2, the voltage at the gate (G) terminal of the driving transistor T3 is offset (〇f f set). Therefore, if the voltage of the second voltage source V2 is greater than the voltage of the voltage source Vj)D, a large data current (lData) can be input to reduce the current to the storage capacitor Cs when the low-short drive current (iDrive) is low. The charging time of the parasitic capacitor can solve the problem of too long charging and discharging time. Fourth Embodiment: Please refer to FIG. 4, which is a fourth embodiment of the present invention.

第19頁 1254269 五、發明說明(16) ,路示意圖。如圖所示:本發明係 與每一條資料線2〇交叉構成之畫素驅 、第_實施例之驅動電路大々 只在於該第—開關電晶體T5之源極(S)原來接。發朵不同= 2:電壓源m接入;該第二開關電晶體:=7:30 由掃描線10接入。 之原極(S)還疋 第四實施例電路動作原理說明如下: 描線;0的\系^\執行掃描動作到第n條掃描線10時,第n條掃 t線10的電位4低電位(Vsl)",因此第一掃描電晶額、 ΐ; Γ:電Λ體T2和第一開關電晶體T5呈導通⑽)狀態。 連接Γ曰體Ϊ4Λ制線30的電位為”高電位(Ve,h)”,因此, 個階段:不舍:開關電晶體T6為截止(0FF),所以在這 宜,有電机通過發光元件40,以避免資料電流( Data )寫入儲存電容Cs時有錯誤動作。 4 7¾ ^ f儲存電容^ 一端連接驅動電晶體T3之閘極⑹端且 ^描電晶體71連接至資料線2〇,另一端透過第一開關 電日日體Τ 5連接至雷懕、7§ vnn m -t 資料ΐ Ϊ 同時部份資料電流(l )由 二=線透過第-知描電晶體71、第一開關電晶體T5對儲存 ,乂進行充放電的動作,此時驅動電晶體Τ3之閘極電壓 83於電壓源VDD電壓減儲存電容Cs電壓(VDD — Vcs)。 [Drive = (1/2)X /5x(Vs 所以此時通過驅動電晶體T3的驅動電& (u為 (其中冷為驅動電晶體τ 3Page 19 1254269 V. Description of invention (16), schematic diagram of the road. As shown in the figure, the present invention is a pixel drive formed by intersecting each of the data lines 2, and the drive circuit of the first embodiment is only the source (S) of the first switch transistor T5. Different hair = 2: voltage source m is connected; the second switching transistor: = 7:30 is connected by scan line 10. The original pole (S) is also described in the fourth embodiment. The circuit operation principle is as follows: Trace line; 0's ^ system ^ When the scan operation is performed to the nth scan line 10, the nth sweep t line 10 has a low potential 4 (Vsl)", therefore, the first scanning electric crystal amount, ΐ; Γ: the electric body T2 and the first switching transistor T5 are in a conducting (10) state. The potential of the connection body Λ4 Λ line 30 is "high potential (Ve, h)", therefore, the stage: the failure: the switching transistor T6 is off (0FF), so here, there is a motor through the illuminating element 40, to avoid the wrong action when the data current (Data) is written into the storage capacitor Cs. 4 73⁄4 ^ f storage capacitor ^ One end is connected to the gate (6) end of the drive transistor T3 and the transistor 71 is connected to the data line 2〇, and the other end is connected to the Thunder through the first switch, and the 7 § is connected to the Thunder, 7§ Vnn m -t data ΐ Ϊ At the same time, part of the data current (l) is stored by the second-line through the first-shaped transistor 71, the first switching transistor T5, and the charging and discharging action is performed. At this time, the transistor 驱动3 is driven. The gate voltage 83 is at the voltage source VDD voltage minus the storage capacitor Cs voltage (VDD - Vcs). [Drive = (1/2)X /5x (Vs, so at this time, by driving the driving power of the transistor T3 & (u is (where cold is the driving transistor τ 3

VDD - V ^ l II ο , \ | yu 之,導係數,驅動電晶體T3之源閘極電壓 ▼一 y -vdd-(VDD-vcs))。因此,資料電流)等於過VDD - V ^ l II ο , \ | yu, the conduction coefficient, the source gate voltage of the driving transistor T3 ▼ a y -vdd-(VDD-vcs)). Therefore, the data current is equal to

1254269 五、發明說明(17) 儲存電容Cs的電流 流(IDrive),即 IData = L + … τ二H存電容Cs的電壓為Vcs時,使得通過驅動電晶體 τ 、 。τ .〜L(lDrive)等於資料線20上的資料電流(“_), i 加上經過驅動電晶體T3的驅動電 lDrive1254269 V. Description of Invention (17) The current of the storage capacitor Cs (IDrive), that is, IData = L + ... τ, the voltage of the two H storage capacitors Cs is Vcs, so that the transistor τ is driven. τ . ~ L (lDrive) is equal to the data current on the data line 20 ("_), i plus the drive power through the drive transistor T3 lDrive

II

Data 1 Dr i ve VDD -(VDD x /3 x (v V,Data 1 Dr i ve VDD -(VDD x /3 x (v V,

^CS sg3^CS sg3

V th3 其中Vs g3 VDD - V, g3 此時資料寫入動作完成。因此Cs儲存電容的電壓為vcs (X Lata / /5)(1/2) ~(VDD —VDD — Vth3 )。 j、最後,當第n條掃描線丨0的電位由”低電位()If轉 :而電位(vs,H)”時,第一掃描電晶體n、第二掃描電晶體 T2和第-開關電晶體T5呈”載止(〇FF)”狀態。此時^條發 光控制線30的電位由”高電位(Veh)”轉為,,低電位(y,,, 因此,連接電晶體T4和第二開關電晶體T6呈導通(〇n)狀態 此時儲存電容Cs —端連接驅動電晶體T3之閘極(G)端, 另端透過第二開關電晶體τ 6連接至掃描線j 〇。所以驅動 電晶體Τ3之閘極電壓(Vg3)等於掃描線1〇之高電位)電 壓減儲存電容Cs電壓(VS,H—Ves)。 ’ 於是通過驅動電晶體T3的驅動電流為=(1/2) χ万χ (V…U,其中Vsg3 =VDD —Vg3 =VDD -(VS H —Vcs)。此時 驅動電流(IDrive )透過連接電晶體T4流經發光元件40,使 發光元件4 0發光。 .综合上述,可得資料電流(Lata)與驅動電流(IDrive)的關 係為1Drive = (1/2 )X /5x 〔(2x IData / )(1/2) +VDD —v"〕2。V th3 where Vs g3 VDD - V, g3 The data write operation is completed. Therefore, the voltage of the Cs storage capacitor is vcs (X Lata / /5) (1/2) ~ (VDD - VDD - Vth3 ). j. Finally, when the potential of the nth scanning line 丨0 is changed from "low potential () If: potential (vs, H)", the first scanning transistor n, the second scanning transistor T2, and the first switch The transistor T5 is in a "loaded (〇FF)" state. At this time, the potential of the light emission control line 30 is changed from "high potential (Veh)" to a low potential (y, and, therefore, the connection transistor T4 and the second switching transistor T6 are turned on (〇n) state. The storage capacitor Cs is connected to the gate (G) terminal of the driving transistor T3, and the other terminal is connected to the scanning line j 透过 through the second switching transistor τ 6. Therefore, the gate voltage (Vg3) of the driving transistor Τ3 is equal to the scanning. Line 1 高 high potential) voltage minus storage capacitor Cs voltage (VS, H - Ves). Then the drive current through the drive transistor T3 is = (1/2) χ χ (V...U, where Vsg3 = VDD - Vg3 = VDD - (VS H - Vcs). At this time, the drive current (IDrive) is connected through The transistor T4 flows through the light-emitting element 40 to cause the light-emitting element 40 to emit light. In summary, the relationship between the data current (Lata) and the drive current (IDrive) is 1Drive = (1/2)X /5x [(2x IData) / )(1/2) +VDD —v"]2.

1254269 五、發明說明(18) 由上述之驅動原理及數學式,得知輸出于發光元件4〇 電流之大小與驅動電晶體T3本身之臨界電壓值(nh)無關, 與寫入之 > 料電流(IData )大小有關,所以可以補償薄膜 電晶體(TFT)因製程因素所造成的臨界電壓之變異。 此外,由於電壓源VDD電壓與掃描線1〇之高電位(Vsh) 的電壓差,造成驅動電晶體T3之閘極(G)端電壓有偏移-offset)。所以若掃描線10之高電位(Vsh)大於電壓源vdd電 壓,在低灰階之小驅動電流(lDrive)時,可以輸入較大的資 料電流Uata)以降低電流對儲存電容。、寄生電容的充電 時間,可同時解決充放電時間過長的問題。 _ 第五實施例: 請參閱『第5圖』所示,係本發明之第五實施例畫素内 電路示意圖。如圖所示:本發明係為顯示面板上每一條 描線10與每一條資料線20交又構成之畫素驅動電路,其 該驅動電路包括: -第-掃描電晶體N1與一第二掃描電晶體N2,該二掃 描電晶體N1、N2之閘極(G)與掃描線1〇連接,源極(幻則 接至資料線20。1254269 V. DESCRIPTION OF THE INVENTION (18) According to the above-mentioned driving principle and mathematical formula, it is known that the magnitude of the current outputted to the light-emitting element 4 is independent of the threshold voltage value (nh) of the driving transistor T3 itself, and the writing > The current (IData) size is related, so it can compensate for the variation of the threshold voltage caused by the process factors of the thin film transistor (TFT). Further, due to the voltage difference between the voltage source VDD voltage and the high potential (Vsh) of the scanning line 1 ,, the voltage at the gate (G) terminal of the driving transistor T3 is shifted -offset). Therefore, if the high potential (Vsh) of the scan line 10 is greater than the voltage source vdd voltage, a large data current Uata can be input at a low gray scale small drive current (lDrive) to reduce the current to the storage capacitor. The charging time of the parasitic capacitor can solve the problem of too long charging and discharging time. _ Fifth Embodiment: Referring to Fig. 5, there is shown a circuit diagram of a pixel in a fifth embodiment of the present invention. As shown in the figure: the present invention is a pixel driving circuit formed by each of the drawing lines 10 on the display panel and each of the data lines 20, and the driving circuit comprises: - a first scanning transistor N1 and a second scanning power In the crystal N2, the gate (G) of the two scanning transistors N1 and N2 is connected to the scanning line 1〇, and the source is connected to the data line 20.

一驅動電晶體N3,該驅動電晶體N3之源極(s)接地。 一連接電晶體N4,該連接電晶體N4之源極(幻與上述驅 晶體N3之汲極(0)及第一掃描電晶體N1之汲 閘極(G)與一發光控制線30連接。 運接 -第-開關電晶體N5,言玄第一開關電晶體N5之源極 接一第一電壓源VI,閘極(G)則連接至掃描線1〇。一第二開A driving transistor N3, the source (s) of the driving transistor N3 is grounded. A connection transistor N4 is connected, and the source of the connection transistor N4 is connected to a drain (G) of the driver crystal N3 and a gate (G) of the first scan transistor N1 to be connected to an illumination control line 30. Connected to the first switch transistor N5, the source of the first switch transistor N5 is connected to a first voltage source VI, and the gate (G) is connected to the scan line 1〇.

第22頁 1254269Page 22 1254269

1254269 五、發明說明(20) 第五實施例電路動作 1、當系統執行掃描動明如下: 描線1 0的電位為”高田動作到第n條掃描線1 〇時,第η條掃 第二掃描電晶體Ν 2和裳」&Η),因此第一掃描電晶體Ν 1、 此時第η條發光控制線一開關電晶舰呈導通(_ 電晶體Ν4和第二開關、電位為’’低電位(U,因此連接 階段並不會有電流載止(〇FF),所以在這個 (U寫入儲存電容Cs時有^ 過第二=ί Ϊ二;連:J t驅動電晶體N3之閘極端且透 N5對Csf“電容進行;放二:㈣1、第-開關電晶體 閘極電壓(u等於第H = t此驅動電晶體N3之 ,(V1+V )。 電壓源”減去儲存電容Cs之電壓vcs 1/2) Γ; ;; lDrive) Λ lDrive=( 驅動電晶體N 3之源閘極電壓ν1254269 V. INSTRUCTION DESCRIPTION (20) The fifth embodiment of the circuit action 1, when the system performs the scanning motion as follows: The potential of the trace 10 is "the high field action to the nth scan line 1 〇, the nth scan the second scan The transistor Ν 2 and the skirt "amplifier", therefore, the first scanning transistor Ν 1, at this time, the nth illuminating control line is turned on and off (_ transistor Ν4 and the second switch, the potential is '' Low potential (U, so there is no current load (〇FF) in the connection phase, so in this (U writes the storage capacitor Cs when there is a second = ί Ϊ; even: J t drives the transistor N3 The gate is extremely and transparent to N5 to Csf "capacitor; put two: (four) 1, the first switch transistor gate voltage (u is equal to the H = t of the drive transistor N3, (V1 + V). Voltage source" minus storage Capacitor Cs voltage vcs 1/2) Γ; ;; lDrive) Λ lDrive=( drive gate N 3 source gate voltage ν

gs3 m),(其中召為驅動電晶體N3之電導係J gS3 = Vg3-Vl+Vr --gs, *g3 V 1 τ vcs y ^ ί-j , β: 覺>”L l lData ) 4方;經過儲存雷定f 4 〜丨吻什电合LS的電流(I )加上經過驅 私Φ Θ胁M Q ΛΑ时A各、丄/ _ ^ ? 因此,資料 + 1 動電晶體N3的驅動電流U,即、a m 2、當儲存電容Cs的電壓為Vcs時,使得通過’:驅動電晶體 N3的驅動_電流(1一)等於資料線2Q上的資料電流(1_),Gs3 m), (wherein the conductance of the driving transistor N3 is J gS3 = Vg3-Vl+Vr --gs, *g3 V 1 τ vcs y ^ ί-j , β: 觉 > "L l lData ) 4 After storing the current (I) of the singularity of the singularity of the singularity of the singularity of the singularity of the singularity of the singularity of the singularity of the singularity of the singularity of the singularity of the singularity of the singularity of the singularity The current U, that is, am 2, when the voltage of the storage capacitor Cs is Vcs, causes the driving current_1 (1) of the drive transistor N3 to be equal to the data current (1_) on the data line 2Q,

Ii)ata = lDrive = (l/2)x y5x (Vgs3—Vth3)2,其中u = Vg3 = vl+v「s。Ii)ata = lDrive = (l/2)x y5x (Vgs3-Vth3)2, where u = Vg3 = vl+v"s.

此時資料寫人動作完成。因此儲存電容Cs的電壓為L 第24頁 1254269 五、發明說明(21) =(2 X IData/ yS )(1/2) —(V1 。 3、最後,當第n條掃描線1 〇的電位由”高電位(^ η )"轉 為’’低電位(VS L)”時,第一掃描電晶體N1、第二掃描電晶體 N2和第一開關電晶體N5呈截止(〇FF)狀態。此時第〇條發光 控制線30的電位由”低電位(Ve l)”轉為”高電位(% η)” ,因 此連接電晶體Ν4和第二開關電晶體Ν6呈導通(ON)狀態。 此時C s儲存電容一端連接驅動電晶體n 3之閘極(G )端, 另一端透過第二開關電晶體N6連接至第二電壓源V2。所以 此時驅動電晶體N3之閘極電壓(Vg3)為V2 + VCs。所以通過驅 動電晶體N 3的驅動電流為lDrive = (1 / 2 ) X X (vgs3 — Vth3 )2,其 中Vgs3 = Vg3 = V2 + Vcs。此時驅動電流(IDrive)透過連接電晶體 N 4流經發光元件4 〇,使發光元件4 〇發光。 綜合上述,可得資料電流(iData)與驅動電流(lDrive)的關 係為 Live = (1/2)X /3x 〔(2x IData / /3 )(1/2) + V2 — VI〕2。 由上述之驅動原理及數學式,得知輸出于發光元件4〇 電流之大小與驅動電晶體N3本身之臨界電壓值(vth)無關, 只與寫入之資料電流(iData)大小有關,所以可以補償薄膜 電晶體(TFT)因製程因素所造成的臨界電壓之變異。 此外,由於第二電壓源V2與第一電壓源VI的電壓差, 造成驅動電晶體N3之閘極端電壓有偏移量(of f set)。所以 若第二電壓源V2小於第一電壓源V 1,在低灰階之小驅動電 流(Lrwe )時,可以輸入較大的資料電流(IData)以降低電流對 電容、寄生電容的充電時間,解決充放電時間過長的問題At this point, the data writer completes the action. Therefore, the voltage of the storage capacitor Cs is L. Page 24 1254269 V. Description of the invention (21) = (2 X IData / yS ) (1/2) - (V1. 3. Finally, when the potential of the nth scanning line is 1 〇 When the "high potential (^ η ) " is changed to the 'low potential (VS L)", the first scanning transistor N1, the second scanning transistor N2, and the first switching transistor N5 are turned off (〇FF) state. At this time, the potential of the second light-emitting control line 30 is changed from "low potential (Ve l)" to "high potential (% η)", so that the connected transistor Ν4 and the second switching transistor Ν6 are turned on (ON). At this time, one end of the Cs storage capacitor is connected to the gate (G) end of the driving transistor n3, and the other end is connected to the second voltage source V2 through the second switching transistor N6. Therefore, the gate voltage of the driving transistor N3 is driven at this time. (Vg3) is V2 + VCs. Therefore, the driving current through the driving transistor N 3 is lDrive = (1 / 2 ) XX (vgs3 - Vth3 )2, where Vgs3 = Vg3 = V2 + Vcs. At this time, the driving current (IDrive) By connecting the transistor N 4 through the light-emitting element 4 〇, the light-emitting element 4 〇 emits light. In summary, the data current (iData) and the drive current are obtained. The relationship of (lDrive) is Live = (1/2)X /3x [(2x IData / /3 )(1/2) + V2 - VI]2. From the above-mentioned driving principle and mathematical formula, the output is illuminated. The magnitude of the current of the component 4 is independent of the threshold voltage (vth) of the driving transistor N3 itself, and is only related to the size of the written data current (iData), so that the criticality of the thin film transistor (TFT) due to process factors can be compensated. In addition, due to the voltage difference between the second voltage source V2 and the first voltage source VI, the gate voltage of the driving transistor N3 is offset (of f set), so if the second voltage source V2 is smaller than the first A voltage source V1 can input a large data current (IData) at a low gray-scale small driving current (Lrwe) to reduce the charging time of the current to the capacitor and the parasitic capacitance, and solve the problem of excessive charging and discharging time.

第25頁 1254269 五、發明說明(22) 第六實施例: 請參閱『第6圖』所示,從士 電路示意圖。如圖所示:本發明明之第六實施例畫素内 描線1。與每一條資料線2。交又構-= 與第五實施例之驅動電路鳩同= 改由發光控制線30接入;該來接第-電壓 來技一常+ γ… 哀第一開關電晶體Ν6之源極(S)原 接第一電壓源V2改由掃描線1〇接入。 第六實施例電路動作原理說明如下·· hL、當系統執行掃描動作到第η條掃描線10時,第η條掃 :線1〇的電位為”高電位(Vsh)”,因此第一掃描電晶體Νΐ、 ^ 一掃描電晶體Μ和第一開關電晶體N5呈導通(〇N)狀態。 在,第η條發光控制線3〇的電位為,,低電位(Vu),因此連接 電b,體N4和第二開關電晶體N6為截止(〇FF) ’,所以在這個 隱焱並不會有電流通過發光元件4 〇元件,以避免資料電流 (Lau )寫入儲存電容(;S時有錯誤動作。 、 此時儲存電容Cs —端連接驅動電晶體N3之閘極端且透 過第二掃描電晶體N2連接至資料線20,另一端透過第一開 關電晶體N5連接至第n條發光控制線3〇。同時部份資料電流 (IData)由資料線2〇透過第一掃描電晶體N1、第一開關電晶 5對Cs儲存電容進行充放電的動作,此時驅動電晶體N3 之閉極電壓(vg3)等於第^條發光控制線30之低電位(VE,L)減 去儲存電容Cs之電壓VCs,即(VE,L + VCS)。 所以通過驅動電晶體N3的驅動電流(iDrive)為iDrive二Page 25 1254269 V. INSTRUCTIONS (22) Sixth Embodiment: Please refer to the schematic diagram of the slave circuit shown in Figure 6. As shown in the figure, the sixth embodiment of the present invention shows a line 1 in the pixel. With each data line 2. The cross-construction-= is the same as the driving circuit of the fifth embodiment = the access is made by the illumination control line 30; the connection to the first-voltage is a constant + γ... The source of the first switching transistor Ν6 (S The first voltage source V2 is connected to the scan line 1〇. The circuit operation principle of the sixth embodiment is described as follows: · hL, when the system performs the scanning operation to the nth scanning line 10, the potential of the nth scan: line 1〇 is "high potential (Vsh)", so the first scan The transistor Νΐ, ^ a scan transistor Μ and the first switching transistor N5 are in a conducting (〇N) state. The potential of the nth light emission control line 3〇 is, low potential (Vu), so the connection electric b, the body N4 and the second switching transistor N6 are off (〇FF) ', so in this concealment is not There will be current passing through the illuminating element 4 〇 element to avoid the data current (Lau) being written into the storage capacitor (; S has a wrong action. At this time, the storage capacitor Cs is connected to the gate of the driving transistor N3 and through the second scan. The transistor N2 is connected to the data line 20, and the other end is connected to the nth light-emitting control line 3 through the first switching transistor N5. At the same time, part of the data current (IData) is transmitted from the data line 2〇 through the first scanning transistor N1. The first switching transistor 5 charges and discharges the Cs storage capacitor. At this time, the closing voltage (vg3) of the driving transistor N3 is equal to the low potential (VE, L) of the second illumination control line 30 minus the storage capacitor Cs. The voltage VCs, ie (VE, L + VCS), so the driving current (iDrive) by driving the transistor N3 is iDrive II

第26頁 1254269 五、發明說明(23) (1 / 2 ) X冷X ( Vgs3 Vth3 )2,(其中卢為驅動 數,驅動電晶細之源問極電壓, T : 此,資料電流等於經過储存電容加I 經過驅動電晶體N3的驅動電流,即! ^ 2、當儲存電容CS的雷懕ni , ,, ,J)aU CS+ Vive ° 沾賊私愈、^ T ’電i為Vcs時使得通過驅動電晶體 的驅動電抓(IDrive )等於資料線2 〇上的資料電流 I^IDrive = (l/2)x (Vgs3 一 Vth3)2 ,其中v_ = v Dat^ 。 (2x IData / /3)。/2) — (ve l 此時資料寫入動作完成。因此儲存電容Csg的電L壓為γPage 26 1254269 V. Description of invention (23) (1 / 2) X cold X (Vgs3 Vth3) 2, (where Lu is the number of drives, the source of the drive crystal is asked to the pole voltage, T: this, the data current is equal to The storage capacitor plus I is driven by the driving current of the transistor N3, that is, ^^ 2. When the storage capacitor CS is thundered, , , , J) aU CS+ Vive °, the thief is private, and ^ T 'electric i is Vcs The drive electric catch (IDrive) by driving the transistor is equal to the data current I^IDrive = (l/2)x (Vgs3 - Vth3)2 on the data line 2, where v_ = v Dat^ . (2x IData / /3). /2) — (ve l The data writing operation is completed at this time. Therefore, the electric L voltage of the storage capacitor Csg is γ.

V th3 3、最後,當第n條掃描線1〇的電位由,•高電位(v"),,轉 N2广:一位時,第一掃描電晶體N1、第二掃描電晶體 2和第一開關電晶體N5呈截止(〇FF)狀態。此時第n條發光 控制線30的電位由”低電位(Ve l)”轉為”高電位(υ,,,因 此連接電晶體N4和第二開關電晶體N6呈導通(〇N)狀態。 此時Cs儲存電容一端連接驅動電晶體们之閘極(〇端, 另端透過第二開關電晶體N 6連接至掃瞄線1 〇。所以此時 ,動電晶體N3之閘極電壓(Vg;3)為Vsl + Vcs。所以通過驅動電 曰曰㈣3的—驅動電流為I[)rive =(1/2) χ θ χ u,其中 、=二'3 =vs,L + vcs。此時驅動電流(lDrive)透過連接電晶體以 ^經發光元件4 0,使發光元件4 〇發光。 綜合上述,可得資料電流(lData)與驅動電流(I—J的關 ,、為 Vive =(1/2) X /5 X 〔(2 X IData / /3 )(1/2) +Vs,L _νΕ Η〕2 。 Α由上述之驅動原理及數學式,得知輪出于發光元件4 0 電流之大小與驅動電晶體N3本身之臨界電壓值(vth)無關,V th3 3, finally, when the potential of the nth scan line 1〇 is, • high potential (v"), turn N2 wide: one bit, the first scan transistor N1, the second scan transistor 2 and the first A switching transistor N5 is in a cut-off (〇FF) state. At this time, the potential of the nth light-emitting control line 30 is changed from "low potential (Ve l)" to "high potential", so that the connected transistor N4 and the second switching transistor N6 are in a conducting (〇N) state. At this time, one end of the Cs storage capacitor is connected to the gate of the driving transistor (the end, and the other end is connected to the scanning line 1 through the second switching transistor N 6 . Therefore, at this time, the gate voltage of the moving transistor N3 (Vg) 3) is Vsl + Vcs. So by driving the electric 曰曰 (4) 3 - the drive current is I[)rive =(1/2) χ θ χ u, where ==2'v =, L + vcs. The driving current (lDrive) causes the light-emitting element 4 to emit light by connecting the transistor to the light-emitting element 40. In summary, the data current (lData) and the driving current (I-J off, Vive = (1) are obtained. /2) X /5 X [(2 X IData / /3 )(1/2) +Vs,L _νΕ Η]2 Α From the above-mentioned driving principle and mathematical formula, it is known that the wheel is the current of the light-emitting element 40 The size is independent of the threshold voltage value (vth) of the driving transistor N3 itself.

1254269 五、發明說明(24) 只與寫入之資料電流(IData)大小有關,所以可以補償薄膜 電晶體(TFT )因製程因素所造成的臨界電壓之變異。 此外,由於掃描線10之低電位(vSL)與發光控制線30之 低電位(VE,L)的電壓差,造成驅動電晶體N3之閘極端電壓有 偏移量(〇 f f se t)。所以若掃描線1 〇之低電位(% L)小於發光 控制線3 0之低電位(VE L),在低灰階之小驅動電流()時 ,可以輸入較大的資料電流(lDau)以降低電流對電寄 生電容的充電時間’解決充放電時間過長的問題。 第七實施例: 請參閱『第7圖』所示,係本發明之第七實施例畫素内_ 電路示意圖。如圖所示:本發明係為顯示面板上每一一條掃 描線10與每一條資料線20交叉構成之畫素驅動電路,盆中 該驅動電路與第五實施例之驅動電路大致相同,不同之處 在於4第一開關電晶體N 5之源極(s )原來接第一電壓源v 1 改為接地;該第二開關電晶體T6之源極(s)還是與第五實施 例相同接一第二電壓源V2。 第七實施例電路動作原理說明如下: ^ 1、當系統執行掃描動作到第η條掃描線1 〇時,第n條掃 2線1i的電位為’’高電位(Vs,H),,,因此第一掃描電晶體Ν1、 · 一掃描電晶體N2和第一開關電晶體N5呈導通(〇N)狀態。 第η條發光控制線3〇的電位為,,低電位(Vel),因此連接 匕:體N4和第二開關電晶體關為截止(〇FF),所以在這個 1¾奴並不會有電流通過發光元件4 〇元件,以避免資料電流 (Data )寫入儲存電容Cs時有錯誤動作。1254269 V. Description of the invention (24) It is only related to the size of the written data current (IData), so it can compensate for the variation of the threshold voltage caused by the process factors of the thin film transistor (TFT). Further, due to the voltage difference between the low potential (vSL) of the scanning line 10 and the low potential (VE, L) of the light-emitting control line 30, the gate voltage of the driving transistor N3 is offset (〇 f f se t). Therefore, if the low potential (% L) of the scanning line 1 小于 is smaller than the low potential (VE L) of the light-emitting control line 3, a large data current (lDau) can be input at a low driving current (LD) of the low gray level. Reduce the charging time of the current to the parasitic capacitance' to solve the problem that the charging and discharging time is too long. Seventh Embodiment: Please refer to FIG. 7 , which is a schematic diagram of a pixel in the seventh embodiment of the present invention. As shown in the figure, the present invention is a pixel driving circuit formed by intersecting each scanning line 10 on the display panel with each of the data lines 20. The driving circuit in the basin is substantially the same as the driving circuit of the fifth embodiment. The source (s) of the first switching transistor N 5 is originally connected to the first voltage source v 1 to be grounded; the source (s) of the second switching transistor T6 is still the same as the fifth embodiment. A second voltage source V2. The principle of the circuit operation of the seventh embodiment is as follows: ^ 1. When the system performs the scanning operation to the nth scanning line 1 ,, the potential of the nth scanning 2 line 1i is ''high potential (Vs, H),,, Therefore, the first scanning transistor Ν1, the scanning transistor N2, and the first switching transistor N5 are in a conducting (〇N) state. The potential of the nth light-emitting control line 3〇 is, low (Vel), so the connection 匕: body N4 and the second switching transistor are off (〇FF), so there is no current passing through this 13⁄4 slave The light-emitting element 4 〇 element prevents the data current (Data) from being written into the storage capacitor Cs with an erroneous action.

12542691254269

括堵存電谷C s端連接驅動電晶體N 3之閘極端且透 2電晶體N2連接至資料線2G,另-端透過第-開 接地。同時部份資料電流(Lata )由資料線2 0透 田電晶體N1、第一開關電晶體N5對Cs儲存電容進 電的動作,此時驅動電晶體N3之閘極 容cs 之電壓vcs ,即(0 + Vcs)。 g3 以通過驅動電晶體N3的驅動電流(1_)為、‘ x (Vgs3 — vth3)2,(其中/3為驅動電晶體N3之電導 驅動電晶體N3之源閘極電壓Vgs3 = ^ = 〇 + Vcs)。 料電流(iData)等於經過儲存電容Cs的電流(Ics)加 此 過第二 關電晶 過第一 行充放 儲存電 所 (1/2) X 係數, 此,資 經過驅 2 、 N3的驅 ^ata =〇 + vcs。 因 k虽儲存電容Cs的電壓為ycs時,使得通過驅動電晶體 動電流(iDrive)等於資料線20上的資料電流(I_a), ^Drive ~ (1/2)χ β X (Vg s3 — Vth3)2,其中 Vg ;s3 此時資料寫入動作完成。因此儲存電容Cs的電壓為v =(2X iData / /5)0/2) —( 〇 — Vth3 ) 〇 、’ 3、最後,當第n條掃描線1〇的電位由,f高電位η)"轉 為’’低電位(vs,L)’’時,第一掃描電晶體N丨、第二掃描電晶 體N2和第一開關電晶體N5呈截止(〇FF)狀態。此時第^^條發 光控制線30的電位由”低電位(Ve l)”轉為”高電位(% η)π , 因此連接電晶體Ν4和第二開關電晶體Ν6呈導通(〇Ν)狀態。 此時C s儲存電容一端連接驅動電晶體N 3之閘極(G )端, 另一端透過第二開關電晶體N6連接至第二電壓源V2。所以The C s end of the storage valley is connected to the gate terminal of the driving transistor N 3 and the transistor N2 is connected to the data line 2G, and the other end is grounded through the first-opening. At the same time, part of the data current (Lata) is input from the data line 2 0 through the transistor N1 and the first switch transistor N5 to the Cs storage capacitor. At this time, the voltage of the gate of the transistor N3 is cs vcs, that is, (0 + Vcs). G3 is driven by the drive transistor N3 (1_) as 'x (Vgs3 - vth3)2, (where /3 is the source gate voltage Vgs3 of the drive transistor N3 driving the transistor N3 Vgs3 = ^ = 〇+ Vcs). The material current (iData) is equal to the current through the storage capacitor Cs (Ics) plus the second off-gate crystal through the first line of charge and discharge storage (1/2) X coefficient, which is driven by the drive 2, N3 ^ata =〇+ vcs. Since k stores the capacitance Cs as ycs, the driving current (iDrive) is equal to the data current (I_a) on the data line 20, ^Drive ~ (1/2) χ β X (Vg s3 - Vth3) ) 2, where Vg ; s3 at this time the data writing action is completed. Therefore, the voltage of the storage capacitor Cs is v = (2X iData / /5) 0 / 2) - ( 〇 - Vth3 ) 〇, '3, finally, when the potential of the nth scanning line 1〇, f high potential η) " When switching to ''low potential (vs, L)'', the first scanning transistor N?, the second scanning transistor N2, and the first switching transistor N5 are in an off (?FF) state. At this time, the potential of the light-emitting control line 30 is changed from "low potential (Ve l)" to "high potential (% η) π, so that the connection transistor Ν4 and the second switching transistor Ν6 are turned on (〇Ν) At this time, one end of the Cs storage capacitor is connected to the gate (G) end of the driving transistor N3, and the other end is connected to the second voltage source V2 through the second switching transistor N6.

第29頁Page 29

1254269 五、發明說明(26) 所以通過驅 -u , 其 此時驅動電晶體N 3之閘極電壓(Vg3)為v 2 + Vcs 動電晶體N 3的驅動電流為iDrive = (ι/2)χ ^^(妒 中V^3 =Vg3 =V2 + VCS。此時驅動電流(lDrive)透過連接電晶體 N 4流經發光元件4 0,使發光元件4 〇發光。 ^綜合上述,可得資料電流(IData)與驅動電流(IDrive)的關 係為 Vive = (1/2)χ /5χ [ (2 X IData / β )(1/2) + V2 _〇 J 2 = (1/2) x 々 X〔(2 X IData / /5 )(1/2) +V2〕2。 由上述之驅動原理及數學式,得知輸出于發光元件40 電流之大小與驅動電晶體N3本身之臨界電壓值(Vth)無關, 只與寫入之 > 料電流(iData)大小有關,所以可以補償薄膜 電晶體(TFT)因製程因素所造成的臨界電壓之變異。 此外,由於第二電壓源V2與接地(0)的電壓差,造成驅 動電晶體N3之閘極端電壓有偏移量(〇f fset)。所以若第二 電壓源V 2小於接地(〇 ),在低灰階之小驅動電流(I )時 ’可以輸入較大的資料電流(iData)以降低電流對電容、寄 生電容的充電時間,解決充放電時間過長的問題。 第八實施例: 請參閱『第8圖』所示,係本發明之第八實施例畫素内 電路示意圖。如圖所示··本發明係為顯示面板上每一一條掃 描線10與每一條資料線2〇交叉構成之畫素驅動電路,其中 該驅動電路與第六實施例之驅動電路大致相同,不同^處 只在於該第一開關電晶體N5之源極(s)原來接發光控制線3〇 改為接地;該第二開關電晶體T6之源極還是與第六實施 例相同還是由掃描線1 〇接入。 第30頁 1254269 五、發明說明(27) 第八實施例電路動作原理說明如下: 、第二播i- ^ 電j (Vs,h),因此第一掃描電晶體N1 。此時第W0體⑽和第—開關電晶體N5呈導通(0N)狀態 接電晶體光控制線3〇的電位為,,低電位(Ve,l),因此連 個階段並不=一ΐ關電晶體N6為截止(0FF),所以在這 ,ώ(Ι )'耷 電流通過發光元件40元件,以避免資料電 抓(IData )寫入儲存電容Cs時有錯誤動作。 過第& 2 ^電奶—端連接驅動電晶體N3之間極端且透 連接至資料線2〇,另-端透過第-開 過第:=Ϊ同時部份資料電流(1一)由資料線20透 行充放雷ίΐ #Λ晶體Nl、第一開關電晶體N5 儲存電容進 、作,此時驅動電晶體N3之閘極電壓(V )等於 健存電谷Cs之電壓Vcs ,即(〇+Vcs)。 斤乂通過驅動電晶體N 3的驅動電流(I ) A I = (1/2) X /3 X (v —v V r 甘 士 ^ Drive)為 IDrive — gs3 th3),(其中/5為驅動電晶體N3之電導 :資: = 源問極電壓V-令〇^)。因 一、’ /瓜(lData)等於經過儲存電容Cs的電流(Ics)加上 經過二電晶體N3:驅動電流(1」^ 田儲存電谷Cs的電壓為vcs時,使得通過驅動電晶體 N3的驅動電流(Uve)等☆資料線20上的資料電流(iData), lData = (1/2)x /5x (Vgs3 — Vth3)2 ,其中Vgs3 = Vg3 = 0 + Vcs 在時資料寫入動作完成。因此儲存電容Cs的電壓為 一 (2 X Uata / /3 )(1/2) ~ ( Q _ 乂咖)。 、 1254269 五、發明說明(28) 3、最後,當第η條掃描線丨〇的電位由,,高電 為"低電位(VS,L)”時,第一掃描電晶體N1、第二掃^)曰2 N2和第一開關電晶體N5呈截止(〇FF)狀態。此時 控制線30的電位由”低電位(I)”轉為”高電位(H、,因 此連接電晶體N4和第二開關電晶體N6呈導通(〇N)狀態。 此時Cs儲存電容—端連接驅動電晶體⑽之閘極端, 另一端透過第二開關電晶體N6連接至第11條掃描線1〇。所以 此時驅動電晶體N3之閘極電壓(Vg3)為% l + ^。所以通過 驅動電晶體N3的驅動電流為lDrWe =(1/2)χ 盆由 V 一 y 一 . ^ v gs3 y th3 ^ 、gs3 — g3 一 S,L + Vcs。此時驅動電流(IDrive)透過連接電晶 體N 4流經發光元件4 〇,使發光元件4 q發光。 /細合上述,可得資料電流(丨^ )與驅動電流()的 關係為 IDrive = (l/2)x /3χ ( 2 X IData / β )(1/2) + ys L _〇 J 2 = (1/2) x /9 x〔(2x IData/ "I/。+Vs l〕2。 ’ 由上述之驅動原理及數學式,得知輸出于發光元件4〇 電流之大小與驅動電晶體N3本身之臨界電壓值(vth)無關, 只與寫入之資料電流(iData)大小有關,所以可以補償薄膜 電晶體(TFT)因製程因素所造成的臨界電壓之變異。 此外,由於掃描線10之低電位(Vsl)與接地(v = 〇)的電 壓差’造成驅動電晶體N 3之閘極端電壓有偏移量(0 f f s e t) 。所以若掃描線10之低電位(VS,L)小於接地(〇),在低灰階 之小驅動電流(Lrive )時,可以輸入較大的資料電流(IData )以 降低電流對電容、寄生電容的充電時間,解決充放電時間 過長的問題。1254269 V. Inventive Note (26) Therefore, by driving -u, the gate voltage (Vg3) of the driving transistor N 3 is v 2 + Vcs, and the driving current of the moving transistor N 3 is iDrive = (ι/2) χ ^^(妒V^3 = Vg3 = V2 + VCS. At this time, the driving current (lDrive) flows through the light-emitting element 40 through the connecting transistor N 4 to cause the light-emitting element 4 to emit light. The relationship between current (IData) and drive current (IDrive) is Vive = (1/2) χ /5 χ [ (2 X IData / β )(1/2) + V2 _〇J 2 = (1/2) x 々 X[(2 X IData / /5 )(1/2) + V2] 2. From the driving principle and the mathematical expression described above, the magnitude of the current output to the light-emitting element 40 and the threshold voltage of the driving transistor N3 itself are known ( Vth) is irrelevant, only related to the size of the written current (iData), so it can compensate for the variation of the threshold voltage caused by the process factors of the thin film transistor (TFT). In addition, due to the second voltage source V2 and ground ( The voltage difference of 0) causes the gate voltage of the driving transistor N3 to have an offset (〇f fset). Therefore, if the second voltage source V 2 is smaller than the ground (〇), the small gray drive in the low gray level When the current (I) is used, a large data current (iData) can be input to reduce the charging time of the current to the capacitor and the parasitic capacitance, and solve the problem that the charging and discharging time is too long. Eighth embodiment: Please refer to "Fig. 8" The figure shows a circuit diagram of a pixel in the eighth embodiment of the present invention. As shown in the figure, the present invention is a pixel driving circuit formed by intersecting each scanning line 10 on the display panel with each data line 2〇. The driving circuit is substantially the same as the driving circuit of the sixth embodiment, except that the source (s) of the first switching transistor N5 is originally connected to the grounding control line 3 〇 to be grounded; the second switching is electrically The source of the crystal T6 is still the same as that of the sixth embodiment or is connected by the scanning line 1 第. Page 30 1254269 V. Description of the invention (27) The principle of the circuit operation of the eighth embodiment is as follows: , the second broadcast i- ^ j (Vs, h), therefore the first scanning transistor N1. At this time, the W0 body (10) and the first switching transistor N5 are in an ON state (ON), and the potential of the transistor light control line 3〇 is low, Ve, l), so even a stage is not = one pass The body N6 is off (0FF), so here, ώ(Ι)'耷 current passes through the components of the light-emitting element 40, so as to prevent the data from being electrically caught (IData) when writing to the storage capacitor Cs. The milk-end connection drive transistor N3 is extremely and transparently connected to the data line 2〇, and the other end is transmitted through the first-open period:=Ϊ while part of the data current (1) is charged and discharged by the data line 20 ΐ Λ Λ Λ Λ Λ Λ 第一 第一 Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ Λ The drive current (I) AI = (1/2) X /3 X (v - v V r Gans ^ Drive) of the driving transistor N 3 is IDrive — gs3 th3), (where /5 is the driving power) The conductance of the crystal N3: capital: = source voltage V- 〇 ^). Because one, ' / melon (lData) is equal to the current through the storage capacitor Cs (Ics) plus the voltage through the two transistors N3: drive current (1" ^ field storage valley Cs is vcs, so that through the drive transistor N3 Drive current (Uve), etc. ☆ data current (iData) on data line 20, lData = (1/2)x /5x (Vgs3 - Vth3)2 , where Vgs3 = Vg3 = 0 + Vcs data write action This is done. Therefore, the voltage of the storage capacitor Cs is one (2 X Uata / /3 )(1/2) ~ ( Q _ 乂 ) ). , 1254269 V. Invention description (28) 3. Finally, when the ηth scan line When the potential of 丨〇 is, and the high power is "low potential (VS, L)", the first scanning transistor N1, the second scanning transistor 曰2 N2 and the first switching transistor N5 are turned off (〇FF) At this time, the potential of the control line 30 is changed from "low potential (I)" to "high potential (H, and thus the connection transistor N4 and the second switching transistor N6 are in a conducting (〇N) state." The capacitor-end is connected to the gate terminal of the driving transistor (10), and the other end is connected to the 11th scanning line 1〇 through the second switching transistor N6. Therefore, the gate of the driving transistor N3 is electrically driven at this time. The pressure (Vg3) is % l + ^. Therefore, the driving current through the driving transistor N3 is lDrWe = (1/2) χ basin by V y a. ^ v gs3 y th3 ^ , gs3 — g3 — S, L + Vcs. At this time, the driving current (IDrive) flows through the light-emitting element 4 透过 through the connection transistor N 4 to cause the light-emitting element 4 q to emit light. / The above, the relationship between the data current (丨^) and the driving current () is IDrive = (l/2)x /3χ ( 2 X IData / β )(1/2) + ys L _〇J 2 = (1/2) x /9 x[(2x IData/ "I/.+ Vs l]2. ' From the above-mentioned driving principle and mathematical formula, it is known that the magnitude of the current output to the light-emitting element 4 is independent of the threshold voltage value (vth) of the driving transistor N3 itself, and only the data current to be written (iData) The size is related, so it can compensate for the variation of the threshold voltage caused by the process factors of the thin film transistor (TFT). In addition, the driving voltage is caused by the voltage difference between the low potential (Vsl) of the scan line 10 and the ground (v = 〇). The gate voltage of the crystal N 3 has an offset (0 ffset), so if the low potential (VS, L) of the scan line 10 is smaller than the ground (〇), a small drive current at a low gray level ( In Lrive), a large data current (IData) can be input to reduce the charging time of the current and the parasitic capacitance, and solve the problem of excessive charging and discharging time.

第32頁 1254269 五、發明說明(29) 綜合上述說明’本發明提出之主動式顯示驅動電路有 以下之優點: 1.與『美國專利 US 6, 373,454 、US 6,229,506』比 較,本案的輸入電流與輸出電流比是〔輸出電流=Αχ輸入 電流+ Β〕的關係,有效解決低電流時充放電時間過長的問 題。Page 32 1254269 V. Description of the Invention (29) In combination with the above description, the active display driving circuit proposed by the present invention has the following advantages: 1. Compared with "US Patent No. 6,373,454, US 6,229,506", the input current of the present invention is The output current ratio is the relationship of [output current = Αχ input current + Β], effectively solving the problem of excessive charging and discharging time at low current.

2·與『美國專利 US 6,359,605、US 6,501,466、US 6, 535, 1 85』比較,本案達到輸入電流與輸出電流〔輸出電 流=A X輸入電流+ B〕的關係,是使用電容耦合( capacitive coupling)原理,而不是使用電流鏡(current mirror)結構,所以不需考慮薄膜電晶體(TFT)元件匹配( matched)的問題。因此可減輕因製程的影響因素,有益於 面板良率之提升。 3 ·與上述1 ·和2 ·項專利之電路比較。若要達到全暗之 晝素壳度’由於本案電路中電容耦合之動作,可確實使驅 動電晶體之閘、源極電壓(V g s )小於驅動電晶體之臨界電壓 (V t h )’使驅動電晶體不產生電流,因此可確實使發光元件 不發光’有較局的對比(contrast)。 4·與Samsung公司所發表之論文「a New Current Programmable Pixel Structure for large-Size and High-Resolution AMOLEDs 」(International Display Workshops 20 0 2 (IDW 20 02 ))相比較: a ·本案達到輸入電流與輸出電流〔輸出電流=a x輸入. 電流+ B〕的關係,只使用一個電容,所以不會因兩個電容2. Compared with "US Patent US 6,359,605, US 6,501,466, US 6, 535, 1 85", this case achieves the relationship between input current and output current [output current = AX input current + B], using capacitive coupling (capacitive The principle of coupling, rather than the use of a current mirror structure, eliminates the need for thin film transistor (TFT) component matching. Therefore, the factors affecting the process can be alleviated, which is beneficial to the improvement of the panel yield. 3 ·Compared with the circuit of the above 1 · and 2 · patents. In order to achieve the full darkness of the shell size, due to the capacitive coupling action in the circuit of the present case, the gate and source voltages (Vgs) of the driving transistor can be surely made smaller than the threshold voltage (Vth) of the driving transistor. The transistor does not generate current, so it can be sure that the illuminating element does not illuminate 'contrast'. 4. Compared with Samsung's paper "a New Current Programmable Pixel Structure for large-Size and High-Resolution AMOLEDs" (International Display Workshops 20 0 2 (IDW 20 02)): a · The case reaches the input current and output Current [output current = ax input. current + B], only one capacitor is used, so there is no two capacitors

第33頁 1254269 五、發明說明(30) ' ---一 :相對電容值變異而使電容耦合電壓值改變,影 晶體輸出電流。因此可減輕因製 y ^ 板良率之提升。 &喜因素,有益於面 電二Π 2輪:電流與輸出!流〔輪出電流=Αχ輸入 3佶用*徊φ二彳使用個電谷與兩個電壓準位;而不 疋所以可诗圭-:的電容柄合因此不用要求電容的精準度 所以了減輕因製程的影響因素’有益於面板良率之提 升0 c.本案達到輪入電流與輸出電流〔輸出電流=Αχ輸入 電k + B〕的關係,只使用一個電容,所以具較高的開口率 〇 5 ·與一般電壓型驅動電路比較,本發明係為一電流型 驅動電路,可解決薄膜電晶體(TFT)元件特性不均的問題, 自動補償臨界電壓(Vth)與電子遷移率(M〇binty)的變異 〇 6·與電壓型驅動電路比較,本案電流型驅動電路可解 決電壓源VDD之導線電阻壓降(ir drop)的問題。 惟上述僅為本發明之較佳實施例而已,並非用來限定 本發明實施之範圍。即凡依本發明申請專利範圍所做的均 等變化與修飾,皆為本發明專利範圍所涵蓋。Page 33 1254269 V. Inventive Note (30) ' --- One: The capacitance value changes due to the variation of the capacitance value, and the crystal output current is changed. Therefore, the improvement of the yield of the y ^ board can be alleviated. & hi factor, good for face electric 2 Π 2 rounds: current and output! Flow [round current = Αχ input 3 佶 use * 徊 φ two 彳 use a power valley and two voltage levels; not 疋 可 可 圭 - : : : : : : : : : : : : : : : : : : : : : : : : : : : : Due to the influence factor of the process, it is beneficial to the improvement of the panel yield. 0 c. In this case, the relationship between the wheel current and the output current (output current = Αχ input power k + B) is achieved. Only one capacitor is used, so the aperture ratio is high. 〇5 · Compared with the general voltage type driving circuit, the present invention is a current type driving circuit which can solve the problem of uneven characteristics of the thin film transistor (TFT) element, and automatically compensates for the threshold voltage (Vth) and the electron mobility (M〇). Variation of binty) 〇6. Compared with the voltage type driving circuit, the current type driving circuit of the present invention can solve the problem of the wire resistance ir drop of the voltage source VDD. The above are only the preferred embodiments of the present invention and are not intended to limit the scope of the present invention. That is, the equivalent changes and modifications made by the scope of the patent application of the present invention are covered by the scope of the invention.

第34頁 1254269 圖式簡單說明 【圖式簡單說明】 第1圖,係本發明之 第2圖,係本發明之 第3圖,係本發明之 第4圖,係本發明之 第5圖,係本發明之 第6圖,係本發明之 第7圖,係本發明之 第8圖,係本發明之 【圖式之標號說明】 掃描線1 0 發光控制線3 0 第一掃描電晶體T1 驅動電晶體T3、N3 第一開關電晶體T5 電壓源VDD 第二電壓源V2 第一實施例晝素内電路示意圖。 第二實施例畫素内電路示意圖。 第三實施例畫素内電路示意圖。 第四實施例畫素内電路示意圖。 第五實施例晝素内電路示意圖。 第六實施例畫素内電路示意圖。 第七實施例晝素内電路示意圖。 第八實施例畫素内電路示意圖。 資料線2 0 發光元件4 0 、N1 第二掃描電晶體T2、N2 連接電晶體T4、N4 、N5 第二開關電晶體T6、N6 第一電壓源V 1 儲存電容C sBRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a second view of the present invention, and FIG. 3 is a fourth view of the present invention, which is a fifth drawing of the present invention. Figure 6 is a seventh embodiment of the present invention, and is a figure 8 of the present invention, which is a description of the reference numerals of the present invention. Scanning line 10 emission control line 3 0 First scanning transistor T1 Driving transistor T3, N3 First switching transistor T5 Voltage source VDD Second voltage source V2 Schematic diagram of the internal circuit of the first embodiment. A schematic diagram of a circuit within a pixel of the second embodiment. A schematic diagram of a circuit within a pixel of the third embodiment. A schematic diagram of a circuit within a pixel of the fourth embodiment. The fifth embodiment is a schematic diagram of the circuit inside the pixel. A schematic diagram of a circuit within a pixel of the sixth embodiment. A schematic diagram of a circuit within a pixel of the seventh embodiment. A schematic diagram of a circuit within a pixel of the eighth embodiment. Data line 2 0 Light-emitting element 4 0, N1 Second scanning transistor T2, N2 Connection transistor T4, N4, N5 Second switching transistor T6, N6 First voltage source V 1 Storage capacitor C s

第35頁Page 35

Claims (1)

1254269 六、申請專利範圍 —一 ^ 一種主動式顯示驅動電路,本發明係為 母一條掃描線與每一條資料線交又構成之 、/、 其中該驅動電路包括: 一溱驅動電路, 曰胁第一掃描電晶體與一第二掃描電晶冑,哕-m -體之間極⑹與掃描線連接,源極(S)則連接至;=電 接;-驅動電晶體’該驅動電晶體之源極⑻與電貝上線相連 —連接電晶體,該連接電晶體之源極(s)蛊 晶體及第二掃描電晶體之汲極(D) ^述馬動電 光控制線連接; 逑接間極(G)與一發 一第一開關電晶體,該第一開關電晶體之 第一電壓源、’閘極(G)則連接至掃描、線; 原極⑻接- 第 開^體’該第二開關電晶體之源極⑻接-.電壓源,閘極(G)則連接至發光控制線. 按 第 .掃描電晶體…⑻及驅動電晶體 一發光元件,該發光元件一端為陽極, 晶體之汲極(D)相連接,另一端為险 與上述連接電 其中mr範圍第1項所述之主動式顯示驅動電路, 道厂開關電晶體及第二開關電晶體係為ρ通 、灸屬氧化+導體(PM0S)電晶體。 通 1254269 六、申請專利範圍 其Φ 3 ·如t I專利範圍第1項所述之主動式顯示驅動電路, 其中:該發光元件係為-電致發光元件(EL device)。 其φ!請專利範圍第1項所述之主動式顯示驅動電路, 其中,該第二電壓源之電壓值大於第—電壓源。 其中5. Π請!利範圍第1項所述之主動式顯示驅動電路, 具中’邊第一電壓源可由發央批 可由掃描線接入。自發先線接入’这第二電壓源 其中6,U: 圍第1項所述之主動式顯示驅動電路, ο第電壓源可由電壓源接入。 7.如申請專利範圍第1項所述之主動式鞀干觝叙φ , 其中’該第-電壓源可由雷m m不驅動電路’ 掃描線接入。 電聖源接入,該第二電壓源可由 每二:ϊ ί ί ί顯示驅動電路,本發明係為顯示面板卜 條知描線與母一條資料線 上 其中該驅動電路包括: 又構成之旦素驅動電路, 曰#之3Β曰體與—第二掃描電晶體,該二掃打φ 阳體j閘極⑹與掃描線連接,源極⑻則連接至資=電 二!θ體,該驅動電晶體之源極⑻㈣; 晶體之汲極(0)及第一掃描I曰曰曰 源和(s) /、上述驅動電 评兩電晶體之汲極(D)相遠垃 电 (G )與一發光控制線連接; 接’閘極 一第一開關電晶體,該第一曰 第一電壓源’閘極(G)則連接至掃描線;ΒΘ &quot;、極(S)接一 一第二開關電晶體’該第二開關電晶體之源極(s)接— 12542691254269 VI. Patent Application Scope—An active display driving circuit. The present invention is constructed by interfacing a scanning line with each data line, and wherein the driving circuit comprises: a driving circuit, a scan transistor and a second scan transistor, the 哕-m-body pole (6) is connected to the scan line, the source (S) is connected to; = electrical connection; - drive transistor 'the drive transistor The source (8) is connected to the upper line of the electric bake—connecting the transistor, the source (s) of the connected transistor and the drain of the second scanning transistor (D) ^ describing the connection of the electro-optical control line; (G) and a first switch transistor, the first voltage source of the first switch transistor, the 'gate (G) is connected to the scan, the line; the original (8) connected - the first open body' The source of the second switching transistor (8) is connected to the voltage source, and the gate (G) is connected to the light-emitting control line. According to the scanning transistor (8) and the driving transistor, a light-emitting element, one end of the light-emitting element is an anode, crystal The bungee (D) is connected, and the other end is dangerous and connected to the above The active display drive circuit according to the first item of the mr range, the switch transistor and the second switch electro-crystal system are ρ通, moxibustion oxide + conductor (PM0S) transistors. </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> <RTIgt; The active display driving circuit of the first aspect of the invention, wherein the voltage value of the second voltage source is greater than the first voltage source. Of which 5. Please! According to the active display driving circuit of the first item, the first voltage source with the middle side can be accessed by the scanning line. Spontaneous first line access 'this second voltage source. 6, U: The active display drive circuit described in item 1, ο the voltage source can be accessed by the voltage source. 7. The active 鼗 φ φ as described in claim 1 wherein the 'the first voltage source can be accessed by the Ray m m no drive circuit' scan line. The electric source is connected to the second voltage source, and the driving circuit is displayed by the second: ί ί ί ί, the present invention is a display panel and a parent data line, wherein the driving circuit comprises: The circuit, the Β曰#3 与 body and the second scanning transistor, the two Sweeping φ the positive body j gate (6) is connected to the scanning line, and the source (8) is connected to the ==电二!θ body, the driving transistor The source (8) (4); the drain of the crystal (0) and the first scan I source and (s) /, the above-mentioned drive evaluation of the two transistors, the drain (D) phase of the remote power (G) and a light The control line is connected; the first gate first voltage source 'gate (G) is connected to the scan line; ΒΘ &quot;, the pole (S) is connected to the second switch Crystal 'the source of the second switching transistor (s) connected - 1254269 第 =壓源,閘極(G )則連接至發光控制線; :儲$電容,該儲存電容有兩端,一端同時與上述第 第 :::!電晶體之汲極(D)相連接,另-端同時與上述 田電晶體之汲極(D)及驅動電晶體之閘極(G)相連接 一發光元件, 接,另一端為陰極 連接。 該發光元件一端為陽極,與電壓源相連 ’該陰極與上述連接電晶體之汲極(D)相The first = voltage source, the gate (G) is connected to the light-emitting control line; : the storage capacitor has two ends, and one end is simultaneously connected with the drain (D) of the above-mentioned first :::! The other end is connected to a drain element (D) of the above field transistor and a gate (G) of the driving transistor, and the other end is a cathode connection. The light-emitting element has an anode at one end and is connected to a voltage source. The cathode is connected to the drain (D) of the connected transistor. 其φ · f申請專利範圍第8項所述之主動式顯示驅動電路 、、、鱼拉4帛掃“電晶體、第二掃描電晶體、驅動電晶體 谨IΪ ί晶體、第一開關電晶體及第二開關電晶體係為N i 道金屬氧化半導體(NM0S)電晶體。 ,·如申清專利範圍第8項所述之主動式顯示驅動電路 、 4發光元件係為一電致發光元件(EL device)。 ,豆^ ·如申睛專利範圍第8項所述之主動式顯示驅動電路 八,讀第二電壓源之電壓值小於第一電壓源。 ,1^ ·如^申凊專利範圍第8項所述之主動式顯示驅動電路 % 、中,該第一電壓源可由發光控制線接入,該第二電壓The active display driving circuit described in item 8 of the φ · f application patent range, the fish-pull-sweeping "transistor, the second scanning transistor, the driving transistor, the first switching transistor and The second switching electro-crystal system is a N i-channel metal oxide semiconductor (NM0S) transistor. The active display driving circuit according to item 8 of the Shenqing patent scope, and the 4 illuminating element are an electroluminescent element (EL). Device). Bean ^ · The active display drive circuit as described in item 8 of the scope of the patent application, the voltage value of the read second voltage source is smaller than the first voltage source. , 1 ^ · ^ 凊 凊 凊 patent scope In the active display driving circuit %, in the eighth item, the first voltage source may be accessed by the illumination control line, and the second voltage 源可由掃描線接入。 1 3 ·如申請專利範圍第8項所述之主動式顯示驅動電路 ,其中,該第一電壓源可接地。 ,1= ·如申凊專利範圍第8項所述之主動式顯示驅動電路 .. 亥第一電壓源可接地,該第二電壓源可由掃描線The source can be accessed by a scan line. The active display driving circuit of claim 8, wherein the first voltage source is grounded. , 1 = · Active display drive circuit as described in claim 8 of the patent scope. The first voltage source can be grounded, and the second voltage source can be scanned. 第38頁Page 38
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CN104778922B (en) * 2015-04-28 2017-12-12 温州洪启信息科技有限公司 A kind of AMOLED pixel-driving circuits and its driving method
CN112509523A (en) * 2021-02-04 2021-03-16 上海视涯技术有限公司 Display panel, driving method and display device
US11508304B2 (en) 2021-02-04 2022-11-22 Seeya Optronics Co., Ltd. Display panel, method for driving the display panel and display device

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