TWI253130B - BGA package - Google Patents

BGA package Download PDF

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Publication number
TWI253130B
TWI253130B TW094102815A TW94102815A TWI253130B TW I253130 B TWI253130 B TW I253130B TW 094102815 A TW094102815 A TW 094102815A TW 94102815 A TW94102815 A TW 94102815A TW I253130 B TWI253130 B TW I253130B
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TW
Taiwan
Prior art keywords
substrate
solder
opening
solder mask
mask layer
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Application number
TW094102815A
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Chinese (zh)
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TW200627556A (en
Inventor
Sheng-Tsung Liu
Original Assignee
Advanced Semiconductor Eng
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Priority to TW094102815A priority Critical patent/TWI253130B/en
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Publication of TWI253130B publication Critical patent/TWI253130B/en
Publication of TW200627556A publication Critical patent/TW200627556A/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping

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  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

A BGA package includes a substrate having an upper surface and an opposing lower surface. A chip attaching area on the upper surface has a plurality of first chip connection pads and second chip connection pads. Solder mask layers are covered with the upper surface and the lower surface. The first solder mask layer is a circular form and the second solder mask layer is also a circular form having an outstanding area from the edge of the circular form. The first chip connection pads and the second chip connection pads are exposed by the form of those solder mask layers to connect with a plurality of solder balls.

Description

1253130 九、發明說明: 【發明所屬之技術領域】 本發明係為-種表面點著技術(SMT),係應用於球概陣列 (BGA)半導體封裝’使迴焊過程中減少產生空銲機率之結構。 【先别技術】 ,Ik者國内電子貧訊業的發展,電子產品普遍存在於—般的日 第生活中’ P4子科技的不斷進步,功能性也更複雜,面對市 ^奸產品具高功能及小尺寸之需求,目前電子產品已逐漸趨向 翌、涛、紐、小發展且功能日益增加。在推動積體電路伽吻_ C_t,,元件技術之演進過程中,封裝技術是—項很重要的關 鍵:為了付t市場需求’近年來電子封裝技術的運用越來越廣泛 且夕樣化。縮小產品體積且增加產品功能密度的根本辦法苗 邮卿_娜顺物。為_ ^產為密度、高功能及輕、薄、短、小的 線連接,具有外型縮小、低電感、高頻雜訊易控制等優車^不而金 其I/O數、散熱能力、電氣特 ' 也因 提供更優制舰雜’技刊:===裝結構能 ::r㈣其應,泛-二= 基板内的多種材 但是’伴隨喊不少封裝及可靠度的問題, 1253130 料也可能因為彼此之間的熱膨脹係數不同,而在加熱的過程中發 生熱變形的輕曲(Warpage)現象。翹曲現象的產生,容易使當基板 連接到-電路板,或是“連接到基板時,造成錫球與電路板或 是基板接觸不良。 請參照「第1圖」、「第2A圖」與「第2B圖」,其緣示出習 知傳統焊罩層開口以及習知結合結構剖面示意圖。在「第〗圖」中, 傳統的焊罩層開口 102為圓形且等距離排列。在「第2八圖」中, 首先提供一晶片110,晶片110上具有一主動表面112,並有多個錫 球116分別植接於晶片110上之銲墊114上。而還需提供一基板 120 ’基板120上有一面對晶片上主動表面112的基板表面, 在基板表面122上有多個接點124,其巾,每—個無124的排列位 置需與每一鍚球116的排列位置相對應。然後進行佈植焊料13〇的 製耘,將多個焊料130形成於基板12〇的接點124上。再由一焊合製 私,將晶片110附著於基板12〇上,其中晶片11〇透過錫球116與基 板120上對應的焊料13〇對準並附著。在「第2β圖」中,顯示以迴 焊(reflow)的方式將錫球116與焊料13〇融合成許多焊塊14〇。如 此,晶片110就可以透過焊塊14〇固定在基板120上並之間電性相 連。但在上述的製程中,由於迴焊製程之後,晶片11〇外侧的地方 會有比較明顯的翹曲現象。如此晶片11〇中間區域與基板表面122 間相鄰的距離較近,而晶片110邊緣區域與基板表面122間相鄰的 距離較遠,使得對應於晶片110邊緣區域的錫球116容易由接點124 彔J離產生工#的現象,造成晶片與基板間的電性無法連接,使 1253130 . 產品的良率及可靠度下降。 , @為傳統方騎料的缺點產生,所以-些改善方法被提 出丨】用大】、不同的焊料,用漸進式的變化焊料,改善晶片 xl曲4成工!十明参照「第3圖」、「第4A圖」與「第圖」所 緣不’在「第3圖」中,電路板上形成不同大小之焊罩層開口,使 祕路之I邊大小不同,以塗佈不同量之銲料。電路板開口皿為 圓开y且大小為由内而外逐漸變大,所以對應到基板上的焊料 • 230亦由内而外逐漸變大,提供錫球m與之銲接。再參照「第4八 圖」與「第4B圖」,所繪示當在迴焊過程之後,晶片21〇的外緣發 生魅曲現象。如此,晶片放置區226的中間部分與晶片21〇的距離 較近,晶片放置區226的邊緣部分與晶片210的距離較遠。然而, 對應於晶片放置區226邊緣部分的焊塊250總體積較大,對應於晶 片放置區226中央部分的焊塊25〇總體積較小,因為晶片放置區226 邊、、彖邻77的干塊250總體積較大,所以可以使對應於晶片放置區 φ 226邊緣部位的焊塊25〇與銲墊214及接點224結合的更牢固。但美 國專利第5,641,946號所揭露的方式,其焊罩層開口為由内而外逐 漸、欠大’所對應的焊料亦由内而外逐漸變大,但晶片發生翹曲通 常只有一特定方向,因此,在此特定方向外的焊料會顯的多餘, 再者,因為焊罩層開口為由内而外逐漸變大,所以每排焊罩層開 口之間,由一焊罩層開口圓形邊緣到另一焊罩層開口圓形邊緣的 距離不等。在焊罩層開口較大的區域,容易造成其所能提供的接 腳數(pin)將減少。 1253130 “因此’如何能提供—種能有效利用焊罩層開口,使焊料增加 方、B曰片赵曲方向,亦能在晶片置放區内增大焊塊的成功佈植率, 以增加接驗,絲研究人⑽解決改善關題之一。 【發明内容】 一有鑑於先前技術存在之缺點與無法解決的問題,本發明提出 種表面黏著技術(SMT)中的球栅陣列(BGA)半導體封裝接合結 系在焊罩層開口的形狀上做改善,達到有效減少空 功效。 手之 本封裝接合結構,至少包括有: 曰個基板,具有上表面及下表面,該上表面具有晶片放置區, 在曰曰片放置區内有袓數個第一接合點及複數個第二接合點; 们丈干罩層,覆盍於基板之上表面及下表面,基板上表面之 曰曰片放置_下表面皆具有複數個帛—焊罩層開口和複數個第二 知罩層開π ’第—焊罩層開叫彡狀為卿,第二焊罩層開口形狀 為由一圓形及由圓形邊緣向外伸展一凸出區域所組成,透過第一 丈干罩層開口與第二焊罩層開口分別暴露出第—接合點和第二接合 點; σ 一晶片,具有一個主動表面,且晶片以主動表面覆晶接合於 基板之晶片放置區;以及 複數個焊塊,每一焊塊分別與第一接合點之一和第二接合點 之一焊合。 口… 由上述之結構,利用圓形凸出區域,當錫球與焊料在進行迴 1253130 丈干恰,曰曰片右是翹曲,則較靠近晶片邊緣的錫球可以藉由圓形凸 出區域有多出的焊料,當晶片翹曲時沾附圓形凸出區域中的焊 料,增加錫球與焊料的接合機率,達成減少產生空焊的現象,使 產品的良率及可靠度提高之目的。 有關本發明的特徵與實作,茲配合圖示作最佳實施例詳細說 明如下。 【實施方式】 睛蒼照「第5A圖」、「第5B圖」、「第5C圖」,係為本發明 之焊罩層開口俯視示意圖。請先參照「第5A圖」,「第5A圖」1253130 IX. Description of the Invention: [Technical Field of the Invention] The present invention is a surface point-and-click technology (SMT) applied to a ball array (BGA) semiconductor package to reduce the rate of occurrence of an empty weld during reflow. structure. [First-hand technology], Ik's domestic electronic poor communication industry, electronic products are common in the daily life of the 'P4 sub-technology, continuous improvement, functional complexity, facing the city's products With the demand for high functionality and small size, electronic products have gradually become more and more developed, and the functions are increasing. In the process of pushing the integrated circuit _C_t, the evolution of component technology, the packaging technology is the key to the project: in order to meet the market demand, the use of electronic packaging technology has become more and more widespread in recent years. The fundamental way to reduce the size of the product and increase the functional density of the product. It is made of density, high function and light, thin, short and small wire connection. It has the advantages of reduced size, low inductance, high frequency noise and easy control. It has the I/O number and heat dissipation capacity. , electric special 'also because of the provision of better system miscellaneous 'Technical publication: === installed structure can:: r (four) its response, pan-two = a variety of materials in the substrate but 'with a lot of packaging and reliability issues, 1253130 The material may also be a warpage due to thermal deformation during heating due to the difference in thermal expansion coefficient between each other. The warpage phenomenon is easy to cause the substrate to be connected to the - board or "the connection between the solder ball and the board or the substrate is poor when connecting to the substrate. Please refer to "1" and "2A"). "Block 2B" is a schematic cross-sectional view of a conventional conventional shroud opening and a conventional bonded structure. In the "graph", the conventional solder mask opening 102 is circular and equidistantly arranged. In the "Fig. 8", a wafer 110 is first provided. The wafer 110 has an active surface 112, and a plurality of solder balls 116 are respectively implanted on the pads 114 on the wafer 110. There is also a need to provide a substrate 120' substrate 120 having a substrate surface facing the active surface 112 on the substrate. There are a plurality of contacts 124 on the substrate surface 122, and the arrangement of each of the pads 124 is required. The arrangement positions of the croquet 116 correspond. Then, a solder 13 is applied, and a plurality of solders 130 are formed on the contacts 124 of the substrate 12A. The wafer 110 is attached to the substrate 12 by a solder joint, wherein the wafer 11 is aligned and adhered to the corresponding solder 13 on the substrate 120 through the solder balls 116. In the "2β map", it is shown that the solder balls 116 and the solder 13 are fused into a plurality of solder bumps 14 by reflow. Thus, the wafers 110 can be fixed to the substrate 120 through the solder bumps 14 and electrically connected therebetween. However, in the above process, there is a significant warpage at the outer side of the wafer 11 after the reflow process. Thus, the distance between the intermediate portion of the wafer 11 and the substrate surface 122 is relatively close, and the edge region of the wafer 110 is adjacent to the substrate surface 122 at a relatively long distance, so that the solder ball 116 corresponding to the edge region of the wafer 110 is easily connected by the contact. 124 彔J away from the phenomenon of the work #, causing the electrical connection between the wafer and the substrate can not be connected, so that the product yield and reliability of the 1253130. @, is the disadvantage of the traditional riding material, so some improvement methods have been proposed 用] with large], different solder, with progressive change of solder, improve the wafer xl song 4 work! Ten Ming reference "Figure 3 "4A" and "Picture" are not in the "3rd picture", different sizes of solder mask openings are formed on the circuit board, so that the I side of the secret path is different in size, so as to apply different amounts. Solder. The board opening dish is rounded and the size is gradually increased from the inside to the outside, so the solder 230 corresponding to the substrate is gradually enlarged from the inside to the outside, and the solder ball m is soldered thereto. Referring again to "4th 8th" and "4B", it is shown that after the reflow process, the outer edge of the wafer 21 is embossed. Thus, the intermediate portion of the wafer placement area 226 is closer to the wafer 21A, and the edge portion of the wafer placement area 226 is further away from the wafer 210. However, the total volume of the solder bumps 250 corresponding to the edge portions of the wafer placement region 226 is large, and the total volume of the solder bumps 25 corresponding to the central portion of the wafer placement region 226 is small because of the wafer placement region 226 side, and the adjacent 77 dry The bulk of the block 250 is relatively large, so that the solder bumps 25A corresponding to the edge portions of the wafer placement region φ 226 can be more firmly bonded to the pads 214 and the contacts 224. However, in the manner disclosed in U.S. Patent No. 5,641,946, the solder cap opening is gradually increased from the inside to the outside, and the solder corresponding to the opening is gradually enlarged from the inside to the outside, but the warpage of the wafer is usually only one specific. Direction, therefore, the solder outside this specific direction will be redundant. Moreover, since the opening of the solder mask layer is gradually enlarged from the inside to the outside, between each opening of the solder mask layer, a hole is opened by a solder mask layer. The distance from the edge to the rounded edge of the other weld cap opening is not equal. In areas where the opening of the solder mask layer is large, it is easy to cause the number of pins that it can provide to be reduced. 1253130 "Therefore, how can it be provided? It can effectively use the opening of the solder mask to increase the solder and the direction of the B-plate, and also increase the successful implantation rate of the solder bump in the wafer placement area to increase the connection. In the examination, the wire researcher (10) solves one of the improvement problems. [Invention] In view of the shortcomings of the prior art and the problems that cannot be solved, the present invention proposes a ball grid array (BGA) semiconductor in a surface mount technology (SMT). The package bonding knot is improved in the shape of the opening of the solder mask layer to effectively reduce the air effect. The package joint structure of the hand comprises at least: a substrate having an upper surface and a lower surface, the upper surface having a wafer placement area There are a plurality of first joints and a plurality of second joints in the die placement area; the cover layer is covered on the upper surface and the lower surface of the substrate, and the top surface of the substrate is placed _ The lower surface has a plurality of 帛-welding layer openings and a plurality of second hood layers open π 'the first welding cap layer is opened, and the second welding cap layer opening shape is a circle and a circle The edge of the shape extends outward Forming an exit region, exposing the first joint and the second joint through the first dry cap opening and the second solder cap opening respectively; σ a wafer having an active surface and the wafer being actively surface-covered a wafer placement area on the substrate; and a plurality of solder bumps, each solder bump being respectively soldered to one of the first joint and the second joint. The mouth... by the above structure, using a circular convex region, when The solder ball and the solder are back to 1253130, and the right side of the wafer is warped. The solder ball closer to the edge of the wafer can have more solder by the circular convex area, and the wafer is warped when the wafer is warped. The solder in the convex region increases the bonding probability of the solder ball and the solder, and achieves the purpose of reducing the occurrence of the empty soldering, thereby improving the yield and reliability of the product. The features and implementations of the present invention are shown in conjunction with the illustration. The preferred embodiment will be described in detail below. [Embodiment] The "Picture 5A", "5B" and "5C" are the top view of the opening of the welding cap layer of the present invention. Please refer to "5A" and "5A" first.

大圓形302直徑需要依照錫球大小適當規劃,在大圓 形302的-個邊緣延伸出—圓形凸出區域,圓形凸出區域辦 直I為-半A之長度。大圓形3〇2與圓形凸出區域姻兩圓呈現 融合之態俾使開口形狀呈現雪人狀 方向依「第5B圖」、「第,七The diameter of the large circle 302 needs to be appropriately planned according to the size of the solder ball, and extends at the edge of the large circular shape 302 - a circular convex area, and the circular convex area is straight I to the length of the half A. The large circle 3〇2 and the circular convex area are in two circles. The state of fusion makes the shape of the opening appear like a snowman. The direction is according to “5B”, “第七,

-弟一型態較佳實施例 示思圖’首先提供一 1253130 晶片310,晶片310上方有一主動表面312,主動表面奶上存在 有多個銲墊3M,銲墊314上又具有多個錫球316。 板320,基板320上有一基板上表面通與一基板下表面迦二 基板上表面320a面對晶片31〇的主動表面312。 基板上表面320a上具有一焊罩層33〇,覆蓋於基板上表面 320a,焊罩層330有複數個第一上焊罩層開口孤和複數個第二 士焊罩層開口 332b,其中第一上焊罩層迦開口形狀為圓形, 第二上谭罩層332b開口形狀為由一圓形及由圓形邊緣向外伸展 一凸出區域所組成。 基板下表面320b亦具多個接點,基板下表面32%具有焊罩 層330,覆蓋於基板下表面3施,焊罩層33〇有複數個第一下焊 罩層開口 333a和複數個第二下焊罩層開口 333b,其中第一下焊 罩層開π 333a形狀為圓形,第二下焊罩層開口 333b形狀為由一 圓形及由圓形it緣向外伸展一凸出區域所組成。基板下表面3施 可與其他接合底板接觸焊合(未繪出),如印刷電路板(pcB)。 一晶片放置區324,晶片放置區324上有多個接點,於晶片 放置區324中央部分區分為第一接合點32如,於晶片放置區324 外部鄰近四邊區分為第二接合點326b。透過第一上焊罩層開口 332a與第二上焊罩層開口 332b分別暴露出第一接合點32^和第 二接合點326b。基板下表面320b亦具有複數個第一接合點33如 及複數個弟一接合點336b,基板下表面320b係透過第一下焊罩 層開口 333a與第二下焊罩層開口 33313分別暴露出第一接合點 10 1253130 336a和第二接合點336b。 接下來將進行佈植焊料的製程,請再參照「第5β圖」與厂第 6A圖」。係藉由「第5B圖」之基板335上之焊罩層具有多個圓 形開口 334a與雪人形開口 334b,且圓形開口幻如與雪人形開口 334b暴露出晶片放置區324内的第一接合點遍與第二接合點 326b,所以透過不同形狀之開口對應的焊料34〇亦不同,焊料34〇 为別形成於晶片放置區324對應於第一接合點326a與第二接合 點326b的位置,焊料34〇便佈植於基板上表面上。其中, 圓形開口 334a部分的焊料34〇呈現圓形,且任兩圓圓心間距離 335a相等且呈現矩陣排列;雪人形開口现部分的焊料⑽呈 現大小兩圓互相依附狀的雪人形,其中藉由「第5八圖」中大圓 形302所佈植出的焊料34〇其以任兩圓圓心距離3视相等也呈 現矩陣排列;而圓形開口 334a之圓心與雪人形開口铷中大圓 形之圓心亦以其圓心距離335c呈現等距矩陣排列,圓心距離 335a,圓心距離335b與圓心距離335c長度皆相同。 再請參照「第6A圖」與「第7A圖」,進行焊合的製程,使 晶片之主動絲312與基板上表面3施相對,將錫球灿 附者於焊料340上,並透過迴焊加熱的方式把錫球316轉料· 融合成多料塊35〇,焊塊35〇的兩端分別與晶片3ι〇端鲜塾314 和基板上表面3施端第-接合點伽與第二接合點咖焊合。 =以上步驟,使晶片31〇能透過焊塊35〇與基板上表面遍 干口於晶片放置區324。由於對應於第二接合點伽的焊料糊 1253130 其形狀為一圓形但邊緣向外伸展一凸出區域,所以當晶片3i〇發 生翹曲時,晶片310外緣將會遠離基板上表面32〇a,也就是晶片 310外緣會比晶片310中央部分有較高的空隙,但也因第二接合 點326b的焊料340有一向外的凸出區域,所以在迴焊時,對應 第二接合點326b的錫球316會與焊料340融合並於翹曲時讓焊 料340向外的凸出區域黏附在錫球316上在形成一焊塊35〇。如 此,在發生翹曲的第二接合點326b位置亦能有效形成焊塊35Q, 使曰曰片310與基板320連接。一般來說,晶片31〇的錫球材質為 5/95錫鉛合金,而焊料34〇為63/37的錫鉛比,於進行迴焊時, 將迴悍溫度大約控置於攝氏200多度,在此一溫度下,可以讓焊 料340融化而包覆錫球316的周圍,以便形成焊塊35〇將晶片 與基板320接合。 再請參照「第7A圖」與「第8圖」,進行填入填充物質的製 % ’將一填充物質360填充於晶片31〇之主動表面312與基板上 表面320a之晶片放置區324之間,且此填充物質36〇緊密包覆 焊塊350,做為焊塊350在晶片31〇與基板32〇受外力壓擠時的 保護裝置。 以上為本發明於迴焊製程中,晶片31〇會往基板上表面%㈨ 中央方向向下凹陷’產生龜曲的情形’使晶片放置區324的中間 部分與晶片310的距離較近,晶片放置區324的邊緣部分與晶片 训的距離較遠。然而,本發明的另一實施例為考慮晶片⑽會 往基板上表面施中央方向向上突起,產生趣曲的情形,使晶 12 1253130 • Μ文置區324的中間部分與晶片310的距離較遠,晶片放置區324 的邊緣部分與晶片310的距離較近。 於本發明第二種形式之實施例,請先參照「第5C圖」,「第 圖」為繪示第二焊罩層開口形狀,開口形狀與「第圖」大 - 小形狀—樣,但於「第5C圖」中,圓形凸出區域304所凸出的 方向杳朝向基板435内部中心。 接著於「第6B圖」進行佈植焊料的製程中,於「第6B圖 • +,因為所用之焊罩層開口為「第5C圖」中焊罩層開口 43如及 434b,所以進行佈植焊料製程時,將焊料44〇填充於圓形開口幻如 與雪人形開口 434b内,其中圓形開口 434a部分的焊料呈現 圓形,圓心距離333a成矩陣排列;但雪人形開口 43牝部分的焊 料440呈現大小兩圓互相依附狀,且凸出區域焊料44〇部分為朝 向晶片放置區424中央。所以在「第7B圖」,進行焊合的製程中, 當晶片410能透過焊塊450與基板上表面42加焊合於晶片放置 φ 區424。所以當晶片410發生向下翹曲時,晶片410中央將會遠 離基板上表面420a,也就是晶片410中央會比晶片41〇外緣部分 有較高的空隙,所以第二接合點426b的焊料440有一向内的凸 出區域,所以在迴焊時,對應第二接合點426b的錫球416會與 焊料440融合並於翹曲時讓焊料440向内的凸出區域黏附在錫球 416上在形成一焊塊450。如此,在發生翹曲的第二接合點42邠 位置亦能有效形成焊塊450,使晶片410與基板420連接。 然而,本赉明並非褐限於以上方式,亦可透過其他方式,使 13 1253130 錫球與銲料能更有效率的結合,焊罩層開口大小亦可表考美國專 利苐5,641,946號所揭露之技術,利用由内到外變小或由内到卜 k大的焊罩層開口大小變化,調整晶片上之趣曲。如此一來 口J以有效提鬲晶片與基板間電性連接的良率與可靠戶。 雖然本發明以前述之較佳實施例揭露如上,然其並非用、 定本發明,任何熟習相*技藝者,在不脫離本發明之精神用=限 内,當可作些許之更動與潤飾,因此本發明之專利保^和乾圍 本說明書所附之申請翻範騎界定者為準。 1圍須視 【圖式簡單說明】 第1圖係為習知焊罩層開口; 第2A圖係為習知接合結構剖面示意圖; 第2B圖係為習知接合結構剖面示意圖; 第3圖係為習知焊罩層開口; 第4A圖係為習知接合結構剖面示意圖; 第4B圖係為習知接合結構剖面示意圖; 第5A圖係為本發明之焊罩層開口; 第5B圖係為本發明之焊罩層開口; 第5C圖係為本發明之焊罩層開口; 第6A圖係為本發明之接合結構剖面示意圖; 第6B圖係為本發明之接合結構剖面示意圖; 第7A圖係為本發明之接合結構剖面示意圖; 第7B圖係為本發明之接合結構剖面示意圖;以及 14 1253130 第8圖係為本發明之接合結構剖面示意圖 【主要元件符號說明】A preferred embodiment of the invention is to first provide a 1253130 wafer 310, an active surface 312 above the wafer 310, a plurality of pads 3M on the active surface milk, and a plurality of solder balls 316 on the pad 314. . The substrate 320 has a substrate surface 320 having an active surface 312 facing the wafer 31A on the upper surface of the substrate and the upper surface 320a of the lower surface of the substrate. The substrate upper surface 320a has a solder mask layer 33A covering the substrate upper surface 320a. The solder mask layer 330 has a plurality of first upper solder mask layer openings and a plurality of second solder mask layer openings 332b, of which the first The upper solder mask layer has a circular opening shape, and the second upper tan mask layer 332b has an opening shape formed by a circular shape and a convex region extending outward from the circular edge. The lower surface 320b of the substrate also has a plurality of contacts, and the lower surface 32% of the substrate has a solder mask layer 330 covering the lower surface 3 of the substrate. The solder mask layer 33 has a plurality of first lower solder mask openings 333a and a plurality of a second solder mask layer opening 333b, wherein the first lower solder mask layer opening π 333a is circular in shape, and the second lower solder mask layer opening 333b is shaped by a circular shape and a convex region extending outward from the circular it edge Composed of. The lower surface 3 of the substrate can be soldered (not shown) to other bonded substrates, such as a printed circuit board (PCB). A wafer placement area 324 has a plurality of contacts on the wafer placement area 324. The central portion of the wafer placement area 324 is divided into a first bonding point 32. For example, the adjacent four sides of the wafer placement area 324 are divided into second bonding points 326b. The first joint 32 and the second joint 326b are exposed through the first upper weld cap opening 332a and the second upper weld cap opening 332b, respectively. The substrate lower surface 320b also has a plurality of first bonding points 33 and a plurality of first bonding points 336b. The substrate lower surface 320b is exposed through the first lower solder mask layer opening 333a and the second lower solder mask layer opening 33313, respectively. A joint 10 1253130 336a and a second joint 336b. Next, the process of implanting solder will be carried out. Please refer to "5th Figure 5" and Plant 6A". The solder mask layer on the substrate 335 by "Fig. 5B" has a plurality of circular openings 334a and a snowman shaped opening 334b, and the circular opening illusion and the snowman shaped opening 334b expose the first in the wafer placement area 324. The bonding point is over the second bonding point 326b, so the solder 34 is correspondingly different through the opening of the different shape, and the solder 34 is formed at a position corresponding to the first bonding point 326a and the second bonding point 326b of the wafer placement area 324. The solder 34 is placed on the upper surface of the substrate. Wherein, the solder 34 部分 of the circular opening 334a portion has a circular shape, and any two round center distances 335a are equal and arranged in a matrix; the solder (10) of the snowman-shaped opening portion exhibits a snowman shape in which the two circles are mutually dependent, wherein The solder 34 implanted by the large circle 302 in the "5th figure" is also arranged in a matrix with any two circles having a distance of three; and the center of the circular opening 334a and the snowman-shaped opening are in a large circle. The center of the shape is also arranged in an equidistant matrix with its center distance 335c, the center distance 335a, the center distance 335b and the center distance 335c are the same length. Referring to "6A" and "7A", the soldering process is performed so that the active wire 312 of the wafer is opposed to the upper surface 3 of the substrate, and the solder ball is attached to the solder 340 and reflowed. In the heating mode, the solder balls 316 are reflowed and fused into a plurality of blocks 35 〇, and the two ends of the solder bumps 35 与 are respectively bonded to the wafer 3 〇 塾 塾 314 and the upper surface 3 of the substrate Point coffee welding. The above steps enable the wafer 31 to pass through the solder bumps 35 and the upper surface of the substrate to the wafer placement area 324. Since the solder paste 1253130 corresponding to the second bonding point has a circular shape but a convex portion extending outward from the edge, when the wafer 3i is warped, the outer edge of the wafer 310 will be away from the upper surface 32 of the substrate. a, that is, the outer edge of the wafer 310 may have a higher gap than the central portion of the wafer 310, but also because the solder 340 of the second bonding point 326b has an outward convex region, so in the reflow, corresponding to the second bonding point The solder balls 326 of 326b will fuse with the solder 340 and adhere to the outwardly protruding regions of the solder 340 on the solder balls 316 to form a solder bump 35 when warped. Thus, the solder bumps 35Q can be effectively formed at the position of the second joint 326b where warpage occurs, and the dies 310 are connected to the substrate 320. In general, the solder ball of the wafer 31 is made of 5/95 tin-lead alloy, and the solder 34〇 is a tin/lead ratio of 63/37. When reflowing, the temperature of the return is about 200 degrees Celsius. At this temperature, the solder 340 can be melted to cover the periphery of the solder balls 316 to form the solder bumps 35, and the wafers are bonded to the substrate 320. Referring to FIG. 7A and FIG. 8 again, the filling material % is filled in. A filling material 360 is filled between the active surface 312 of the wafer 31 and the wafer placement area 324 of the substrate upper surface 320a. And the filling material 36 is tightly covered with the solder bumps 350 as a protection device for the solder bumps 350 when the wafers 31 and 32 are pressed by an external force. In the above re-welding process of the present invention, the wafer 31〇 is recessed toward the central surface of the substrate by a central portion (n). The bottom portion of the substrate is recessed to generate a tortuosity. The intermediate portion of the wafer placement region 324 is closer to the wafer 310, and the wafer is placed. The edge portion of the region 324 is far from the wafer training. However, another embodiment of the present invention considers that the wafer (10) protrudes upward in the central direction of the upper surface of the substrate to produce an interesting phenomenon, so that the middle portion of the crystal 12 1253130 • the arranging region 324 is far from the wafer 310. The edge portion of the wafer placement area 324 is closer to the wafer 310. For the embodiment of the second form of the present invention, please refer to "5C". The "figure" shows the opening shape of the second welding cap layer, and the opening shape is the same as the "figure" large-small shape, but In the "5Cth diagram", the direction 杳 in which the circular convex region 304 protrudes is directed toward the center of the inside of the substrate 435. Then, in the process of implanting the solder in "Picture 6B", in "Picture 6B, +, because the opening of the solder mask layer used is "welding layer 5" in the solder mask opening 43 and 434b, it is implanted. During the soldering process, the solder 44 is filled in a circular opening illusion and a snowman-shaped opening 434b, wherein the solder of the circular opening 434a portion is rounded, and the center distance 333a is arranged in a matrix; but the solder of the snowman-shaped opening 43 牝 portion The 440 exhibits a size in which the two circles are mutually attached, and the protruding portion of the solder 44 is partially toward the center of the wafer placement area 424. Therefore, in the "Section 7B", in the soldering process, the wafer 410 can be soldered to the wafer upper surface 424 through the solder bump 450 and the substrate upper surface 42. Therefore, when the wafer 410 is warped downward, the center of the wafer 410 will be away from the upper surface 420a of the substrate, that is, the center of the wafer 410 will have a higher gap than the outer edge portion of the wafer 41, so the solder 440 of the second bonding point 426b. There is an inwardly projecting region, so that during reflow, the solder balls 416 corresponding to the second bonding points 426b will fuse with the solder 440 and adhere the inwardly protruding regions of the solder 440 to the solder balls 416 when warped. A solder bump 450 is formed. Thus, the solder bump 450 can be effectively formed at the second bonding point 42A where the warpage occurs, and the wafer 410 is connected to the substrate 420. However, it is not limited to the above method, and the 13 1253130 solder ball can be more efficiently combined with the solder by other means. The size of the opening of the solder mask can also be measured by the technique disclosed in U.S. Patent No. 5,641,946. The variation on the wafer is adjusted by the change in the size of the opening of the solder mask from the inside to the outside or from the inside to the outside. In this way, the port J is effective in improving the yield and reliability of the electrical connection between the wafer and the substrate. Although the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to be a limitation of the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The patent protection of the present invention and the application of the invention attached to the specification are subject to the definition. 1After a brief description of the drawings, Fig. 1 is a conventional welding cap opening; Fig. 2A is a schematic cross-sectional view of a conventional joining structure; Fig. 2B is a schematic cross-sectional view of a conventional joining structure; FIG. 4A is a schematic cross-sectional view of a conventional joint structure; FIG. 4B is a cross-sectional view of a conventional joint structure; FIG. 5A is a weld cap opening of the present invention; The welding cover layer opening of the present invention; FIG. 5C is a welding cover opening of the present invention; FIG. 6A is a schematic cross-sectional view of the joint structure of the present invention; FIG. 6B is a schematic cross-sectional view of the joint structure of the present invention; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 7B is a schematic cross-sectional view of a joint structure of the present invention; and 14 1253130 FIG. 8 is a schematic cross-sectional view of a joint structure of the present invention.

102 焊罩層開口 110 晶片 112 主動表面 114 銲墊 116 錫球 120 基板 122 基板表面 124 接點 130 焊料 140 焊塊 202 電路板開口 210 晶片 214 銲墊 216 錫球 220 基板 224 接點 226 晶片放置區 230 銲料 250 焊塊 302 大圓形 15 1253130102 solder mask opening 110 wafer 112 active surface 114 pad 116 solder ball 120 substrate 122 substrate surface 124 contact 130 solder 140 solder bump 202 circuit board opening 210 wafer 214 solder pad 216 solder ball 220 substrate 224 contact 226 wafer placement area 230 solder 250 solder bumps 302 large round 15 1253130

304 圓形凸出區域 310 晶片 312 主動表面 314 銲墊 316 錫球 320 基板 320a 基板上表面 320b 基板下表面 324 晶片放置區 326a、 336a 第一接合點 326b、 336b 第二接合點 330 焊罩層 332a 第一上焊罩層開口 332a 第二上焊罩層開口 333a 第一下焊罩層開口 333b 第二下焊罩層開口 334a 圓形開口 334b 雪人形開口 335 基板 335a 圓心間距離 335b 圓心間距離 335c 圓心間距離 16 1253130304 circular raised area 310 wafer 312 active surface 314 pad 316 solder ball 320 substrate 320a substrate upper surface 320b substrate lower surface 324 wafer placement area 326a, 336a first joint 326b, 336b second joint 330 solder mask layer 332a First upper solder mask layer opening 332a second upper solder mask layer opening 333a first lower solder mask layer opening 333b second lower solder mask layer opening 334a circular opening 334b snowman shaped opening 335 substrate 335a center-to-center distance 335b center-to-center distance 335c Distance between centers 16 1253130

340 焊料 350 焊塊 360 填充物質 410 晶片 416 錫球 420 基板 420a 基板上表面 422 基板表面 424 晶片放置區 426a 第一接合點 426b 第二接合點 434a 圓形開口 434b 雪人形開口 430 焊罩層 435 基板 440 焊料 450 焊塊340 solder 350 solder bump 360 fill material 410 wafer 416 solder ball 420 substrate 420a substrate upper surface 422 substrate surface 424 wafer placement area 426a first joint 426b second joint 434a circular opening 434b snowman shaped opening 430 solder mask layer 435 substrate 440 solder 450 solder bump

Claims (1)

1253130 十、申請專利範圍: 1. 一種球柵陣列(BGA)半導體封裝結構,該結構包含有: -基板’具有-上表面及—下表面,該下表面具有複數 個第一接合點及複數個第二接合點; 一火干罩層,覆盖於該基板之上表面及下表面,其下表面 具有複數個第一焊罩層開口和複數個第二焊罩層開口,其中 該第-焊罩層開π形狀為圓形,該些第二悍罩層開口形狀為 • 由一圓形及由該圓形邊緣向外伸展-凸出區域所組成,係透 過該第-焊罩層開口與該第二焊罩層開口分別暴露出該些 第一接合點和第二接合點; 一晶片,設於該基板之上表面;以及 複數個焊塊,每-該焊塊分別與該第—接合點之一和該 第二接合點之一焊合。 2, 如申料利範圍第丨項所述之球柵陣列半導體封裝結構,其 鲁中4凸出區域方向為朝向該基板之四邊,且位於該基板對角 線方向之該凸出區域則朝向該基板之四個角落。 3·如申請專利範圍第!項所述之球俯車列半導體封裝結構,其 中该第二焊罩層開π之凸出區域之直徑係為該第—焊罩層開 口直徑1/2。 4· 一種球栅陣列(BGA)半導體封裝結構,該結構包含有: 一基板,具有一上表面及一下表面,該上表面具有一晶 片放置區,在該晶片放置區内有複數個第一接合點及複數個 18 1253130 第二接合點; 丈干罩層,覆盍於該基板之該上表面及該下表面,該基 板之该晶片放置區具有複數個第一焊罩層開口和複數個第 4罩層開口,其中該第—焊罩層開口形狀為圓形,該些第 —*干罩層開口形狀為由—圓形及由該®形邊緣向外伸展一 凸出區域所組成,係透職第—焊罩制口_第二焊罩層 開口分別暴露出該些第—接合點和第二接合點; 曰曰片,具有一主動表面,且該晶片以該主動表面覆晶 接合於該基板之晶片放置區;以及 ^複數個焊塊,每—該焊塊分職該第_接合點之一和該 弟一接合點之一焊合。 5·如申凊專她圍第4項所述之球轉財導體封裝結構,其 中忒凸出區域方向為朝向該基板之四邊,且位於該基板對角 線方向之該凸出區域則朝向該基板之四個角落。 6·如申凊專利|巳圍帛4項所述之球柵陣列半導體封襄結構,其 中该第二焊罩層開口之凸出區域之直徑係為該第—焊罩層開 口直徑1/2。 7· —種球柵陣列基板結構,包括: 基板,其表面具有複數個第一接合點及複數個第二接 合點;以及 一烊罩層,覆蓋於該基板之表面,其表面具有複數個第 一焊罩層開口和複數個第二焊罩層開口,其中該第一焊罩層 19 1253130 開口形狀為圓形’該些第二焊罩層開σ形狀為由—圓形及由 該圓形邊緣向外伸展—凸出區域所組成,係透過該第一焊罩 層開口與該第二焊罩層開口分別暴露出該些第一接合點和 第二接合點。 8. 如申請專利範圍第7項所述之球栅_基板結構,其中該凸 出區域方向為朝向該基板之四邊,且位於該基板對角線方向 之該凸出區域則朝向該基板之四個角落。 9. 如申請翻翻第7項所述之__基板結構,其中該第 二烊罩層開π之凸岐域之直徑係為該第—焊罩制口直捏 1/2。1253130 X. Patent Application Range: 1. A ball grid array (BGA) semiconductor package structure, the structure comprising: - a substrate having an upper surface and a lower surface, the lower surface having a plurality of first joints and a plurality of a second bonding point; a fire-drying cover layer covering the upper surface and the lower surface of the substrate, the lower surface having a plurality of first solder mask layer openings and a plurality of second solder mask layer openings, wherein the first solder mask The opening π shape is a circular shape, and the second enamel cover opening shape is formed by: a circular shape and an outwardly extending-projecting area from the circular edge, through the first welding layer opening and the a second solder mask layer opening respectively exposing the first bonding point and the second bonding point; a wafer disposed on the upper surface of the substrate; and a plurality of solder bumps, each of the solder bumps and the first bonding point One of the solder joints is soldered to one of the second joints. 2. The ball grid array semiconductor package structure according to the item of claim 2, wherein the direction of the 4 protruding regions is toward the four sides of the substrate, and the protruding region located in the diagonal direction of the substrate is oriented The four corners of the substrate. 3. If you apply for a patent scope! The ball-down semiconductor package structure of the present invention, wherein the diameter of the protruding portion of the second solder mask layer π is 1/2 of the opening diameter of the first solder mask layer. 4 . A ball grid array (BGA) semiconductor package structure, the structure comprising: a substrate having an upper surface and a lower surface, the upper surface having a wafer placement region, wherein the plurality of first bonding regions are disposed in the wafer placement region a plurality of 18 1253130 second joints; a cover layer covering the upper surface and the lower surface of the substrate, the wafer placement area of the substrate having a plurality of first solder mask openings and a plurality of 4 a cover opening, wherein the first cover layer has a circular opening shape, and the first dry cover layer has a shape of a circular shape and a convex region extending outward from the edge of the TM shape. The through-welding nozzle-the second solder mask opening exposes the first and second joints respectively; the cymbal has an active surface, and the wafer is flip-chip bonded to the active surface a wafer placement area of the substrate; and a plurality of solder bumps, each of the solder joints being bonded to one of the joints and one of the joints. 5. The invention relates to the ball-converting conductor package structure according to Item 4, wherein the convex protruding area direction is toward four sides of the substrate, and the protruding area located in the diagonal direction of the substrate faces the Four corners of the substrate. 6. The ball grid array semiconductor package structure according to claim 4, wherein the diameter of the protruding portion of the opening of the second solder mask layer is 1/2 of the opening diameter of the first solder mask layer. . The ball grid array substrate structure comprises: a substrate having a plurality of first joints and a plurality of second joints on the surface; and a cover layer covering the surface of the substrate, the surface having a plurality of a solder mask layer opening and a plurality of second solder mask layer openings, wherein the first solder mask layer 19 1253130 has a circular opening shape, and the second solder mask layer has a σ shape of a circle and a circular shape The rim extends outwardly—the embossed area is formed by exposing the first and second joints through the first hood opening and the second hood opening, respectively. 8. The ball grid_substrate structure of claim 7, wherein the convex region is oriented toward four sides of the substrate, and the convex region in a diagonal direction of the substrate faces the fourth of the substrate. a corner. 9. If the application is to turn over the __substrate structure described in item 7, wherein the diameter of the 岐 岐 of the second 烊 layer is π 1/2 of the first hood. 2020
TW094102815A 2005-01-28 2005-01-28 BGA package TWI253130B (en)

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