TWI252402B - A PC card subsystem adapted for coupling a PC card to a computer system - Google Patents

Abstract

The present invention relates to a PC card subsystem adapted for coupling a PC card to a computer system, the PC card subsystem comprising: a PC card controller coupled to and operating the PC card; and a PC card power switch for supplying power to the PC card and for outputting at least one control signal for operating the PC card.

Description

1252402 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to the design and manufacture of circuits required for computer card control H, computer card electrical shutdown, and other connection-computer cards to a computer system. [Prior Art] Computer card controllers need to reduce the number of pins so that they become more cost effective packages and/or smaller packages. Since the introduction of the computer card controller, many manufacturers have provided a PCI-based bridged pCI bus (currently released version 2.3) to the computer card interface; a negative solution. The most basic version of these products only controls a single computer card interface; for example: PCI1410 from Texas Instruments, 691Z6912 from 02Micro, CB141 from EhE Company of Taiwan 〇 and Ric〇h's product R5C475. Even in the most basic version of the computer card controller, in order to meet the specifications of PCI and computer cards, a large number of signals are needed, as well as some system-level interface standards and de-fact standards (standards). Other regular signals. Computer card controllers that provide these large amounts of signals are available in a de-facto standards 144-pin square flat (Qpp) package, 144/145 ball grid array (BGA) package, and more recently bump electronic ( 〇2MiCro) Introduced in a 128-pin square flat (QFP) package for single-slot computer card controllers. Those skilled in the art are aware of the amount of signal in a semiconductor product, because the extra signal will occupy the die area and impose a limit on the package. 03 23-P-spec+claims (C) (replacement) 1252402 The θθ grain area is proportional to the cost of the chip, typically on a non-linear, but generally continuous, cost size curve. The cost in the package is usually a step function relative to the number of pins because there is no industrial standard package for each pin count. For example, some examples of industry standard seals for QFp type packages are: 80-pin, 1-pin, 12-pin, 128-pin and 144-pin, although the package size is a large package cost. Factors, but the size and pin count of the closure is also a big factor. Also generally considered bga

Grid Array) is more expensive and not used in some ultra-low-cost applications. Although BGA packages typically take up a small footprint (f〇〇tprint) and require less board space for system integration. Reducing the pin count on a QFP is also beneficial to the motherboard area because the package size for a given (10) pitch is usually determined by the number of pins. The motherboard area is a factor of concern for the eight-month power-month self-card system manufacturer. The conventional computer card controller terminal P enables a large number of signals to meet the specifications of PCI and computer cards in the most basic version of the computer card control, as well as some system level interface criteria and facts used to meet the general adoption. Other regular signals for the standard (de_faet.standards).

Computer card controllers on the market today are compliant with PCI(4)v2> The PCI specification includes a definition of more than 60 signals, including protocols and input/output specifications. The computer card controller typically performs the following conventional PCI input and/or output terminals: a) PCI Arbitration Signals·· REQ# and GNT# 03 23-P-spec+claims (C) (replacement) 1252402 b) PCI Control signal: FRAME#, IRDY#, TRDY#, STOP#, DEVSEL#, PERR#, SERR# c) PCI address/data signal: AD3 1:0 d) PCI command and byte enable signal: C/ BE3:0#

e) PCI configuration cycle selection·· IDSEL f) PCI interrupt: INTA#

g) PCI clock: CLK Computer card controllers on the market today comply with the computer card standard, version 8.0. The computer card standard includes a definition of more than 60 signals, including protocols and input/output electrical specifications. The 16-bit version of the signal of a PCMCIA card is multiplexed with the 32-bit CardBus. The computer card controller usually performs the following conventional computer card input and / or output terminals: a) CardBus^ : CREQ#^ CGNT# b) CardBus control signals: CFRAME#, CIRDY#, CTRDY#, CSTOP#, CDEVSEL# c) CardBus address/information signal: CAD31: 0 d) CardBus command and byte enable signal: CC/BE3:0# e) CardBus interrupt: CINT#

f) CardBus clock · · CCLK g) PCMCIA 16-bit signal is not multiplexed with CardBus signal: D2, D14, A18 h) Computer card detection and voltage sensing signal: CD1#, CD2#, VS1, VS2 Some other Conventional computer card controller terminal functions are used to meet commonly used system level interface guidelines and de-facto standards. When 03 23-P-spec+claims (C) (replacement) 1252402 Actually, these conventional computer card controller terminal functions are somewhat multiplexed on the same terminal, and can usually be configured as a function or others to reduce The number of pins. These signals are as follows: • a) The computer card audio output is used to control an audio drive from a computer card source: SPKR#

b) The computer card activity indicator output is usually used to control an LED: named SKTJLED c) PCI reset input: named PRST# • d) PCI clock control, through the ''clock operation protocol' terminal, fact De-facto standards ··named CLKRUN# e) Power Management Context Reset: Named GRST# f) ACPI Power Management Event: Named PME#

g) PCMCIA ringer indicator, enabling the PCMCIA data function to wake up the system: named RI_0UT

h) Serialized reserved IRQ protocol terminal: named IRQSER i) Parallel power switch communication terminal: named VCCDO#, VCCD1#, ® VPPDO, VPPD1 j) Series power switch communication terminal: named CLOCK, DATA, LATCH special Functional terminals, in fact many of today's new features have been integrated into the computer card controller; for example, IEEE1394 link layer (IEEE1394 Link) or link + physical layer (Link + PHY) circuit, smart card reader, fast Flash Media Reader, and Secure Digital Input/Output (SDI0) Reader. Other ideas, such as integrating IrDA controllers and network controllers into computer card controllers, have been thought of 03 23-P-spec+claims (C) (replacement) -10- 1252402 and . In many cases, when a new feature is integrated into the computer card controller, new terminals are needed to implement the new function: called a special function terminal. Examples of special function terminals are as follows: a) Smart Card Interface defined by IS07816 b) Milk Memory Card Interface defined by SDA (Secure Digital Associati〇n) c) Smart Media Card Interface Defined by SSFDC Forum * FujiFUm) and the Olympus (〇lym state) defined xD-Picture card interface ej Ιϋϋϋ 1394 standard f) The physical layer / key (PHY / Link) interface defined by the IEEEU94-2000 standard g) concave and convex electrons ( The optional dedicated reader terminal of the 0Z711M1 is a special function terminal. The addition of special function terminals usually increases the number of arguments of the computer card controller. In other cases, the special function terminals are reserved by the typical device. And/or unused terminal functions are provided. However, the function is such that in the case of π#&+-side and unused end-end computer card controller pin counts; It is very difficult to find the location. The definition and integration of special function terminals. For example, if the function and state of the controller are included, then any new terminal including the heartbeat ear is included in the brain card controller. 03 23-P. Spec+daims (C) (replacement) -11 - 1252402 The computer card control terminal of the metric is related to the use of the smart card logic in the definition of the special function terminal. In this example, the smart card detection The terminal used is a special function terminal. Conventional computer card power switch When a computer card is inserted into the computer card connector, the connection is conventional through the card detection and voltage sensing signals (also known as CD/VS signals). The computer card controller detects it. The CD/VS signal indicates the electrical interface and voltage requirements of the computer card. The computer card controller will enable the appropriate electrical interface to the card, and pass the voltage of the electrical control signal and the indicator card. The computer card power switch communication required. The computer card power switch will enable/apply the VCC and VPP power supply as specified in the computer card standard based on the control information. The control resource is determined by the computer card controller, based on the system. The switch is supplied to the computer card power switch through a power switch communication protocol. Today, two de-facto standard power switch control interfaces and phases are used. Communication protocol: a serial control interface using a serial communication protocol, and a parallel control interface using a parallel communication protocol. An example of a serial computer card power switch is TpS22〇6 and bump bun (02 manufactured by Texas Instruments). ^Z2206 manufactured by ^1(^〇). Examples of parallel computer card power switches are TPS2211 manufactured by Texas Instruments and OZ2211 manufactured by embossed electrons (〇2Micr〇). Ding pS22〇6 and TpS221]^ Data Sheet Details the serial and parallel control protocols. The conventional computer card power switch terminals include: a) power terminal, input power from the system, and a reference ground; 03 23-P-spec+claims (C) (replacement) -12- 1252402 b) slot source terminal ' The output power is supplied to the vcc and vpp power supply of the computer card; C) the computer card power control terminal (for example, a parallel protocol, a serial protocol, a shutdown control signal); and d) an optional computer card power status terminal. Examples of optional power state terminals are over current indicators, over temperature indicators, and voltage level indicators (e.g., vcc and/or vpp are within a predetermined voltage range). Figure 1 shows a typical prior art computer card subsystem in a computer system 102. The computer card controller has just interfaced with the main bus (8) and is connected to the main bus controller 114 to provide connectivity for the system cpu and other core components of the computer system. The computer card controller 100 includes computer card logic 100a' for communicating with the main bus 1 〇 1 by using a computer card communication protocol and providing a computer card electrical interface input/output signal 1G8 for connection to the computer card for this purpose. The computer card controller (10) also provides the conventional terminal function 11〇, which is used to meet the I system level interface standard and the compact standard (10) 〇standards. ° Generally, the special function logic 10仳 is integrated into a computer card controller 100. In order to provide more Wei in the computer card controller, and usually this special function logic provides input/output signals 115 for providing connections for control and data elements associated with a particular integrated function. When a computer card 106 is inserted into the computer card connector 1〇5, the connection is detected by the card detection and voltage sensing signal 1〇7 (also referred to as CD/vs signal). 3 23-P-spec +claims (C) (replacement) -13- 1252402 The brain card controller 1〇〇 is detected. The CD/VS signal will instruct the computer card 1〇6 to generate an 'I-side 111 (for example, CardBus or 16-bit R2 interface) and a voltage request. The computer card controller 1 enables a suitable electrical interface to the card and communicates with the computer card power switch 104 indicating the voltage demand of the card via the electrical control signal 1 〇3. %月® card power switch 1 〇4 switches between VCC and VPP power supply 1〇9 as specified in the computer card standard according to control signal 1 〇3. The power that is switched to the slot is supplied to the computer card power switch 1 〇4 by the input 1121⁄4. Power switch 1 〇4 can provide one or more slot power status outputs 丨13, which are used to indicate card power related information such as overcurrent conditions, overtemperature conditions, and voltage level conditions (eg 'VCC and/or VPP Within or outside the predetermined voltage range). Figure 2 shows a computer card subsystem in one of the typical prior art computer systems 1 〇 2 that is less popular. The computer card controller 200 interfaces to a PCI main bus, and has a PCI bus REQ # signal 203, a GNT# arbitration signal 208, a PCI bus interrupt signal 205, and other conventional PCI bus signals that have been defined in the PCI specification. 204 is coupled to a PCI main bus controller 202. In this less popular example, the special function logic that is integrated into the computer card controller is the smart card reader logic 200b, and the smart card input/output signal 207 that provides data and control signals associated with the smart card. The controller 200 of Figure 2 also provides conventional terminal functions, including an output signal, SPKR# signal 206 for computer card audio, and for meeting commonly used system level interface and de-facto standards (e.g. Other signals of the PCI clock control CLKRUN# protocol 03 23-P-spec+claims (C) (replacement) -14- 1252402 [Summary of the invention] and = by communicating and controlling the computer card, and/or + and other functions of positive δ to the camphor card controller device... Brain card controller transfer method. Our preferred embodiment + consists of: quasi-controller signal to power switch. These signals are used for the second and the pen to sense the CD i #, cd required in the display of the electricity in the month.

And VS2, in the PCI rules, A sms from M 〇 said... The main control 1 sets the required REQ# and the mm interrupt signal defined in the PCI specification, and the speaker output required for the computer card. (This article is called spkr#).曰 = Ming can also enhance the protocol interface between the computer card controller and the power switch to provide a mechanism for the transfer of the self-contained computer card controller: MCIA power switch. Our enhancements include two-way communication, which is more than a "recognition" protocol, such as those used in the smbus protocol, to transfer those that are transferred from the computer card controller to the pcmcia power switch. Our enhancements to the protocol include non-synchronous communication from the power switch to the computer card & ^ in the period of time when the computer card power switch has no clock source and is transferred from the computer card controller to the PCMCIA (4) 1 Related poor news. This case will reveal the details of our enhanced protocol. An advantage of the present invention is the simplification of the logic elements and the low number of terminals required to achieve the meaning. Our protocol can be extended to support the transfer of other types of signals from the brain-brain controller to the power switch, including special 03 corrections, Claims(c)(replacement) _15_ 1252402 function terminals and general function inputs/outputs a computer + batch Also, the advantage of ML is that by transferring some terminals from the electric moon to the crying, you can smash the switch, and a computer card controls the port to be blocked by a low pin count ^ hh ±Α- ^ Λ. », ', can provide better than previous

The cost and/or area of the technology package. Another advantage of this is that there is no moon J. a«<Feng·^ soil, but another advantage is that by transferring some terminals from the electric thin card controller to the 51 W Cl ^ U original switch, a computer card controls the For the pin number and / or package of the most ~ ^ WF provides the special work discussed above [embodiment] Figure 3 shows a computer system, the electric fine subsystem 3 04, its use enhanced type Interface 302 and enhanced communication Φ ^ & main encounter k protocol and an enhanced computer card power switch 303 overnight 桦 故 故 + 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 Including the status information about the Rader, the SPKR# signal 2〇6 of the video card, this signal is usually used as an output terminal of the computer card controller 200. SPKR# status and [outside secrets] The heartbeat enhanced computer card controller 300 is transmitted to the enhanced creator day by using an enhanced protocol. The enhanced computer card power switch 303 includes -SPKR# output 2〇6a, which is determined based on the transmitted status information. The enhanced communication interface 3〇2 provides low-latency communication of SPKR# status information, so that the inherent delays in the structure are negligible. Similarly, the enhanced communication protocol includes status information about the pci bus communication inta# signal 205 and REQ# signal 203, which are typically used as output terminals from the computer card control 200. Status information for INTA#* REq# is transmitted using an enhanced protocol. The enhanced computer card power switch 3〇3 includes a 1>1 Dingba# output 2053 and a 1^(^#output 2033, the two signals are 03 23-P-spec+claims (C) (replacement) 1252402 according to The transmitted status information is determined. The enhanced communication interface 302 provides low latency communication of INTA# and REQ# status information. The enhanced communication protocol includes status information about the GNT# signal 208 of the PCI bus communication, which is typically As an input terminal from the main controller 2〇2 to the electric thin card controller 2000, the enhanced computer card power switch 303 includes a GNT# input 208a from the pci bus master controller 202, And transmitting status information about the GNT# signal to the enhanced computer card controller 300 through the enhanced communication protocol. The enhanced computer card controller 3 uses this status information as if it were obtained by a dedicated GNT# terminal. 'As provided by a conventional computer card controller 2'. The enhanced protocol includes status information about the CD/VS signal 107 of the computer card insertion/extraction status and card identification 2. This signal is usually used as a connection to a computer card. The input/output terminal of the controller 200 and the computer. The enhanced computer card power switch 303 includes a CD/VS signal 1〇7a, and a CD/VS signal transmitted to the enhanced computer card controller 300 through the enhanced communication protocol. ',,, sampling new input and timing output, enhanced computer card power supply including a new clock reference 3〇5 ' and PCI clock is the preferred clock, : 2 and most conventional computer card control The terminal is synchronized. False == When transferring high-specific function terminals or having a missing power switch, it is recommended to use _ a higher-speed clock to be less strict (for example, clothing pair k to save power. R#), also consider When using a lower speed, Figure 4 shows the basic components of the Enhanced Computer Card Controller 300 233 23-P.Spec+claims(C) (replacement) • 17- 1252402. Although conceptually The special function terminal 2〇7 can be transferred to the enhanced computer card power switch 303. In the block diagram shown in Fig. 4, we only transfer GNT#208, REQ#203, INTA#205, SPKRJ206, and CD/VS. A preferred embodiment of the power switch 1 〇 7 to the power switch. These signals are conventional computer card controller signals. The enhanced computer card controller can provide a mode in which the enhancement is removed and the terminals are used to provide regular computer card signals 4〇9, otherwise these terminals will be enabled in the enhancement. The time is transferred to the power switch. In such a conventional mode, a prior art type of computer card power switch electrical interface 1 〇 3 and a k-co-integrator can be used, such as a conventional technology parallel interface 4 〇 3 or one The prior art serial interface 404. In most conventional controllers, both serial and parallel power switch control interfaces are provided and are multiplexed on the same terminals. § & Strong mode is enabled, and the enhanced protocol will work with an enhanced power switch electrical interface 302 that is multiplexed on the same terminal as the prior art computer card power switch electrical interface 103. The preferred protocol described herein works in conjunction with two signals: EPSI-A 405 and EPSI-B 406. The enhanced protocol provides status information about all signals transferred from the enhanced computer card controller 3 to the enhanced power switch. Figure 4 depicts several sources of interrupt 4〇7, which can cause the determination of inta#2〇5, and this status information about the INTA# signal is supplied to the enhanced power switch control block via an internal connection 413 & 4 〇〇. Similarly, Figure 4 depicts several sources of audio 408, which may be dictated by sSPKr#206, and this status information about the SPKR# signal is via an internal connection 03 23-P-spec+claims (C) ( Replacement) _ 18 _ 1252402 414 is provided to the enhanced power switch control block 400. Status information provided by internal connections 4i3 and 414 is communicated to the enhanced power switch through the use of enhanced protocols and enhanced interface 302. The PCI arbitration block 401 requests access to the PCI bus access, which may cause the determination of REQ #203. For the enhanced controller 3, this request is provided to the enhanced power switch control block 4 via an internal connection 416, and the status of the PCI bus access request is communicated to through the enhanced protocol and enhanced interface 302. Enhanced power switch. Conventionally, the pci main bus controller 202 will pass the decision GNT# signal 208, which is typically used as a terminal of the computer card controller to permit access to the PCI bus. For the enhanced computer card controller 300, this bus bar is permitted to be provided by the enhanced power switch control block 400 to the PCI arbitration block 401 via an internal connection 4丨6. The state of the PCI bus access permission is communicated by the enhanced computer card power switch 303 by using the enhanced protocol and the enhanced interface 3〇2. The conventional CD/VS signal 107 is four signals: CD1#, CD2#, VS1 and VS2. The card sensing block 402 is conventionally used to determine card presence, interface requirements, and voltage level requirements. Conventional computer card controllers typically determine VS1 and/or VS2 during sensing; therefore, VS1 and/or VS2 signals are treated as inputs/outputs, while CD1*CD2 signals are typically only used as inputs. Status information relating to signals that can cause VS 1 and/or VS2 decisions is provided via an internal connection 415 to the enhanced power switch control block 4' and this status information is through the use of enhanced protocols and enhanced interfaces. 302 communicates to an enhanced power switch. The CD/VS input state is provided to the card sensing block 4〇2 via an internal connection 415 by an enhanced power switch 03 23 P spec+claims (C) (replacement) -19- 1252402. The I/value of the CD/VS input 1〇7a is communicated by the enhanced computer card power switch 3 03 using the enhanced protocol and the enhanced interface 3〇2. We recognize that a complete card sensing state machine can be implemented in the enhanced computer card power switch 3〇3, and the two single-signal communication provided to the enhanced computer card controller can provide (4) card presence, interface requirements, and All required information for voltage level requirements. However, this is not our preferred embodiment, primarily due to the added complexity of both the controller and the power switch. It is not described. It includes several conventional computer card terminals 5〇5. These terminals as outputs are determined by the internal interface 502 between the enhanced communication block 5GG and the enhanced input/output block 5()1. The internal interface 5〇2 controls the output based on the status information of each output provided by the communication protocol operating on the enhanced electrical interface 302. The conventional computer card terminal 5〇5 as an input is sampled by the enhanced input/output block 501. The sampled information is provided to the enhanced communication block via an internal interface 502, and the status information is transmitted to the enhanced computer card controller 300 via a communication protocol operating on the enhanced electrical interface 302. The preferred embodiment of the enhanced computer card power switch practice uses a PCI clock input milk as the reference clock, which is used for sampling input and timing output. For example, the power terminal 4 U2'VraVPP power output terminal 1〇9, and the status indicator 113. The strong protocol includes the conventional information used to control the power status of the computer card. This information is provided to the computer card power switch via an internal interface 5.3. 03 23-P-spec+claims (C) (replacement) -20- 1252402 504 Figure 6 shows a preferred embodiment of an enhanced computer card power switch communication protocol for the EPSI_A signal, which is communicated by the computer card controller to the power switch. The 24 clocks shown in Figure 6 constitute a communicator The preferred embodiment uses the PCI clock source as the reference clock. In Epsi-A, the computer controller determines that the EPSI-A terminal is at a low level. The work/kg has 24 clocks of EPSI-A. For the output cycle, the computer card controller judges that the EPSI A terminal is on the right disk Fi ^ rf? ζλ » — /, which is consistent with the protocol information given in Figure 6. The agreement phase is not designed in this protocol. That is, the power switch does not receive the information communicated by each building. Our Enhanced Communication Protocol Unidirectional Data Association can also include an acknowledged phase EPSI—Atg is a one-way data protocol, in which the data is only Transfer in one direction. Because the confirmation itself is not seen As the data itself, there are several periods of communication RE_ number status in the epsi_a frame. This is done to reduce the delay in transferring this information to the switch, because too much REQ technology has a major negative impact, such as performance degradation. (d) The cycle of 5 can be used to easily expand the number of terminals transferred to the power switch, or can be used for testing purposes. Communication of the prior art type of computer card power supply idle cycle usually sends slot VCC and slot VPP request to the power supply Switch, or completely disable the power switch. Figure 7 shows the EPSI_B signal enhanced computer card power switch communication protocol ° car best example, usually from the power switch to the computer card controller communication: Figure 7 The 26 clocks shown form a communication frame. The preferred embodiment uses the pci clock source as the reference clock. In Epsi__, the computer card controls

03 23-P-: spec+claims (〇 (replacement) 2J

The 1252402 and the power switch set the EPSI-B terminal to a high-impedance state (eg female Hi_Z). The EPSI-B frame includes several cycles determined by the power switch and some cycles determined by the computer card controller. The EPSI-B component of our enhanced communication protocol is a two-way data protocol in which data can be transmitted in both directions. The power switch starts the frame and transmits CD1#?CD2#9VS1?VS2^ GNT#^ ^ gf IfL 〇t ® + ^ φ] in the entire cycle of the frame. 1 Only communication determines whether VS1 and/or VS2 signals, this communication Usually performed when sensing the inserted computer card interface and power requirements. The communication cycle reserved in the epsi-b protocol provides a way to easily extend the number of terminals transferred to the power switch, or it can be used for testing purposes. There are several periods in the EPSI-B building that communicate with the GNT_ status. This is done to reduce the delay in transferring this information to the switch, as excessive GNT# delays can have significant negative effects, such as performance degradation. A reverse cycle is provided to avoid bus contention when switching between devices that determine the Epsi-B terminal. For a two-way protocol, including a one-way data protocol with a two-way acknowledgement phase, it is usually achieved that the protocol signal is held in a high-impedance state with the protocol signal attached. resistance. Furthermore, the last device is typically driven by a drive protocol signal to drive it to a - logic level before being released to the -Hi_z state. This general method is used in our Epsi-B better protocol 7 as described in Figure 7. In order to start a frame (ie, in our preferred embodiment, the EPSI-B terminal can be determined asynchronously) when there is no clock operation, the power on means 03 23-P-spec+cIaims (C) ( Replacement) -22- !252402 first start period). The prior art power switch communication protocol is not non-synchronized' and in order to satisfy the situation when a user inserts a _ computer card while the system is in a low power supply and the PCI clock stops working, adding this item to our protocol is Quite important. When this occurs, card sensing block 402 will typically determine a signal asynchronously to initiate the pci clock. If the CD/VS pin is transferred to power on_, then the power switch must perform a similar function. In our preferred protocol, the EPSI-B asynchronous decision from the power switch will cause the computer card controller to initiate the PCI clock via the traditional method. [Simple diagram of the diagram] / Figure 1 shows a typical prior art computer card subsystem in a computer system, which includes a computer card subsystem containing and integrating functional and related special function terminals; Shown as a typical ρα-based prior art computer card subsystem in a computer system, including an integrated smart card reader with smart function functions for smart card functions; Figure 3 shows an enhanced version of the present invention The computer card subsystem includes an integrated computer card controller with smart card reading logic, an enhanced computer card power switch interface and communication protocol, and a power switch signal including a computer card controller device transferred to the computer card The enhanced computer card power: Off; Figure 4 shows the basic element block diagram of an enhanced computer card controller; Figure 5 shows the block diagram of the enhanced computer card power switch; 23-P-spec+claims (C) (replacement) -23- 1252402 Figure 6 shows a preferred embodiment of the EPSI signal in the enhanced computer card power switch communication protocol. , from the computer card - the benefit to the power switch communication information, and Figure 7 shows the preferred embodiment of the EPSIJB signal in the enhanced computer card power supply ^ ^ mat switch pass protocol, usually from the electric switch to the computer Card controller communication information. [Main component symbol description] 100 computer card controller 100a computer card logic 100b special function logic 101 main bus 102 computer system 103 electrical control signal / computer 104 computer card power switch 105 computer card connector 106 computer card 107, 107a card Detection and Voltage Sensing < 108 Computer Card Interface Wheel > 109 Power/Power Output Terminal 110 Terminal Function 111 Electrical Interface 112 Wheel Entry / Power Terminal 113 Wheel Out / Status Indicator 114 Main Bus Controller 03 23 -P-spec+claims (C) (replacement) -24- 1252402 115 200 200b 201 202 203 203a 204 205 205a 206 206a 207 208 208a 300 302 303 304 305 400 401 402 403 Input/Output Signal Computer Card Controller Smart Card Reader logic signal PCI main bus controller PCI bus line signal (REQ# signal) REQ# output other conventional PCI bus signal PCI bus interrupt signal (INTA# signal) INTA# output SPKR# signal SPKR# output smart card Input/output signal/special function terminal PCI bus arbitration signal (GNT# signal) GNT# input enhanced computer card controller enhanced type Letter/Electrical Interface Enhanced Computer Card Power Switch Computer Card Subsystem Clock Reference Enhanced Power Switch Control Block PCI Arbitration Block Card Sensing Block Parallel Interface 03 23-P-spec+claims (C) (replacement) -25 - 1252402 404 Serial Interface 405 EPSI_A 406 EPSI_B 407 Interrupt 408 Audio 409 General Computer Card Signals 413, 414, 415 > 416 Internal Connection 500 Enhanced Communication Block 501 Enhanced Input/Output Block 502, 503 Internal Interface 504 Computer Card power switch block 505 computer card terminal

03 23-P-spec+claims (C) (replacement) - 26 -

Claims (1)

1252402 2. 3. 4. 5. Patent Application No. 093132645 Replacement of Chinese Patent Application (December 94) ROC (Taiwan) Patent Application No. 093132645 R_eplaceinient Version of Chinese Claims (Oecember 2005) 1 · A computer card subsystem adapted to couple a computer card to a computer system. The computer card subsystem comprises: a computer card controller coupled to and operated by the computer card; a computer card power switch for providing power to the computer card And outputting at least one control signal for operating the computer card; and an interface providing an input between the computer card controller and the power switch of the computer card, wherein the communication protocol includes input/output of the control signal Shen Yue. #] The computer card subsystem of the first item, wherein the computer card subsystem generally complies with the PCI specification ν2·3 and the version 8g computer card standard. For example, the application of the patent scope of the first item of the Lei Ri Yifeng $ < 知知卡子糸, where the control signal includes a card detection and voltage sensing (CD/VS) signal to the computer card The insertion event is communicated to the computer card controller. For example, the patent application scope is the first item of the mine, and the private control card is the audio driver control signal. Electric control card, wherein the control signal: for an interrupt signal, to communicate the interruption event of the lightning card to the electric moon | 糸. 6. If the computer card subsystem of the patent application is one Arbitration signal. 5 Hai control signal 03 23-P-spec+daims (C) (replacement) 1252402 • The computer card subsystem of claim 1 of the patent scope, wherein the control signal is a clock control signal to request the computer The system transmits a clock source to the 5 megaphone private card controller to operate the computer card. 8. The computer card subsystem of claim i, wherein the computer card power switch receives an input control signal. The computer card subsystem of the scope of item 8, wherein the input control signal comprises an arbitration signal. 1〇·such as the computer card subsystem of claim 1 of the patent scope, wherein the computer card control One step includes a smart card reader logic for coupling to a smart card, and the computer card power switch has at least one smart card control signal for operating the smart card. 11 · As claimed in the patent scope a computer card subsystem, wherein the computer card control further includes a flash media card reader logic for coupling to a flash media card, and the computer card power switch has at least one media card control signal for operating the Flash media card. 12. 申申: The computer card sub-line of the patent scope (4), wherein the control signal is transmitted to the computer card power switch by the computer card controller. 13. The computer card subsystem of claim 12, wherein the status information of the control signal is transmitted by the computer card power switch to the computer card controller. Η·If you apply for the computer card (4) of the 13th patent scope, the computer card power switch communicates the status of a card detection and voltage sensing (CD/VS) signal to the computer card controller. 03 23-P-spec+claims (C) (replacement) 1252402 a computer card subsystem as claimed in claim 12, wherein the information of the control signal is repeated in one building. 16. If the computer card subsystem of the old patent application scope is used, the communication between the computer card controller and the computer card power supply is in - (4) having a plurality of clocks. 17 · If the patent application scope is the old computer card The system card power switch according to the computer card power supply „the card detection and voltage sensing (cd/vs) signal received by a computer card connector receiving the computer card to switch the power to the computer card. 18. If you apply for a patent scope! In the computer card subsystem of the item, the computer card power switch receives the reference clock signal to sample the input and timing output. 19. For the computer card subsystem of claim i, the computer card power switch includes an asynchronous path for communicating with the computer card controller. 2〇·- A computer card subsystem suitable for a one-to-one computer card to a computer system, the computer card subsystem includes: ^ a brain-brain controller for coupling and operating the computer card, the computer card controller includes a A smart card for coupling to a smart card reads a crying; % a computer card power switch for supplying power to the computer card and outputting at least one control signal for the winter card; and; It provides a communication protocol between the computer card controller and the computer card power switch, wherein the communication protocol includes input/output levels of the control signal. 03 23-P-spec-fclaims (C) (replacement)