TWI250711B - DC power polarity protection and automatic polarity switching circuit - Google Patents

DC power polarity protection and automatic polarity switching circuit Download PDF

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Publication number
TWI250711B
TWI250711B TW93132330A TW93132330A TWI250711B TW I250711 B TWI250711 B TW I250711B TW 93132330 A TW93132330 A TW 93132330A TW 93132330 A TW93132330 A TW 93132330A TW I250711 B TWI250711 B TW I250711B
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voltage
circuit
polarity
transistor
input
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TW93132330A
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Chinese (zh)
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TW200614620A (en
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Liang-Jui Chen
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Nat Huwei University Of Scienc
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Abstract

A DC power polarity protection and automatic polarity switching circuit is applicable to a low voltage DC power. After an electrical power is connected to enter through an input voltage buffer circuit, a voltage polarity determination circuit determines its polarity so as to drive a switching circuit to enable the electric power to normally supply to a load. Thus, an input voltage, regardless of forward or reverse, can supply a normal power through the circuit at a reduced voltage loss, i.e. about 0.2V or less. As a result, the circuit can still run normally to supply power under a sufficient voltage.

Description

五、發明說明(1) 【發明所屬之技術領域 切始ί ?明係有關於一種「直流電源極性伴窄及朽地 切換電路」’其電路接上電源經過 性自動 進订電壓極性判別電路判別置極片“後,即會 ::關電路配合而進行電流迴路之選;性與 =向或反向,,可使電流迴 :=不 損之電·,促使該電路仍可mm 下正吊運作進行供電者。 '^電Μ 【先前技術】 按叙直流電之進電方式係正、負電依盆既定% 進電,若正、备貝电依具既疋路線而 、電之極性無思間或不小心錯置時,則备Μ 又^載’因此,在傳統式以一個或數個二極體(如第二、: 至第三圖所示)來克服上述問題所引用之技術,當正、: 電之極性錯置日寺’二極體不導電促使電路開路,進而確 負載免於燒毀,然此時亦因電路開路,所以負載不動作β 而另一傳統式之直流電源極性保護電路(如第四圖’ 雖能保護負載免於燒毁及使負載正常運作,但上述Ζ 之傳統直流電(如第一、三、四圖所示)均有一個共通之 缺點,當正、負電之極性錯置時,二極體則會吃掉(消耗 掉)0· 7V的電壓,使負載的電壓會比電源低〇. 7V —丨.4ν, 一旦使用於3· 3V、2· 2V、1· 8V等低電壓直流電源之新進電 子產品上,二極體所吃掉(消耗掉)的〇· 7V就會使負載因 電壓太低而無法動作,同時於第二圖所示之直流電,、一旦 正、負電之極性錯置時,則會有〇 · 7V的負電壓加至負載而 1250711 五、發明說明(2) 影響電源之極 本發明人 及裝設之方法 次試驗及多年 出申請本發明 【發明内容】 本發明之 及極性自動切 後,即會進行 之極性與二開 之電壓不論為 常供電,且可 夠之電壓下正 本發明之 及極性自動切 之接線端分別 到穩壓作用, 【實施方式】 餘下,茲 性保護者。 有鑑於此,即本著創作之創作而不斷地1 ^ ^ 、,乃思及製程 个®r地或驗製程方法 a山少 經驗,而有改進現今缺失之經由多 。 大 < 本創作,進而提 主要目 換電路 電壓極 關電路 正向或 降低受 常運作 次要目 換電路 透過電 使電壓 的,乃 ’其電 性判別 配合而 反向, 損之電 進行供 的,乃 ,其電 阻與電 波形極 在提供 路接上 電路判 進行電 均可使 壓,促 電者。 在提供 路之第 容器之 為緩和 一種直 電源經 別其極 流迴路 電流迴 使該電 流電源極性保護 過電壓緩衝電路 性,並依判別後 之選擇,令輸入 路正常動作及正 路仍可保持在足 一種直流電源極性保護 端與第二輸入端 壓緩衝電路而達 一輸入 輸入電 穩定者 配合圖式洋細說明本發明之最佳實施例如后 ^、如第五圖所示係為本發明之電路方塊流程圖,該電路 係適用於低電壓直流電源。接上電源由第一輸入端(丨丨)與 第一輸入端(12)輸入而經過電壓緩衝電路(1〇1)後,電壓 極性判別電路(102)即會進行判別其極性並與開關電路一(V. INSTRUCTIONS OF THE INVENTION (1) [Technical Fields of the Invention] The following is a description of a "DC power supply polarity narrowing and ground switching circuit" whose circuit is connected to the power supply through the automatic binding voltage polarity discriminating circuit After the pole piece is "after, it will:: close the circuit to select the current loop; sex and = direction or reverse, can make the current back: = no damage to the electricity, so that the circuit can still be hung under the mm Operation of the power supplier. '^Electricity Μ 【Previous technology】 According to the introduction of DC power, the positive and negative power are determined by the basin. If the positive and the standby power are in accordance with the route, the polarity of the electricity is not thought. Or accidentally misplaced, then prepare and load. Therefore, in the traditional way, one or several diodes (such as the second, to the third figure) are used to overcome the above-mentioned problems. Positive,: The polarity of electricity is misplaced. The temple's diode does not conduct electricity, which makes the circuit open, and the load is saved from burning. However, due to the open circuit of the circuit, the load does not operate β and another conventional DC power supply polarity protection. The circuit (such as the fourth picture) can protect the load from Destroy and make the load work normally, but the traditional DC power (as shown in the first, third, and fourth figures) has a common disadvantage. When the polarity of the positive and negative charges is misplaced, the diode will be eaten ( The voltage of 0·7V is consumed, so that the voltage of the load will be lower than that of the power supply. 7V —丨.4ν, once used in new electronic products such as 3·3V, 2·2V, 1·8V and other low-voltage DC power supplies, The 〇·7V eaten (consumed) by the diode will make the load unable to operate due to the voltage being too low. At the same time, the DC power shown in the second figure, once the polarity of the positive and negative charges is misplaced, there will be负· 7V negative voltage is applied to the load and 1250711 V. Description of the invention (2) Influencing the power source The inventor and the method of installation The sub-test and the multi-year application of the present invention [Summary of the Invention] The polarity of the present invention is automatically cut The polarity of the polarity and the voltage of the second opening are always supplied, and the terminal of the polarity and the automatic cutting of the present invention can be stabilized by the voltage, respectively. [Embodiment] The remaining protector. In view of this, The creation is constantly 1 ^ ^,, and the process and process of the process or process method a less experience, but there are improvements to the current lack of more. Large < this creation, and then the main purpose of changing the circuit voltage Turning off the circuit forward or lowering the secondary operation of the secondary circuit to change the voltage through the electric drive, is the 'electricity discrimination match and reverse, the loss of electricity is supplied, but its resistance and electrical waveform are providing the way The upper circuit judges that the electricity can be pressed and the electric power is applied. The first container of the road is provided to alleviate a straight power supply, and the current of the current source is reversed to make the current power supply polarity protect the overvoltage buffer circuit, and The selection, so that the normal operation of the input path and the positive path can still be maintained in a DC power supply polarity protection end and the second input voltage buffer circuit to achieve an input and input power stability. The following is a circuit block diagram of the present invention as shown in the fifth figure, which is suitable for a low voltage DC power supply. After the power supply is input from the first input terminal (丨丨) and the first input terminal (12) and passed through the voltage buffer circuit (1〇1), the voltage polarity discrimination circuit (102) determines the polarity and the switching circuit. One(

1250711 五、發明說明(3) 103)及開關雷跑^ 電壓極性判別合而進行電流迴路之選擇。當 ^ . ( 2 )判別極性正確時,即合選摞ρ彳 )導通,而第-輪入總()與輸出電源正端⑵ ,同時亦Λ—動^ μ Λ輸出電源正端(21)則被截止 n a驅動開關電路二(104)使第二輸入 (22 =(22)導通,而第-輸入端⑴)與輸出電匕 合電壓,,而完成輸出電源正常供應至負載之功效。 2垄極性判別電路(102)判別輸入極性錯誤時,即合驅 π電路一 (103)動作,而使第一輸入端⑴)與輸二電 源為(21)被截止,令第二輸入端(12)與輸出電源正端(2 、通,同牯開關電路二(1〇4)使第二輸入端(12)與輸出 電源負端(22)截止,而第一輸入端(11)與輸出電源負端(2 2)即會導通,完成輸出電源正常供應至負載之功效,令輪 入之電壓不論為正向或反向,經由該電路均可正常供電, 並可降低受損之電壓,促使該電路仍可保持在足夠之電壓 下正常運作進行供電者。 一 如第六圖所示係為本發明之第一較佳實施例電路圖, S電源輸入於第一輸入端(11)與第二輸入端(12)之極性正 確時,電流透過電阻(13)與電容器(14)組成之輸入電壓緩 衝電路,用以使電壓波形緩和穩定後,經由比較器(15)比 較正負端電壓,因為此時極性正確所以比較器(1 5 )之+端 輸入電壓會大於一端輸入電壓而輸出正電壓,使第一電晶 體(1 7)及第四電晶體(2 0 )工作在飽和區所以當成開關使用 (此電路電晶體使用ΝΡΝ電晶體)。此時,第一電晶體(I?)1250711 V. Inventive Note (3) 103) and Switch Thunder Run ^ Voltage polarity discrimination combined to select the current loop. When ^ (2) discriminates the polarity correctly, that is, the selection 摞ρ彳) is turned on, and the first-wheel input total () and the output power positive terminal (2), and also the Λ-moving ^ μ Λ output power positive terminal (21) Then, the cut-off na drive switch circuit 2 (104) causes the second input (22 = (22) to be turned on, and the first-input terminal (1)) to be coupled to the output power to complete the normal supply of the output power to the load. 2 when the ridge polarity discriminating circuit (102) determines that the input polarity is wrong, that is, the π circuit (103) is operated, and the first input terminal (1) and the second power source (21) are turned off, so that the second input terminal (the second input terminal ( 12) and the output power positive terminal (2, pass, the same switch circuit 2 (1〇4) to make the second input (12) and the output power negative terminal (22) cut off, and the first input (11) and output The negative end of the power supply (2 2) will be turned on to complete the normal supply of the output power to the load, so that the voltage of the turn-in is normal or reverse, and the power can be normally supplied through the circuit, and the damaged voltage can be reduced. The circuit is driven to maintain a sufficient voltage to operate normally. As shown in the sixth figure, the circuit diagram of the first preferred embodiment of the present invention, the S power supply is input to the first input terminal (11) and the first When the polarity of the two input terminals (12) is correct, the current is transmitted through the input voltage buffer circuit composed of the resistor (13) and the capacitor (14), so that the voltage waveform is moderated and stabilized, and the positive and negative terminals are compared via the comparator (15) because At this time, the polarity is correct, so the comparator (1 5 ) is + end The voltage will be greater than the input voltage of one end and the positive voltage will be output, so that the first transistor (17) and the fourth transistor (2 0) operate in the saturation region, so they are used as switches (this circuit transistor uses a germanium transistor). , the first transistor (I?)

1250711 五、發明說明(4) "~" ---〜 開關閉合,使第二輸入端(1 2 )和輸出電源負端(2 2 )導通· 第=電晶體(20)開關閉合,使第一輸入端(n)和輸出電源 正端(21)導通,輸出電源將正常供應至負載。而集極與射、 才$間的電壓僅消耗〇· 2伏特,遠優於傳統二極體之〇7伏特 f耗’而正電壓經反向器(丨6 )轉變為零電壓,因此第二電 曰曰體(1 8)及第二電晶體(1 9 )開關之基一射端電壓小於〇. 7 v ,故此兩個開關沒有動作僅由第一電晶體(17)及第四電曰 體(2 0 )兩個開關構成迴路者。 曰曰 山^輸入極性錯誤時,比較器(15)之+端電壓會低於_ 端電壓,而輸出〜零電壓。此時,零電壓經反向器(16) 變為正電壓’第二電晶體(18)開關閉合,使第一輸入端(1 1)和輸出電源負端(22)導通;第三電晶體(19)開關閉合, 使=一輸入端(12)和輸出電源正端(21)導通,輸出電源將 正吊供應至負載,電流迴路正常動作。而第一電晶體(17) 及第四電晶體(2 0 )兩個開關之基_射端電壓小於〇 · 7V,故 此兩個開關沒有動作僅由第二電晶體(18)及第三電晶體 9 )兩個開關構成迴路者。 再由第七圖所示係為本發明之第二較佳實施例電路圖 與第六圖之相較下’其差異在所使用的開關為PNP電晶體 ’說明如下’當電源輸入於第一輸入端(11)與第二輸入端 (12)之極性正確時’電流透過電阻(13)與電容器(14)組成 之輸^,壓緩衝電路,用以使當電壓波形緩和穩定後,經 由^較器(1 5)比較正負端電壓,因為此時極性正確所以比 較器(15)之+端輪入電壓會大於一端輸入電壓而輸出正電1250711 V. Invention description (4) "~" ---~ The switch is closed, so that the second input terminal (1 2 ) and the negative end of the output power supply (2 2 ) are turned on. The = transistor (20) switch is closed. The first input (n) and the output power positive terminal (21) are turned on, and the output power is normally supplied to the load. The voltage between the collector and the emitter is only 〇 2 volts, which is much better than the 7 volts f of the conventional diode. The positive voltage is converted to zero voltage by the inverter (丨6), so the first The base-emitter voltage of the switch of the second electric body (18) and the second transistor (1 9) is less than 〇. 7 v , so the two switches do not operate only by the first transistor (17) and the fourth battery The two bodies of the body (2 0 ) form the circuit. When the input polarity of the ^山^ is wrong, the voltage at the + terminal of the comparator (15) will be lower than the _ terminal voltage, and the output will be ~ zero voltage. At this time, the zero voltage becomes a positive voltage through the inverter (16) 'the second transistor (18) switch is closed, so that the first input terminal (11) and the output power supply negative terminal (22) are turned on; the third transistor (19) The switch is closed, so that the = input terminal (12) and the output power positive terminal (21) are turned on, the output power supply will be supplied to the load, and the current loop operates normally. The base of the first transistor (17) and the fourth transistor (20) has a voltage less than 〇·7V, so the two switches do not operate only by the second transistor (18) and the third battery. Crystal 9) Two switches form the loop. 7 is a circuit diagram of the second preferred embodiment of the present invention compared with the sixth figure, the difference is that the switch used is a PNP transistor, which is described as follows: when the power is input to the first input. When the polarity of the terminal (11) and the second input terminal (12) is correct, the current is transmitted through the resistor (13) and the capacitor (14), and the voltage buffer circuit is used to make the voltage waveform moderate and stable. (1 5) compares the positive and negative terminal voltages, because the polarity is correct at this time, so the + terminal input voltage of the comparator (15) will be greater than the input voltage of one end and the positive output is positive.

第8頁 1250711Page 8 1250711

壓,而正電壓經反向器(16)轉變為零電壓,因 四電晶體(17及20)開關之射一基端電壓大於〇 第 第四電晶體U7及20)開關閉合。此時第一電晶體 閉合,使第二輸入端(1 2 )和輸出電源負端(2 2 ) 二 電晶體(20)開關閉合,使第一輸入端(11)和 = (⑴導通,輸出電源將正常供應至負載。而第 晶體(18及19)兩個開關之射一基端電壓小於〇·7ν,= 及第三電晶體(18及19)兩個開關沒有動作僅由第一及: 電晶體(17及20)兩個開關構成迴路者。 # 當輸入極性錯誤時,比較器(丨5)之+端電壓會低於_ 端電壓,而輸出-零電壓’因此第二及第三電晶體⑴及 9)開關之射一基端電壓大於〇.η,第二及第三電晶體 及19)開關閉合。第二電晶體(18)開關閉合,使第一輸入 端(11)和輸出電源負端(22)導通;第三電晶體(19)開關閉 合,使第二輸入端(12)和輸出電源正端(21)導通,輸 源將正常供應至負i,電流迴路正常動作。而第一電晶體 (17)及第四電晶體(20)兩個開關之射_基端電壓小於〇. 7v ,故此兩個開關沒有動作僅由第二電晶體(丨8)及第三電曰 體(1 9)兩個開關構成迴路者。 曰 —並由第八圖及第九圖所示係為本發明之第三及第四較 佳實施例電路圖與第六及第七圖相對應,其差別為第六圖 所使用之第一至第四電晶體(丨7、丨8、丨9、2 〇)的開關係 NPN電晶體而第八圖所使用的開關為N通道場效電晶體 (MOSFET),第七圖所使用的開關為pNp電晶體,第九圖所The voltage is positive, and the positive voltage is converted to zero voltage by the inverter (16), since the voltage of the base-end of the four-transistor (17 and 20) switches is greater than that of the fourth transistor U7 and 20). At this time, the first transistor is closed, so that the second input terminal (1 2 ) and the output power supply negative terminal (2 2 ) and the second transistor (20) switch are closed, so that the first input terminal (11) and the = (1) are turned on, and the output is turned on. The power supply will be normally supplied to the load. The two base switches (18 and 19) have a base-end voltage less than 〇·7ν, = and the third transistor (18 and 19). The two switches do not operate only by the first : The two switches of the transistor (17 and 20) form the loop. # When the input polarity is wrong, the voltage at the + terminal of the comparator (丨5) will be lower than the voltage at the _ terminal, and the output - zero voltage is therefore the second and the second The three-transistor (1) and 9) switches have a base-end voltage greater than 〇.η, the second and third transistors, and 19) the switch is closed. The second transistor (18) switch is closed, so that the first input terminal (11) and the output power supply negative terminal (22) are turned on; the third transistor (19) switch is closed, so that the second input terminal (12) and the output power supply are positive. When the terminal (21) is turned on, the source will be normally supplied to the negative i, and the current loop operates normally. The two transistors of the first transistor (17) and the fourth transistor (20) have a base voltage of less than 〇. 7v, so the two switches do not operate only by the second transistor (丨8) and the third battery. The body (1 9) two switches constitute the circuit.曰—and the circuit diagrams of the third and fourth preferred embodiments of the present invention, which are shown in the eighth and ninth embodiments, correspond to the sixth and seventh figures, and the difference is the first to the sixth figure. The opening relationship of the fourth transistor (丨7, 丨8, 丨9, 2〇) is the NPN transistor and the switch used in the eighth diagram is the N-channel field effect transistor (MOSFET). The switch used in the seventh figure is pNp transistor, the ninth figure

1250711 五、發明說明(6) _ 使用的為P通道場效電晶體,而場效 源(s)極偏壓,產生閘—源極接面之/曰-疋,用閘(G)_ αυ-源(s)極間(通道)電流大小,豕強度,進而控制汲 體具有偏移電,而場效電晶體沒有、雷1 為電晶田 效電晶體導通時,僅須考量基導通 p ’再則,場 小於0. 2V ’故場效電晶體比較適 J :效應,其遠 經以上說明可知,輸入之電;; 由本發明所揭示之電路均可正 _為正向或反向,經1250711 V. INSTRUCTIONS (6) _ The P-channel field effect transistor is used, and the field effect source (s) is extremely biased to generate the gate-source junction/曰-疋, and the gate (G)_αυ - source (s) inter-electrode (channel) current magnitude, 豕 intensity, and then control the body has offset power, while field-effect transistor does not, Ray 1 is the electro-crystal field effect transistor, only need to consider the base conduction p 'Further, the field is less than 0. 2V'. The field effect transistor is more suitable for J: effect, which can be seen from the above description, the input power; the circuit disclosed by the present invention can be positive or negative, through

遷,令電塵僅減少約0.2V或更少U:降低受損之電 。同時,如第六、七、八、 逖優於傳統技術之〇· 7V 部分非常適合以積體電路方式線部份所示,電路(10) 綜上所述,當知本發明且古 且本發明未見於任何刊物,^有產業上利用性與進步性’ 二十一條及二十二條之亦,新穎性,當符合專利法第 懇請貴審查委員*、隹專=、’爰依法提出發明專利申請, 唯以上所述者了僅為^為禱。 當不能以之限定本發明實發明之其中較佳實施例而已, 專利範圍所作之均^變化:之範圍;即大凡依本發明申請 蓋之範圍内。 一修飾,皆應仍屬本發明專利涵 1250711 圖式簡單說明 【圖式簡單說明】 第 一 圖 係 為 傳統 式 之 直 流 電 源 極 性 保 護 電 路 圖一。 第 二 圖 係 為 傳統 式 之 直 流 電 源 極 性 保 護 電 路 圖二。 第 二 圖 係 為 傳統 式 之 直 流 電 源 極 性 保 護 電 路 圖三。 第 四 圖 係 為 傳統 式 之 直 流 電 源 極 性 保 護 電 路 圖四。 第 五 圖 係 為 本發 明 之 電 路 方 塊 流 程 圖 〇 第 六 圖 係 為 本發 明 之 第 — 較 佳 實 施 例 電 路 圖 〇 第 七 圖 係 為 本發 明 之 第 - 較 佳 實 施 例 電 路 圖 〇 第 八 圖 係 為 本發 明 之 第 三 較 佳 實 施 例 電 路 圖 〇 第 九 圖 係 為 本發 明 之 第 四 較 佳 實 施 例 電 路 圖 〇 【主要元件符號說明】 10____ ..電路 101… ..電壓緩衝電路 102… ..電壓極性判別電路 103… ..開關電路一 104… ..開關電路二 11.… ..第一輸入端 12____ ..弟一輸入端 13…· ..電阻 14____ ..電容器 15.… ..比較器 16____ ..反向器 17.... ..第一電晶體 18____ ..第二電晶體 19.… ..第三電晶體 20____ 22____ ..第四電晶體 ..輸出電源負端 21.… ..輸出電源正端Move, so that the electric dust only reduces about 0.2V or less U: Reduce the damaged electricity. At the same time, the sixth, seventh, eighth, and 逖 are better than the traditional technology. The 7V part is very suitable for the circuit part of the integrated circuit. The circuit (10) is described above, and the invention is ancient and The invention has not been found in any publications, and there are industrial use and progress. Articles 21 and 22 are also novel, and when they meet the requirements of the Patent Law, please review the members*, 隹 = =, 爰 爰Invention patent application, only the above mentioned is only for the prayer. The preferred embodiment of the invention is not limited thereto, and the scope of the patent is changed: the scope of the invention is within the scope of the invention. A modification should still belong to the patent of the present invention. 1250711 Brief description of the drawing [Simple description of the drawing] The first figure is a conventional direct current source polarity protection circuit. The second figure is the traditional DC current protection circuit. The second figure is the traditional DC current protection circuit. The fourth picture is the traditional DC current protection circuit. 5 is a circuit block diagram of the present invention. FIG. 6 is a first embodiment of the present invention. FIG. 7 is a circuit diagram of a first preferred embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 9 is a circuit diagram of a fourth preferred embodiment of the present invention. [Main component symbol description] 10____.. Circuit 101.... Voltage buffer circuit 102... Voltage polarity Discriminating circuit 103... Switching circuit 104... Switching circuit 211..... first input terminal 12____.. brother-input terminal 13...·.resistance 14____..capacitor 15......comparator 16____ .. reverser 17.... first transistor 18____.. second transistor 19..... third transistor 20____ 22____.. fourth transistor: output power supply negative terminal 21.... Output power positive terminal

第11頁Page 11

Claims (1)

1250711 六、申請專利範圍 括:-電^ ^ Ϊ電源極性保護及極性自動切換電路,其包 後,用以你於衝電路^係接於第一輸入端與第二輸入端之 接於前述雷;^電Μ緩和穩定;""電壓極性判別電路,係 否正確兩=衝電路之,’用卩判斷輸入之電壓極性是 別電路之ί !電路,開關電路一係接於前述電壓極性判 第二輪出電源正端之前’用以選擇第-輸入端或 電】二= 二係接於前述 第一於與輸出電源負端導通;接上電源由 懕搞ιΐ ^ 第二輸入端輸入而經過電壓緩衝電路後,電 關電路即會進行判別其極性並與開關電路一及開 路刻^丨Γ σ而進仃電流迴路之選擇;當電壓極性判別電 極性正確時’即會選擇開關電路-動作,使第一妗 出電源正端導通,❿第二輸入端與輸出電源正: j被截止,同時亦會驅動開關電路二使第二輸入端與 …負端導通’而第-輸入端與輸出電源負端即被^:, =t=輸出電源正常供應至負載之功效;當電壓極性 電路判別輸入極性錯誤時,即會驅動開關電路一 =一輸人端與輸出電源正端被截止,令第二輸盘二 出電源正端導冑,開關電路二使第二輸入端d 源負端截止’❿第-輪入端與輸出電源負端即會:3 成輸出電源正常供應至負載之功效,令輸入之電壓=二^ 正向或反向,經由該電路均可正常供電。 不順為 2· —種直流電源極性保護及極性自動切換電路,該電 第12頁 1250711 ------------. 六、申請專利範圍 路係適用於低電壓 一 輸入電壓緩衝机電源,接上電源經由電阻與電容器 極性判別電路 ^ ’則會透過比較器及反向器進行電壓 或第二及第三雷^駚極性,以選擇驅動第一及第四電晶體 令輸入之電壓不I Ϊ之開關電路使電源正常供應至負載, 電,並可降低為二:、、' 正向或反向,經由該電路均可正常供 促使該電路仍〇貝之電壓,令電壓僅減少約0 · 2 V或更少, 。 "呆持在足夠之電壓下正常運作進行供電者 3 ·如申請專利 、、 極性自動切換 2項所述之直電源極性保護及 與第二輪入媳少f,其中當電源輸入於電路之第一輸入端 之輸入電壓緩衝m時,電流透過電阻與電容器組成 比較器比較正ί 以使電壓波形緩和穩定後’經由 +端輪入電愚! ΐ因為此時極性正確所以比較器之 電晶髀这餘"大於—端輸入電壓而輸出正電壓,使第一 時第一電曰曰曰體工作在飽和區所以當成開關使用,此 集極與射第四電晶體開關閉合電流迴路正常動作, 之u伏特Λ電壓僅消耗〇.2伏特,遠優於傳統二極體 箆-曾曰 而正電壓經反向器轉變為負電壓,因此 兩個開關、、々右ί三電晶體開關之基—射端電壓為零,故此 構成迴路,每仏作僅由第一電晶體及第四電晶體兩個開關 —端電ΐ虽輪入極性錯誤時,比較器之+端電壓會低於 正電壓,笛而輪出—零電壓,此時零電壓經反向器轉變為 ^ . 弟一電晶體及第三電晶體開關閉合電流迴路正杳 電晶體及第四電晶體兩個開關之基〜射端電1250711 VI. The scope of application for patents includes: -Electric ^ ^ Ϊ Power polarity protection and polarity automatic switching circuit. After the package, it is used to connect the first input terminal and the second input terminal to the thunder. ^^Electricity easing and stability; "" voltage polarity discriminating circuit, whether it is correct two = rushing circuit, 'Use 卩 to judge the input voltage polarity is the other circuit ί ! circuit, the switching circuit is connected to the aforementioned voltage polarity Before the second round of the power supply positive terminal is used, 'to select the first input terminal or the electric power'. The second voltage is connected to the first one to be connected to the negative end of the output power supply; the power supply is connected to the second input terminal. After passing through the voltage buffer circuit, the power-off circuit will determine the polarity and select the switching circuit with the switching circuit and the opening circuit. When the voltage polarity is correct, the switch circuit will be selected. - Action, so that the first power supply is turned on at the positive end, and the second input terminal and the output power supply are positive: j is turned off, and the switch circuit 2 is also driven to make the second input terminal and the negative terminal are turned on' and the first input terminal And output power The negative terminal of the source is ^:, =t=the output power supply is normally supplied to the load; when the voltage polarity circuit determines that the input polarity is wrong, it will drive the switch circuit one = one input terminal and the output power positive terminal are cut off, The second input disk is outputted from the positive terminal of the power supply, and the second circuit of the second input terminal d is cut off by the switching circuit. The first-wheel input terminal and the negative terminal of the output power supply are: 3: The output power supply is normally supplied to the load. , so that the input voltage = two ^ forward or reverse, through the circuit can be powered normally. It is not suitable for the DC power supply polarity protection and polarity automatic switching circuit. The 12th page of the power supply 1250711 ------------. 6. The patent application range is applicable to the low voltage one input voltage buffer. The power supply of the machine is connected to the power supply via the resistor and the capacitor polarity discriminating circuit ^', and the voltage or the second and third lightning polarity are transmitted through the comparator and the inverter to selectively drive the first and fourth transistors to input the input. The switching circuit of the voltage is not Ϊ, so that the power supply is normally supplied to the load, and can be reduced to two:, 'forward or reverse. The circuit can normally supply the voltage of the circuit to the mussel, so that the voltage is only Reduce it by about 0 · 2 V or less. "Standing under normal voltage for normal operation for power supply 3 ·If applying for patent, polarity polarity automatic switching 2, the direct power polarity protection and the second round of input and less f, where the power is input to the circuit When the input voltage of the first input is buffered by m, the current through resistor and the capacitor composing comparator are compared to each other so that the voltage waveform is moderated and stabilized. 'Turn in via the + terminal wheel! ΐ Because the polarity is correct at this time, the comparator's transistor The remaining "greater than the end input voltage and output a positive voltage, so that the first electric first body works in the saturation region at the first time, so as a switch, the collector and the fourth transistor switch close the current loop to operate normally, The voltage of u volts only consumes 22 volts, which is much better than the traditional diode 箆-Zeng 曰 and the positive voltage is converted to a negative voltage by the inverter, so the base of the two switches, 々 right 三 three transistor switches - The emitter voltage is zero, so the loop is formed. Each switch is only made up of two switches of the first transistor and the fourth transistor. If the polarity of the switch is incorrect, the voltage at the + terminal of the comparator will be lower than the positive voltage. , The flute is turned out to be zero voltage. At this time, the zero voltage is converted to ^ by the inverter. The transistor and the third transistor switch close the current loop and the fourth transistor. Electricity 第13頁 1250711 六、申請專利範圍 壓小於零,故此兩個開關产 電晶體兩個開關構成迴路^。動作僅由第二電晶體及第三 4 ·如申請專利範圍第 極性自動切換電路,其中第所述之直流電源極性保護及 係使用NPN電晶體者。 至第四電晶體之電路電晶體 5 ·如申請專利範圍第? 極性自動切換電路,其中所述之直流電源極性保護及 與第二輸人端之極性正確:輸人於電路之輸入端 之輸入電壓緩衝電路,用以佶$ f透過電阻與電容器組成 比較器比較正負端電壓,因:μ ?波形緩和穩定後,經由 +端輸人電壓會大於—端日;極性正確所以比較器之 壓經反向器轉變為零電Μ ^ =而輸出正電壓,而正電 射一基端電壓大於〇·7ν,莖j此第一及第四電晶體開關之 迴路正常動作,而第二及第 及第四電晶體開關閉合電流 電壓小於0. 7V,故此第二及第電晶體兩個開關之射—基端 僅由第-及第四電晶體:個開;=曰體兩個開關沒有動作 誤時’比較ϋ之+端電Μ會低於#輸人極性錯 壓,此時第二及第三電晶體…!:電而輸出-零電 基端電壓大於0. 7V ’電流迴路正常動作,同時跫 土 ’第-及第四電晶體兩個開關:向器轉變為正電壓 故此兩個開關沒有動作僅由第::基端電壓小於〇.7V ’ 成迴路去。 一及弟三電晶體兩個開關構 ^第四電晶體兩個開關之射—基 成迴路者 6·如申請專利範圍第5項所地> 士 極性自動切換電路,其中第一、5斤^之直流電源極性保護及 1第四電晶體之電路電晶體Page 13 1250711 VI. The scope of patent application The pressure is less than zero, so the two switches of the two switches form a circuit ^. The operation is only performed by the second transistor and the third. 4. The automatic polarity switching circuit of the patent range, wherein the DC power supply polarity protection and the NPN transistor are used. Circuit transistor to the fourth transistor 5 · As claimed in the patent scope? The polarity automatic switching circuit, wherein the DC power polarity protection and the polarity of the second input terminal are correct: an input voltage buffer circuit input to the input end of the circuit is used for comparing the f$f transmission resistance with the capacitor composition comparator Positive and negative terminal voltage, because: μ ? waveform is moderated and stabilized, the input voltage through the + terminal will be greater than - terminal; if the polarity is correct, the comparator voltage will be converted to zero voltage by the inverter ^ = and the positive voltage will be output, and positive The second and fourth and fourth transistor switches have a current of less than 0. 7V, so the second and The two switches of the first transistor - the base end only consists of the first and fourth transistors: one open; = the two switches of the body do not operate incorrectly 'Compared with the + terminal power Μ will be lower than # input polarity error Pressure, at this time the second and third transistors...!: electricity and output - zero base voltage is greater than 0. 7V 'current loop normal operation, while the earth 'first and fourth transistor two switches: the transmitter Converted to a positive voltage, so the two switches have no action only :: voltage is smaller than the base end 〇.7V 'to form a loop. One and the third transistor two switch structure ^ the fourth transistor two switches - the base looper 6 · as claimed in the fifth item of the patent > the polarity automatic switching circuit, the first, 5 kg ^ DC power supply polarity protection and circuit transistor of a fourth transistor 第14頁 1250711 六、申請專利範圍 係使用PNP電晶體者。 7. 如申請專利範圍第3或第5項所述之直流電源極性 保護及極性自動切換電路,其中第一至第四電晶體之電 路電晶體係可使用為N通道場效電晶體(M0SFET) 或為P通 道增強型場效電晶體者。 8. 如申請專利範圍第2項所述之直流電源極性保護及 極性自動切換電路,其中該電路亦可以積體電路方式實現 者0Page 14 1250711 VI. Patent application scope The use of PNP crystal crystals. 7. The DC power supply polarity protection and polarity automatic switching circuit as described in claim 3 or 5, wherein the circuit electro-optic system of the first to fourth transistors can be used as an N-channel field effect transistor (M0SFET). Or a P-channel enhanced field effect transistor. 8. The DC power supply polarity protection and polarity automatic switching circuit as described in item 2 of the patent application scope, wherein the circuit can also be implemented in an integrated circuit mode. 第15頁Page 15
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WO2013078630A1 (en) * 2011-11-30 2013-06-06 大沣实业有限公司 Intelligence building block construction
TWI400993B (en) * 2009-07-10 2013-07-01 Univ Minghsin Sci & Tech Variable pole switching circuit
CN112073052A (en) * 2020-09-11 2020-12-11 浙江源创建筑智能科技有限公司 Self-adaptive sampling interface circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI400993B (en) * 2009-07-10 2013-07-01 Univ Minghsin Sci & Tech Variable pole switching circuit
WO2013078630A1 (en) * 2011-11-30 2013-06-06 大沣实业有限公司 Intelligence building block construction
CN112073052A (en) * 2020-09-11 2020-12-11 浙江源创建筑智能科技有限公司 Self-adaptive sampling interface circuit

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