TWI250450B - Microprocessor apparatus and method for providing configurable cryptographic key size - Google Patents

Microprocessor apparatus and method for providing configurable cryptographic key size Download PDF

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TWI250450B
TWI250450B TW93134765A TW93134765A TWI250450B TW I250450 B TWI250450 B TW I250450B TW 93134765 A TW93134765 A TW 93134765A TW 93134765 A TW93134765 A TW 93134765A TW I250450 B TWI250450 B TW I250450B
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Taiwan
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code
key
block
package
cryptographic
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TW93134765A
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TW200535692A (en
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Glenn G Henry
Thomas A Crispin
Terry Parks
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Via Tech Inc
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Abstract

The present invention provides an apparatus and method for performing cryptographic operations on a plurality of input data blocks within a computing device, where the size cryptographic key that is employed is programmable. In one embodiment, an apparatus for performing cryptographic operations is provided. The apparatus includes a cryptographic instruction and execution logic. The cryptographic instruction is received by a computing device as part of an instruction flow executing on the computing device. The cryptographic instruction prescribes one of the cryptographic operations, and also one of a plurality of cryptographic key sizes. The execution logic is operatively coupled to the cryptographic instruction. The execution logic executes the one of the cryptographic operations. The execution logic has a cryptographic key size controller that employs the one of a plurality of cryptographic key sizes during execution of the one of the cryptographic operations.

Description

1250450 九、發明說明: 【相關參考專利】1250450 IX. Description of invention: [Related reference patent]

本案引用相對應美國專利申請案之優先權,其為第 1 0/826475號,申請日為2004年4月16日,名稱為「 MICROPROCESSOR APPARATUS AND METHOD FOR PROVIDING CONFIGURABLE CRYPTOGRAPHIC KEY SIZE 本申請案之優先權也引用自下列美國暫時申請案件。This application refers to the priority of the corresponding US patent application, which is No. 1 0/826475, and the filing date is April 16, 2004, entitled " MICROPROCESSOR APPARATUS AND METHOD FOR PROVIDING CONFIGURABLE CRYPTOGRAPHIC KEY SIZE It is also cited from the following US temporary application cases.

序號 申請曰 名稱 60/506971 (CNTR.2070) 9/29/2003 MICROPROCESSOR APPARATUS AND METHOD FOR OPTIMIZING BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS 60/507001 (CNTR.2071) 9/29/2003 APPARATUS AND METHOD FOR PERFORMING OPERATING SYSTEM TRANSPARENT BLOCK CIPHER CRYPTOGRPHIC FUNCTIONS 60/506978 (CNTR.2072) 9/29/2003 MICROPROCESSOR APPARATUS AND MENTOD FOR EMPLOYING CONFIGURABLE BLOCK CIPHER CRYPTOGRAPHIC ALGORITHMS 60/507004 (CNTR.2073) 9/29/2 ⑻ 3 APPARATUS AND METHOD FOR PROVIDING USER-GENERATED 1250450No. Application No. 60/506971 (CNTR.2070) 9/29/2003 MICROPROCESSOR APPARATUS AND METHOD FOR OPTIMIZING BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS 60/507001 (CNTR.2071) 9/29/2003 APPARATUS AND METHOD FOR PERFORMING OPERATING SYSTEM TRANSPARENT BLOCK CIPHER CRYPTOGRPHIC FUNCTIONS 60/506978 (CNTR.2072) 9/29/2003 MICROPROCESSOR APPARATUS AND MENTOD FOR EMPLOYING CONFIGURABLE BLOCK CIPHER CRYPTOGRAPHIC ALGORITHMS 60/507004 (CNTR.2073) 9/29/2 (8) 3 APPARATUS AND METHOD FOR PROVIDING USER-GENERATED 1250450

KEY SCHEDULE IN A MICROPROCESSOR CRYPTOGRAPHIC ENGINE 60/507002 (CNTR.2075) 9/29/2003 MICROPROCESSOR APPARATUS AND METHOD FOR PROVIDING CONFIGURABLE CRYPTHOGRAPHIC BLOCK CIPHER ROUND RESULTS 60/506991 (CNTR.2076) 9/29/2003 MICROPROCESSOR APPARATUS AND METHOD FOR ENABLING CONFIGURABLE DATA BLOCK SIZE IN A CRYPTOGRAPHIC ENGINE 60/507003 (CNTR.2078) 9/29/2003 APPARATUS FOR ACCELERATING BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS IN A MICROPROCESSOR 60/464394 (CNTR.2222) 4/18/2003 ADVANCED CRYPTOGRAPHY UNIT 60/506979 (CNTR.2223) 9/29/2003 MICROPROCESSOR APPARATUS AND METHOD FOR PROVIDING CONFIGURABLE CRYPTHOGRAPHIC KEY SIZE 60/508927 10/3/2003 APPARATUS AND METHOD FOR 1250450KEY SCHEDULE IN A MICROPROCESSOR CRYPTOGRAPHIC ENGINE 60/507002 (CNTR.2075) 9/29/2003 MICROPROCESSOR APPARATUS AND METHOD FOR PROVIDING CONFIGURABLE CRYPTHOGRAPHIC BLOCK CIPHER ROUND RESULTS 60/506991 (CNTR.2076) 9/29/2003 MICROPROCESSOR APPARATUS AND METHOD FOR ENABLING CONFIGURABLE DATA BLOCK SIZE IN A CRYPTOGRAPHIC ENGINE 60/507003 (CNTR.2078) 9/29/2003 APPARATUS FOR ACCELERATING BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS IN A MICROPROCESSOR 60/464394 (CNTR.2222) 4/18/2003 ADVANCED CRYPTOGRAPHY UNIT 60/ 506979 (CNTR.2223) 9/29/2003 MICROPROCESSOR APPARATUS AND METHOD FOR PROVIDING CONFIGURABLE CRYPTHOGRAPHIC KEY SIZE 60/508927 10/3/2003 APPARATUS AND METHOD FOR 1250450

(CNTR.2226) PERFORMING OPERATING SYSTEM TRANSPARENT CIPHER BLOCK CHANING MODE CRYPTOGRAPHIC FUNCTIONS 60/508679 (CNTR.2227) 10/3/2003 APPARATUS AND METHOD FOR PERFORMING OPERATING SYSTEM TRANSPARENT CIPHER FEEDBACK MODE CRYPTOGRAPHIC FUNCTIONS 60/508076 (CNTR.2228) 10/3/2003 APPARATUS AND METHOD FOR PERFORMING OPERATING SYSTEM TRANSPARENT OUTPUT FEEDBACK MODE CRYPTOGRAPHIC FUNCTIONS 60/508604 (CNTR.2230) 10/3/2003 APPARATUS AND METHOD FOR GENERATING A CRYPTOGRAPHIC KEY SCHEDULE IN A MICROPROCESSOR 本申請案為下列美國專利申請案之續案,並有一位共 同的讓渡者與共同發明人。(CNTR.2226) PERFORMING OPERATING SYSTEM TRANSPARENT CIPHER BLOCK CHANING MODE CRYPTOGRAPHIC FUNCTIONS 60/508679 (CNTR.2227) 10/3/2003 APPARATUS AND METHOD FOR PERFORMING OPERATING SYSTEM TRANSPARENT CIPHER FEEDBACK MODE CRYPTOGRAPHIC FUNCTIONS 60/508076 (CNTR.2228) 10 /3/2003 APPARATUS AND METHOD FOR PERFORMING OPERATING SYSTEM TRANSPARENT OUTPUT FEEDBACK MODE CRYPTOGRAPHIC FUNCTIONS 60/508604 (CNTR.2230) 10/3/2003 APPARATUS AND METHOD FOR GENERATING A CRYPTOGRAPHIC KEY SCHEDULE IN A MICROPROCESSOR This application is the following US patent application The continuation of the case, and a common transferee and co-inventor.

序號 申請曰 名稱 10/674057 (CNTR.2224) 9/29/2003 MICROPROCESSOR APPARATUS AND METHOD FOR PERFORMING 1250450No. Application 曰 Name 10/674057 (CNTR.2224) 9/29/2003 MICROPROCESSOR APPARATUS AND METHOD FOR PERFORMING 1250450

BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS 又本申請案與下列之美國專利申請案相關連,並有一 位共同的讓渡者與共同發明人。BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS This application is also associated with the following U.S. patent applications and has a common assignee and co-inventor.

序號 申請曰 名稱 10/730167 (CNTR.2224-C1) 12/5/2003 MICROPROCESSOR APPARATUS AND METHOD FOR PERFORMING BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS 10800768 (CNTR.2070) 3/15/2004 MICROPROCESSOR APPARATUS AND METHOD FOR OPTIMIZING BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS 10/727973 (CNTR.2071) 12/4/2003 APPARATUS AND METHOD FOR PERFORMING TRANSPARENT BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS 10/800938 (CNTR.2072) 3/15/2004 MICROPROCESSOR APPARATUS AND METHOD FOR EMPLOYING CONFIGURABLE BLOCK CIPHER CRYPTOGRAPHIC ALGORITHMS 10/800983 (CNTR.2073) 3/15/2004 APPARATUS AND METHOD FOR PROVIDING USER-GENERATED KEY SHEDULE IN A MICROPROCESSOR 1250450No. Application No. 10/730167 (CNTR.2224-C1) 12/5/2003 MICROPROCESSOR APPARATUS AND METHOD FOR PERFORMING BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS 10800768 (CNTR.2070) 3/15/2004 MICROPROCESSOR APPARATUS AND METHOD FOR OPTIMIZING BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS 10/727973 (CNTR.2071) 12/4/2003 APPARATUS AND METHOD FOR PERFORMING TRANSPARENT BLOCK CIPHER CRYPTOGRAPHIC FUNCTIONS 10/800938 (CNTR.2072) 3/15/2004 MICROPROCESSOR APPARATUS AND METHOD FOR EMPLOYING CONFIGURABLE BLOCK CIPHER CRYPTOGRAPHIC ALGORITHMS 10/800983 (CNTR.2073) 3/15/2004 APPARATUS AND METHOD FOR PROVIDING USER-GENERATED KEY SHEDULE IN A MICROPROCESSOR 1250450

CRYPTOGRAPHIC ENGINE HEREWITH MICROPROCESSOR APPARATUS (CNTR.2076) AND METHOD FOR ENABLING CONFIGURABLE DATA BLOCK SIZE IN A CRYPTOGRAPHIC ENGINE HEREWITH MICROPROCESSOR APPARATUS (CNTR.2223) AND METHOD FOR PROVIDING CONFIGURABLE CRYPTOGRAPHIC KEY SIZE HEREWITH APPARATUS AND METHOD FOR (CNTR.2226) PERFORMING TRANSPARENT CIPHER BLOCK CHAINING MODE CRYPTOGRAPHIC FUNCTIONS HEREWITH APPARATUS AND METHOD FOR (CNTR.2227) PERFORMING TRANSPARENT CIPHER FEEDBACK MODE CRYPTOGRAPIC FUNCTIONS HEREWITH APPARATUS AND METHOD FOR (CNTR.2228) PERFORMING TRANSPARENT OUTPUT FEEDBACK MODE CRYPTOGRAPIC FUNCTIONS HEREWITH APPARATUS AND METHOD FOR (CNTR.2230) GENERATING A CRYPTOGRAPHIC KEY SCHEDULE IN A 10 1250450 —^—— ---—-—_— — MICROPROCESSOR ------- 【發明所屬之技術領域】 士叙明係關於微電子領,或,更特定係關於一種用以在 :二舁裝置中執行密碼運算之裝置及方法,其允許密碼金 1、大小用以在指令階層被程式化。 先前技術 電腦系 需輸入 之。當 料一般 統之其 檔案可 當輸出 置中時 式的輸 感資訊 被發展 這些密 統係以 資料非 應用程 為書面 它類型 作為同 資料檔 ’其甚 入檔案 的需求 及利用 碼程式 早期的電腦系統與其它 因其上執行之應用程式的所 用程式設計者在執行時提供 將產生輸出資料,且輪出資 被寫至磁帶、光碟或電腦系 檔案形式。接著,輸出資料 一應用程式之輸入檔案;或 矛夕動式或可攜式大量儲存裝 但相容之電腦系統中應用程 腦系統上,逐漸了解保護敏 訊安全措施中,密碼程序係 露之敏感資料。一般來說, 之輸出資料加以加密及解密 不久後,使用者開始發 點,因此網路架構、作業系 使得資料不僅得以共享,資 例而言,現今的電腦工作站 獨立方式運作, 位於其中則為應 式被執行時,其 輸出資料形式或 大量儲存裝置的 一電腦系統中下 案係先存於一可 可作為另一不同 。在這些早期電 ’並且在其他資 來保護未授權揭 對存於儲存裝置 現網路電腦具有共用資訊之優 統及資料傳輪協定齊步發展, 料之共享更具突出的 J叻能。舉 使用者普遍可取得 取侍不同工作站 11 l25〇450 或網路檔案伺服器上的檔案, 聞及其它資訊,或可在眾多電 <息(即電子郵件),或可與 信用卡或銀行業務資訊以向該 廢、機場或其它公眾場合使用 喝的動作。因此,敏感資料之 $言可喻’使用者在使用電腦 行保護之例亦不勝牧舉。由各 關於電腦資訊安全之種種駭人 坡极郵件、網路駭客、身份竊 信用卡拃騙等與民眾相關之種 些預謀之網路恐怖主義,以不 的影響’故相關權責單位已以 +教育寺條款反擊之;然而, 電腦資訊危機上達到有效成 府、金融機構、軍事單位及間 巳成為一般利用家用電腦而讀 <民眾所不得加以警戒之一大 員亦不難理解,現存大小公司 大部份的資源在其私有資訊的 在訊息安全範嘴方面,已 可以讓訊息只會被特定的對象 I (cryptography)。當特別應 月鶴間儲存或傳送時,加密使用 a 明文 (cleartext)或“本文 开夕式(如“密文” (ciphertext) 或可使用網際網路而取得新、 腦之間來回發送及接收電子 販售商電腦系統相連而提供 販售商訂購產品,或可在餐 熟線網路而進行上述任何一 免於未經授權公開的必要性 期間不得不對其敏感資料進 種新聞標題不難得知,當前 聽聞的議題皆浮上檯面,如 _ 取、反向工程、網路詐欺及 種手段的出現等。而因為這 正之手段入侵個人隱私範圍 各項新法律、嚴厲條款及公 該等因應措施皆未在遏阻此 果,因此該項過去僅為政 諜人士所關注之議題,如今 取電子郵件或進行帳戶交易 _ 問題。電腦網路從業技術人 在商業父易上皆需投注相當 保護上。 逐漸發展出一些技術與裝置 所接收瞭解,即所謂的密碼 用於保護資訊時,其為在電 於傳送敏感的訊息(已知如 (plaintext)至不能瞭解的 )。明文轉換至密文的傳送 12 1250450 過矛王稱加密(encryption ) ” 、 “譯成密碼 · (nciphering ) 、或“密碼化(ciphering) ” ,且密文 、至月文的傳送過程稱“解密(decryption ) ” 、 “解 ” i 馬(deciphering ) ” 、或“轉換密碼(inverse ciphering ),,。 在密碼範疇中,建立數個步驟及規則,來允許使用者 不需要高度知識或努力來完成密碼運算,且使這些使用者 月匕夠傳送或以其他方式如加密形式提供其訊息給其他使用 者。順著加密訊息,傳送者一般提供接受者一個不能使接_ 又者解除加密訊息的“密碼金鑰”,因此接受者不能夠移 除或以其他方式增加未加密原始訊息的存取。一種技術將 &些步驟或規則採取密碼保護,數學運算及特別設計的應 用程式形式將高敏感度訊息加密或解密。一些演算法類別 使用於將資料加密或解密。在此提及的第一類演算法類別 (如公共金输(PubHc key )密碼演算法;ΜΑ演算法) 利用兩種雄碼金鑰(一種公共金鑰及一種私人金鑰 (private key ))來將資料加密或解密。提及一些公共金 _ 输演异法’一種公共金鑰利用來傳送給接受者的資料加 密。在使用者公共金鑰及私人金鑰兼有一個數學演算關 係,接受者必須利用其私人金鑰將傳送資料解密以恢復資 料。雖然此類密碼演算法在今日廣泛被使用,但加密及解 後肩异法速度仍然過慢,即使只加密與解密少量資料。第 二類演算法,如對稱金鑰演算法(symmetric key alg〇rithmS ),提供相當程度之資料安全,且速度更快。 這些演异法稱為對稱金输演算法,因為其使用密碼金錄於 加密及解密訊息。有三種公共習知之主要密碼金輪演算 13 >1250450 法:資料加密標準(data encryption standard,DES )演算 法,三重資料加密標準(Triple DES )演算法,及進階加 密標準(advanced encryption standard,AES )演算法。因 為這些演鼻法強度保護南敏感度資料’其現在由美國政府 及其代理機構使用。但可以預期,這些技術中的至少一個 將在未來成為商業或私人傳送標準。根據這些對稱金鑰演 算法,明文及密文係分別被區隔於一個特殊的大小來加密 或解密。舉例,在128位元大小區間的進階加密標準完整 密碼演算法,且使用128、192及256位元的密碼金鑰。 · 其他對稱金鑰演算法允許1 92及256位元資料組的進階加 密標準。提及區塊加密運算,一種1 024位元明文訊息為如 八個1 2 8位元組加密。 全部的對稱金鑰演算法利用相同形式的子運算,將一 明文區塊加密。且提及一般更常使用的對稱金鑰演算法, 一種最初密碼金餘擴展多種金输(如一種“金鑰目 錄”),每一個如符合子運算密碼“回合” (round)在明 文區塊中完成。舉例,金鑰目錄的第一金鑰使用來完成在 II 明文區塊上次運算的第一密碼回合,其中第二密碼回合利 用金鑰目錄的第二金鑰來產生第二結果。一種特定數量的 次單元回合被完成來產生一個密文自身的最終回結果。進 階加密標準演算法之每一回合中的子運算,尚有次位元 (或 S-box )、移列(ShiftRows )、混攔 (MixColum )、加入回合鍵(AddRoundKey )等術語。 每一回合期間,一種密文區塊解密完成,除了完成密文輸 入轉換密碼以及轉換子運算(如混欄、移列),每一回合 最終結果為明文區塊。 14 1250450 資料加岔標準及三重資料加宓 只丨T刀在知準〉貝异法使用不同規 格的子運鼻’但子運管盘ntb J. ^ , 卜 連""^進階加岔標準演算法者類似,因 子運异將明文區塊轉換成穷 于寸状风名文塊時係以類似方式為之。 〃在夕重連·'貝測4組上完成密石馬操作,全部對稱金錄運 算利用相同的模式。這些模式包含電子密碼書 (electronic code book、ECB )模式、密文區塊串列 (cipher block chaining、CBC )模式、密文回授(_ — feedback、CFB )模式、及輸出回授(_put -此心、 〇FB )模式。纟子運算完成期間,一些模式利用一種附加 初始化向量且一些使用完成於第一明文區塊加密第一位置 的密文輸出,如一種附加輸入至完成於第二明文區塊的加 密第二位置。更多的相關技術細節,可以參見Federal Information Processing Standards Publication 46-3 (FIPS-46-3 ) ,1999年10月25日,其詳細討論了資料加 密標準、三重資料加密標準;以及參見Fan 97,2〇〇1年 11月2 6日,其對進階加密標準作了詳細解釋。前述標準規 則係由國家標準科技研究所(National Institute of Standards and Technology > NIST )頒佈及主張 D 此外, 個別的指令、白皮書' 套裝工具及對策可參考國家標準科 技研究所之電腦安全應變中心(CSRC ),網址為 http://csrc.nist.gov/ ° 熟習該項技術者皆能了解多種應用程式可在得執行密 碼運算(密碼及解密)的電腦系統上被執行,事實上某些 作業系統(如 Microsoft⑧、WindowsXP® 、及 Linux 等) 即以密碼相關原始形式提供直接的密碼及解密服務。然 而’本案發明人已觀察得知目前的電腦密碼相關技術在某 15 1250450 些層面上仍 處,不足之 第1圖 塊圖100顯 接,一第二 一第一路由 際網路及一 成的介面亦 一無線網路 由器1 1 1則 工作站相接 如前文 臨嚴重的電 作業系統控 作,且每一 者需執行一 於作業系統 作站1 0 1上 行檔案儲存 作站102之 解密應用程 同步訊息) 者可在工作 資料(如信 當走出公司 101 , 102 顯不足’讀者可參閱第1圖即得了解不足之 · 處亚在後文中有所討論。 為一說明現今電腦密碼應用技術之方塊圖。方 不一第—電腦工作站1 ο 1及一區域網路1 05相 電細工作站102、一網路檔案儲存裝置100、 & 107或其他與廣域網路(WAN ) 1 10如網 個無線網路路由器1〇8如IEEE標準8〇211形 與區域網路105連結。一膝上型電腦1〇4經由 109與無線路由器1〇8以介面相接,一第二路鲁 在廣域網路11 〇之另一點上提供與一第三電腦 之介面。 中所略為提及者,現今使用者在工作期間正面 x資Λ女全性問題。舉例而言,在現今多任務 制下 工作站101之使用者可同時執行多項工 項工作皆需加以密碼運算。工作站1 〇 1之使用 中或為 之檔案 的同時 第二使 式112 或非即 站103 用卡號 進入任 ,106 作業系 儲存至 ’使用 用者, 5其中 時者( 透過廣 及金融 何一個 5 107 用程式 統所喚 網路檔 者可將 第二使 加密訊 即電子 域網路 交易等 在區域 ,108 11 2 (不論應 起執行皆然 案儲存裝置 一加密訊息 用者同樣需 息之提供可 郵件)形式 11 0而使用 )或其它形 網路1 0 5上 ,1 0 9工作 用程式 ),以 106中 傳送予 要執行 為即時 。此外 或提供 式敏感 的分享 站101CRYPTOGRAPHIC ENGINE HEREWITH MICROPROCESSOR APPARATUS (CNTR.2076) AND METHOD FOR ENABLING CONFIGURABLE DATA BLOCK SIZE IN A CRYPTOGRAPHIC ENGINE HEREWITH MICROPROCESSOR APPARATUS (CNTR.2223) AND METHOD FOR PROVIDING CONFIGURABLE CRYPTOGRAPHIC KEY SIZE HEREWITH APPARATUS AND METHOD FOR (CNTR.2226) PERFORMING TRANSPARENT CIPHER BLOCK CHAINING MODE CRYPTOGRAPHIC FUNCTIONS HEREWITH APPARATUS AND METHOD FOR (CNTR.2227) PERFORMING TRANSPARENT CIPHER FEEDBACK MODE CRYPTOGRAPIC FUNCTIONS HEREWITH APPARATUS AND METHOD FOR (CNTR.2228) PERFORMING TRANSPARENT OUTPUT FEEDBACK MODE CRYPTOGRAPIC FUNCTIONS HEREWITH APPARATUS AND METHOD FOR (CNTR.2230) NER SCH UL ED ED ED ED ED ED ED A device and method for performing a cryptographic operation in a binary device, which allows a password of 1 and a size to be used at the instruction level Of. Prior art computer systems need to be entered. When the file is generally available, the file's inductive information is developed. These data systems are written in non-applications. The type is used as the same data file's requirements for its access files and the use of code programs. The computer system and other programmers of the application executed by it will provide output data when executed, and the round capital contribution will be written to tape, CD or computer file format. Then, output the data-application input file; or the application of the brain system on the computer system in a large-scale storage or compatible storage system, and gradually understand the security measures of the protection sensitivity, the password program is exposed. Sensitive information. Generally speaking, after the output data is encrypted and decrypted, the user starts to send the point. Therefore, the network architecture and the operating system enable the data to be shared not only. In terms of capital, today's computer workstations operate independently, and in which When the application is executed, the output of the data form or a computer system of a large number of storage devices is stored in a cocoa as another difference. In these early days, and in other resources to protect unauthorized access to the storage devices, the existing information and the data transfer agreement for the sharing of information on the Internet are progressing, and the sharing is more prominent. Users can generally obtain files from different workstations 11 l25〇450 or network file servers, and other information, or can be in a lot of electricity (ie email), or can be with credit card or banking Information to use the drink to the waste, airport or other public places. Therefore, the slogan of sensitive information can be said to be a case of users using computer protection. The premeditated cyber terrorism related to the public, such as the various kinds of computer information security, such as slamming emails, Internet hackers, and identity theft credit card fraud, is not affected. + Education Temple clauses counterattack; However, in the computer information crisis, effective government, financial institutions, military units and inter-department became the general use of home computers and read. "The public is not allowed to be vigilant. It is not difficult to understand, existing Most of the resources of large and small companies have been able to make messages only specific to the object I (cryptography) in terms of their message security. When storing or transmitting in particular, the encryption uses a cleartext or "the eve of the text (such as "ciphertext" or can use the Internet to get new and send back and forth between the brain. It is not difficult to know that a vendor’s computer system is connected to provide a vendor with a product order, or that it is necessary to enter a news headline for sensitive information during the above-mentioned period of exemption from unauthorized disclosure. The current topics of interest are on the table, such as _ take, reverse engineering, online fraud and the emergence of various means, and because this means to invade the privacy of individuals, new laws, strict terms and public measures are not In the past, this is only a topic of concern to political and spy people. Now it is e-mail or account transaction. _ Problem. Computer network practitioners need to bet on the business father. Some technologies and devices receive the understanding that when so-called passwords are used to protect information, they are transmitted in a sensitive message (known (plaintext) to the incomprehensible). The transmission of plaintext to ciphertext 12 1250450 is called "encryption", "nciphering", or "ciphering", and ciphertext, The transfer process to the moon is called "decryption", "deciphering", or "inverse ciphering". In the password category, several steps and rules are established to allow use. No high level of knowledge or effort is required to perform the cryptographic operations, and these users are allowed to transmit or otherwise provide their messages to other users on a monthly basis. Following the encrypted message, the sender generally provides the recipient with one that cannot be made. In addition, the "password key" of the encrypted message is removed, so the recipient cannot remove or otherwise increase the access of the unencrypted original message. A technique will use & some steps or rules to be password protected, mathematical operations and A specially designed application form encrypts or decrypts highly sensitive messages. Some algorithms are used to encrypt or decrypt data. The first type of algorithm mentioned (such as the Public Cash (PubHc key) cryptographic algorithm; the ΜΑ algorithm) uses two male code keys (a public key and a private key) to Data encryption or decryption. Refers to some public gold _ translating the different method 'a public key used to encrypt the data transmitted to the recipient. The user public key and the private key have a mathematical calculus relationship, the recipient must Using its private key to decrypt the transmitted data to recover the data. Although such cryptographic algorithms are widely used today, the speed of the shoulder-and-shoulder method after encryption and decoding is still too slow, even if only a small amount of data is encrypted and decrypted. The second type of algorithms, such as the symmetric key alg〇rithmS, provide a fair amount of data security and are faster. These variants are called symmetric gold-transfer algorithms because they use passwords to record and decrypt messages. There are three common knowledge of the main password gold wheel calculus 13 > 1250450 method: data encryption standard (DES) algorithm, triple data encryption standard (Triple DES) algorithm, and advanced encryption standard (advanced encryption standard, AES) ) Algorithm. Because these narrative strengths protect South sensitivity data, they are now used by the US government and its agencies. However, it is expected that at least one of these technologies will become a commercial or private delivery standard in the future. According to these symmetric key algorithms, plaintext and ciphertext are separated by a special size to encrypt or decrypt. For example, the advanced encryption standard complete cryptographic algorithm in the 128-bit size interval uses 128, 192, and 256-bit cryptographic keys. · Other symmetric key algorithms allow for advanced encryption criteria for the 1 92 and 256-bit data sets. Referring to block cipher operations, a 1,024-bit plaintext message is encrypted as eight 192 bytes. All symmetric key algorithms use a sub-operation of the same form to encrypt a plaintext block. And refer to the symmetric key algorithm that is more commonly used, an initial cryptographic gold extension that extends multiple gold inputs (such as a "key directory"), each such as a sub-operating code "round" in the plaintext block. Completed in the middle. For example, the first key of the key directory is used to complete the first password round of the last operation of the II plaintext block, wherein the second key is used to generate the second result using the second key of the key directory. A specific number of sub-unit rounds is completed to produce a final result of the ciphertext itself. Sub-operations in each round of the Advanced Encryption Standard algorithm also have terms such as sub-bit (or S-box), ShiftRows, MixColum, and AddRoundKey. During each round, a ciphertext block is decrypted. In addition to completing the ciphertext input conversion cipher and conversion sub-operations (such as blending and shifting), the final result of each round is a plaintext block. 14 1250450 Data plus standard and triple data plus only 丨T knife in the knowledge>Bei method uses different specifications of the nose nose 'but the child transport tube ntb J. ^ , Bulian "" Similar to the standard algorithm, the factor transfer is similar to the case where the plaintext block is converted into a poorly-formed block. 〃 夕 夕 夕 ' ' ' ' ' 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝 贝These modes include electronic code book (ECB) mode, cipher block chaining (CBC) mode, ciphertext feedback (__feedback, CFB) mode, and output feedback (_put - This heart, 〇 FB) mode. During the completion of the dice operation, some modes utilize an additional initialization vector and some use the ciphertext output completed in the first plaintext block to encrypt the first location, such as an additional input to the encrypted second location completed in the second plaintext block. For more technical details, see Federal Information Processing Standards Publication 46-3 (FIPS-46-3), October 25, 1999, which discusses data encryption standards, triple data encryption standards, and Fan 97. On November 26, 2, 1 year, it explained in detail the advanced encryption standard. The aforementioned standard rules are promulgated and claimed by the National Institute of Standards and Technology (NIST). In addition, individual directives, white papers, kits and countermeasures can be referred to the National Institute of Standards and Technology's Computer Security Response Center ( CSRC) at http://csrc.nist.gov/ ° Those who are familiar with the technology can understand that a variety of applications can be executed on computer systems that perform cryptographic operations (passwords and decryptions), in fact some jobs Systems such as Microsoft 8, Windows XP®, and Linux provide direct password and decryption services in a password-related original form. However, the inventor of this case has observed that the current computer password related technology is still on some 15 1250450 levels, and the first block diagram 100 is not connected, and the second one is the first routing network and one percent. The interface is also a wireless network router 1 1 1 workstation connected as in the previous severe electrical operating system control, and each needs to perform a decryption application synchronization of the operating system for the station 1 0 1 uplink file storage station 102 Messages can be found in the work materials (such as the letter out of the company 101, 102 is insufficient) readers can refer to Figure 1 to understand the shortcomings. The ya is discussed in the following text. It is a block to illustrate the current computer password application technology. Figure. Fang Weiyi - computer workstation 1 ο 1 and a regional network 1-5 phase electrical workstation 102, a network file storage device 100, & 107 or other and wide area network (WAN) 1 10 The network router 1〇8 is connected to the area network 105 as in the IEEE standard 8〇211. A laptop computer 1〇4 interfaces with the wireless router 1〇8 via 109, and a second road is connected to the wide area network 11 Another Point to provide a interface with a third computer. In the middle of the mention, today's users are working positively during the work. For example, in the current multitasking system, users of workstation 101 can simultaneously All the work items need to be cryptographically operated. When the workstation 1 〇1 is in use or is in the file, the second enable 112 or the non-stop station 103 enters with the card number, and the 106 operation is stored to the 'user, 5 Among them, the person who calls the network file through the wide-ranging financial system can use the second to enable the encrypted network, that is, the electronic domain network transaction, etc., 108 11 2 (regardless of the implementation of the file) The device-encrypted message user also needs to provide the mail (in the form of 11) and other forms of network 1 0 5, 1 0 9 work program), and transmits it to 106 to be executed as instant. In addition or provide sensitive sharing stations 101

加 其 資 16 1250450 者使用第三電腦工作站103可代表家用電腦或遠距電腦 1〇3。每-個前述動作需要一個符合執行加密/解密操作 112的例子。此外,無線網路⑽現在常態性的提供於咖 啡店,機場’學校,及其他公共場所,因此筆記型電腦 1〇4使用者-個加密解密無論是他/她的訊息傳送/接收 其他使用者立即的需要,且經由無線網路1〇9至益線路由 器108加密或解密所有訊息。 ‘ 習知技術者可以瞭解,#—個上述活動都需要在工作 站1〇1-104上做密碼運算,也就相應有執行-個立即的加 密’解密操作112的需求。因此,電月I 101-104進一步可 能同時完成數百個密碼運算。 無論如何,存在一些在電腦系統1〇ι_ι〇4上執行至少 :個以上立即的加冑/解密操作Μ而完成密碼運算之方 去限制|例,經由一個軟體程式完成一個前述功能相對 比經由硬體完成相同功能執行慢。每一個加密/解密操作 / 12都需要一段時間,並且正在電腦10卜104上執行的現 ^程式:能在這段時間内必須暫停執行,且密碼操作(如 月文山文拉式’金鑰等)參數必須通過操作系統至加 …/解名紅作112 ,執行密碼運算。且因為密碼運算必須 匕3 4寸殊、、且別貝料幾回子運算,加密/解密操作η 2執行 包含執灯多個電腦延伸指令,因此全部系統操作速度有不 利的影=。卜般習知技術者所能查*,在Microsoft⑧ Outlook傳送一個小的加密電子郵件會較傳送一個未加密 包子郵件k 5倍。此外,目前的密碼相關技術因作業系統 之;|入而有延遲’大部份的應用程式不提供整合式的金鑰 產生或加在及解在、元件(⑶mp〇nents),他們執行作業系統 17 1250450 的元件或内嵌應用 照其他正在執行應 本案發明人已提及 成非常類似微處理 异;早期的浮點運 慢,經由軟體所為 k者浮點技術的進 中執行,浮點共處 方式執行者,但如 的密碼共處理器以 I置形式出現時, 匯流排(如USB) 理器確能使密碼運 理器增加了系統設 系統的整體可靠度 止窺探,因資料通 因此,本案發 相關硬體的存在, 微處理器經由單獨 器執行密碼運算, 令。此外,密碼指 為更佳,且專用密 容為更佳。同時密 業系統和程式的相 碼運算之裝置和方〉 援多種密碼演算法 程式以完成這些任務 而作業系統係按 用程式的需求及中斷進行調 現今電腦系統10卜1 04上密 器中使用專用浮點單位前的 度。再者, 螞運算之完 浮點數學運 算係以軟體完成,故其執行速度相當缓 之密碼運算亦是令人無法接受地緩慢。 一步發展’浮點指令係於浮點共處理器 理器執行浮點運算的速度遠快於以軟體 此卻也增加系統的成本。同樣地,現今 插卡或外部裝置之形式出現;當以外部 密碼共處理器係經由平行埠或其它介面Adding funds 16 1250450 The third computer workstation 103 can represent a home computer or a remote computer 1〇3. Each of the foregoing actions requires an example that conforms to the execution of the encryption/decryption operation 112. In addition, the wireless network (10) is now normally provided in coffee shops, airports 'schools, and other public places, so the notebook computer 1 〇 4 users - one encryption and decryption, whether it is his/her message transmission / receiving other users Immediately needed, and all messages are encrypted or decrypted via the wireless network 1-9 to the utility router 108. ‘The prior art can understand that ## of the above activities need to perform cryptographic operations on workstations 1-1-10, and accordingly there is a need to perform an immediate encryption' decryption operation 112. Therefore, it is further possible for the electric moon I 101-104 to perform hundreds of cryptographic operations simultaneously. In any case, there are some implementations of performing at least one or more immediate addition/decryption operations on the computer system 1〇ι_ι〇4, and completing the cryptographic operation to limit the case. For example, the completion of a function by a software program is relatively hard. The completion of the same function is slow. Each encryption/decryption operation / 12 takes a while, and the current program is being executed on the computer 10: It can be suspended during this time, and the password operation (such as the Moon Wenshan-style key, etc.) The parameters must be exemplified by the operating system to add / / to the name of the red 112. And because the cryptographic operation must be 匕3 4 inch, and do not expect a few sub-operations, the encryption/decryption operation η 2 is executed to include multiple computer extension instructions, so all system operation speeds are unfavorable. Anyone who knows the technology can check *, sending a small encrypted e-mail in Microsoft 8 Outlook will be 5 times more than sending an unencrypted packet e-mail. In addition, the current password-related technology is delayed due to the operating system; most applications do not provide integrated key generation or addition, components ((3) mp〇nents), they execute the operating system 17 1250450 components or embedded applications according to other implementations should have been mentioned by the inventors to be very similar to micro-processing; early floating-point slow, through the software for the implementation of floating-point technology, floating point coexistence Executor, but if the password coprocessor appears in the form of I, the bus (such as USB) processor can make the password processor increase the overall reliability of the system design system, because of the data, therefore, The existence of the related hardware of the case, the microprocessor performs a cryptographic operation via a separate device. In addition, the password is better and the private password is better. At the same time, the device and program of the phase code operation of the secret system and the program are assisted by a variety of cryptographic algorithms to accomplish these tasks, and the operating system is adapted to the needs and interruptions of the application. The degree before the dedicated floating point unit. Furthermore, the end of the analytic operation of the floating-point mathematics is done in software, so the cryptographic operation is quite slow and unacceptably slow. One step development 'floating point instructions' are based on floating-point coprocessors. Floating point operations are much faster than software, which adds to the cost of the system. Similarly, in the form of today's cards or external devices; when using external crypto coprocessors via parallel ports or other interfaces

M ;丨曲興一主處理器相接。當然,共j 算遠快於純軟體執行者,钽密碼用共! 置之成本,並需要額外的電源並降低-。另外,密碼用共處理器的執行不能E 逼不與主微處理器處於同—晶片之故 明人了解到現今微處理器需有專用密石 以使-需:以密碼運算之應用程式可^ 、土本單元铪碼指令電路指示微處宠 而密碼指令電路提供至少—個密碼指 令亦以在應用種式中具有優先被使用秸 碼硬體以與現今微處理器之常用架構相 :硬體和相關密碼指令要提供與先前竹 各的方式。最主要的是提供一種執行密 会使有效抵禦未授權之監聽,並能支 支援對在其中實施的特殊密碼演算法M; 丨曲兴一主处理器接接. Of course, the total calculation is much faster than the pure software executive, and the password is used together! The cost is required, and additional power is required and lowered. In addition, the implementation of the coprocessor with the password cannot be forced to be the same as the main microprocessor. The chip knows that today's microprocessors need to have a special secret stone to make - need: the application with cryptographic operation can ^ The native unit weight command circuit indicates micro-small and the password command circuit provides at least one password command to also have priority in the application type to use the straw hardware to conform to the common architecture of today's microprocessors: hardware And the relevant password instructions are to be provided in the same way as the previous bamboo. The main thing is to provide an execution secret that effectively defends against unauthorized sniffing and supports special cryptographic algorithms implemented in it.

18 1250450 進行驗證和測試,允許使用者提供的金鑰和自行產生的金 鑰,支援多重的資料塊大小和金鑰長度,提供可編程的區 塊加密/解密模式,即如電子密碼書模式、密文區塊串 列、密文回授模式和輸出回授模式等,並且在使用上述可 編程區塊加密/解密模式時能夠對大量資料有效執行多種 資料區塊大小及多種位元大小的密碼金鑰。 【發明内容】 本發明之提出係用以解決習知技術中上述及其它問題 與缺點等,其提出一種在一微處理器中執行密碼運算的優 異技術。在本發明之一較佳實施例中,提出一種執行密碼 運算之裝置,該裝置包含一密碼指令電路及一執行邏輯電 路,密碼指令電路提供一密碼指令,而密碼指令為一計算 裝置接收,並屬於計算裝置所執行之指令流的一部份。密 碼指令指定多個密碼運算之一者,並指定多種密碼金鑰大 小之一者。在運算上,執行邏輯電路搞合至密碼指令電 路,並執行被指定之密碼運算。在執行被指定密碼運算 時,執行邏輯電路具有一密碼金鑰大小控制器,而此控制 器使用被指定之密碼金鍮大小。 本發明之一另一較佳實施例為一種執行密碼運算之裝 置,該裝置具有一密碼單元及一金鑰大小控制邏輯電路, 其中密碼單元位於一裝置中,並在接收一指令流中一密碼 指令後執行多個密碼運算之一者,其中指令流中之密碼指 令指定被指定之密碼運算。此外,密碼指令在執行被指定 之密碼運算時亦預定一待使用之金输大小。在運算時,金 鑰大小控制邏輯電路耦合於密碼單元内,並使裝置在進行 被指定之密碼運算時使用被預定之金鑰大小。 19 1250450 本發明之一較佳實施例為一種在〜裝置中執行密碼運 算之方法’該方法包含接收一密碼指令,此被接收之密碼 指令指定多個密碼運算之某一者於執行期間所用的密碼金 餘大小’該方法也包含使用被指定之密碼金鑰大小於被指 定之密碼運算被執行的期間。 【實施方式】 以下說明係針對本發明之一特定 用 以 使 熟 習 該 項 技 術 者 得 輕 易 對 本 原 理 可 應 用 至 限 於 該 等 已 述特 原 理 及 新 穎 特 徵 在 前 述 對 於 密 及 解 密 之 技 術 這 些 技 術 及 其 限 第 3 圖 至 第 15 圖 在 —. 現 今 電 腦 系 種 常 用 機 制 上 具 入 \ 動 化 Λ 結 性 \ 防 止 駭 客 入 現 請 參 閱 第 统 中 如 Μ 述 般 執 包 含 — 微 處 理 器 圖 應用及其需求 本發明,但熟 各種變化,且 ’本發明之範 視為不違本文 運算及用於現今電腦系統以對 知部份討論後,以下將配合第 做討論。接著,本發明之說明 式說明而進行。本發明提出一 執行密碼運算之裝置及方法, 異性能,並滿足上述限制作業 容性、演算法及模式的可程式 mi croprocessor ) 說明在一現今 方塊圖,方塊 201 ,微處理 而為, 習該項 所述基 圍不僅 中所提 資料加 2圖對 將配合 種用以 其在各 系統介 化特 電腦系 圖2〇〇 器201 20 *1250450 用以提取私令電路及處理與一應用程式相關之資料,其中 名等扣7私路及資料係位於一稱作應用程式記憶體203之 -系統記憶體區i或,而應用程式記憶體(appiicat— memory ) 203中貢料的程式控制及動作一般由系統記憶 體之-受保護區域中的作業系統軟體(〇p㈣) 202控管。指令電路提供至少一指令,其用來指示一密碼 操作,而指令電路包含邏輯電路、裝置或微碼(即微指令 或本機指令(native instructi〇n ))、或是一個邏輯電 路衣置或微碼之組合,由於指令電路並非為本發明的重 點,、於此不再對此作詳細說明。如上所述,若-執行應用 寿弋(如私子郵件耘式或一檔案儲存程式)需進行密石馬 運异’則執仃應用程式必須藉微處理器2〇1執行相當數量 之指令方能完成密碼運算,其中該等指令可為執行應用: 式本身中的副程式,如可為與執行應用程式相連接之外: 應用程式,或可為作業系統202提供之服務。不管該等栺 令之形式究為何,熟習該項技術者皆能了解指令皆存於^ 定或分配之記憶體區域中。為達說明之效,該等記憶體^ 域顯示於應用記憶M 203中,且包含一密碼金鑰產生應: 程式(cryptographic key generation application ) 2〇4,其 中該密碼金鑰產生應用程式2〇4 一般產生或接收一密螞ς 鑰,並將該金鑰拓展成一金鑰排程(key schedu〗e ) 205 ,以為密碼子運算所用。 在一多區塊加密運算進行時,一區塊加密應用程式 (encryption application ) 206 需先被引動,以執行取、 21 1250450 明文(plaintext ) 210區塊、金鑰排程2O5 、諸如模式 在输表位置荨更為詳細加密操作的密碼參數 (cryptographic parameters ) 209 。若為規格中模々 、工、所 需,加密應用程式206亦會使用一起始向量 (initalization vector ) 208 。在執行其中的指令後, 刀口密 應用程式206產生對應的密文(ciphertext ) 211區塊 而區塊解岔應用程式(decryption application ) 2〇7亦 同樣被引動以執行區塊解密運算,即執行取得密文區塊 211 、金鑰排程205 、諸如模式、密鑰表位置等更為詳細 解么作的岔碼參數(crypt〇graphic paranieters )。若為 規格中模式所需,解密應用程式206亦會使用一起始向量 2〇8 。在執行其中的指令後,解密應用程式2〇7產 的明文210區塊。 于應、 需加強調的是,在產生密碼金鑰及對文字區塊加以加 在及解始、時,所需執行的指令數目相當多;上述FIPS規袼 中ο δ諸夕可形成數量相當之需加估計指令的虛擬碼範 例’故熟習該項技術者皆了解一項簡單的區塊密碼運算需 數百個私令方能完成,且該等指令之每一者皆須由微處理 為201加以執行方能完成所要求的密碼運算。再者,對於 執行應用%式之主要目的(如檔案管理、即時訊息功 月匕兒子郵件功能、遠端檔案取得及信用卡交易等)而 a ’執行指令以完成密碼運算一般被視為不必要的功能, 匕見有執行應用程式的使用者感到現有執行應用程式的 執行效率不足。 22 1250450 若所用之應用程式為獨 206 、 207 ,則該等應用浐、或外掛加密/解密應用程式 須符合作業系統202的f 式206 、 207的引動及控管亦 似使問題惡化之事件等。 如支援中斷、異常及類 統中進行之密碼運算而言, ,對於每一同時於一電腦系 獨立執行個體必須在記’ ώ應用程式204 、206 ' 207之 思體203 * 、 需同時為一微處理器2〇i執, 甲配以其空間,且可預見 增加,如前文已描述者。&amp;之孩碼運算數將持續隨時間18 1250450 Verification and testing, allowing user-provided keys and self-generated keys to support multiple block sizes and key lengths, providing programmable block encryption/decryption modes, such as electronic password book mode, Ciphertext block string, ciphertext feedback mode, output feedback mode, etc., and can effectively execute a plurality of data block sizes and multiple bit size passwords for a large amount of data when using the above programmable block encryption/decryption mode. Key. SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned and other problems and disadvantages in the prior art, and provides a superior technique for performing cryptographic operations in a microprocessor. In a preferred embodiment of the present invention, there is provided an apparatus for performing a cryptographic operation, the apparatus comprising a cryptographic instruction circuit and an execution logic circuit, the cryptographic instruction circuit providing a cryptographic instruction, and the cryptographic instruction is received by a computing device, and It is part of the instruction stream executed by the computing device. The cipher command specifies one of a plurality of cryptographic operations and specifies one of a plurality of cryptographic key sizes. In operation, the execution logic circuit engages the password command circuit and performs the specified cryptographic operation. When performing a specified cryptographic operation, the execution logic has a cryptographic key size controller, and the controller uses the specified password size. Another preferred embodiment of the present invention is an apparatus for performing cryptographic operations, the apparatus having a cryptographic unit and a key size control logic circuit, wherein the cryptographic unit is located in a device and receives a password in an instruction stream One of a plurality of cryptographic operations is performed after the instruction, wherein the cryptographic instruction in the instruction stream specifies the specified cryptographic operation. In addition, the password command also reserves a size to be used when performing the specified cryptographic operation. In operation, the key size control logic is coupled to the crypto unit and causes the device to use the predetermined key size when performing the specified cryptographic operation. 19 1250450 A preferred embodiment of the present invention is a method of performing a cryptographic operation in a device. The method includes receiving a cryptographic command that specifies that one of a plurality of cryptographic operations is used during execution. The password size is 'this method also includes the period during which the specified cryptographic key is executed using the specified cryptographic key size. [Embodiment] The following description is specific to one of the present invention for making it easy for those skilled in the art to apply the present principles to the above-mentioned techniques and novel features in the aforementioned techniques for secret and decryption and Limits from Figure 3 to Figure 15 on the current common mechanism of computer systems. 动 Λ \ \ \ \ \ 请 请 请 请 请 请 请 请 微处理器 微处理器 微处理器 微处理器 微处理器 微处理器 微处理器 微处理器 微处理器 微处理器 微处理器It is intended that the present invention be practiced in various ways, and that the <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; Next, the description of the present invention will be made. The present invention proposes an apparatus and method for performing cryptographic operations, and different performances, and a programmable program that satisfies the above-mentioned limited operational capacity, algorithms, and modes. In a present block diagram, block 201, microprocessing, In addition to the information mentioned in the item, the data is added to the application of the image in the system. The device is used to extract the private circuit and the processing is related to an application. The data, in which the name is deducted, and the data is located in a system memory area i called application memory 203, and the application memory (appiicat-memory) 203 program control and action It is generally controlled by the operating system software (〇p(4)) 202 in the protected area of the system memory. The instruction circuit provides at least one instruction for indicating a cryptographic operation, and the instruction circuit includes logic circuitry, means or microcode (ie, microinstruction or native instruction (native instructi〇n)), or a logic circuit or The combination of microcodes, because the command circuit is not the focus of the present invention, will not be described in detail herein. As mentioned above, if the execution of the application (such as a private email or a file storage program) requires a sloppy operation, then the application must execute a considerable number of instructions from the microprocessor 2〇1. The cryptographic operations can be performed, wherein the instructions can be executable applications: sub-programs in the program itself, such as applications that can be connected to the executing application: an application, or a service that can be provided to the operating system 202. Regardless of the form of the order, those skilled in the art will be able to understand that the instructions are stored in the memory area of the fixed or allocated. For the purpose of explanation, the memory fields are displayed in the application memory M 203, and include a cryptographic key generation application 2〇4, wherein the cryptographic key generation application 2〇 4 Generally, a secret key is generated or received, and the key is expanded into a key schedule (key schedu e) 205, which is used for the codon operation. When a multi-block cryptographic operation is performed, a block encryption application 206 needs to be first motivated to perform fetching, 21 1250450 plaintext 210 blocks, key scheduling 2O5, such as mode at loss. Table location 荨 More detailed cryptographic parameters of the cryptographic operation 209 . The encryption application 206 also uses an initialization vector 208 for the specifications, work, and requirements. After executing the instructions therein, the knife edge application 206 generates a corresponding ciphertext 211 block and the block decryption application 2〇7 is also motivated to perform the block decryption operation, ie execution. The ciphertext block 211, the key schedule 205, and the crypt〇graphic paranieters such as the mode and the key table position are obtained. The decryption application 206 also uses a starting vector 2〇8 if required for the mode in the specification. After executing the instructions therein, the plaintext 210 block produced by the application 2〇7 is decrypted. It should be emphasized that the number of instructions that need to be executed is quite large when the cryptographic key is generated and the text block is added and resolved. The above FIPS regulations can form a considerable number of eves. The virtual code example of the estimated instruction is required. Therefore, those skilled in the art understand that a simple block cryptographic operation requires hundreds of private orders, and each of these instructions must be micro-processed. 201 is executed to perform the required cryptographic operations. Furthermore, for the main purpose of executing the application % (such as file management, instant messaging, son mail function, remote file acquisition and credit card transaction, etc.), a 'execution of instructions to complete the password operation is generally considered unnecessary. The function is that users who execute the application feel that the execution of the existing execution application is not efficient. 22 1250450 If the application used is 206, 207, then the application or external encryption/decryption application must comply with the triggering and control of the operating system 202, and the control may also cause the problem to worsen. . For the cryptographic operations performed in interrupts, exceptions, and classes, for each individual executing at the same time in a computer system, the singularity of the application 204, 206' 207 must be at the same time. The microprocessor 2〇i, the A is equipped with its space, and can be expected to increase, as already described above. &amp; child code operands will continue over time

本案發明人已提到目_ _ 問題與限制,並亦了解到提免恥系統之密碼技術所存有的 算、且程式之執行不會有延4在一微處理器中執行密碼運 此本發明提出一種經由〜之衣置及方法的必要性,因 辱用宓m a m 的微處理器裝置及方法, * ”、、吏用單元執行密碼運算 N 中田它 中,且密碼單元係經由〜草 用始、瑪單元設於微處理器 以執行密碼運算。以下,本 进、褐指令之程式化而被致動 續說明之。 ^明將配合第3圖至第15圖繼The inventor of the present case has already mentioned the problems and limitations, and also knows the calculations of the cryptographic technology of the shameless system, and the execution of the program is not extended. 4 The password is executed in a microprocessor. A necessity is made for the necessity of the clothing and the method, and the microprocessor device and method for humming the mam, *", and the unit is used to perform the cryptographic operation N in the field, and the cryptographic unit is used by the grass. The mega unit is set in the microprocessor to perform the cryptographic operation. The following is the stylization of the enthalpy and the brown command, which is activated and explained. ^Ming will cooperate with the third to the fifteenth

「示為一太 算與微處理器裝置相關的士 ‘、、、—本發明用以執行密 • 方埯圖,方垧闻 理器(microprocessor)、 尾圖300中顯示 3()1經由一兮 (memory bus ) 319輕合空 。己憶體匯流排 memory ) 321 ,其包含用、、先°己[思體(system (instruction register ) 3〇〇 才曰々暫存器 趣吹指令&gt; 4生 (translation logic ) 3〇3 , 〈轉換邏輯電 5^ 皁專換邏輯蕾# 路、電路、裝置或微碼(g 斗兔路303包含邏 ^日令或自然指令)、或 23 1250450 電路、電路、裝置或微碼之組合,或其它用以將指令轉換 成相關微指令序列之等效元件。該等用以在轉換邏輯電路 303中執行轉換工作的元件可為其它電路、微碼等用以在 U處理為' 301中執行其它功能者所共用。就本發明之範圍 而5 ,微碼一詞用以代表至少一微指令,而微指令(亦稱 作本機心令)之層級係屬於一單元執行者。舉例而言,微 指令直接為一精簡指令集(reduced instruction set c〇mputer,RISC)微處理器所執行。以一如χ86相容之微處 理器等複雜指令集電腦(complex instructi〇n set c〇mputer, CISC)微處理器而言,X86指令被轉換成相關的微指令, 且相關的微指令直接為一複雜指令集電腦微處理器中至少 一單元執行。另外,轉換邏輯電路3〇3耦合至一微指令列 (micro instruction queue ) 304 ,並具有複數個微指令入 口( micro instruction entries ) 305 、306 ,微指令由微 指令列304提供至包含一暫存器組(register fne ) 3〇7之 暫存器級邏輯電路,其中暫存器組3〇7具有複數個暫存器 308-313 ,該等暫存器3〇8_313的内容係建立於一指定之密碼 運异執仃之刖。暫存器308_312指向記憶體321中的對應位 置323-327,f亥等位置孤奶包含執行被指定之密碼運算所 需之資料。暫存器級耦合至負載邏輯電路(1〇ad ) 314 ,負載邏輯電路314則以介面與一資料快取記憶體 (data cache ) 315相接,以取得執行指定之密碼運算所 需之資料。資料快取記憶體315經由記憶體匯流排319與 記憶體321相耦合,執行邏輯電路(— Μ bye ) 24 1250450 328耦合至負載邏輯電路314 ,並執行送來之微指令指定 k 之運算,其包含邏輯電路、裝置或微碼(即微指令或本機 指令),或為邏輯電路、裝置或微碼的組合,或其它用以 執行指令所指定之運算的等效元件,其中該等用以執行執 行邏輯電路328中運算的元件可為其它電路及微碼等用以 在微處理器301中執行其它功能者所共用。執行邏輯電路 328包含一密碼單元(cryptography unit ) 316 ,密碼單 元316自負載邏輯電路314接收執行被指定之密碼運算所 0 需之資料,微指令使密碼單元316對複數個輸入文字區塊 (input text ) 326執行指定之密碼運算,以產生對應之複 數個輸出文字區塊(output text ) 327 。密碼單元316包 含邏輯電路、裝置或微碼(即微指令或本機指令),或為 邏輯電路、裝置或微碼的組合,或其它用以執行密碼運算 之等效元件,其中該等用以在密碼單元316中執行密碼運 算之元件可為其它電路及微碼等用以在微處理器301中執 行其它功能者所共用。在一實施例中,密碼單元316在執 _ 行邏輯電路328中與其它執行單元(圖中未繪示)平行運 算,其中執行邏輯電路328可為整數單元及浮點單元等。 一本發明範圍所對應之「單元」實施例包含邏輯電路、裝 置或微碼(即微指令或本機指令)的組合,或其它用以執 行既定功能或動作之等效元件,其中該等用以在一特定單 元中執行其它功能或動作之元件可為其它電路及微碼等用 以在微處理器301中執行其它功能者所共用。舉例而言, 一實施例中的一整數單元包含邏輯電路、裝置或微碼(即 25 !25〇450 微指令或本機指令)的組合,或其它用以執行整數指令之 ,-等效元件。一浮點單元包含邏輯電路、裝置或微瑪(即微 指令或本機指令)的組合,或其它用以執行浮點指令之等 效元件’其中該等用以在整數單元中執行整數指令之元件 可為其它電路及微碼等用以在該浮點單元中執行浮點指令 者所共用。 在一與x86架構相容的實施例中,密碼使用單元316 與 一 x86 整數單元、一 x86 浮點(floating p〇int unit )單 元、一 x86 多媒體延伸集(Multi-media Extensions, MMX )單元及一 χ86串流延伸集(streaming SIMD Extensions,SSE )單元平行運作。以本發明之範圍而言, 一得正確執行大部份設計以在一 x86微處理器中執行之應 用程式的實施例皆屬與x86架構相容,而一應用程式得以 正確執行係指其可獲致所欲結果。在其它的χ86相容實施 例中’密碼單元係與前述x86執行單元組成之子集合平行 運作其中您碼單元316耦合至儲存邏輯電路317 ,並提 _ 供對應之複數個輸出文字區塊327 。此外儲存邏輯電路 317亦耦合至自資料快取記憶體,該快取記憶體315 將輸出文字資料327轉送至系統記憶體321以進行儲存。 儲存C輯兒路317耦合至寫回邏輯電路318 ,寫回邏輯電 路 在心定之密碼運算完成時更新暫存器組307中的暫 f ^ 3〇8、313。在另一實施例中,微指令與-時脈訊號(未 嘁不)同步流過上述邏輯電路階級3〇2 、3〇3 、3〇4 、 307 314、316-318之每一者,因此運算動作{同時以大 26 1250450 致類似於一組合線上執行之動作的方式執行。 運算 之應用 &gt; °為使說 密螞指令 令322包含 密碼指令 之指令運算 為~ 4位元 ’接著為未 著為一用以 模式之位元 執行層級可 程式化成一 送至微處理 處理器 异之指令 作業糸統 在系統記憶體321中,需執行指定之密碼 程式可令微處理器3〇1經由一單一密碼指令 (cryptographic instruction ) 322 執行密碼運 明便於進行’單一密碼指令322在此處稱作一 322 。在一複雜指令集電腦實施例中,密碼指 一指定一密碼運算之微指令。在一實施例中, 322使用在一現存指令集架構中一閒置或不用 碼。在一 x86相容之實施例中,密碼指令322 組指令,其包含一 x86重複前置(R£p)(即〇χΡ3) 使用之2位元組χ86運算碼(如qx〇fa7),再接 說明在一指定之密碼運算期間所用之區塊密碼 組。在一實施例中,本發明之密碼指令322之 為應用程式所提供之系統優先層級,並因可被 指令構成的程式流,程式流直接為一應用程式 器301 ,或經由作業系統320之控制而送至微 301 。由於使微處理器301執行指定之密碼運 322僅需為一者,因此該運算之完成可完全為 320所知。 在實際運作中,作業系統320引動一應用程式,以在 微處理器301中執行,且在應用程式執行之時指令流中一 密碼指令322由記憶體321送至提取邏輯電路3〇2 。然於 密碼指令322執行之前,程式流中指令使微處理器3〇1對 暫存器308-312内容起始化,以使暫存器308-312内容指向記 27 1250450 仏體321中包含一岔碼控制字組(crypt〇graphic control word ) 323 起始岔碼金输(initial cryptographic 排程(key schedu vector ) 325(若為 出文字327之位置 始化暫存器308-312 存器308-312及一包 為,而外加暫存器 加加密或解密之區 邏輯電路302取得 序列,以使微處理 應微指令序列中一 元316載入負載邏 被指定數目之密碼 提供對應輸出資料 快取記憶體315儲 。在該對應微指令 )使微處理器301 完成被指定之密碼 計數值之非架構式 標暫存器311-312之 後起始向量指標暫 處理之中斷的處理 架構式暫存器,其 key ) 324或一金餘 向量(initialization 用輸入文字326及輸 碼指令322之前需起 322實際上係參考暫 之外加暫存器313而 入文字區域326中待 邏輯電路303自提取 轉換成一對應微指令 之密碼運算。在該對 令305-306,使密碼單 之資料,並開始執行 應輸出資料區塊,並 路317 ,以經由資料 輸出文字區域327中 數個微指令(未顯示 (未顯示)執行其它 如對包含暫時結果及 示)、輸入及輸出指 塊326之加密及解密 (若為所需)及未受 中’暫存器308-313為 [e ) 324 、一起始 所需時)、運算所 323-327。在執行密 之原因為密碼指令 含一區塊計數功能 313計數之值為輪 塊數。因此,轉換 密碼指令,並將之 為301執行被指定 第一組複數個微指 輯電路3丨4所送出 梯次,以產生一對 &amp;塊至儲存邏輯電 存於記憶體321之 序列中一第二組複 中其它執行單元 運算所需之動作, 暫存器(未顯 更新、輸入文字區 存器310之更新 等。在一實施例 中架構式暫存器 28 1250450 308-313係指定義於特定執行之微處理所用之指令 (instruction set architecture, ISA)中之暫存器。 在一實施例中,密碼單元316被分作複數階 對後續輸入文字區塊326進行管線式處理。 第3圖300用以說明本發明所需之元件,故 理器301中所用之多種邏輯電路為顧及說明清楚 圖300中省略。然而,熟習該項技術者皆能了解 理器301包含諸多階級邏輯電路元件,端視其特 定,且其中一些階級及邏輯電路元件在本案中已 起,以使說明較為簡潔。舉例而言,負載邏輯電 整合以一位址產生階級,接著可有一快取記憶體 級,並接著可有一快取記憶體線對位階級。然必 明的是,對複數個輸入文字區塊326所為之密碼 動作需經由一單一指令322為之,單一指令322 作業系統320所知,其執行則係經由一專用密碼 完成,其中專用密碼單元316之運作與微處理器 它執行單元平行且一致進行。此外,本案發明人 的密碼單元316實施例,其與數年前提出之微處 用浮點單元類似,其與相關之密碼指令322的運 作業系統320及應用程式之動作相容,以下將有 介紹。 現請參閱第4圖,圖中所示為一用以說明本 基本單元密碼指令400實施例的方塊圖。密碼指 含一可選擇性前置攔位(optional prefix Held ) 集架構 級,以能 現今微處 而於方塊 現今微處 定應用而 整合在一 路314可 介面階 須特別說 運算完整 之動作為 單元316 301中其 提出不同 理器中專 作完全與 更詳細之 發明之一 令400包 401 ,然 29 * 1250450 後是一 一運算 拉式搁 中,攔 同實施 在 構中, 如進行 區塊等 碼運算 並令一 為糸統 密碼運 位402 架構協 x86重 理器實 構式暫 的來源 存於暫· 資料區 重覆串 字組指 暫存器 重複前置攔位(repeat prefix field ) 402,隨後是 碼攔位(opcode field ) 403 ,最後是一區塊密文 位(block cipher mode Held ) 404。在一實施例 位401-404之内容與χ86指令集架構相容。在其它不 例中,欄位401-404之内容與其它指令集架構相容。 運作時,可選擇性前置攔位4〇1用於諸多指令集架 以啟動或關閉一主微處理器之某些特定處理能力, I6位元或32位元之運算及處理或使用特定之記憶體 。重複前置欄位402指出密碼指令40〇所指定之密 需對複數個輸入資料(即明文或密文)區塊而為, 相容微處理器將其中複數個架構式暫存器之内容作 記憶體中位置的指標,#中位置係指包含完成既定 异所需之密碼資料及參數。如上所述,重複前置攔 之值在一 Χ86相容之實施例中為〇χρ3 ;且根據χ86 疋而口在碼指令之形式非常類似於REP· M0VS等 覆串指令。舉例而言,當以本發明之χ86相同微處 施例為之時,重複前置欄位實際上係參考一存於架 存口° E〇C中的區塊計數變數、一存於暫存H ESI中 位=指標(指向該密碼運算對應之輸人資料)及一 σ、中的目的位址指標(指向記憶體中的輸出 ^ _ Χ86相谷貫施例中,本發明更將傳統的 才曰令概念知I &amp;帝奋 、 乡考一存於暫存器EDX中的控制 才示、一存於暫存器 ΕΑΧ中指向—起W旦〜碼金料標及一存於 。。里之私標(若為指定密文模式 30 1250450 所需)。 運养碼攔位4〇3指定微處理哭β 中一控制字έΒ ^ ^ _ °°凡成進—步為一記憶體 〜予組所明定之密碼運算,苴 字組指樟而&gt; A L ’、τ控制字組經由控制 曰铋而破參考。本發明中,較 現存指入隹加 、 勺運异碼值403為一 ▽木采構中閒置或未使用之曾 持一與作酱么 外石馬值之一,用以維 例而言,前述之-與相容之運==器的相容性。舉 用值〇鄭八7以進行既定密碼運算㈣1位403實施例使 位404預佘* τ ’區塊密文模式攔 4預疋在既定密碼運算期間I α π监π 定用4寸定區塊密文模式, 以下將配合第5圖說明之。 又衩式 弟5圖為弟4圖之基本單元贫派* π m 么碼指令所用之區塊密文 扠式攔位值範例構成的表格 山文 穷碑蚩Μ 4 α 其中值〇xC8預定以電子"There is a taxi associated with a microprocessor device," and the present invention is used to execute a secret map. The microprocessor and the tail diagram 300 display 3()1 via a Me (memory bus) 319 light and empty. Reminiscent of the body bus line memory) 321 , which contains the use of, system first (system (instruction register) 3 〇〇 曰々 曰々 曰々 曰々 & & & &gt; Translation logic 3〇3 , <conversion logic 5^ soap replacement logic bud #路,电路,装置 or microcode (g 斗兔路303 contains logic or natural commands), or 23 1250450 circuit a combination of circuits, devices or microcodes, or other equivalent elements for converting instructions into related microinstruction sequences. The components used to perform the conversion operations in the conversion logic circuit 303 may be other circuits, microcodes, etc. Used to share other functions in the U processing of '301. For the scope of the present invention, 5, the term microcode is used to represent at least one microinstruction, and the microinstruction (also known as the native heart) hierarchy Is a unit executor. For example, microinstructions are direct A reduced instruction set c〇mputer (RISC) microprocessor is executed by a complex instruction set computer (complex instructi〇n set c〇mputer, CISC) microprocessor such as a 86 compatible microprocessor. In other words, the X86 instruction is converted into an associated microinstruction, and the associated microinstruction is directly executed by at least one unit of a complex instruction set computer microprocessor. In addition, the conversion logic circuit 3〇3 is coupled to a microinstruction column (micro) An instruction queue 304 has a plurality of micro instruction entries 305, 306, and the microinstruction is provided by the microinstruction column 304 to a register level logic circuit including a register fne 3〇7 The register group 3〇7 has a plurality of registers 308-313, and the contents of the registers 3〇8_313 are established after a specified password is transferred. The register 308_312 points to the memory. Corresponding positions 323-327 in 321 and so-called milk contain the data required to perform the specified cryptographic operation. The register level is coupled to the load logic circuit (1〇ad) 314, and the load logic circuit 314 is The interface is coupled to a data cache 315 for obtaining data required to perform the specified cryptographic operation. The data cache 315 is coupled to the memory 321 via the memory bus 319 to execute the logic circuit. (— Μ bye ) 24 1250450 328 is coupled to load logic circuit 314 and performs the operation of the given microinstruction specifying k, which includes logic, device or microcode (ie, microinstruction or native instruction), or is a logic circuit a combination of devices or microcodes, or other equivalent elements for performing the operations specified by the instructions, wherein the elements used to perform the operations in the logic circuit 328 can be other circuits and microcodes for use in microprocessing. The other functions of the 301 are shared by the 301. Execution logic circuit 328 includes a cryptography unit 316 that receives data from load logic circuit 314 that is required to perform the specified cryptographic operation. The microinstruction causes cryptographic unit 316 to enter a plurality of input text blocks (input). Text ) 326 performs the specified cryptographic operation to generate a corresponding plurality of output text blocks 327 . Cryptographic unit 316 includes logic circuitry, means or microcode (ie, microinstructions or native instructions), or a combination of logic circuitry, apparatus or microcode, or other equivalent component for performing cryptographic operations, where The elements that perform cryptographic operations in cryptographic unit 316 may be shared by other circuits and microcodes for performing other functions in microprocessor 301. In one embodiment, cryptographic unit 316 operates in parallel with other execution units (not shown) in execution logic circuit 328, which may be integer units, floating point units, and the like. A "unit" embodiment corresponding to the scope of the invention includes a combination of logic circuitry, means or microcode (i.e., microinstructions or native instructions), or other equivalent means for performing a specified function or action, where The elements that perform other functions or actions in a particular unit may be shared by other circuits and microcodes for performing other functions in the microprocessor 301. For example, an integer unit in an embodiment includes a combination of logic circuits, devices, or microcode (ie, 25!25〇450 microinstructions or native instructions), or other components for performing integer instructions, - equivalent components . A floating point unit comprises a combination of logic circuits, devices or micro-maze (ie micro-instructions or native instructions), or other equivalent elements for performing floating-point instructions, where the elements are used to execute integer instructions in integer units. The components may be shared by other circuits, microcodes, etc. for performing floating point instructions in the floating point unit. In an embodiment compatible with the x86 architecture, the cryptographic usage unit 316 and an x86 integer unit, an x86 floating point unit, an x86 Multimedia Extensions (MMX) unit, and A stream of SIMD Extensions (SSE) units operate in parallel. In the context of the present invention, an embodiment of an application that performs most of the design to be executed in an x86 microprocessor is compatible with the x86 architecture, and an application is properly executed. Get the desired result. In other χ86 compatible embodiments, the cryptographic unit operates in parallel with a subset of the aforementioned x86 execution units, wherein your code unit 316 is coupled to the storage logic circuit 317 and provides a corresponding plurality of output text blocks 327. In addition, the storage logic circuit 317 is also coupled to the self-data cache memory, and the cache memory 315 transfers the output text data 327 to the system memory 321 for storage. The memory C circuit 317 is coupled to the write back logic circuit 318, and the write back logic circuit updates the temporary f^3〇8, 313 in the register group 307 when the cryptographic operation of the heart is completed. In another embodiment, the microinstruction flows through each of the logic circuit classes 3〇2, 3〇3, 3〇4, 307 314, 316-318 in synchronization with the -clock signal (not yet). The arithmetic action {also performs in a manner similar to the action performed on a combined line by a large 26 1250450. The application of the operation &gt; ° is to make the command of the secret command 322 containing the password command operate as ~4 bits', and then the level of the bit that is not used for the mode can be programmed to be sent to the microprocessor processor. In the system memory 321 , the specified password program is executed to enable the microprocessor 3 to perform a password operation via a cryptographic instruction 322 to facilitate the 'single password command 322'. It is called a 322. In a complex instruction set computer embodiment, a password refers to a microinstruction that specifies a cryptographic operation. In one embodiment, 322 uses an idle or unused code in an existing instruction set architecture. In an x86-compatible embodiment, the cryptographic instruction 322 sets the instruction, which includes an x86 repeat preamble (R£p) (ie, 〇χΡ3) using a 2-bit χ86 opcode (eg, qx〇fa7), and then The block cipher set used during a specified cryptographic operation is described. In one embodiment, the password command 322 of the present invention is a system priority level provided by the application, and the program stream is directly controlled by an application program 301 or via the operating system 320 due to a program stream that can be composed of instructions. And sent to micro 301. Since the microprocessor 301 is only required to perform the specified password operation 322, the completion of the operation is fully known to 320. In actual operation, the operating system 320 motivates an application to be executed in the microprocessor 301, and a password command 322 in the instruction stream is sent from the memory 321 to the extraction logic circuit 3〇2 while the application is executing. However, before the execution of the password instruction 322, the instruction in the program stream causes the microprocessor 3〇1 to initialize the contents of the temporary registers 308-312, so that the contents of the temporary registers 308-312 point to the record 27 1250450. Crypt〇graphic control word 323 initial cryptographic scheduling (key schedu vector) 325 (if the position of the text 327 is initialized to the scratchpad 308-312 register 308- 312 and a packet are, and the external logic buffer plus encryption or decryption area logic circuit 302 obtains a sequence, so that the micro processing should be loaded into the load logic by a specified number of passwords in the micro instruction sequence to provide corresponding output data cache memory. The body 315 stores the processing architecture register in which the corresponding microinstruction causes the microprocessor 301 to complete the interrupt of the start vector index temporary processing after the non-architected scratch register 311-312 of the specified password count value, Its key) 324 or a golden remainder vector (initialization requires 322 before the input text 326 and the code input command 322 is actually referred to the temporary add-on register 313 and enters the text area 326 to be self-extracted by the logic circuit 303. A cryptographic operation corresponding to the microinstruction. In the pair 305-306, the data of the cipher list is executed, and the execution of the data block should be executed, and the path 317 is used to output a plurality of microinstructions in the text area 327 via the data (not shown). (not shown) performing other such as including temporary results and indications, encryption and decryption of input and output fingers 326 (if required) and unaccepted 'storage registers 308-313 are [e) 324, a start When needed, the arithmetic office 323-327. The reason for executing the secret is the password command. The block count function 313 counts the value as the number of blocks. Therefore, the password command is converted, and 301 is executed to execute the first set of the plurality of micro-trigger circuits 3丨4 to send the ladder to generate a pair of &amp; blocks to the storage logic stored in the sequence of the memory 321 The second group of operations required for other execution unit operations, the scratchpad (not updated, the update of the input text buffer 310, etc. In an embodiment, the architectural register 28 1250450 308-313 is defined In the embodiment, the cryptographic unit 316 is divided into complex steps to perform pipeline processing on the subsequent input text block 326. In the embodiment, the cryptographic unit 316 is divided into complex steps to perform pipeline processing on the subsequent input text block 326. The diagram 300 is used to illustrate the components required by the present invention, and the various logic circuits used in the processor 301 are omitted for clarity of illustration. However, those skilled in the art will appreciate that the processor 301 includes a plurality of class logic circuit components. Regardless of its particularity, and some of the class and logic circuit components have been used in this case to make the description more concise. For example, the load logic is electrically integrated to generate the class with an address. There may be a cache memory level, and then there may be a cache memory alignment class. It must be understood that the cryptographic actions for the plurality of input text blocks 326 are via a single instruction 322, a single The instructions 322 are known to the operating system 320, the execution of which is accomplished via a dedicated password, wherein the operation of the dedicated cryptographic unit 316 is performed in parallel with and in concert with the microprocessor's execution unit. Furthermore, the inventor's cryptographic unit 316 embodiment, Similar to the micro-floating point unit proposed several years ago, it is compatible with the operation of the associated password command 322 operating system 320 and the application program, which will be described below. Please refer to Figure 4, which is shown in the figure. It is a block diagram for explaining the embodiment of the basic unit password instruction 400. The password refers to an optional pre-allocation (optional prefix Held) set architecture level, so that it can be applied to the current micro-location and now in the box. The integration of one channel 314 can be interfaced, in particular, the operation of the complete operation is unit 316 301, which proposes a complete and more detailed invention in a different processor. 400 packets 401, then 29 * 1250450 is a one-to-one computing pull-type, blocking implementation in the structure, such as block and other code operations and one for the system password transfer 402 architecture x86 processor structure The temporary source is stored in the temporary data area. The repeated string word group refers to the repeater repeat prefix field 402, followed by the code block (opcode field) 403, and finally the block ciphertext bit. (block cipher mode Held) 404. The contents of an embodiment bit 401-404 are compatible with the χ86 instruction set architecture. In other examples, the contents of fields 401-404 are compatible with other instruction set architectures. In operation, the optional pre-block 4〇1 is used in many instruction sets to enable or disable certain processing capabilities of a main microprocessor, I6-bit or 32-bit operations and processing or use of specific Memory. The repeating pre-field 402 indicates that the password specified by the password command 40 is required for a plurality of input data (ie, plaintext or ciphertext), and the compatible microprocessor sets the contents of the plurality of architectural registers. The indicator of the position in the memory, the position in # refers to the password data and parameters required to complete the predetermined difference. As described above, the value of the repeated pre-block is 〇χρ3 in the embodiment compatible with 86; and the format of the code command in the form of the code is very similar to the REP. M0VS and the like. For example, when the same micro-location example of the χ86 of the present invention is used, the repeated pre-position is actually referenced to a block count variable stored in the storage port ° E〇C, and stored in the temporary storage. H ESI median = indicator (pointing to the input data corresponding to the cryptographic operation) and a destination address index in σ, pointing to the output in the memory ^ _ Χ 86 phase-to-center example, the invention will be more traditional Only the concept of I &amp; Difficult, the township test in the register EDX in the control of the display, a deposit in the scratchpad 指向 point - from the W Dan ~ code gold material and one deposit. The private standard (if required for the specified ciphertext mode 30 1250450). The maintenance code block 4〇3 specifies the micro-processing crying β in a control word έΒ ^ ^ _ ° ° 凡成进 - step for a memory ~ For the cryptographic operation specified by the group, the 苴 word group refers to &gt; AL ', and the τ control word group breaks the reference via the control 。. In the present invention, the existing code input value 403 is one. One of the unused or unused ones in the eucalyptus structure, one of which is used as a sauce, and for the purpose of maintaining the above-mentioned == Compatibility of the device. Use the value 〇 Zheng 8 7 to perform the predetermined cryptographic operation. (4) 1-bit 403 embodiment makes the bit 404 pre-* τ 'block ciphertext mode block 4 pre-scheduled during the given cryptographic operation I α π Supervise π to use the 4-inch fixed block ciphertext mode, the following will be explained in conjunction with Figure 5. The 衩 弟 5 5 图 为 弟 4 4 4 4 4 4 4 4 4 基本 基本 基本 基本 * 区 区 区 区 区 区 区 区 区The form of the block value sample constitutes the form of the mountain monument 蚩Μ 4 α where the value 〇 xC8 is scheduled to be electronic

名碼曰杈式完成密碼運算,值〇XD T貝疋以雄、文區塊串列模 式元成费碼運算,值0χΕ0預定以密文 管,而枯n r:。 ^又极式元成密碼運 &quot; 預定以輸出回授模式完成密碼運算。另外 區塊密文模式攔位彻&lt;所有其它值皆受保留,該^ 之描述可見於前述FIPS文件之内六 、杲式 屯^ 又件之内谷。現請參閱第6圖,1 為一說明本發明中一 χ86相容 ^ 伯谷献處理态600中密碼單 ⑽的方塊圖。其中,微處理器細包含提取邏輯1 (祕响)601,提取邏輯電路6〇ι自記憶: 示)提取指令μ執行’其㈣合至轉換邏輯電路 (一n㈣〇 602。轉換邏輯電路6〇2包含邏 、 裝置或微碼(即微指令或太擔 兒 、 7或本機指令),或為邏輯電路、壯 置或微碼之組合,或為立它 衣 /、匕用以將扎令轉換成相關微指令 31 1250450 序列的等效元件。該等用以在轉換邏輯電路602中執行轉 換之元件可為其它電路及微碼等所共用,以在微處理器 600中執行其它功能。轉換邏輯電路602包含金输生成 (keygen )邏輯電路640 ,金錄生成邏輯電路640耗合至 一轉換器(translator ) 603及一微碼唯讀記憶體(ROM) 604 。 中斷邏輯電路(interrupt logic ) 626經由匯流排628搞合至 轉換邏輯電路602 。複數個軟體及硬體中斷訊號627為中 斷邏輯電路626處理,中斷邏輯電路606可指出目前對轉 換邏輯電路628之尚未受處理的中斷。轉換邏輯電路602 耦合至微處理器600接續階級,包含一暫存器階級605 、 位址階級606 、負載階級607 、執行階級608 、儲存階級 618及寫回階級619 。接續階級之每一者皆包含用以完成 指令執行相關之特定功能的邏輯電路,其中指令係指以第 3圖中微處理器内類似零組件標號配合說明之提取邏輯電 路601所提供者。第6圖中所示x86相容實施範例600顯 示執行階級608中的執行邏輯電路(execution logic ) 632 , 其包含平行執行單元610 、612 、614 、616 、 617 。一 整數單元610自微指令佇列609接收執行用整數微指令。 微指令佇列613接收執行用多媒體延伸集微指令。一串流 延伸集單元616自微指令列615接收執行用串流延伸集微 指令。在所示x86實施範例中,密碼單元617經由一負載 匯流排(load bus ) 620 、一暫停訊號(stall signal ) 621及儲存匯流排(store bus ) 622编合至串流延伸集單 元616 ,並共用串流延伸集單元的微指令列615 。另一不 32 1250450 同實施例中,密碼單元617以 似之獨立平行方式運作,整數 暫存器(EFLAGS ) 624 ,其中 元625 ,用以指出密碼運算是 令’ X位元625為一 χ86旗標 外,整數單元610藉使用一機 specific register ) 628 而推估 „ E位元6四之狀態指出微處理器 617 。此外,整數單元610亦得 (feature control register ) 630 與單元610 、612及614相 單元610輕合至一 旗標 旗標暫存器624包含一 X位 否正執行中。在一實施例 暫存器624之第30位元。此 器4寺殊暫存器(machine E位元629之狀態,其中 600中是否存在密碼單元 使用一特徵控制暫存器The name code 完成 is used to complete the cryptographic operation. The value 〇XD T 疋 疋 疋 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄 雄^ The ultimate type of password operation &quot; is scheduled to complete the cryptographic operation in the output feedback mode. In addition, block ciphertext mode is blocked. All other values are preserved. The description of ^ can be found in the above FIPS file. Referring now to Figure 6, a block diagram of a cryptographic list (10) in a χ86 compatible method of the present invention is illustrated. Wherein, the microprocessor contains the extraction logic 1 (secret) 601, the extraction logic circuit 6〇ι self-memory: shows) the extraction instruction μ performs 'the (four) is coupled to the conversion logic circuit (an n (four) 〇 602. the conversion logic circuit 6〇 2 contains logic, device or microcode (ie microinstructions or too much, 7 or native instructions), or a combination of logic, sturdy or microcode, or for clothing, 匕The elements are converted to equivalent elements of the sequence of related microinstructions 31 1250450. The elements used to perform the conversion in conversion logic circuit 602 can be shared by other circuits and microcodes, etc., to perform other functions in microprocessor 600. The logic circuit 602 includes a key generation logic circuit 640 that is lumped to a translator 603 and a microcode read only memory (ROM) 604. Interrupt logic (interrupt logic) 626 is coupled to conversion logic circuit 602 via bus 628. A plurality of software and hardware interrupt signals 627 are processed by interrupt logic circuit 626, which may indicate that the current conversion logic circuit 628 is not yet accepted. The interrupted logic circuit 602 is coupled to the microprocessor 600 continuation class, including a register class 605, a bit class 606, a load class 607, an execution class 608, a storage class 618, and a write back class 619. Each includes logic circuitry for performing the specific functions associated with the execution of the instructions, where the instructions are those provided by the extraction logic 601 in conjunction with similar component numbers in the microprocessor of Figure 3. Figure 6 The illustrated x86 compatible implementation example 600 shows an execution logic 632 in execution class 608 that includes parallel execution units 610, 612, 614, 616, 617. An integer unit 610 receives execution from microinstruction queue 609. The integer instruction microinstruction 613 receives the execution multimedia extension set microinstruction. A stream extension set unit 616 receives the execution stream extension set microinstruction from the microinstruction column 615. In the illustrated x86 implementation example, the password Unit 617 is coupled to the string via a load bus 620, a stall signal 621, and a store bus 622. The extension unit 616 and the microinstruction column 615 of the stream extension unit are shared. The other is 32 1250450. In the same embodiment, the cryptographic unit 617 operates in a parallel-like manner, an integer register (EFLAGS) 624, where the element 625 is used to indicate that the cryptographic operation is such that the 'X bit 625 is a χ86 flag, and the integer unit 610 uses a specific register 628 to estimate the state of the E bit 6 to indicate the microprocessor 617. In addition, the integer unit 610 is also coupled to the units 610, 612, and 614. The unit 610 is coupled to a flag. The flag register 624 includes an X bit or not. In an embodiment, the 30th bit of the register 624. This device 4 temple special register (machine E bit 629 state, where there is a crypto unit in 600 using a feature control register

中的一D位元631 以啟 動或關閉密碼单“…王於第D團中的微處理器實施令 301 ,第6圖中微處理器600已顯示教示本發明所需要^ 主要元件,該等元件並說明於一 χ86相容實施例之敘述戸 容中,該微處理器中的其它元件則已整合顯示或省略未 示,用以使圖面說明較為簡潔。熟習該項技術者皆知^万 該介面需有其它元件之存在,如一資料快取記憶體(未為 示)、匯流排介面單元(未顯示)及時脈產生與分配邏幸 υι /One D bit 631 in the middle to start or close the password list "...the microprocessor implementation command 301 in the D group, the microprocessor 600 in Fig. 6 has shown that the main components required for teaching the present invention, such The components are also described in the description of a compatible embodiment, and other components in the microprocessor have been integrated or omitted, so that the description of the drawings is relatively simple. Those skilled in the art know that ^ The interface needs to have other components, such as a data cache (not shown), bus interface unit (not shown), and timely generation and distribution of logic /

電路(未顯示)等。 在實際運作中’指令自記憶體(未顯示)中的提取係 由提取邏輯電路601為之,且提取動作的進行係於一送至 轉換邏輯電路602之時脈訊號同步為之。轉換邏輯電路 602將每一指令轉換成一對應微指令序列,該微指令序列 依序同步於該時脈訊號送至微處理器600之後級6〇5_6〇8、 618 、619中。,序列微指令中的每一微指令使一需完成 33 1250450 H算所需子運算受到執行…整體運算為 指令所預定,如由位址峡606產:二…為一對 :&quot;已自暫存器階…預定暫二:二整數單元 件之二運算元的相加、及記憶體中執行單-”頁不)_取 l I 617 之一者〜::早 “1〇、612、 的儲存箄存璉輯電路618產生之結果 旳储存寻。依照正轉換中指令 使用鏟拖哭⑽ 冋轉換邏輯電路6〇2 使用‘換“03 α直接產生微指 情靜604裎而#广, 或自微碼唯讀記 L體604編序列,或使用轉換器⑽ 列之-部份、並自微碼唯讀記《 604中提取=序 餘部份,J:中兮箄料社人+ ^取邊序列之剩 餘P W則日令步於料 續階級6〇5-608、618 、619中 ♦ 式在接 丁進 备抵達執行階矣芬 時,該等微指令及其運管元 &quot; ^ (自暫存器階級005中暫在π 取得,或為位址階級606中邏 斋 輯電路608自一資料快取記情 、载趣 七w 〜體中取传)為執行邏輟兩Α 632轉达至一指定執行單元 ^路 、 614 、 616 617且I达之方式為置放該等微指令於一對應的 列 609 、611 、613 、以士 t 615中。接著,執行單元6ι〇 612 、 614 、 616 、 βλΊ ,, ^ 執行該等微指令,並將結杲、 儲存階級618中。在〜每浐加&amp; 禾了 η施例中,該等微指令包含Circuit (not shown), etc. In actual operation, the instruction is extracted from the memory (not shown) by the extraction logic circuit 601, and the extraction operation is performed by synchronizing the clock signals sent to the conversion logic circuit 602. The conversion logic circuit 602 converts each instruction into a corresponding microinstruction sequence, which is sequentially synchronized to the clock signal and sent to the subsequent stages 6〇5_6〇8, 618, 619 of the microprocessor 600. Each micro-instruction in the sequence micro-instruction causes a sub-operation required to complete the calculation of 33 1250450 H to be executed... the overall operation is predetermined by the instruction, as produced by the address gorge 606: two...for a pair: &quot; The register stage...the temporary two: the sum of the two operands of the two integer unit parts, and the execution of the single-"page in the memory"_take one of the l I 617 ~:: early "1", 612, The result of the storage buffer circuit 618 is stored and searched. Use the shovel to drag according to the instruction in the forward conversion (10) 冋 conversion logic circuit 6〇2 Use 'change' 03 α to directly generate micro-finger 604 裎 # # # # 广 广 广 广 广 广 广 广 广 广 广 广 广 广The converter (10) is listed as a part, and from the microcode read only "Extracted from 604 = the remainder of the sequence, J: The Chinese community + ^ The remaining PW of the edge sequence is the day-to-day order 6〇5-608, 618, 619 ♦ In the case of the implementation of the order, the micro-instructions and their management elements &quot; ^ (from the temporary storage class 005 temporarily obtained in π, or in place The address class 606 in the logic circuit 608 from a data cache, the interest of seven w ~ body in the transfer) for the implementation of the two Α 632 to a designated execution unit ^ road, 614, 616 617 and I The method is to place the micro-instructions in a corresponding column 609, 611, 613, and 士t 615. Then, the execution units 6 〇 612, 614, 616, βλΊ, , ^ execute the micro-instructions, and Will be crusted, stored in class 618. In the ~ per 浐 plus & 禾 禾 η example, the micro-instructions contain

是否&lt;與其它動作平行執行之攔位。 I 當^述密碼指令被提取時,轉換邏輯電路602 相關的U指令以使微處哭 ; 里σσ 600中接續階級605-608 、 618、619中的邏輯電路執行指定的密碼運算 微指令的結構部份由控制字組暫存器308中内容所t 34 1250450 制字組323中一金鑰生成欄位值所決定,以下將有更p么 的說明。舉例而言,若金鑰生成欄位值指定在一預定a、田 運算中將使用一使用者產生的金_,則金錄生成:: 電路640將建構相關微指令序列而使微處理哭6〇〇自耳 記憶體位ϊ 324取得使用者產生的金錄排程,並將使用寸定 產生的金錄排程载入密碼單元617的金錄隨機存取= 内(以下將有更詳細的說明),並在指定之密碼運曾2 行期間使用使用者產生的金输排程…特定記憶= 324係為金餘指標暫存器3〇9中内容所指者。若金 欄位值指定一金鑰排程將以一所提供之密碼金鑰心產 生’則金鑰生成邏輯電路640將建構相關的微指令 令微處理! 600自記憶位置324取得所提供之密碼金鑰, 亚將該切載人密碼使料A 617中金賴機存取記:體 2 ’亚將該金錄拓展成—金㈣程,並在預定密碼運算執 之金鑰排程’其中記憶位置似係^金 :日標暫存器3°9内容樹。該密碼金錄的大小得加程 ;匕,错由在該控制字組中建立—金输大小櫊位 該可程式各S ^ 目的。在一貫施例中,金鑰大小攔位值得預定 使用⑶位元之密碼金餘、192位元之密碼金鑰及…、位 兀之密碼金鑰。 —因此,-第-組複數個相關微指令直接被送至密瑪單 :617 ’並令密碼單元617 «入負載匯流排620上的資 :而:戈在入一輸入資料區塊及開始執行預定數量之密碼回 。成―輸出資料區塊,或提供—經形成之輪出資料區 35 1250450 .塊於儲存匯流排622上而為 中 第一組複數個相關微 610、612、614、616 中 异所需之子動作,如E位元 631 、設定X位元625以指 暫存器級605中暫存器(如 存器及輪出文字指標暫存器 之中斷627的處理等。該等 輪入資料區塊之經明定密碼 置整數單元微指令於密碼單 算可與密碼使用單元運算同 微指令中,用以使未處理之 該等指向密碼參數及資料之 暫存器中,因此它們的狀態 返回之時獲得回復。當一自 位元625之狀態以判斷是否 辦結果為是,則運算反覆對 料區塊進行。該等相關微指 及對一序列輸入文字區塊所 渡結果得於處理中斷627前 現請參閱第7圖,圖中 進行密碼子運算之微指令範 指令(micro instruction ) (micro opcode field ) 701 儲存邏輯電路618存於記憶體 指令被送至其它執行單元 ’以執行其它完成預定密碼運 629之測試、致能D位元 出一密碼運算正進行中、更新 計數暫存器、輸入文字指標暫 )及中斷邏輯電路626所指出 相關微指令被排列,以達到多 運异的最佳效能,其方式為插 元微指令序列中,以使整數運 步7^成°微指令係包含於相關 中斷627之進行與回復。由於 指標的全部皆設於x86架構式 在中斷時會被儲存,且自中斷 一中斷返回時,微指令測試χ 一岔竭運算刻正進行中。若判 該中斷發生時受處理之輸入資 令被排列,用以使指標暫存器 為之一序列區塊密碼運算的過 受到更新。 σ兒月用以令第6圖微處理器 例700中的搁位。該圖中,微 7〇0包含—微運算碼襴位 、一貧料暫存器欄位(data 36 1250450 wfieId) 702 * 一暫存器搁位( 703。微運算碼攔位7〇 s er le 定微處理p 60…… 寺叉執行之子運算,並指 豆中忾運嘗^ 白及中璉輯電路以執行子運算, ,、中谥運斤碼攔位701中的值指 單元執行。在一者於抝+ 〇 微心令為本發明之密碼 「截入作 701有二值,其中第—信 'd〇AD)」指定資料將從— 定之記情俨仿μ + &amp; 木構性暫存器内容所明 已U粗位址中取得,其中架 月 攔位702之内衮所it $ 3存益為資料暫存器 之内谷所指者,而該資料接 -暫存器,暫存器則為暫存器攔位 ―雄、碼單元中 上述所取得之資料(如密碼金物°=所明定者,且 子貝料及起始向量等)被送至密:輸入文 701之第-佶「妙+ 故運鼻碼攔位 h 值儲存(χ賺)」指定密瑪單元所產… 虽被儲存於一由一年 產生之貧料 木構性暫存态内容 其中架構性暫存器由資料斬 迟fe位址中, 在一多階級密碼單元每 谷所軚疋。 ^ , 灵施例中’暫存器欄位703夕允^ 疋设數個輪出資料區塊 〇3之内各預 凡I 肴储存於記愔、轉 區塊為資料攔位7〇4 1 ,輪出資料 彌诅川4中密碼單元所提供, 适路所動作。以下針 為儲存邏輯 載入微指令進行更=本發明之密碼單元所執行之载入及 …第9圖而為細的說明…說明之進行將配合第 Μ請參閱第8圖,其中-表格_用以输7 格式700之載入微指人Μ嶄+ 呪明弟7圖中 ^ ^ ?曰?的暫存器攔位703 。如前$、+、 械指令序列在一密石馬 刖所述,一 裳 Λ 々幸寸換後產生’微指令岸列4人 乐一組複數個微指令及 7序歹】包含一 7夂一弟二組複數個微指令,其中# 一 37 -1250450 =:微指令為密碼單元所執行,❿第二組複數個微指 Z、為u處理器中密碼單元外的至少〆平行功能單元所執 : 亚使叶數器更新、暫時暫存器、架構性暫存器、機哭Whether or not &lt;blocks executed in parallel with other actions. When the cryptographic instruction is extracted, the U command associated with the logic circuit 602 is switched to make the micro-cry; the logic circuit in the continuation classes 605-608, 618, 619 in σσ 600 executes the structure of the specified cryptographic operation microinstruction. The portion is determined by a key generation field value in the word group 323 of the content block 308 in the control block register 308, and there will be a description of the following. For example, if the key generation field value specifies that a user-generated gold _ will be used in a predetermined a field operation, then the gold record generation:: circuit 640 will construct the relevant micro-instruction sequence to make the micro-processing cry 6 〇〇Self-array memory location 324 324 obtains the gold record schedule generated by the user, and loads the gold record schedule generated by the indentation into the golden record random access= of the cryptographic unit 617 (the following will be explained in more detail) ), and use the user-generated gold transfer schedule during the specified password. 2 Specific memory = 324 is the content of the contents of the gold balance register 3〇9. If the gold field value specifies that a key schedule will be generated with a provided cryptographic key, then the key generation logic 640 will construct the associated microinstruction for microprocessing! 600 obtains the provided password key from the memory location 324, and the access code of the person's password is made in the A 617. The body 2's the book is expanded into a gold (four) process, and is scheduled. The key operation of the cryptographic operation is 'the memory location is like ^ gold: the Japanese standard register 3°9 content tree. The size of the password record is added; 匕, the error is established in the control block - the size of the gold is the program. In the consistent application, the key size block is worth to use the (3)-bit password, the 192-bit password key, and the password key. - Therefore, - the first group of related microinstructions are sent directly to the MM's: 617 'and the cryptographic unit 617 « into the load bus 620: and: Go into an input data block and start executing A predetermined number of passwords are returned. Into the output data block, or provide - the formed wheel data area 35 1250450. Block on the storage bus 622 and the sub-actions of the first plurality of related micro 610, 612, 614, 616 For example, the E bit 631 and the X bit 625 are set to refer to the register in the register stage 605 (such as the processing of the interrupt 627 of the register and the round-out character index register, etc. The explicit unit arbitrarily sets the integer unit micro-instruction in the password unit and the password unit operation in the same micro-instruction, so that the unprocessed points are pointed to the password parameter and the data in the register, so that their state is obtained when returning Reply. When the status of a self-bit 625 is judged whether the result is YES, the operation is repeated on the material block. The related micro-finger and the result of the input of a sequence of text blocks are processed before the processing interrupt 627 Referring to FIG. 7, the micro-opcode field of the codon operation 701 stores the logic circuit 618 in the memory instruction and sends it to other execution units to perform other completions. The test of the password 629, the enable of the D bit, the cryptographic operation is in progress, the update of the count register, the input of the text indicator temporarily, and the interrupt logic circuit 626 indicate that the relevant microinstructions are arranged to achieve the most The best performance is in the sequence of the interpolation microinstruction, so that the integer operation is included in the correlation interrupt 627. Since all the indicators are set in the x86 architecture, they are stored in the interrupt, and when the interrupt is returned from the interrupt, the micro-instruction test is in progress. If the input command processed during the interruption is determined to be arranged, the indicator register is updated for a sequence block cipher operation. σ儿月 is used to make the position in the microprocessor example 700 of Figure 6. In the figure, the micro 7〇0 contains a micro-optical code clamp, a lean register field (data 36 1250450 wfieId) 702 * a register stall (703. micro-code stop 7〇s er Le Ding micro-processing p 60... The implementation of the sub-operation of the temple fork, and refers to the 忾 忾 忾 ^ 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白 白In one of the 拗+ 〇 心 令 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 701 701 701 701 701 701 701 701 701 701 The contents of the scratchpad are obtained from the U address, and the account in the monthly block 702 is the value of the valley register, and the data is connected to the scratchpad. The temporary register is the data obtained by the above-mentioned register in the buffer block, the male and the code unit (such as the password gold object = the specified one, and the child material and the starting vector, etc.) are sent to the secret: input text 701 The first - "Miao + lost nose code block h value storage (χ earn)" specified by the Mimar unit produced... Although stored in a year-old poor wood structure temporary storage content Among them, the architectural scratchpad is stored in a multi-level cryptographic unit. ^ , In the example of the spirit, the 'storage field 703 夕 允 ^ 疋 数 轮 轮 资料 各 各 各 各 各 各 各 各 各 各 各 各 各 各 各 I I I I I I I I I I I I I I I I I I I I I , the round of the information provided by the crypto unit in Michuan 4, the appropriate way to move. The following pin is for the storage logic loading micro-instruction to perform the loading of the cryptographic unit of the present invention and the ninth figure of the present invention is a detailed description... The description will be carried out. Please refer to Figure 8, where - table _ Used to input the 7 format 700 loading micro finger Μ崭 呪 呪 Ming brother 7 picture ^ ^ ? 曰? The scratchpad is blocked 703. For example, the first $, +, and mechanical command sequences are described in a secret stone horse, and a singer 々 々 寸 产生 产生 产生 产生 产生 产生 产生 产生 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微 微a younger two sets of multiple microinstructions, where #一37-1250450 =: the microinstruction is performed by the cryptographic unit, ❿ the second set of multiple microfinger Z, and at least the parallel functional unit except the cryptographic unit in the u processor Executive: Asian semaphore update, temporary register, architectural register, machine crying

特殊暫存為之狀態位元的測試及設定等子動作進行。第一 組:數個指令提供金鑰資料及密碼參婁丈,並輪入資料至密 碼早元而令之產生金鑰排程(或載入已自記憶體取得之金 瑜排耘),以載入並加密(或解密)輸入文字資料,並儲 存輪出文字資料。此外,一載入微指令被送至密碼單元以 載入铨制子組資料、載入一密碼金鑰或金鑰排程、載入起 始向量資料、载入輸入文字資料及載入輸入文字資料,並 令密碼單元開始進行一指定之密碼運算。此時,一載入微 指令之暫存器欄位7〇3值ObOlO令密碼單元载入一控制字組 至其内部控制字組暫存器中。當微指令在管線中進行時, 經由使用一暫存器階級中的架構性控制字組指標暫存哭内 容可得控制字組儲存之記憶體位址。記憶邏輯電路將位址 轉換成一記憶體存取之實際位址;負載邏輯電路自快取記 十思體取得控制字組,並將控制字組置入資料攔位7〇4中, 且控制字組接著被送至密碼單元。同樣地,暫存器欄位值 OblOO令密碼單元載入資料攔位704中輸入文字資料,接著 開始預定的密碼運算。輸入資料之存取係經由—存於一架 構性暫存器中之一指標為之,此與控制字組者相當。值 0M01令資料攔位7〇4中輸入資料載入内部暫存器取_ι中, 該等資料可為輸入文字資料(在管線作業時)或起始向 量;值0ΜΗ)及0blll則令密碼單元分別載入—密碼金餘或使 用者產生之金鑰排程中一金鑰的低及高位元。在本發明 中,使用者之定義為執行一特定功能或動作者,其可體現Special temporary storage is performed for the test and setting of the status bit. The first group: a number of instructions provide key data and passwords, and turn the data into the password early to generate the key schedule (or load the Jinyu row that has been obtained from the memory) to Load and encrypt (or decrypt) the input text and save the text. In addition, a load micro-instruction is sent to the password unit to load the control sub-group data, load a password key or key schedule, load the start vector data, load the input text data, and load the input text. Data and cause the crypto unit to begin a specified cryptographic operation. At this time, a register field 7〇3 value ObOlO loaded into the microinstruction causes the crypto unit to be loaded into a control block into its internal control block register. When the microinstruction is performed in the pipeline, the memory address of the control block storage can be obtained by temporarily storing the crying content using the architectural control block indicator in a register class. The memory logic circuit converts the address into a physical address of the memory access; the load logic circuit obtains the control block from the cache, and places the control block into the data block 7〇4, and the control word The group is then sent to the crypto unit. Similarly, the register field value OblOO causes the cryptographic unit to load the data block into the data block 704, and then begins the predetermined cryptographic operation. The access to the input data is via an indicator stored in a structured register, which is equivalent to the control block. The value 0M01 causes the input data in the data block 7〇4 to be loaded into the internal register to take _ι, which can be the input text data (in the pipeline operation) or the starting vector; the value 0ΜΗ) and the 0blll password The unit is loaded separately - the password or the low and high bits of a key in the user generated key schedule. In the present invention, a user is defined as performing a specific function or actor, which can be embodied

38 •1250450 應用程式、作業系統、機器 用者生成密鑰表是由應用程 例中,使用者生成密鑰表是 在一實施例中,暫存器 碼單元分為二階級,用以使 線管理。因此,在欲執行後 載入微指令先執行以提供一 (IN-1 ),接著一第二載入 字資料至輸入-0 ( ΙΝ-0 ), 密碼運算。 若密碼運算執行所根據 時’多數個對應該使用者產 載入微指令被送至密碼單元 的每一回合金錄。 載入微指令中暫存器攔 留。 請參閱第9圖,圖中表 700之載入微指令的暫存器 至密碼單元以令其提供_所 文字區塊至儲存邏輯電路中 702所指定之位置。因此, 一對一特定輸出文字區塊動 一對其對應輸入文字區境動 703之值OblOO令密碼單元提 或人等。在一個實施例中, 式建立的。在一可替代的實 由人所建立的。 攔位值為OblOO及OblOl時,一 後績輸入文字資料區塊得加 續一輸入貧料區塊時,一第 第一輸入文字資料至輪入-1 微指令執行以將一第二輸入 並令指令單元開始執行預定 者為使用者產生之金錄排程 生之金錄排程中金餘之多數 ’以令單元載入金鑰排程中 位703的所有其它值皆被保 格900顯示第7圖所示格式 攔位7〇3 。一載入微指令被 產生(經密碼或解密)之輸 ’以儲存於記憶體中位址欄 本發明之轉換邏輯電路先發 作之載入微指令,接著再發 作之載入微指令。暫存器欄 供與其内部輪出輸出-0 使 施 密 管 文 之 個 的 送 出 位 出 出 位 39 l25〇45〇 (〇υτ·0 )薪 以供儲 3子裔相關之輸出文字區塊至儲存邏輯電路中 關。鬥、&gt; 1出0之内谷與送至輸入-〇之輸入文字區塊相 问樣地,新十 內办t 9存裔欄位值所參考之内部輸出-1暫存器的 1各與送至於 入令a ' 1之輸入文子資料相關。因此,複數個輸 又字區挽太# 加 在载入金鑰及控制字組資料後可在密碼單元中 &amp;、線管理 * 入 ^ ’错由以載入·輸入-1、載入·輸入_〇(載 •輪入·〇人皆 輪出 7 W碼單元同樣開始執行密碼運算)、載入· 進γ 载入·〇υτ·〇 、載入.輸入-1、載入·輸入-〇(開始 订後續二於 八+ 別 文字區塊之動作)等之順序發出密碼微指 7之方式即可達成之。 運算現=閱第1G圖,該圖說明本發明中-用以預定密碼 馬二數的控制字組格式(contro 1 word format ) ι〇ππ 中 控制字組1000由一使用者程式化至記憶體 ,、 心在後碼運异執行之前被送至一相容微處理器 中一架構性斬六口口 曰孖态。因此,一對應一經提供之密碼指令雷 路之微才匕人皮 ” · — 歹丨中的一載入微指令被送出,以令微處理器 騁取“曰標之架構性暫存器,以將指標轉換成一實際記憶 ®位址,鞋ιν ώ α 稽Λ自兄fe、體(快取記憶體)取得控制字組 '將彳工制子組1000載至密碼單元之内部控制薪 存·哭Φ 、、、 曰 了、广 而在碼私令電路提供至少一密碼指令,其用來指 丁 f瑪運算,而指令電路包含邏輯電路、裝置或微碼 ^一曰5或本機指令(native instruction))、咬是 兄輯私路、裝置或微碼之組合,由於指令電路並非 本參明的重野 认L 、 里^,於此不再對此作詳細說明。控制字組ι〇〇〇 40 1250450 包含一代表保留(RSVD )欄位1001 、一資料區塊大小 (DSIZE )欄位 1002、一金鑰大小(KSIZE )欄位 1003、 一加密/解碼(E/D)欄位1004、一中間結果(IRSLT )欄位 1005、一金鑰產生(KGEN )攔位1006、一演算法 (ALG )攔位1007及一回合計數(RCNT )欄位1008。 保留攔位1001之所有值皆受保留。資料區塊大小攔位 1002之内容預定加密及解密執行時所用之輸入及輸出文字 區塊大小。在一實施例中,資料區塊大小欄位1002預定區 塊大小為128位元、192位元或256位元。金鑰大小攔位 1003之内容預定密碼及解密進行時所用之密碼金鑰的大 小。在一實施例中,金输大小欄位,1003預定金錄之大小為 128位元、192位元或256位元。加密/解碼櫊位1004明 定密碼運算是否當用於一加密或解密運算當中。金鑰產生 攔位1006指出使用者產生之金錄排程是否存於記憶體中, 或一單一密碼金錄是否存於記憶體中。若一單一密碼金输 確實存在,那麼微指令及密碼金鑰被發送至密碼使用單 元,以令該單元將該金鑰拓展成為一依密碼演算法所得之 金鑰排程,其中密碼演算法為演算法欄位1007中内容所明 定者。在一實施例中,演算法攔位1007之明定值明定使用 前述之數據加密標準演算法、三重數據加密標準演算法或 進階加密標準演算法。其餘不同實施例中,採用之演算法 為Rijndael Cipher及Twofish Cipher演算法等。回合計數欄位1008 之内容預定使用之演算法在對每一輸入文字區塊運算時所 用之密碼回合數;雖然上述演算法所用標準對於每一輸入 41 者得利 數。在 15等之 輸入文 演算法 否密碼 加以執 非一最 。熟習 同的子 間結果 有其優 驟。舉 利用對 塊執行 圖之控 厂00」 密碼運 小執行 密碼金 範例的 1250450 文字區塊係使用預定固定演算回合數,但程式設計 用回合計數攔位1008來改變該等標準所明定之回合 一實施例中,程式設計者對於每一區塊得設定0至 不同回合。最後,中間結果攔位1005之内容明定一 字區塊是否當執行依演算法欄位1007中明定之密碼 標準所為之回合計數攔位1008中明定回合數,或是 /解密是否該依回合計數攔位1008中明定的回合數 行,其中該所執行之最後一回合代表一過渡結果而 終結果,此為演算法攔位1007中明定演算法之特徵 該項技術者皆了解諸多演算得在每一回合中執行相 運算,但在最後一回合所為者則不同。因此,若中 欄位1005被程式化成提供以過渡結果而非最終結果 點,因其得令程式設計者確認所為演算法之中間步 例而言,藉漸進過渡結杲確認演算法性能的作法得 一文字區塊加以一密碼回合、接著對該相同文字區 以二回合、並接著執行三回合等方式而達成。 現請參閱第11圖,圖中表格1100用以說明第10 制字組1000之金鑰大小攔位1003的範例值,其中值 令計算裝置以一 128位元密碼金錄大小執行一預定 算,值「01」令計算裝置以一 192位元密碼金鑰大 預定密碼運算,值「01」令計算裝置以一 256位元 鑰大小執行預定密碼運算,其餘的值則受保留。 現請參閱第12圖,其為說明本發明之密碼單元 方塊圖。圖中,密碼單元1200包含一微運算碼暫存器 1250450 1203 ’其經由一微指令匯流排(micr〇instmcti〇nbus ) 1214接 收密碼微指令(即載入及儲存微指令),並具有一控制字 組暫存器(control word register ) 1204、一 輸入-0 暫存哭 1205、輸入_1暫存器12〇6、一金鑰-〇暫存器12〇7及一金鈐 -1暫存器1208。依照微指令暫存器1203中一載入微指令Z 内容所預定者,資料經由一載入匯流排1211送至暫存器 1204- 1208 。此外,密碼單元1200亦包含區塊密文邏輯電路 (block cipher logic ) 1201,邏輯電路1201耦合至暫存器 1203-1208之母一者’並亦麵合至密碼金输隨機存取記憶體 隨機存取記憶體(cryptographic key RAM ) 1202。此外,區塊 •S、文邏輯電路1201运提供一暫停訊號(stall signal ) 1213 , 並亦提供區塊結果至一輸出-0暫存器1209及一輸出-1暫存 器1210。輸出暫存器1209-1210將其内部所存内容經由一儲 存匯流排(store bus ) 1212送至一相容微處理器之後級中。 在一實施例中’微運算碼暫存器1203之大小為32位元,暫 存器1204、1207及1208之大小為128位元,而暫存器 1205- 1206及1209-1210之大小則為256位元。 密碼微指令得與控制字組暫存器1204預定之資料選擇 性依序提供至微指令暫存器1203、輸入暫存器12〇5_12〇6中 其一、或金餘暫存器1207-1208中其一。在第8圖及第9圖 所示實施例中,一控制字組經由一載入微指令而被載至控 制字組暫存器1204中,接著密碼金鑰或金鑰排程經由後續 載入微指令而被載入。若當被載入之密碼金鑰為128位元 者’則一載入微指令用以指定暫存器金餘_〇 12〇7 。若當被 43 1250450 載入之密碼金鑰大於128位元,則一載入微指令指定暫存 器金鑰-0 1207 ,且一載入微指令指定暫存器金鑰-1 1208 。 若當被載入者為一使用者產生之金鑰排程,則後續載入微 指令指定暫存器金鑰-〇 1207 。被載入之金鑰排程中金鑰的 每一者依順序置放於金鑰隨機存取記憶體1202中,以供其 相對金鑰回合執行之時所用。之後,輸入文字資料(若不 需使用起始向量),被載至輸入-1暫存器1206。若使用起 始向量,則其被經由一載入微指令載至輸入_1暫存器 1206。一送至輸入-0暫存器1205之微指令令密碼單元將輸 入文字資料載至輸入-0暫存器1205 ,並開始利用輸入-1中 或二輸入暫存器1205-1206中(當輸入資料正處管線處理之 時)起始向量對暫存器輸入-0 1205中輸入文字資料執行以 密碼回合,其中密碼回合之執行係依控制字組暫存器1204 中内容所提供之參數為之。當一接收及一指定輸入-0 1205 的載入微指令時,區塊密文邏輯電路1201開始執行控制字 組内容預定之密碼運算。若一單一密碼金鑰需加以拓展 時,區塊密文邏輯電路1201產生金鑰排程中的每一者,並 將之儲存於金鑰隨機存取記憶體1202。不論區塊密文邏輯 電路1201是否產生一金鑰排程或金鑰排程是否自記憶體中 載出,第一回合所用金鑰在區塊密文邏輯電路1201皆被加 以快取,以使第一區塊密碼回合可在不需使用金鑰隨機存 取記憶體1202的條件下進行。區塊密文邏輯電路1201在一 經起動後即持續對至少一輸入文字區塊執行預定密碼運 算,直至該運算完成止。接著,自金鑰隨機存取記憶體 44 1250450 1202中提取所用密碼演算法所需之回合金鑰。密碼單元 1200對受指定之輸入文字區塊加以明定之區塊密碼運算, 後續輸入文字區塊經由相對之後續載入及儲存微指令的執 行而被加密碼或解密。當一儲存微指令被執行時,若預定 之輸出資料(即輸出-0或輪出屮尚未完全產生,則區塊密 文迷輯黾路1201發出拖延訊號1213。一旦輸出資料已麵產 生並被置入一對應輸出暫存器12〇9-121〇中,則該暫存器 1209-1210之内容被傳送至儲存匯流排1212。 現請參閱第13圖,其為一說明本發明用以依進階加资 標準執行密碼運算之區塊密文邏輯電路13〇〇實施範例的方 塊圖。區塊密文邏輯電路1300包含一回合引擎(r〇und engine ) 1320,回合引擎1320經由匯流排1311-1314及匯流排 1316-1318 _ 合至一回合引擎控制器(r〇und engine c〇ntr〇uer ) 1310 ’並包含一金输大小控制器(key size controller ) 1330, 並籍使用一微指令暫存器(micr〇instmcti〇nregister ) l3〇i 、抑 制字組暫存器(control word register ) 1302、金錄-0暫存器 1303及金鑰-1暫存器1304而存取金鑰資料、微指令及所進 行之密碼運算的參數。輸入暫存器1305-1306之内容被送至 回合引擎1320,且回合引擎1320提供對應輸出文字至輪出 暫存器1307-1308 。輸出暫存器1307-1308亦經由匯流排 1316-1317耦合至回合引擎控制器1310 ,以令回合引擎控制 器得使用每一後續密碼回合之結果,其中該等結果經由匯 流排NEXTIN 1318而送至一下一密碼回合。金鑰隨機存取記 憶體(未顯示)中的密碼金鑰經由匯流排1315而被存取; 45 1250450 加密/解密訊號1311令回合引擎使用子運算而執行密碼 (如S-Box)或解密(如反向S-Box);回合(RNDCON )匯 流排1312之内容令回合引擎1320執行一第一 AES回合、一 中間進階加密標準回合或一最後進階加密標準回合。根據 一預定所用密碼金鑰之控制字組中一金鑰大小攔位的内 容,金鑰大小控制器1330經由金鑰大小匯流排1319明定密 碼金鑰之大小。若金鑰排程將以自動方式產生,則回合引 擎控制器1310發出金鑰生成訊號1314而令回合引擎1320使 用經由匯流排1313提供之金鑰產生的一金鑰排程,其中該 金鑰的大小由金鑰大小1319明定,且金鑰匯流排1313亦用 以將每一對應執行之回合金鑰提供與回合引擎1320。在一 實施例中,金鑰大小匯流排1319之值指示金鑰大小為128 位元、192位元或256位元。 回合引擎1320包含第一金鑰互斥(XOR )邏輯電路 1321 ,互斥邏輯電路1321耦合至一第一暫存器暫存-0 1322。第一暫存器1322耦合至S-box邏輯電路1323 , S-box 邏輯電路1323耦合至移列(ShiflRow)邏輯電路1324,移列邏 輯電路1324耦合至一第二暫存器暫存-1 1325 ,第二暫存器 1325則躺合至混攔(Mix Column)邏輯電路1326,混欄邏輯電 路耦合至一第三暫存器暫存-2 1327 。第一金鑰邏輯電路 1321、S-box邏輯電路1323、移列邏輯電路1324及混欄邏輯 電路1326被設定以對輸入文字資料執行類似名稱之子運 算,該等當執行之子運算明定於上述進階加密標準FIPS標 準中。此外,欄邏輯電路1326亦被設定以在所需之中間回 1250450 合期間對輸入資料執行進階加密標準互斥功能,其中 之執行係利用經由金鑰匯流排1313所提供之回合金鑰力: I輪邏輯電路1321、S-box邏輯電路1323、移列邏輯泰第 1324及混欄邏輯電路1326亦被設定以在解密期間執行免路 2反進階加密標準子運算,且該解密動作係經由加=其對 密訊號1311之狀態而啟動。熟習該項技術者 解 入 曰月匕j解中間 回合資料之依據特定區塊密碼模式而送回至回合引擎 曰 係為控制字組暫存器13〇2所明定。起始向量資料(若兩320 要)經由匯流排NEXTIN 1318而送至回合引擎132〇。 在第13圖所示實施例中,回合引擎被分作二階級,38 • 1250450 application, operating system, machine user generated key table is in the application example, the user generates the key table. In an embodiment, the register code unit is divided into two classes for making the line management. Therefore, after execution, the microinstruction is executed first to provide an (IN-1), followed by a second load of the word data to the input-0 (ΙΝ-0), cryptographic operation. If the cryptographic operation is performed according to the time, a majority of the user-specific loading micro-instructions are sent to each chronograph of the cryptographic unit. Load the scratchpad in the microinstruction. Referring to Figure 9, the table 700 loads the register of the microinstruction to the crypto unit to provide the _word block to the location specified by the storage logic 702. Therefore, the one-to-one specific output text block moves to the value of the corresponding input text area 703, OblOO, so that the cipher unit is raised or the like. In one embodiment, the formula is established. Established by an alternative person. When the intercept value is OblOO and OblOl, when the input character data block is added to the input poor block, a first input text data is sent to the round-1 micro-instruction to execute a second input. Let the instruction unit start executing the majority of the golden amount in the record of the gold record scheduled by the user, so that all other values of the unit loading key 703 are displayed by the guarantee 900. The format block is 7〇3. A load microinstruction is generated (password or decrypted) for storage in the address field of the memory. The conversion logic of the present invention first issues a load microinstruction followed by a load microinstruction. The register column is used for the output of the internal output - 0 to make the output of the Schmitt management out of the position 39 l25 〇 45 〇 (〇υ τ · 0) salary for the storage of the 3 descendants related output text block to Store logic in the middle.斗, &gt; 1 out of 0 valley and sent to the input - 〇 input text block to ask, the new ten inside the t 9 deposit field value reference to the internal output - 1 register of each It is related to the input text data sent to the order a '1. Therefore, a plurality of input and decryption fields are added to the key and the control block data can be added to the cryptographic unit &amp;, line management * into ^ 'error by loading · input -1, loading · Input _〇 (Loading • Wheeling • Everyone is out of the 7 W code unit and also starts the cryptographic operation), loading · Loading γ Loading · 〇υ τ · 〇, loading. Input -1, loading · input - This can be achieved by issuing the password micro-finger 7 in the order of 开始 (starting to follow the action of the next two eight + text blocks). Operation Now = read 1G diagram, which illustrates the control word group format (contro 1 word format) in the present invention - used to pre-program the password binary code π ππ control word group 1000 is programmed from a user to the memory , , the heart is sent to a compatible microprocessor in a compatible six-port state before the execution of the code. Therefore, a micro-instruction in the 雷 对应 对应 ” ” · · · · · · · · 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入 载入Convert the indicator into an actual memory® address, shoe ιν ώ α Λ Λ 兄 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得 取得Φ , , , 曰 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Instruction)), bite is a combination of the brother's private road, device or microcode, because the command circuit is not the heavy field of the reference, L, Li, ^ will not be described in detail here. The control block ι〇〇〇40 1250450 contains a representative reservation (RSVD) field 1001, a data block size (DSIZE) field 1002, a key size (KSIZE) field 1003, an encryption/decoding (E/ D) Field 1004, an Intermediate Result (IRSLT) field 1005, a Key Generation (KGEN) Block 1006, an Algorithm (ALG) Block 1007, and a Round Count (RCNT) field 1008. All values of reserved block 1001 are reserved. Data Block Size Block 1002 The content of the input and output text blocks used for encryption and decryption execution. In one embodiment, the data block size field 1002 has a predetermined block size of 128 bits, 192 bits, or 256 bits. The size of the key size block 1003 is the size of the predetermined password and the cryptographic key used for decryption. In one embodiment, the gold size field, the size of the 1003 predetermined gold record is 128 bits, 192 bits or 256 bits. Encryption/decoding 100 bit 1004 specifies whether the cryptographic operation is used in an encryption or decryption operation. The key generation block 1006 indicates whether the gold record schedule generated by the user is stored in the memory, or whether a single password record is stored in the memory. If a single password is indeed present, the microinstruction and cryptographic key are sent to the cryptographic unit to cause the unit to expand the key into a cryptographic algorithm-derived key schedule, where the cryptographic algorithm is The contents of the algorithm field 1007 are defined. In one embodiment, the explicit value of the algorithm block 1007 is determined using the aforementioned data encryption standard algorithm, triple data encryption standard algorithm or advanced encryption standard algorithm. In other different embodiments, the algorithms used are Rijndael Cipher and Twofish Cipher algorithms. The content of the round count field 1008 is intended to be used by the algorithm for the number of password rounds used in each input text block; although the criteria used in the above algorithms are for each input 41. In the 15th input script, the password is not the best. It is an advantage to familiarize yourself with the results of the same sub-interval. The 1250450 text block using the password control method for the execution of the block execution map 00" uses the predetermined fixed calculus number, but the program uses the round count block 1008 to change the rounds specified by the standards. In one embodiment, the programmer has to set 0 to different rounds for each block. Finally, the content of the intermediate result block 1005 determines whether the block of words is executed in the round count block 1008 according to the password standard specified in the algorithm field 1007, or whether the decryption is based on the total number of rounds. The number of rounds in the block 1008 is determined, wherein the last round of the execution represents a transition result and the final result, which is the feature of the algorithm in the algorithm block 1007. The technician knows that many calculations are in progress. Phase operations are performed in each round, but are different in the last round. Therefore, if the middle field 1005 is programmed to provide a transition result rather than the final result point, as it allows the programmer to confirm the intermediate step of the algorithm, the progressive transition is used to confirm the performance of the algorithm. A text block is achieved by a password round, followed by two rounds of the same text area, and then three rounds. Referring now to Figure 11, the table 1100 is used to illustrate an example value of the key size block 1003 of the 10th word group 1000, wherein the value causes the computing device to perform a predetermined calculation with a 128-bit password size. The value "01" causes the computing device to perform a predetermined cryptographic operation with a 192-bit cryptographic key. The value "01" causes the computing device to perform a predetermined cryptographic operation with a 256-bit key size, and the remaining values are retained. Referring now to Figure 12, there is shown a block diagram of a cryptographic unit of the present invention. In the figure, the cryptographic unit 1200 includes a micro-opcoded register 1250450 1203 'which receives a cryptographic micro-instruction (ie, loads and stores micro-instructions) via a micro-instruction bus (1214) and has a control Control word register 1204, one input-0 temporary crying 1205, input_1 register 12〇6, one key-〇 register 12〇7 and one gold钤-1 temporary storage 1208. In accordance with a predetermined one of the contents of the microinstruction register 1203 loaded with the microinstruction Z, the data is sent to the scratchpad 1204- 1208 via a load bus 1211. In addition, the cryptographic unit 1200 also includes a block cipher logic 1201, and the logic circuit 1201 is coupled to the parent of the registers 1203-1208' and is also coupled to the cryptographic input random access memory. A cryptographic key RAM 1202. In addition, the block S and the text logic circuit 1201 provide a stall signal 1213 and also provide block results to an output-0 register 1209 and an output-1 register 1210. The output registers 1209-1210 send their internal contents to a subsequent stage of a compatible microprocessor via a storage bus 1212. In one embodiment, the size of the micro-opcoded register 1203 is 32 bits, the sizes of the registers 1204, 1207, and 1208 are 128 bits, and the sizes of the registers 1205 - 1206 and 1209 - 1210 are 256 bits. The password microinstruction is selectively and sequentially provided to the microinstruction register 1203, the input buffer 12〇5_12〇6, or the golden temporary register 1207-1208. One of them. In the embodiment shown in Figures 8 and 9, a control block is loaded into the control block register 1204 via a load microinstruction, and then the cryptographic key or key schedule is subsequently loaded. The microinstruction is loaded. If the loaded cryptographic key is 128 bits, then a microinstruction is loaded to specify the scratchpad gold _ 〇 12 〇 7 . If the cryptographic key loaded by 43 1250450 is greater than 128 bits, a load microinstruction specifies the scratchpad key-0 1207 and a load microinstruction specifies the scratchpad key -1 1208. If the loader is a user-generated key schedule, the subsequent load micro-instruction specifies the scratchpad key - 〇 1207. Each of the keys in the loaded key schedule is placed in the key random access memory 1202 in order for its relative key round execution. After that, the text data (if no starting vector is needed) is loaded into the input-1 register 1206. If the start vector is used, it is carried to the input_1 register 1206 via a load microinstruction. A microinstruction sent to the input-0 register 1205 causes the cryptographic unit to load the input literal into the input-0 register 1205 and begin to utilize the input-1 or the two input registers 1205-1206 (when input When the data is being processed by the pipeline, the start vector performs a password round on the input text data in the register input-0 1205, wherein the execution of the password round is based on the parameters provided by the contents of the control block register 1204. . Upon receipt of a load microinstruction specifying input -1205, block cipher logic circuit 1201 begins execution of a predetermined cryptographic operation of the control block contents. If a single cipher key needs to be expanded, the block ciphertext logic circuit 1201 generates each of the key schedules and stores it in the key random access memory 1202. Regardless of whether the block ciphertext logic circuit 1201 generates a key schedule or a key schedule is loaded from the memory, the key used in the first round is cached in the block ciphertext logic circuit 1201, so that The first block password round can be performed without using the key random access memory 1202. The block ciphertext logic circuit 1201 continues to perform a predetermined password operation on at least one of the input text blocks upon activation until the operation is completed. Next, the back alloy key required for the cryptographic algorithm used is extracted from the key random access memory 44 1250450 1202. The cryptographic unit 1200 operates on the block cipher that is specified for the specified input text block, and the subsequent input text block is cryptographically or decrypted by the execution of the subsequent load and store microinstructions. When a stored micro-instruction is executed, if the predetermined output data (ie, output-0 or round-trip 屮 has not been fully generated, the block ciphertext puzzle circuit 1201 issues a delay signal 1213. Once the output data has been generated and is Placed in a corresponding output register 12〇9-121〇, the contents of the register 1209-1210 are transferred to the storage bus 1212. Referring now to Figure 13, The block diagram of the block ciphertext logic circuit 13 of the advanced capitalization standard performs the cryptographic operation. The block ciphertext logic circuit 1300 includes a round engine (r〇und engine) 1320, and the round engine 1320 passes through the bus bar 1311. -1314 and bus bar 1316-1318 _ combined to a round engine controller (r〇und engine c〇ntr〇uer) 1310 ' and contains a gold size controller (key size controller) 1330, and uses a micro-instruction The scratchpad (micr〇instmcti〇nregister) l3〇i, the control word register 1302, the gold record-0 register 1303, and the key-1 register 1304 access the key data , microinstructions, and the parameters of the cryptographic operations performed The contents of the input registers 1305-1306 are sent to the round engine 1320, and the round engine 1320 provides corresponding output text to the round-out registers 1307-1308. The output registers 1307-1308 are also via the bus bars 1316-1317. Coupled to the round engine controller 1310 to cause the round engine controller to use the result of each subsequent password round, wherein the results are sent to the next password pass via the bus NEXTIN 1318. Key random access memory (not The cryptographic key in the display is accessed via the bus 1315; 45 1250450 The encryption/decryption signal 1311 causes the round engine to perform a password (such as S-Box) or decrypt (such as a reverse S-Box) using sub-operations; The content of the (RNDCON) bus 1312 causes the round engine 1320 to perform a first AES round, an intermediate advanced encryption standard round, or a final advanced encryption standard round. A key in the control block based on a predetermined cryptographic key used. For the content of the size block, the key size controller 1330 specifies the size of the password key via the key size bus 1319. If the key schedule is to be generated automatically, the round engine controller 13 10 issues a key generation signal 1314 to cause the round engine 1320 to generate a key schedule generated using the key provided via the bus 1313, wherein the size of the key is determined by the key size 1319, and the key bus 1313 is also used. The return engine 1320 is provided with a back alloy key for each corresponding execution. In one embodiment, the value of the key size bus 1319 indicates that the key size is 128 bits, 192 bits, or 256 bits. The round engine 1320 includes a first key exclusive (XOR) logic circuit 1321 that is coupled to a first scratchpad temporary store-0 1322. The first register 1322 is coupled to the S-box logic circuit 1323, the S-box logic circuit 1323 is coupled to a ShiflRow logic circuit 1324, and the shift logic circuit 1324 is coupled to a second register temporary storage - 1 1325 The second register 1325 is lying down to the Mix Column logic circuit 1326, and the hybrid logic circuit is coupled to a third register temporary storage - 2 1327. The first key logic circuit 1321, the S-box logic circuit 1323, the shift logic circuit 1324, and the hash logic circuit 1326 are configured to perform sub-operations of similar names on the input text data, and the sub-operations performed when the sub-operations are performed are determined by the above-mentioned advanced steps. Encryption standard FIPS standard. In addition, the column logic circuit 1326 is also configured to perform an advanced encryption standard mutual exclusion function on the input data during the desired intermediate back to 1250450, wherein the execution utilizes the back alloying force provided via the key bus 1313: The I-round logic circuit 1321, the S-box logic circuit 1323, the shift logic table 1324, and the hash logic circuit 1326 are also configured to perform the clear-circuit 2 anti-advanced encryption standard sub-operation during decryption, and the decryption action is via Plus = it starts on the status of the secret signal 1311. Those skilled in the art can solve the problem. The return data is sent back to the round engine according to the specific block cipher mode. The system is defined by the control block register 13〇2. The starting vector data (if two 320 is required) is sent to the round engine 132 via the bus NEXTIN 1318. In the embodiment shown in Figure 13, the round engine is divided into two classes.

一位於暫存_〇 1322及暫存_丨1325間之第_ P I自敬及一位於暫 存4 1325及暫存-2 1327間之第二階級。中間回合資料在二 階級之間受管線管理’且管線控管係與一時脈訊號(未^ 示)同步為之。當對一輸入資料區塊之—密碼運算動作完 成時,相關輸出資料被置入一對應輸出暫存器13〇7_13〇8 中。當一儲存微指令被執行時,一指定輸出暫存哭 1307-1308即被送至一儲存匯流排(未顯示)上。 現請參閱第14圖,圖中所示為一說明本發明之一用以 在中斷發生時保存密碼參數狀態之方法的流程圖。該流程 起始於方塊1402,此時一指令流為一微處理器執行,其中 指令流不需包含本案中所述密碼指令。接著,流程往決策 方塊1404移動。 在決策區塊1404時,一中斷事件(如可遮罩中斷 '非 可遮罩中斷、頁錯誤、工作切換等)是否正發生中將受判 47 !2s〇4 50 I,此時該指令流中需有一改變而形成一指令流(「中斷 =理者」)以處理該中斷事件。若中斷確實正進行中,該 /;IL程往區塊1406前進·其不 3丨斗、士 進,右否,則该流程在決策方塊1404上 &amp;覆判斷直至一中斯畜杜森^ a 峤旱件毛生,其中在反覆判斷期間指令 執行之動作持續進行。 在方塊1404時,由於名艘1 #斗、&gt; &amp; ^ , 、, 由於在將耘式控制權傳送至一對應中 外理者之前已有一中斷事件發, ^ 干^生故本發明之中斷邏輯 兔路對一旗標暫存器中的 扒士 位兀加以清除,如此得確保若 於中斷處理者處返回時一區塊密 , 止進行中、至少一 _事件之叙生將被指出且控制字 ^ 4士士 利子、、且貝枓及金鑰資料必須 在持續進行區塊密碼運算之前再被 … 戰入’其中密碼運算所 針對之輸入資料區塊為輸入指標 不节存為内容所指者。 在方塊1408時,包含與本發明之One is located between the temporary storage _〇 1322 and the temporary storage _丨1325 _ P I self-respect and a second class between the temporary storage 4 1325 and the temporary storage - 2 1327. The intermediate round data is managed by the pipeline between the two classes' and the pipeline control system is synchronized with a clock signal (not shown). When the cryptographic operation of an input data block is completed, the relevant output data is placed in a corresponding output register 13〇7_13〇8. When a store microinstruction is executed, a designated output temporary crying 1307-1308 is sent to a storage bus (not shown). Referring now to Figure 14, there is shown a flow diagram illustrating one method of the present invention for maintaining the state of a cryptographic parameter when an interrupt occurs. The flow begins at block 1402, where an instruction stream is executed by a microprocessor, wherein the instruction stream does not need to include the cryptographic instructions described in this case. The flow then moves to decision block 1404. At decision block 1404, an interrupt event (such as a maskable interrupt 'non-maskable interrupt, page fault, work switch, etc.) is asserted 47 ! 2s 〇 4 50 I, at which point the instruction stream There needs to be a change to form an instruction stream ("interrupt = ruler") to handle the interrupt event. If the interruption is indeed in progress, the /; IL process proceeds to block 1406. If it is not 3, and if it is not right, then the process is judged on decision block 1404 and is determined until one of the animals is Dusen ^ a 峤 件 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , At block 1404, since the famous ship 1 #斗, &gt;&amp; ^, , has an interrupt event before the transfer of the control to the corresponding foreigner, the interruption of the present invention The logical rabbit road clears the gentleman's position in a flag register, so as to ensure that if a block is closed when the interrupter returns, the in-progress, at least one event will be indicated and The control word ^ 4 Shishizizi, and the Bellow and the key data must be saved before the block cipher operation is continued... The input data block for which the cryptographic operation is directed is the input indicator and is not saved as the content. Refers to. At block 1408, inclusive of the present invention

He ^ ^ 匕碼始、碼運异性能相 關之指標及計數器架構性暫存器 仔至屺憶體中。熟習該 項技術者皆能了解現今資料計算裝置 ,^ , Τ木構性暫存為之儲 存典型上係於傳送控制至中斷處理. 外主嘗之珂為之,因此本發 明提出本資料架構態樣以令中斷事 研爭件發生整個過程中具有 執行透明度。在暫存器被儲存後,户 &quot;丨L 珂進至方塊141〇 〇 在方塊1410時,程式流被送至中 T畸處理者處。接著, 流程前進至方塊1412。 該方法在行進至方塊1412時έ士垂 _ 卜 了…采。熱習該項技術者皆 能了解第14圖之方法在於中斷處理去 有處返回時在方塊14〇2 處再度開始。 現請參閱第15圖,圖中所示為一 用从况明本發明之利 48 Ο I2s〇45 ^ 使用者預定密碼金鑰大小而於至少一中斷事件發生之 了對複數個輪入資料區塊執行一密碼運算之方法的流裎# 1 圖諸 卑 行=5圖00。為使說明較為清楚,依據區塊密文模式執 =之需要對區塊間(如輸出回授模式及密文回授模式等之 程)起始向量等效者加以更新,及儲存的明定密碼運算流 (未頒不),但該等其它區塊密文模式亦為本發明之 去所涵蓋。 万 滋流㈣始於方塊1502,此時一本發明之密瑪指令使— 尋運”開始執仃。岔碼指令之執行可為_第一執行,或 :為-第-執行之後的執行,因為_中斷事件造成執行中 断之故,其中中斷事件對执, 千對執行的中斷使得程式控制權 中斷處理者已執行之後傳适 ^回至嫂碼指令。接著,流程杆 進至方塊1504。 ^ 1丁 在方塊1504時,一太於 ^ 之 受明之輸入指標暫存器内容 記憶體資料區塊自記憶體中載出,且-預定密碼運: 即開始。在-預定實施例中,執行預定密碼運算 : 输大小為:2“立元’且指令需執行以在發出密瑪指::敢 清除X位元。在一 *相容且一 χ86帛標暫存器使用^ 元的實施例中,X位兀可藉執行一 PHSDFD指 、, 亚再接菩 執行一 POPFD指令而受清除。狹 关者 ',、、 ‘、、、白忒項技術者皆知 在其它不同實施例中其它指令必須用以清除又位元一 實施例中,預定之密碼運算根據進階加密標準演:、:在- 、隹一接荖,流程行進$ 4 ' I去開始 進仃。接者 枉仃進至決策方塊1506。 在決策方塊1506時,一旌摘^ &gt;He ^ ^ weight start, code and performance related indicators and counter architecture scratchpad. Anyone who is familiar with the technology can understand the current data computing device. ^, The storage of the eucalyptus structure is typically stored in the transmission control to the interrupt processing. Therefore, the present invention proposes the data architecture state. In order to make the interruption of the dispute, the implementation process has transparency in execution. After the scratchpad is stored, the user &quot;丨L advances to block 141〇 〇 At block 1410, the program stream is sent to the middle T processor. Flow then proceeds to block 1412. The method travels to block 1412 when the gentleman hangs. Those skilled in the art can understand that the method of Figure 14 is to interrupt processing. When there is a return, start again at block 14〇2. Referring now to Figure 15, there is shown a plurality of wheeled data areas that have occurred at least one interruption event by using the size of the user's predetermined password key from the condition of the present invention. The rogue #1 of the method of performing a cryptographic operation on the block is shown in Fig. 00. In order to make the description clearer, according to the block ciphertext mode, it is necessary to update the starting vector equivalents between the blocks (such as the output feedback mode and the ciphertext feedback mode), and the stored clear password. The computational flow (not granted), but these other block ciphertext modes are also covered by the present invention. The Wanzi stream (4) begins at block 1502, at which point a cryptic instruction of the invention causes the "find" to begin execution. The execution of the weight instruction can be _first execution, or: execution after -first execution, Because the interrupt event causes an interrupt, in which the interrupt event is executed, the interrupt of the thousand pairs causes the program control interrupt handler to execute and then transfer back to the weight command. Then, the flow bar proceeds to block 1504. When the block is at 1504, the input parameter register memory block data block of the input indicator is loaded from the memory, and the predetermined password is transferred: that is, in the predetermined embodiment, the reservation is executed. Password operation: The input size is: 2 "Liyuan" and the instruction needs to be executed to issue the Mimma:: dare to clear the X bit. In an embodiment where a *compatible and a 帛86 暂 register uses ^ yuan, the X bit 兀 can be cleared by executing a PHSDFD finger, and sub-receiving a POPFD command. The narrower ',,, ',, and white technology experts know that in other different embodiments, other instructions must be used to clear the bit. In the embodiment, the predetermined cryptographic operation is performed according to the advanced encryption standard: : At -, and then, the process proceeds $4' I to start. The caller proceeds to decision block 1506. At decision block 1506, a pick ^ &gt;

旗標暫存器中X位开B 凡是否為設 49 1250450 定狀態被加判斷。I X位元被 ,^ M ^ _ 幻彳工制子組及以被載 進本啦明之岔碼使用單元的金鍮排程之值成立;若乂位元 被清除,則控制字組及以被载 排程之第14H = : 的金錄 圖所略為提及者,X位 兀在一中断事件發生之時被 /肖除右x位兀被設定,則流 程行進至方塊152 ;甚y - 、 位凡被4除,則流程行進塊 1508 。 」疋王刀见 在方塊1508時,由於一被清除之χ位元已指出一中斷 事件已發生或一新控制字4日芬/斗、、a m予組及(或)金錄f料將被載人, 大此-控制字組自記憶體中載出。在一實施例卜控制字 組之載入使密碼單元不執行預定密碼運算,如上述配合方 塊蘭所載述者。在本實施範例中方塊讀 的開始得使多個依電子密石弓奎煤々、隹” 山馬&amp; ^ 丁 *碼書杈式進行之128位元區塊密 碼運算得到最佳化’其方式為假設一目前之控制字組及金 餘貢料將被使用、且利用—128位元金鑰冑128位元輸入 &amp;塊所為之電子密碼書模式為最常用的區塊密文模式。因 目刖輸入貝料區塊被載入,且在核對決策方塊b㈨中 X位元狀態之前開始的密碼運算被重設。㈣,流程行進 至決朿方塊1514。 在决策方塊%,方塊15〇8處取得之控制字組的KSIZE 搁位被依據以決定預定密碼運算執行之時當受使用之金鑰 大小。若金鑰大小攔位值預定為一 192位元的金鑰,那麼 爪私行進至方塊151〇 ;若金鑰大小攔位值預定為一 位 凡的金鑰,那麼流程行進至方塊1516 ;若金鑰大小攔位值 50 1250450 預定為一 256位 在方塊1512 控制字組中金鑰 完全載自記憶體 金錄被載入,並 方塊1522 。 在方塊1516 大小預定一 128 拓展密碼金鑰資 流程行進至方塊 在方塊1518 金输大小被設定 餘執行密碼運算 在方塊1520 明之方式加以載 在方塊1518 入,且密碼運算 行,其中此時的 區塊大小為之。 在方塊1524 區塊被產生。當 件區塊,且該輸 作時,輸入區塊 密文件區塊。接: 元金鑰,則流程行進至方塊1518。 時,密碼金鑰資料自記憶體中載出。根據 生成及金錄大小攔位的狀態,金鑰資料非 (即一使用者產生之金鑰排程)即一起始 被拓展成一金鑰排程。接著,流程行進至 時,由於區塊密文邏輯電路中匯流排金鑰 位元密碼金鑰,此時所需進行者為載入/ _ 料,如上述配合方塊1512所述者。接著, 1522。 時’本發明之區塊密文邏輯電路中匯流排 ,以令其回合引擎利用一 256位元密碼金 。接著’流程行進至方塊152〇。 時’密碼金錄資料如上述配合方塊1512說 入/拓展。接著,流程行進至方塊1522。 時,方塊1504所指之輸入區塊再度被載 馨 依取新載入之控制字組及金鑰排程開始進 载入係依控制字組中DSIZE攔位值明定之 進行加密動作時二「…之W 出區作”輸入區塊為-未力… 為1:—對應密文區塊。當進行解密重 著,二區塊’且輸出區塊為-對應未力' 机矛王行進至方塊1528。 51 1250450 在方 向下一輸 大小攔位 成指出目 圖讨論之 熟習該項 器之内容 線式執行 在決 運算被受 判斷其值 行進至方 方塊1532 在方 輸入資料 該方 本發 例亦屬本 構相容之 所廣泛了 份。亦即 架構,並 甚者 器本身以 塊1528時,輸入及輸出區塊指標暫存器改變成於 入及輸出資料區塊’且係依控制字組中資料區塊 值為之。此外,區塊計數器暫存器之内容被改變 前輪入資料區塊之密碼運算的完成。在配合第15 貫施例中,區塊计數為暫存器值被遞減。不過 技術者皆知其它不同實施例得對區塊計數器暫存 得加操縱及測試’以亦能對輸入文字區塊加以管 。接著,流程行進至決策區塊1530。 策區塊1530時,一輸入資料區塊是否當繼續加以 判斷。在此處所述實施例中,區塊計數器被用以 是否等於零。若無任何區塊當被執行時,則流程 塊1534 ;若一區塊當被繼續執行,則流程行進至 〇 塊1532時’ 一為輸入指標暫存器内容所指之下一 區塊被載入。接著,流程行進至方塊1524。 法在行進至方塊1534時結束。 明之目的、特徵及優點已詳述於上,但其它實施 發明包含之範圍。舉例而言,本發明之與χ86架 貫施例已詳盡描述於上,由於χ86架構乃為一般 解者’故對其之討論可用以教示本發明之其它部 本愈明之範圍擴及p〇werpC、Mjps等其它指令集 亦適用於其它全新的指令集架構。 ,本發明之密碼運算亦可於一計算系統中微處理 外之控制兀件中進行,如得於計算系統中一不同 52 1250450 於微處理器所在積體電 曰 的名碼早疋上進行,該等實 也列仔依序整合於一圍繞一之晶 ,, 々組(如北橋及南 或可構成一專用以執行密碼運算之處理器,此時 二和令由—主微處理器被送至處理器中。本發明亦可用 於肷入式控制器、工業栌卢 果ί工制為七號處理器、陣列處理器 及各種传用以處理資料 人 τ疋力貞似衣置τ此外,本發明亦包 二:Π上述中該等用以執行密碼運算所必須之控制元 咏认 忒主現之衣置確貧得將執行密碼運 异的低成本及低功率代用方式單由-通訊系統中一加贫/ =密處理器等實施之。為便於說明,本案發明人將上:該 :、不同處理元件統稱作處理器。 十、此外’雖然上述中本發明係以128位元區塊作為代表 σ兄月 其匕各種不同區換大y丨、Ί*Γ低yf由田4 —t大小亦付使用之,僅需改變攜帶 雨 負料、輸出資料、金输及^允制窣細夕氣士 土、及ί工制子組之暫存器的大小 可達成之。 ::,雖然資料加密標準、三重資料加密標準 加以準之特徵已在本案中詳述,但本案發明人當特 明本發明實際上亦包含一般 力又尸4孕乂不吊用之區塊密文演算 法’如 MARS 密文、R]jndael 宓 J 山文 Twofish岔文及B1〇wflsh密 文、Serpent密文及RC6密文。 山 入在砰閱過上述說明後,本菸 明之專用區塊密碼使用裝置 ^ ,A 置及从處理态中的支援方法必足 為-般所了解’其中極微區塊密碼運算可經由對一單一, 令之執行而被引動動作。 曰 此外,雖然本發明已針對 μ τ Ε塊始、碼〉貝异法及執行區塊 53 1250450 密碼功能之相關技術谁并% 丁進仃a兄明,但本發明實 碼之其它密碼使用形式。讀者亦不難理解使 指令之執行而令一相容fi卢 侍猎単一 子目谷u處理益在包含一專用密 元的條件下執行加密或解密等密碼運算,# =用: 元係用以完成指令所預定之密碼功能。 岔碼單 甚者,本案中所述回合引擎得提供一二 二輸入育料區塊進行管線式處理,本案發明人卷:u對 超過三階級之實施例亦# §特別說明 1 J亦存在之。可以預見的是,古In the flag register, the X bit is turned on. B Whether the setting is 49 1250450 is determined. The IX bit is set by the ^ M ^ _ illusion sub-group and the value of the gold-plated schedule that is loaded into the weight-using unit of the present invention; if the 乂 bit is cleared, the control block is The gold record of the 14H = : of the schedule is slightly mentioned, the X bit is set by the right x position when an interrupt event occurs, and the flow proceeds to block 152; very y - , If the bit is divided by 4, the flow proceeds to block 1508. When Wang Wangdao sees at block 1508, a cleared event has indicated that an interrupt event has occurred or a new control word 4 fen/dou, am group, and/or gold record will be Manned, the big - control word group is carried out from the memory. In an embodiment, the loading of the control block causes the cryptographic unit not to perform a predetermined cryptographic operation, as described above in conjunction with the block. In the present embodiment, the beginning of the block reading is optimized for a plurality of 128-bit block cipher operations based on the electronic dense stone arches, the 隹", the mountain horse &amp; Assume that the current control block and Jin Yu tribute will be used, and the electronic cipher book mode using the 128-bit key 胄 128-bit input &amp; block is the most commonly used block ciphertext mode. The input cryptographic block is loaded, and the cryptographic operation that begins before the X-bit state in the check decision block b(9) is reset. (4) The flow proceeds to decision block 1514. In decision block %, block 15 〇 8 The KSIZE of the control block obtained is used to determine the size of the key to be used when the predetermined cryptographic operation is performed. If the key size is set to a 192-bit key, then the paw travels to Block 151〇; if the key size block value is predetermined to be a single key, then the flow proceeds to block 1516; if the key size block value 50 1250450 is predetermined to be a 256 bit in block 1512 control block key Fully loaded from the memory record is loaded, Block 1522. At block 1516, the size is predetermined to 128. The extended password keying process proceeds to block. At block 1518, the size of the gold is set. The execution of the cryptographic operation is performed in block 1520, and the cryptographic operation is performed. The block size at this time is the block. The block is generated at block 1524. When the block is in the block and the input is made, the block is entered into the file block. Then: the meta key, the flow proceeds to block 1518. The password key data is carried out from the memory. According to the state of the generated and gold record size, the key data is not (ie, a user generated key schedule), that is, the initial expansion is expanded into a key schedule. Then, when the flow advances, due to the bus key cryptographic key in the block ciphertext logic circuit, the required performer is the loader/loader, as described above with the matching block 1512. Then, 1522 When the 'block of the ciphertext logic circuit of the present invention is in the bus, so that its round engine uses a 256-bit cipher key. Then the flow proceeds to block 152 时. When the password is recorded as the above-mentioned compound Block 1512 is incremented/expanded. Next, the flow proceeds to block 1522. At this point, the input block indicated by block 1504 is again controlled by the newly loaded control block and key schedule. When the DSIZE block value in the block is determined to be encrypted, the second "...W out zone" input block is - not force... For 1:: corresponds to the ciphertext block. When decryption is repeated, the second block &apos; and the output block is - corresponding to the unpowered machine spear king proceeds to block 1528. 51 1250450 In the direction of the next size, the size of the block is discussed. The content of the device is discussed. The line execution is judged and the value is judged. The value is advanced to the square block 1532. The input data is also the constitutive phase. Rong Zhi has a wide share. That is, the architecture, and even if the device itself is in block 1528, the input and output block indicator registers are changed to the input and output data blocks' and are based on the data block values in the control block. In addition, the contents of the block counter register are changed. The cryptographic operation of the previous round entry data block is completed. In conjunction with the fifteenth embodiment, the block count is decremented by the register value. However, the skilled artisan is aware that other different embodiments may temporarily manipulate and test the block counters to also control the input text block. The flow then proceeds to decision block 1530. At block 1530, whether an input data block continues to be judged. In the embodiment described herein, the block counter is used to be equal to zero. If no block is executed, then block 1534; if a block is to be executed, the flow proceeds to block 1532, where a block is loaded under the contents of the input indicator register. In. Flow then proceeds to block 1524. The method ends when it proceeds to block 1534. The purpose, features, and advantages of the invention are described in detail above, but other embodiments encompass the scope of the invention. For example, the present invention and the χ86 continuation embodiment have been described in detail above, since the χ86 architecture is a general solution, so the discussion of it may be used to teach the scope of the other parts of the invention to be expanded to p〇werpC. Other instruction sets such as Mjps are also applicable to other new instruction set architectures. The cryptographic operation of the present invention can also be performed in a control device other than the micro-processing in a computing system. For example, in a computing system, a different 52 1250450 is performed on the name code of the integrated circuit of the microprocessor. These entities are also integrated in a sequence around a crystal, such as North Bridge and South may constitute a dedicated processor to perform cryptographic operations, at this time the second and the order - the main microprocessor is sent Into the processor, the invention can also be used for the intrusive controller, the industrial 栌 果 ί 工 为 七 七 七 七 七 七 七 七 七 七 七 七 七 七 七 七 七 七 , , , , , , The present invention also includes two: in the above-mentioned control elements necessary for performing cryptographic operations, the low-cost and low-power substitute mode for the implementation of the cryptographic operation is poor. For convenience of explanation, the inventor of the present invention will::: Different processing elements are collectively referred to as processors. X. Further, although the above invention is in the form of 128-bit blocks As a representative of σ brothers and moons For large y丨, Ί*Γ low yf is also used by Tian 4 -t size, only need to change the carrying of rain negative materials, output data, gold transmission and ^ permission to make fine qi qi soil, and 工 制 制The size of the scratchpad can be achieved. :: Although the characteristics of the data encryption standard and the triple data encryption standard have been detailed in this case, the inventor of the present invention specifically includes the general force and the corpse 4 The block ciphertext algorithm for pregnancy is not used. For example, MARS ciphertext, R]jndael 宓J Shanwen Twofish essay and B1〇wflsh ciphertext, Serpent ciphertext and RC6 ciphertext. After the description, the use of the unique block password device ^, A and the support method from the processing state of the tobacco must be known as 'the general micro block cryptographic operation can be motivated by a single, to be executed曰 In addition, although the present invention has been directed to the μ τ Ε block start code, the code 贝 法 method, and the execution block 53 1250450 cryptographic function related technology, and the other code of the real code of the present invention The form of use. It is not difficult for the reader to understand the execution of the instructions. Let a compatible fi 侍 単 単 子 子 子 u u u 在 在 在 u u u u u u 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含In the case of the code list, the round engine described in the present case has to provide one or two input breeding blocks for pipeline processing. The inventor's volume of the case: u for the embodiment of more than three classes is also # § special description 1 J also exists. It is foreseeable that ancient

入資料區塊之管線式處理工作的分級方式得隨〜《多輪 理器中其它階級之切分技術的提升而演進。思-相容微處 取後,本發明已經詳述支援複數個區 密碼單元為單-者’但本發明之範圍實亦包c之 兀,該等單元在運算上與相容微處理器中其它固赞碼單 行耦合’ 1皆設定以執行一既明定之區塊密碼'、會:旱元平 :而:,-第-單元設定以執行進階加密標準演:法。舉 第二單元設定以執行資料加密標準演算法等。/、异法,~The hierarchical method of pipeline processing into the data block has evolved with the improvement of the segmentation technology of other classes in the multi-wheeler. After the implementation-consistency micro-disposal, the present invention has been described in detail to support a plurality of zone crypto units as single--, but the scope of the present invention is also included in the computational and compatible microprocessors. Other Guzan code single-line coupling '1 is set to execute a defined block password', will: drought yuan flat: and: - - unit set to perform advanced encryption standard performance: method. The second unit is set to perform the data encryption standard algorithm and the like. /, different law, ~

本發明已針對特定實施例詳述如上,熟習謗工 知在不違本發明之精神及範圍的條件下,對本&amp;員技術者 變或更動,該等改變或更動仍不脫離本發明之t明加以改 明之精神及範圍將定義如下述之巾請專利範^園,本發 【圖式簡單說明】 复^在詳閱過下述之說明及所附圖式後,本發明 其它目的、特徵及優點將更易於了解,其中:之上述及 54 1250450 第1圖為一說明現今密碼相關應用之方塊圖; 第2圖為一說明執行密碼運算之技術的方塊圖; 第3圖為一代表本發明用以執行密碼運算之微處理器 裝置的方塊圖; 第4圖為本發明之基本單元密碼指令實施例的方塊 圖; 第5圖為說明第4圖中基本單元指令中區塊密碼模式 攔位值範例的表格; 第6圖為本發明之一與x86相同之微處理器内一密碼 單元的方塊圖; 第7圖為一使第6圖之微處理器内進行密碼相關子運 算之微指令範例中的攔位圖; 第8圖為具第7圖之格式的一載入微指令之暫存器攔 位值的表格; 第9圖為具第7圖之格式之一儲存微指令的暫存器欄 位值的表格; 第10圖為預定本發明之一密碼運算之密碼相關參數的 控制字元格式範例; 第11圖為第10圖之控制字元之金鑰大小攔位值的表 格; 第12圖為說明本發明中一密碼單元範例細節的方塊 圖, 第13圖為一說明本發明之一執行進階加密標準之密碼 運算之區塊密碼邏輯電路實施例的方塊圖; 55 1250450 第14圖為一說明本發明用以在一中斷事件期間保存密 碼相關參數狀態之方法的流程圖;及 第15圖為一說明本發明用以在對複數個輸入資料區塊 執行一密碼運算、且至少一中斷事件發生之時使用一使用 者預定密碼金鑰大小之方法。【主要元件符號說明】 100 方塊圖 102 第二電腦工作站 104 工作站 107第一路由器 109 無線網路 111第二路由器 200 方塊圖 201 微處理器 203 程式記憶體 205 金餘排程 207 解密應用程式 209 密碼參數 211密文區塊 301 微處理器 303 轉換邏輯電路 305微指令儲存表目 307暫存器組 13 6 8 ο ο ο ο 0 2 24 6 8 0 0 2 4 6 ο ο οοιοοο ο 08 3 一作路線域密 第工網無廣加 腦置 站電裝 作端存 工遠儲 腦C案 電站檔 式 程 器 用 由 應 路 密 路路解 網網/ 體 軟 統 系 業 作 程 用 應 生 產 鑰 金 碼 密 目器 式 表存 程 器列入暫 用量塊 存仔載標 應向區圖暫令令指 密始文塊令指指制 式加起明方指微微控 ;〇9金鑰指標暫存器 310 耜始向吾指標暫存器 311輸入指標暫存器 312 輸出指標暫存器 56 1250450 313 區塊計數暫存器 315 記憶體 317儲存邏輯電路 314 負載邏輯電路 316 密碼使用單元 318 寫回邏輯電路 鑰 金 位 •, oCSS 鑰 域路置 金 區電前位 統令碼 字輯性欄 系指密 文邏擇碼 業碼始程入行選算 作密起排輸執可運 表格 提取邏輯電路 轉換器 暫存器階級 負載階級 微指令佇列 微指令佇列 微指令佇列 319 記憶體匯流排 320 321 記憶體 322 323 密碼控制字組 324 325 起始向量 326 327 記憶體位置 328 400 基本單元密碼指令 401 402 重覆前置攔位 403 404 區塊密文模式欄位 500 600 微處理器 601 602 轉換邏輯電路 603 604 微碼唯讀記憶體 605 606 位址階級 607 608 執行階級 609 610平行執行單元(整數單611 元) 612 平行執行單元 613 614 平行執行單元 615 微 指 令 佇歹 616 平行執行單元 617 密 碼 單 元 618 儲存階級 619 寫 回 階 級 620 負載匯流排 621 暫 停 訊 號 57 1250450 622儲存匯流排 624 暫存器 625 X位元 626 中斷邏輯電路 627軟體及硬體中斷訊號 628 轉換邏輯電路 629 E位元 630 631 D 位 元 632 640 金 錄 生 成 邏 輯 電 路 700 701 微 運 算 碼 掘 位 702 703 暫 存 器 搁 位 704 1000 控 制 字 組 格 式 1001 1002 資 料 區 塊 大 小 攔 位 1003 1004 密 石馬 / 解 密 欄 位 1005 1006 金 输 生 成 搁 位 1007 1008 回 合 計 數 RCNT 搁 位 1200 1201 密 石馬 金 输 隨 機 存 取記憶 1202 體 1203 微 運 算 石馬 暫 存 器 1204 1205 輸 入 -0 暫 存 器 1206 1207 金 餘 -0 暫 存 器 1208 1209 ¥m 出 暫 存 器 1210 1211 載 入 匯 流 排 1212 1213 拖 延 訊 號 1214 1300 區 塊 密 文 邏 輯 電 路 1301 1302 控 制 字 組 暫 存 器 1303 1304 金 -1 暫 存 器 1305 1306 m 入 暫 存 器 1307 1308 暫 存 器 1310 1311 匯 流 排 1312 1313匯流排 1314 特徵控制暫存器 執行邏輯電路 格式 資料暫存器攔位 貢料搁位 保留攔位 金餘大小欄位 中間結果欄位 演算法欄位 密碼單元 金鑰隨機存取記憶體The present invention has been described in detail above with respect to the specific embodiments, and it is understood that the present invention may be changed or changed without departing from the spirit and scope of the invention. The spirit and scope of the invention will be defined as follows. Please refer to the following patents. The following is a brief description of the drawings. After reading the following description and the drawings, other objects and features of the present invention. And the advantages will be easier to understand, among which: the above and 54 1250450 Figure 1 is a block diagram illustrating the current password-related applications; Figure 2 is a block diagram illustrating the technique for performing cryptographic operations; Figure 3 is a representation of this A block diagram of a microprocessor device for performing cryptographic operations; FIG. 4 is a block diagram of an embodiment of a basic unit cipher command of the present invention; and FIG. 5 is a block diagram showing a block cipher mode block in a basic unit command in FIG. A table of bit value examples; Fig. 6 is a block diagram of a cryptographic unit in a microprocessor of the same type as x86; and Fig. 7 is a diagram showing a cryptographic correlation subroutine in the microprocessor of Fig. 6. instruction The block diagram in the example; Figure 8 is a table of the scratchpad block value of the load microinstruction in the format of Fig. 7; Fig. 9 is a temporary storage microinstruction in the format of Fig. 7. a table of register field values; FIG. 10 is an example of a control character format for a password-related parameter of a cryptographic operation of the present invention; and FIG. 11 is a table of a key size block value of the control character of FIG. Figure 12 is a block diagram showing an example of a cryptographic unit in the present invention, and Figure 13 is a block diagram showing an embodiment of a block cipher logic circuit for performing cryptographic operations of the advanced encryption standard of the present invention; 55 1250450 Figure 14 is a flow chart showing a method for storing the state of a password-related parameter during an interruption event of the present invention; and Figure 15 is a diagram for explaining a cryptographic operation performed on a plurality of input data blocks, And at least one interrupt event occurs when a user pre-determines the password key size. [Main component symbol description] 100 Block diagram 102 Second computer workstation 104 Workstation 107 First router 109 Wireless network 111 Second router 200 Block diagram 201 Microprocessor 203 Program memory 205 Gold balance scheduling 207 Decryption application 209 Password Parameter 211 ciphertext block 301 microprocessor 303 conversion logic circuit 305 microinstruction storage entry 307 register group 13 6 8 ο ο ο ο 0 2 24 6 8 0 0 2 4 6 ο ο οοιοοο ο 08 3密密第工网无广加脑置站电装作端存工远储脑C案电式档程用由路密路路解网/ 体软系业用用用钥金码The secret-type table-storage device is included in the temporary-use block, and the tag is added to the block diagram. The caption is used to add the finger-finger-finger control system to the finger-finger system; 〇9 key indicator register 310 Initially input to the index register 311 index register 312 output index register 56 1250450 313 block count register 315 memory 317 storage logic circuit 314 load logic circuit 316 password use unit 318 write back logic Key gold level •, oCSS key field road gold area electric front command code character series column refers to cipher text code code industry code start line selection calculation as dense line output mode can be transported table extraction logic circuit converter Register class load class microinstruction array microinstruction array microinstruction array 319 memory bus 320 321 memory 322 323 cryptographic control block 324 325 start vector 326 327 memory location 328 400 basic unit cryptographic instruction 401 402 Repeat Pre-Block 403 404 Block Ciphertext Mode Field 500 600 Microprocessor 601 602 Conversion Logic 603 604 Microcode Read Only Memory 605 606 Address Class 607 608 Executive Class 609 610 Parallel Execution Unit (Integer Single 611 yuan) 612 parallel execution unit 613 614 parallel execution unit 615 micro-command 伫歹 616 parallel execution unit 617 crypto unit 618 storage class 619 write back class 620 load bus 621 pause signal 57 1250450 622 storage bus 624 register 625 X bit 626 interrupt logic circuit 627 software and hardware interrupt signal 628 conversion logic circuit 629 E bit 630 631 D bit 632 640 Gold record generation logic circuit 700 701 Micro code code 702 703 Register position 704 1000 Control block format 1001 1002 Data block size block 1003 1004 Mishi horse / Decryption field 1005 1006 Gold output Bit 1007 1008 Round Count RCNT Shelf 1200 1201 Mi Shi Ma Jin Transmission Random Access Memory 1202 Body 1203 Micro Operation Shima Register 1204 1205 Input-0 Register 1206 1207 Jin Yu-0 Register 1208 1209 ¥ m out of the register 1210 1211 load bus 1212 1213 delay signal 1214 1300 block ciphertext logic 1301 1302 control block register 1303 1304 gold-1 register 1305 1306 m into the register 1307 1308 temporary 1310 1311 Bus 1312 1313 Bus 1314 Feature Control Register Execution Logic Circuit Format Data Scratchpad Arrangement Gatchment Retainment Intercept Gold Remaining Size Field Intermediate Result Field Algorithm Field Cryptographic Unit Key Random Save Memory

器 存器 排器器 暫存器器排流存存器 組暫存存流匯暫暫存 字-1暫暫匯令令9暫器 制入鑰出存指指鑰入存 控輸金輸儲微微金輸暫 回合引擎控制器 匯流排 58 Γ250450 1315匯流排 1317匯流排 1319匯流排 1321金鑰互斥邏輯電路 1323 S-box邏輯電路 1325第二暫存器暫存-1 1327第三暫存器 1402開始 1406清除位元 1410中斷處理 1502開始 1506 X位元已設定 1510設定192位元金鑰用之 回合引擎 1514密碼金鑰大小? 1518設定256位元金鑰用之 回合引擎 1522載入輸入區塊(再次) 並更新 1526儲存輸出區塊至記憶體 1530區塊計數器為0 1534完成 匯流排 匯流排 回合引擎 第一暫存器暫存-〇 位移邏輯電路 混合列邏輯電 金鑰大小控制器 中斷? 儲存架構性暫存器 完成 載入輸入區塊(預定· 者)並開始 載入控制字組並重置 載入/拓展金鑰排程 載入/拓展金输排程 載入/拓展金鑰排程 產生輸出區塊 更新區塊計數器及指_ 標 載入輸入區塊並開始 59器器器器器器器排排器存存存存存存汇汇暂存存字-1 suspend order order 9 temporary system entry key deposit finger key into deposit control deposit gold storage Pico gold transfer temporary round engine controller bus 58 Γ250450 1315 bus 1317 bus 1319 bus 1321 key mutual exclusion logic 1323 S-box logic 1325 second register temporary storage - 1327 third register 1402 start 1406 clear bit 1410 interrupt processing 1502 start 1506 X bit has been set 1510 set 192 bit key for the round engine 1514 password key size? 1518 sets the 256-bit key to use the round engine 1522 to load the input block (again) and update 1526 to store the output block to the memory 1530. The block counter is 0. 1534 completes the busbar bus round engine first register temporarily Memory-〇-shift logic circuit mixed column logic power key size controller interrupt? The storage architectural scratchpad finishes loading the input block (scheduled) and starts loading the control block and resets the load/expansion key schedule load/expansion gold load schedule load/expansion key row The process generates an output block update block counter and refers to the _ tag loading input block and starts 59

Claims (1)

1250450 含 包 其 置 裝之 : 算圍運範碼利密 #:行請執申種 係行 令執 指上 碼置 密裝 該算 ,*&quot;tt 令該 指在 碼於 密屬 一並 生, 產收 以接 用所 ,置 路裝 電算 令計 指一 碼為 密 密鑰 等金 該碼 定密 指個 令數 指複 碼定 密指 該令 中指 其碼 ,密 份該 部且 - 的者; 流一者 令之一 指算之 I 、一 ^ ΤΊ 之碼大 及 被包執 並路算 ,電運 路輯碼 電邏密 令行之 指執定 碼該指 密,被 該算在 至運以 合碼用 耦密, 上之器 算定制 運指控 在被小 ,行大 路執鑰 電以金 輯定一 邏設含 行 執 算 ^gc 運 碼 密 之 定 。指 小被 大中 鑰其 金, 碼置 密裝 之之 定項 指1 被第 用圍 使範 間利 期專 行請 申 如 2. 含 包 更 加 塊 區 文 明 個 數 複 對 含 包 算 運 密 加 該 算 il 密 加 碼 密 之 定 指 被 中 其 置 裝 之 述 所 項 第 , 圍 算 範 ^g^ 之 密 加。 以塊 區 文 密 個 數 複 之 應 對 生 產 以 利含 專包 請更 申算 口 女運 3. 加 鑰 塊 金 區 碼 文。密 密塊之 個區定 數文指 複明被 對個中 含數其 包複, 算之置 運應裝 密對之 解生項 該產1 ,以第 算,圍 運算範 密運利 解之專 一密請 解申 以如 4· 元第 位圍 8範 2 1利 為專 可請 小申 大如 5· 元第元 位圍位 2範 9 1利 含專含 包請包 小申小 大如大 6. 6 5 2 項 項 鑰 金 碼 密 之 定 指 被 中 其 置 裝 之 鑰 金 碼 密 之 定 指 被 中 其 置 裝 之 算 f4el-一 碼 密之 定 匕曰 器 制 控 κ、 大 鑰 金 被 該 —^1 ο 1ΦΙ 其法其 5/ΓΛ-异 5 置演置 裝準裝 之標之 項密項 1 加 1 第式第 圍階圍 範進範 利依利 專係專 請行請 申執申 如的如 7.8. 鑰 金 一 的 中 組 字 制 控 - 之 考 參 所 令 指 碼 密 該 譯。 解位 用小 被大 第式 圍格 範令 利指 專6 8 請X 申依 如係 9. 第數 圍複 範中 利置 專裝 請算 申計 如 定 該 預 考 之 參 令 令 指 指 密 密 該 該 中 中 其 其 置 置。 裝 裝器 之 之存 項 項暫 1 〇 60 1250450 一,位區等 一,位輸在之 含標體字該 含標體個為生 包指憶文成 包指憶數係產 器一記入以 器二記複塊所 存第一輸用 存第二之區算 暫一第個被 暫一第應字運 等含該數係 等含該對文碼 該包,複塊 該包,存出密 中容址對區 中容址儲輸之 其内位以字 其内位以個定 ,之體用文 ,之體用數指 置器憶,入 置器憶,複被 裝存記置輸 裝存記置之行 之暫一位等 之暫二位應執 項一第體該 項二第體對塊 10第一憶中10第一憶等區 第該向記其 第該向記該字 圍,指一, 圍,指二,文 範器標第取。範器標第塊入 利存指一存算利存指一區輸 專暫一定行運專暫二定字個 請一第明進碼請二第明文數 申第該址塊密申第該址出複 如 如 一文 一,位密 包數 含入 含標體之 料多 包輸 包指憶定 資該 器個 器三記指 鑰, 存數 存第三被 金元 暫複 暫一第成 碼位。 等出 等含該完 密個定 該指 該包,取 該數而 中容 中容址存 中多小 其内 其内位以 其含大 ,之 ,之體用。,包输 置器 置器憶,料置输金 裝存 裝存記置資裝金碼 之暫。之暫三位鑰之碼密 項三塊項四第體金項密之 10第區10第一憶碼14該定 第該個第該向記密第,指 圍,幾圍,指三之圍鑰被 範器某範器標第需範金依 利存之利存指一所利碼係 。專暫中專暫三定算專密元 果請三塊請四第明運請一位 結申第區申第該址碼申含個 如如 如1250450 Included in the package: Calculate the code of the code of the code. #:行, please apply the stipulations of the order, the code is set to the secret, the *&quot;tt makes the finger in the code , the output is used to pick up the place, the way to install the electricity calculation order refers to a code for the secret key, etc. The code is fixed to the number of orders, the code refers to the code, the code refers to the code, the code refers to the code, the secret part of the One of the flow ones refers to the I, the size of the code, and the code of the package, and the circuit code of the electric code is called the code. The code is combined with the code, and the device is calculated as a custom-made accusation in the small, the road to the key to the power of the gold to set a logic to set the line to calculate the ^gc code. Refers to the small key to the gold key, the fixed value of the code is 1 is used by the first use of the inter-fan profit period, please apply for the same as 2. The package contains more blocks of civilized number of complexes Adding the calculation il 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密 密In the block area, the number of documents is the same as the number of copies, and the corresponding package is included. Please calculate the port number. The fixed number of the block of the dense block refers to the recovery of the number of the package, and the calculation of the shipment should be carried out. The production of the product should be the same as the settlement of the product. Please apply for a copy such as 4· Yuan Diwei 8 Fan 2 1 for the special only please Xiao Shen Da as 5 · Yuan Diyuan position 2 Fan 9 1 Li with special package please Xiao Shen Xiaoda as big 6. 6 5 2 Item Key Key Code is the key to the key code that is placed in it. The f4el-a code-fixed device is controlled by κ, the key jin is The -^1 ο 1ΦΙ The method of its 5/ΓΛ- 异5 The installation of the standard item of the item 1 plus 1 The first type of circumference of the Fan Jin Fan Liyi special department please apply Such as the 7.8. Key Jinyi's middle group word control - the reference to the code refers to the code. The dismissal is used by the small quilt. The syllabus is for the purpose of the stipulation. The dense part of the middle is placed. The storage item of the loader is temporarily 1 〇 60 1250450 one, the bit area is equal to one, the bit is contained in the mark body word, the mark body is the raw package, the memory is the package, the memory is the memory, and the memory is recorded. The second storage block of the second record is stored in the second zone, and the first one is temporarily replaced by the first word, and the package containing the pair of codes, such as the number, is used to store the package, and the package is stored. The address of the address in the area is stored in the space, and the internal position is determined by the word. The body uses the text, and the body uses the number finger to recall, the input device recalls, and the complex is stored and recorded. The first two digits of the temporary account, such as the first one, shall be the first entity, the second body, the first memory zone, the first memory zone, the first memory zone, the first memory zone, and the first One, the circumference, the second, the text of the instrument is taken. The standard of the instrument is the first to enter the profit. The first place is the first place. The first part of the code is for the first time. The reproduction is as good as one, the number of the secret packets is included in the material containing the standard, and the multi-packet refers to the three-point key of the device, and the third is stored by the gold. Bit. Waiting for the end, etc., including the end of the secret, the reference to the package, take the number and the medium-sized address is stored in the small size, and its internal position is used for its large size. The package insulator recalls that the material is stored in the deposit and the deposit is stored in the deposit. The temporary three-digit key code secret item three items four body gold item secret 10th district 10 first memory code 14 the first of the first to the memory of the first, refers to the circumference, refers to the circumference, refers to the three The key is used by the standard device. Special temporary secondary school temporary three fixed secret yuan, please ask three, please ask for a fourth letter, please apply for a settlement. 包 一,位該起密 一 ,位 料 含標體含一之 含標體 資 包指憶包含定 包指憶 鑰 器四記置包指 器五記 金 存第四位容被 存第五 碼 暫一第體内成 暫一第 密 等含該憶之完 等含該 該 該包,記應以 該包, 中。中容址四對用 中容址 其程其内位第置, 其内位 ,排,之體該位者 ,之體 置输置器憶,量效 置器憶 裝金裝存記置向等 裝存記 之碼之暫四位始之 之暫五 項密項五第體起量 項六第 14之10第一憶該向10第一 第生第該向記,始 第該向 圍產圍,指四置起 圍,指 範者範器標第位該 範器標 利用利存指一量或。利存指 專使專暫四定向量算專暫五 請一請五第明始向運請六第 申含申第該址起始碼申第該 如如 如 61 1250450 組指一 字被含 制定包 控預組 一組字 取字制 存制控 以控該 用該中 ,中其 址其且 位,, 體算數 憶運參 己馬馬 言 石'石' 五密密 第之的 一定算 定指運 明被碼 以成密 用完之 址以定 被大 定之 明時 以行 定執 設算 被運 位碼 欄密 小之 大定 鑰指 金被 該在 、 位大 欄鑰 小金 大碼 鑰密 金之 匕曰 定 包入應 路輸對 電個生 輯數產 邏複以 行對, 執以合 該用回 中定碼 其設密 ,被個 置元數 裝單複 之碼行 項密執 1該者 第,一 圍元每 範單之 利碼塊 專密區 請一字 文 如 碼提 密被 之組 定字 指制 被控 中該 其中 ,其 者, 一定 每預 之所 塊組 區字 字制 文控出一 輸為 個小 數大 複鑰 之金 器 制: 控含 小包 大其 鑰, 金置 該裝 中之 元算 單運 碼碼 密密 該行 予執 供種 1 20. 接一 在之 定算 設運 被碼 元密 單等 碼該 密行 該執 ,後 中令 置指 裝碼 一密 於一 位之 ,内 元流 單令 碼指 密一 一收 碼金 密之 該用 且使 ,所 算算 ilil 碼碼 密密 之之 定定 指指 被被 定行 預執 流於 令當 指一 該定 中預 其亦 ,令 者指 時 單算 碼運 密碼 該密 於之 合定 耦指 地被 算行 f一£》 係在 ,置 路裝 電該 輯令 邏以 制定 及控設 ;小被 小大並 大鑰, 鑰金元 置 裝 之 項 。20 小第 大圍 输範。 金利元 該專位 用請 使申 如 21. 8 置 裝 之 項 20 第 圍 範。 利元 專位 請 中 如 2. 2 9: 1X 其 其 含 包 小 大 鑰 金 該 中 含 包 \ IJ / 大 鑰 金 該 中 含 包 大 鑰 金 該 中 其 置 裝 之 項 20 第 圍 範。 利元 專位 請6 5 申2 如 3. 2 算 ¾ 碼 密 之 定 指 被。 中法 其算 置準 裝標 之密 項加 20式 第階 圍進 範依 利係 專行 請執 之 如 24. 37隹一 ΊηΊ €牵 制控 控之 小考 大參 输令 金指 該碼 中密 其該 ,為 置一。 裝在位 之一欄 項譯小 20解大 第以餘 圍定金 範設一 利被的 專路中 請電組 申輯字 如 5. 2 碼 密 該 , 中 法 其 方 , 之 置 算 裝 運 之。碼 項式密 20格行 第令執 圍指中 範6置 8 利X裝 專該一 請依在 申係種 如 一 6.7. 2 2 定 預 之 令 匕曰 步 列 下 含 包 其 之 算 f&amp;c· 碼 密 個 數 複 定 預 令 指 碼 密 該 令 指 碼 密 - ••收 驟接 目,,;J〆^ 62 1250450 大 鑰 金 碼 密 及該 ;用 小使 大時 鑰算 金運 密密 之之 間定 期指 行被 執行 者執 一在 經以 含位 包攔 驟一 步的 收中 接組 該字 中制 其控 ,之 法考 方參 之令 項指 27碼 第密 圍該 範為 利一 專在 請一 申由 如 8. 2 預 含 包 驟 步 定 明 該 中 其 ο , 驟置 步裝 之之 小項 大28 碼第 密圍 鑰範 金利 該專 定請 明申 如 9. 2 預 含 包 驟 步 定 明 該 中 。其 、^7 , 大置 鑰裝 金之 碼項 密28 該第 為圍 元範 位利 8專 2 1請 定申 如 0. 3 預 含 包 驟 步 定 明 該 中 。其 , 大置 鑰裝 金之 碼項 密28 該第 為圍 元欣耗 位利 2專 9 1請 定申 如 依 含 包。 驟算 步運 用碼 使密 該之 中定 。其指 小,被 大置行 鑰裝執 金之法 碼項算 密27演 該第準 為圍標 元範密 位利加 6專式 5 2 主月皆 古口 β— 定申進 如 2. 3 依 含 包 驟 步 收 接 該 中。 其令 ,指 置碼 裝密 之該 項定 27預 第式 圍格 範令 利指 專6 8 請X 申該 如 63Package one, the position of the secret one, the bit material contains the standard body containing the standard body package refers to the inclusion of the fixed package refers to the key device four records the package finger five records gold deposit fourth position is stored the fifth code The temporary body is temporarily replaced by a first secret, etc., including the end of the recall, etc., and the package is included in the package. The medium address has four pairs of medium-sized addresses, and its internal position is set. The inner position, the row, the body of the person, the body placement device recall, the volume effect device recalls the gold storage record, etc. The first five items of the first four items of the first four items of the first four items of the first record of the first record of the first record to the first place , refers to the four sets of the circumference, refers to the standard of the instrument, the standard of the instrument, the use of profit refers to a quantity or. Li Shou refers to the special temporary four-fixed vector calculations, the special five, one, five, the first, the first, the sixth, the application, the sixth, the application, the application, the starting code, the application, the same as the 61 1250450 group, the word is included in the package Control a group of words to take the word system to control the use of the middle, the location of its location, the calculation of the number of memory, the participation of the horse Ma Yanyan stone 'stone' five secrets of the certain calculations When the code is used to be used as a densely-packed address, it is determined by the line to be settled. The large-size key of the transport code column is used to be the key. The big key is the key. The 匕曰 包 包 包 包 输 输 输 输 对 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 个 , , , , , , , , , , , The person, the first area of the yuan, the special code area of the code block, please use a word, such as the code to be secretly controlled by the group of words, the one of which is controlled by the group. The word system controls the loss of a small number of large keys to the gold system: the control contains the small package and its key, the gold is placed in the package. The single code code is dense and the line is given to the seed 1 1. One of the final calculations is the code, the secret code and the like, the secret line is executed, and the middle order is set to one size. The inner stream single order code refers to the use of the secret one-to-one code, and the determined ilil code code is determined to be pre-executed by the order. It is also the case that the operator refers to the time-coded code of the password, which is the combination of the fixed-coupling and the calculation of the line f-£", and the set-up power is used to make and control the set; The key, the key element is installed. 20 small Di Dawei loses the van. Jin Liyuan This special position should be used to make the application of the second paragraph. In the case of Li Yuan, please refer to 2. 2 9: 1X, which contains a small key, which contains the package \ IJ / Key Key, which contains the package key, which is the item of the package. Li Yuan Special Position Please 6 5 Shen 2, such as 3. 2 Calculate 3⁄4 code. China and France are the key items of the standard binding and the 20th type of encirclement into the Fan Yili department. Please wait for 24. 37隹一ΊηΊ. The control of the small control of the big control is the key to the code. It should be set to one. Installed in one of the columns, the translation of the small 20 solution, the first section of the deposit, the set of funds, the set of the special road, please call the group to write a word such as 5. 2 code secret, the Chinese and French, the calculation of the shipment . Code item type secret 20 grid line order to hold the index in the standard 6 set 8 Lee X installed special one should follow the application system such as a 6.7. 2 2 set the order to include the calculation of the package f&amp; c· Code number of the number of pre-orders, the code refers to the code, the code refers to the code--••收接目,,;J〆^ 62 1250450 The key is the key code and the key; Between the regular execution, the person in charge of the execution is controlled by the word in the block with the block of the bit, and the test of the law refers to the code of 27 yards. One special in the application of a request such as 8.2 pre-packaged step by step to specify the ο, the step of the step of the small item big 28 yards the first secret key Fan Jinli the special order please Ming Shen as 9. 2 The pre-packaged step is specified in the middle. Its, ^7, the key code of the large key loading gold key 28 The first is the square yuan position profit 8 special 2 1 Please apply for the declaration. For example, the pre-packaged step is specified in the middle. Its, the key to the key of the gold key, the secret 28, the first for the yuan, the consumption of the bite 2 special 9 1 please apply for the package. The initial step is to use the code to make the secret. It refers to the small, the code of the key to the key of the big-handed key account, the number of the secrets, the performance of the standard, the standard, the standard, the secret, the position, the privilege, the privilege, the genre, the genus, the genus, the genus, the Step by step to pick up the middle. The order of the code is fixed. The pre-formation of the code is pre-existing.
TW93134765A 2004-04-16 2004-11-12 Microprocessor apparatus and method for providing configurable cryptographic key size TWI250450B (en)

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TWI707247B (en) * 2018-12-28 2020-10-11 中華電信股份有限公司 Data security system and operation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI460592B (en) * 2008-04-03 2014-11-11 Nagravision Sa Security module for audio/video digital data processing unit and method for receiving audio/video content
TWI707247B (en) * 2018-12-28 2020-10-11 中華電信股份有限公司 Data security system and operation method thereof

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