1247348 五、發明說明（1) 【發明所屬之技術領域】 本發明係有關一種 種利用壓縮應變及黏 ^體^件的製造方法，尤指一 製造方>去。 滞怒基板而製造二維皺曲量子井層的1247348 V. INSTRUCTION DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a manufacturing method using a compressive strain and a vulcanizing member, and more particularly to a manufacturer> Manufacturing a two-dimensional buckling quantum well layer by stagnation of the substrate
【先前技術J 已知梦之晶格常數 長一與矽晶格常數不同:里所、袓因此若在矽材接面處成 產生缺陷的條件下， 二貝;斗，且在兩材料接面處不 同程度之應變。因為依相對厚度不同而產生不 由控制鍺的摻雜、農^ ' 吊數約比矽大4%，所以可藉 /雜/辰度，而線性調萼石々 小，因此矽鍺合金為當 3金之晶格常數大 當將矽與矽鍺合金相姓人㈣丄交社之材枓。 數較石夕之晶格常數A *二口 $，由於矽鍺合金之晶袼常 相對的，lit 因此石夕材受拉伸應力產生應變； 矽鍺人冬f 晶格常數較矽鍺之晶格常數為小，因此 到，縮應力而產生應變。欲受應力應變之材 炉又° ’、目對厚度較薄之平板薄膜，係透過低溫成長製 ，:以製做可以承受應力應變之基材。當受應力應變之平 ^薄膜經產生缺陷而釋放其應力應變時，則會變為未受應 變或鬆弛的平板薄膜。 當把應變矽（strained Si)技術結合絕緣石夕 (SiliCon-on—Insulat〇r，s〇i)技術而成為絕緣矽鍺 (Silicon Germanium-on-Insulator，SG0I )或絕緣應變 石夕（Strained Silicon-on-Insulator，SSOI )基板時， 可同時獲得上述兩技術之優點。事實上，Intel公司已將 第5頁 Ϊ247348 、發明說明（2) 應 中 變 的 载 變石夕技術用於其90 nm製程節點（technology node) ’而IBM公司更是認為絕緣矽鍺（SG0I)基板或絕緣應 ♦( SS0 I )製程可望成為下一代製程方法的主流。 要之技術，如H· Yin (J.Appl· Phys· 91，9716，2002 ) 與Κ· D· Hobart (J· Electron· Mater· 29， 897， 2 0 0 0 )等人的相關論文已於國際期刊中相繼發表討論。本 發明利用應力應變之釋放機制，成功在半導體基板上形成 一維鈹曲量子井層。 因為相關製程技術多為利用將矽與其他不同晶格常數 材料（如矽鍺混合物）鍵結以對矽施予應力，因此作為 子通道之薄膜材料的應力應變分析與應用已成為相當重 職是之故，本案創作人經悉心之研究，並本鍥而不捨 的精神’終創作出本案之『二維皺曲量子井的製造方 法』〇 【發明内容】 本案之主要目的在於利用成長受應力應變之彈性平板 f膜，經應力釋放後，在半導體基板上形成二維皺曲量子 根據本案之構想，提供了一種二維皺曲量子井的製造 ，包含下列步驟：（&)提供—第一基板；（b)於該第一 長一半導體層，該半導體層的材質與第-基板的 #貝^八，（c)於該半導體層上成長一第一覆蓋層，遂形 成一第一晶圓結構4d)對該第—晶圓結構進行離子佈[Prior Art J It is known that the lattice constant of dreams is different from the lattice constant of 矽: 里, 袓, therefore, if it is in the condition of the defect at the junction of the coffin, the two shells; the bucket, and the junction of the two materials Different levels of strain. Because the relative thickness is different, the doping of the control 锗, the number of the cranes is about 4% larger than that of the 锗, so the 杂 杂 辰 辰 , , , 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂 杂The lattice constant of gold is large when the 矽 and 矽锗 alloys are surnamed (4). The number of lattice constants of Shi Xi is A * two mouths, because the crystal 袼 of the bismuth alloy is often opposite, lit so that the stone material is strained by tensile stress; the lattice constant of the 冬人冬f is higher than that of the crystal The lattice constant is small, so that strain is generated by shrinking stress. The plate to be subjected to stress and strain, and the flat film having a relatively small thickness, are made by low temperature growth, and are made of a substrate capable of withstanding stress and strain. When the stress-strain flat film releases its stress strain by generating a defect, it becomes a flat film that is not subjected to strain or relaxation. When the strained Si technique is combined with the SiliCon-on-Insulat〇r (s〇i) technology, it becomes a Silicon Germanium-on-Insulator (SG0I) or a strained silicon (Strained Silicon). When the -on-Insulator, SSOI substrate is used, the advantages of the above two techniques can be obtained at the same time. In fact, Intel has applied the 变 247 348 on page 5, the invention description (2) to the 90 nm process node, and IBM believes that the insulation 矽锗 (SG0I) The substrate or insulation ♦ ( SS0 I ) process is expected to be the mainstream of next-generation process methods. The relevant techniques, such as H. Yin (J. Appl. Phys 91, 9716, 2002) and Κ·D· Hobart (J. Electron Mater 29, 897, 2000) and others have been Discussions have been published in international journals. The present invention successfully forms a one-dimensionally tortuous quantum well layer on a semiconductor substrate using a stress-strain release mechanism. Because the related process technology mostly uses the bonding of bismuth with other different lattice constant materials (such as cerium mixture) to stress the enthalpy, the stress strain analysis and application of the thin film material as a sub-channel has become quite important. Therefore, the creator of this case has carefully studied the spirit and perseverance of the spirit of the final creation of the "two-dimensional wrinkle quantum well manufacturing method" 〇 [the content of the invention] The main purpose of this case is to use the elastic plate that grows under stress and strain The f film, after stress release, forms a two-dimensional wrinkle quantum on the semiconductor substrate. According to the concept of the present invention, a two-dimensional buckling quantum well is fabricated, comprising the following steps: (&) providing - a first substrate; b) in the first long semiconductor layer, the material of the semiconductor layer and the first substrate, (c) growing a first cladding layer on the semiconductor layer, and forming a first wafer structure 4d Ion cloth is applied to the first wafer structure
1247348 五、發明說明（3) ___ 植，形成一離子植入層；（e)提佴一 二基板上成長一第二覆蓋層，遂、第二基板；（f)在該第 (g)將第一與第二覆蓋層面對面對;|成一第二晶圓結構； 結構鍵結；（h)進行第一次高溫處理，一與第二晶圓 結構於該離子植入層產生分離；（，吏第一與第二晶圓 根據上述之構想，其申該第— 9 自單晶矽、多晶矽、非晶矽、鍺J第二基板之材質係選 四、五族元素其中之一。 ，以及其他第三、 根據上述之構想 根據上述之構想 鍺的比例為10%。 根據上述之構想 時呈黏滯態。 根據上述之構想 破璃。 根據上述之構想 SL離子。 根據上述之構想 :ί半導體層係為矽鍺層。 ’八〜石夕錯層中矽的比例為9〇% ’ 八中該第一覆蓋層的特性為在高溫 其中第-與第二覆蓋層係為硼磷矽 其中該離子佈植所使用之離子係為 .…十& Α〜傅涊，其中進行該離子佈植時， 入於該第一基板或該半導體層内。 糸植 方式：fif之構想’纟中該第一與第二晶圓結構鍵結的 乃A係為直接鍵結。 方式係為利用黏滯層以幫助鍵結。 …的 :艮據上述之構想，纟中該第一與第二晶圓結1247348 V. Description of invention (3) ___ planting, forming an ion implantation layer; (e) growing a second cover layer on the substrate, 遂, the second substrate; (f) in the first (g) The first and second cover layers face each other; a second wafer structure; a structural bond; (h) a first high temperature process, and a second wafer structure is separated from the ion implant layer; The first and second wafers are based on the above concept, and the material of the second substrate of the single crystal germanium, polycrystalline germanium, amorphous germanium, and germanium J is selected from one of the four or five elements. Others According to the above concept, the ratio of the above concept is 10%. According to the above concept, it is in a viscous state. According to the above concept, the glass is broken. According to the above concept, the SL ion is based on the above concept: The layer is a bismuth layer. The ratio of 矽 in the 'eight~ shi xia layer is 9〇%'. The characteristics of the first layer in the eighth layer are at high temperature, wherein the first and second layers are borophosphonium. The ion system used in ion implantation is ....10 & Α~ Fu 涊, which is carried out In the case of ion implantation, it is incorporated into the first substrate or the semiconductor layer. The implantation method: the concept of fif, in which the first and second wafer structures are bonded, the A is a direct bond. Use a viscous layer to help bond. ...: According to the above concept, the first and second wafer junctions
1247348 五、發明說明（5) 一基板的材質相異；（C)於該半導體層上成長一第一覆蓋 層，遂形成一第一晶圓結構；（d)對該第—晶圓結構進行 離子佈植，形成一離子植入層；（e)提供一第二基板；（f) 在該第二基板上成長一第二覆蓋I，遂形成一第二晶圓結 構；（g)將第一與第二覆蓋層面對面對準，使第一與第二 晶圓結構鍵結；（h)以及進行高溫處理，使第一與第二晶 圓結構於該離子植入層產生分離’並且在分離的表面·上0曰產 生二維皺曲量子井層。 ，據上述之構想，其中該第一及第二基板之材質係選 自早阳矽、多晶矽、非晶矽、鍺化矽，以及其他第三、 四、五族元素其中之一。 根據上述之構想 根據上述之構想 鍺的比例為10%。 根據上述之構想 時呈黏滞態。 根據上述之構想 破璃。 根據上述之構想 氫離子。 根據上述之構想，其中進行該離子佈植 入於該第一基板或該半導體層内。 係植 根據上述之構想，其中該第一與第二晶 方式係為直接鍵結。 結構鍵結的 ，其中該半導體層係為矽鍺層。 ’其中該矽鍺層中矽的比例為90%， 其中該第二覆蓋層的特性為在高溫 其中第與覆蓋層係為蝴雄石夕 其中該離子佈植所使用之離子係為1247348 V. Description of the invention (5) The material of a substrate is different; (C) growing a first cover layer on the semiconductor layer to form a first wafer structure; (d) performing the first wafer structure Ion implantation, forming an ion implantation layer; (e) providing a second substrate; (f) growing a second cover I on the second substrate, forming a second wafer structure; (g) One surface alignment with the second cover layer to bond the first and second wafer structures; (h) and high temperature processing to cause the first and second wafer structures to separate from the ion implantation layer The separated surface·top 0曰 produces a two-dimensional buckling quantum well layer. According to the above concept, the materials of the first and second substrates are selected from the group consisting of early impotence, polycrystalline germanium, amorphous germanium, antimony telluride, and other elements of the third, fourth, and fifth elements. According to the above concept, according to the above concept, the ratio of 锗 is 10%. It is viscous according to the above concept. According to the above concept, the glass is broken. According to the above idea, hydrogen ions. According to the above concept, the ion cloth is implanted in the first substrate or the semiconductor layer. Planting According to the above concept, the first and second crystal modes are direct bonding. Structurally bonded, wherein the semiconductor layer is a tantalum layer. Wherein the proportion of bismuth in the enamel layer is 90%, wherein the characteristic of the second covering layer is at a high temperature, wherein the first covering layer is a tussah, wherein the ion system used for the ion implantation is
第9頁 1247348 五、發明說明（7) 層，遂形成一第二晶圓結構；（f )將第一與第二晶圓結構 面對面對準，使第一與第二晶圓結構鍵結；（g)進行第一 次高溫處理，使第一與第二晶圓結構於離子植入層產生分 離；（h )以及進行第二次高溫處理，以在分離的表面上產 生二維皺曲量子井層。 根據上述之構想，其中該第一及第二基板之材質係選 自單晶矽、多晶矽、非晶矽、鍺化矽、以及其他第三、 四、五族元素其中之一。 根據上述之構想，其中該半導體層係為矽鍺層。 根據上述之構想，其中該矽鍺層中矽的比例為90%， 鍺的比例為10%。 根據上述之構想，其中該覆蓋層的特性為在高溫時呈 黏滯態。 根據上述之構想，其中該覆蓋層係為硼磷矽玻璃。 根據上述之構想，其中該離子佈植所使用之離子係為 氫離子。 根據上述之構想，其中進行該離子佈植時，離子係植 入於該第一基板或該半導體層内。 根據上述之構想，其中該第一與第二晶圓結構鍵結的 方式係為直接鍵結。 根據上述之構想，其中該第一與第二晶圓結構鍵結的 方式係為利用黏滯層以幫助鍵結。 根據上述之構想，其中該第一次高溫處理的溫度範圍 為400 °C 至 1000 °C。Page 9 1247348 V. Invention Description (7) Layer, 遂 forming a second wafer structure; (f) aligning the first and second wafer structures face to face, bonding the first and second wafer structures; (g) performing a first high temperature treatment to separate the first and second wafer structures from the ion implantation layer; (h) and performing a second high temperature treatment to generate a two-dimensional wrinkle quantum on the separated surface Well layer. According to the above concept, the materials of the first and second substrates are selected from the group consisting of single crystal germanium, polycrystalline germanium, amorphous germanium, germanium telluride, and other elements of the third, fourth, and fifth elements. According to the above concept, the semiconductor layer is a tantalum layer. According to the above concept, the proportion of ruthenium in the ruthenium layer is 90%, and the ratio of ruthenium is 10%. According to the above concept, the characteristics of the cover layer are in a viscous state at a high temperature. According to the above concept, the cover layer is borophosphon glass. According to the above concept, the ion system used for the ion implantation is a hydrogen ion. According to the above concept, in the ion implantation, the ion system is implanted in the first substrate or the semiconductor layer. According to the above concept, the manner in which the first and second wafer structures are bonded is a direct bond. According to the above concept, the first and second wafer structures are bonded in a manner that utilizes a viscous layer to aid in bonding. According to the above concept, the temperature of the first high temperature treatment ranges from 400 °C to 1000 °C.
1247348 五、發明說明（ίο) 熱至2 5 0 C維持2 0小時以加強晶圓 如第一圖⑷所#。 曰曰目鍵、，之強度，鍵結結果 繼續將鍵結後的晶圓置 , 夏於座力同為一大氣壓的氮氣洚 化（purge)的環境中，升高溫度至6〇(rc，維， 使結合後的整個晶圓，在氫齙 、、、刀鐘’ 氧離子佈植介面1〇6處產生晶圓 分離，形成分離後的第一美q彳命八μ μ 生日日Η ‘Μ —闰r基板31與分離後的第二基板32， 如第一圖（e)所示。此時以原子力顯微鏡（At〇mic F〇 M1Cr〇sc〇pe，AFM)觀察分裂後的表面3ιι，結果如 所示，其粗糙度為10.26 nm (RMS )。 一囷 後的高溫處理步驟中，為了能夠順利使矽鍺層鬆 二曰先進行分裂矽層薄化。矽層薄化的方式有兩種，一 種是化學溶液蝕刻法，另一種是化學機械研磨法 (CMP )、。化學溶液蝕刻法可以使用濃度為1〇%的氫氧化鉀 (KOH^)溶液作為蝕刻液；將分離後的第一基板31浸於ι〇% 的氫氧化鉀溶液中1 〇分鐘，該氫氧化鉀溶液在室溫下的蝕 刻，率約為37 nm/min。接著，再將已經薄化的矽層，置 入壓力為一大氣壓、氮氣淨化（purge)並通以1〇〇〇 sccin ^(Standard Cubic Centimeter per Minute (cm3/min)) 氧氣的環境中，進行960 °c之高溫退火30秒以上，其結果 如第一圖（f)所示。在進行至少30秒的960 °C高溫退火處 理之後，原本的硼磷矽玻璃（BPSG ) 202以及104會變成半 狀態、石夕保護覆蓋層（cap layer) 103變成皺曲的Si 保護覆蓋層312、矽鍺層102變成無應變皺曲矽鍺層313， 並且分裂後的表面311變成二維皺曲量子井層314。至此便 第14頁 1247348 五、發明說明（12) f =圖為以原子力顯微鏡（AFM)觀測本發明之二維 :::子井所得的平面與立體觀測圖。經由綱測量，可 確^ —維皺曲量子井層成功地形成在 (0 0 1 )基板則形成< 1 〇 〇 >方向組皺曲量子井。_ 立矣ίί，依本發明製程步驟所完成之二維皺曲量子井， =呈現凹凸不平的狀態；若以原子力顯微鏡（AFM) = 粗糙度，並以表面粗糙度對加熱時間作圖，可 二」如第二圖所示的圖形。由第三圖中可得知，二維皺 Β =0子井之表面粗糙度（振幅）隨加熱時間增加而增加， 且於960。(：加熱約30秒後會形成較明顯之皺曲量子井。 夕ί柩Ϊ加熱時間#續增 >，二維皺曲量子井之表面粗糙度 C振幅）增加漸緩而趨近飽和穩定。 再者，對本案之二維皺曲量子井進行拉曼位移 (Raman shi ft )測量分析，並對加熱時間做圖，即可得 到如第四圖所示的圖形。以羅倫茲模型（Lorenhian 1 )分析模擬該拉曼波形，可得知應變矽鍺層隨加埶 =間增加而逐漸釋放其應力應變，於96〇t加熱約3〇秒& 曰1成較明顯之拉曼位移。與第三圖相較，可得知二維皺 :ΪI:確由矽鍺層在半熔融態硼磷矽玻璃上施放應力應 變所形成。 本發明利用硼磷矽玻璃（BPSG )在8〇〇 t以上 半黏滯^態之特性，提供在基板上成長受壓縮應變之^夕為錯 層。經高溫處理，呈黏滞態基板上之受壓縮應變之平 膜欲橫向伸展以釋放晶格應力’但是遭呈黏滞態之基板施 1247348 圖式簡單說明 第一圖（a ) - ( f )係為本案較佳實施例之二維皺曲量子井之 製程流程圖。 第二圖係為以原子力顯微鏡（AFM )觀測本案之二維皺曲 量子井表面所得之結果。 第三圖係為本案之二維皺曲量子井表面粗糙度與加熱時間 之關係圖。 第四圖係為本案之二維皺曲量子井的拉曼位移羅倫茲模型 與加熱時間之關係圖。 元件符號說明 10 寄生晶圓 1 0 2矽鍺層 1 0 4硼磷矽玻璃 1 0 6 氳離子佈植介面 202硼磷矽玻璃 3 1 2皺曲的矽保護覆蓋層 314二維皺曲量子井層 1 0 1 矽基板 103矽保護覆蓋層 105 氫離子 20 承載晶圓 2 0 1 矽基板 31 分離後的第一基板 3 11 分裂後的表面 3 1 3無應變皺曲矽鍺層 32 分離後的第二基板1247348 V. INSTRUCTIONS (ίο) Heat to 2 50 C for 20 hours to strengthen the wafer as shown in the first figure (4). The strength of the key, the strength of the bond, the bonding result continues to place the bonded wafer, and the temperature is increased to 6 〇 (rc, in the environment of a helium atmosphere with an atmospheric pressure of one atmosphere). Dimensions, so that the entire wafer after the bonding, in the hydroquinone,, knife knives 'oxygen ion implantation interface 1 〇 6 to generate wafer separation, the formation of the first beauty after the separation of eight μ μ birthday day Η ' Μ 闰 r substrate 31 and the separated second substrate 32, as shown in the first figure (e). At this time, the split surface 3 is observed by an atomic force microscope (At〇mic F〇M1Cr〇sc〇pe, AFM). As shown in the figure, the roughness is 10.26 nm (RMS). In the high-temperature treatment step after the enthalpy, in order to smoothly make the bismuth layer, the bismuth layer is thinned first. Two kinds, one is chemical solution etching, the other is chemical mechanical polishing (CMP). The chemical solution etching method can use a concentration of 1% by weight of potassium hydroxide (KOH^) solution as an etching solution; The first substrate 31 is immersed in a 〇% potassium hydroxide solution for 1 , minutes, and the potassium hydroxide solution is at room temperature. Etching, the rate is about 37 nm / min. Then, the thinned layer of tantalum is placed at a pressure of one atmosphere, purged with nitrogen and passed through 1 〇〇〇 sccin ^ (Standard Cubic Centimeter per Minute (cm3) /min)) In an oxygen atmosphere, high temperature annealing at 960 °c for more than 30 seconds, the results are shown in Figure (f). After at least 30 seconds of 960 °C high temperature annealing, the original boron phosphorus The bismuth glass (BPSG) 202 and 104 become a half state, the cap layer 103 becomes a wrinkled Si protective cover layer 312, and the ruthenium layer 102 becomes an unstrained wrinkle 矽锗 layer 313, and after splitting The surface 311 becomes a two-dimensional buckling quantum well layer 314. Up to now, page 14 1247348 V. Description of the invention (12) f = The figure shows the two-dimensional observation of the present invention by atomic force microscopy (AFM)::: And the stereoscopic observation map. Through the measurement, it can be confirmed that the dimensionally well-formed quantum well layer is successfully formed on the (0 0 1) substrate to form the <1 〇〇> direction group wrinkle quantum well. _ 立矣ίί, According to the two-dimensional crimped quantum well completed by the process steps of the present invention, = concave In an uneven state; if the atomic force microscope (AFM) = roughness and the surface roughness is plotted against the heating time, the pattern shown in the second figure can be obtained. As can be seen from the third figure, the two-dimensional wrinkle表面 =0 The surface roughness (amplitude) of the well increases with the increase of heating time, and is 960. (: After heating for about 30 seconds, a relatively obvious wrinkle quantum well is formed. 夕ί柩Ϊ heating time # 续增 > ;, the surface roughness C amplitude of the two-dimensional crimped quantum well) increases gradually and approaches saturation stability. Furthermore, the Raman shi ft measurement analysis of the two-dimensional crimped quantum well of the present case and the drawing of the heating time can be obtained as shown in the fourth figure. By simulating the Raman waveform with the Lorenhian 1 model, it can be seen that the strain enthalpy layer gradually releases its stress strain with increasing 埶, and heats it at about 96 〇t for about 3 & amp 成More obvious Raman shift. Compared with the third figure, it can be seen that the two-dimensional wrinkles: ΪI: It is formed by the stress strain applied to the semi-molten borophosphon glass by the bismuth layer. The invention utilizes the characteristics of borophosphorus bismuth glass (BPSG) in a semi-viscous state above 8 〇〇 t, and provides a layer of growth and compression strain on the substrate. After high temperature treatment, the flat film of compressive strain on the viscous substrate is to be laterally stretched to release the lattice stress 'but the substrate is in a viscous state. 1247348 The schematic diagram briefly illustrates the first figure (a) - (f) The process flow chart of the two-dimensional crimped quantum well of the preferred embodiment of the present invention. The second figure is the result of observing the surface of the two-dimensional buckling quantum well of this case by atomic force microscopy (AFM). The third figure is the relationship between the surface roughness of the two-dimensional crimped quantum well and the heating time in this case. The fourth figure is the relationship between the Raman displacement Lorenz model of the two-dimensional crimped quantum well of this case and the heating time. Component Symbol Description 10 Parasitic Wafer 1 0 2矽锗 Layer 1 0 4 Boron Phosphorus Glass 1 0 6 氲 Ion Buried Interface 202 Boron Phosphorus Glass 3 1 2 Bucked 矽 Protective Cover 314 Two-dimensional Wrinkled Quantum Well Layer 1 0 1 矽 substrate 103 矽 protective cover layer 105 hydrogen ion 20 carrier wafer 2 0 1 矽 substrate 31 separated first substrate 3 11 split surface 3 1 3 no strain wrinkle 矽锗 layer 32 after separation Second substrate