TWI242895B - Package substrate of light-emitting diode - Google Patents

Abstract

A method for forming a package substrate of light-emitting diode is provided. The method includes the steps of providing a silicon substrate having a first side, a second side, and a plurality of through holes penetrating thereof; forming an insulating layer over the first side and the second side along with forming an insulating collar over the inner walls of the through holes by using plasma enhanced chemical vapor deposition (PECVD) technology; and then forming a conductive layer over the insulating layer and the insulating collar as well.

Description

1242895 IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to the packaging of light-emitting diodes, and particularly relates to a process technology using a silicon wafer as a packaging substrate. [Previous technology] At present, circuit boards such as FR4, or ceramic boards such as aI203, etc., have gradually failed to meet the requirements of some light-emitting diode elements that generate high heat. Therefore, in consideration of high heat resistance and high thermal conductivity, switching to a silicon wafer as a package substrate has become the latest development trend of the light emitting diode surface adhesive packaging technology. One disadvantage of using a silicon wafer as a package substrate is that the silicon itself is half of the moon and the surface must first be covered with an insulating layer, so that no leakage will occur between the electrode and the electrode during the subsequent fabrication stage. . The formation of the insulating layer on Shi Xiji is described in the prior art (such as in the Republic of China Patent Bulletin No., but it is a god-like person-containing oxygen or listening to a high temperature furnace to form the surface-mysterious layer can be used.) However, this technique can be used in the insulation of flat and fine soil to form a regular plate, but it often has defects such as incomplete coating or weak knots. 4

Li Ci 4EPITAXY / 04005TW, 930401TW 1242895 is due to the step coverage due to the small depth of the through hole aperture (Step

Coverage). This will cause the semiconductor silicon on the inner wall of the through hole to be exposed, and contact the conductive layer to be formed later, resulting in short circuits and leakage. Therefore, if a silicon substrate is used as a light-emitting diode package, the insulation of the inner wall of the through-hole of the silicon substrate must be improved first. [Summary of the Invention] The present invention is directed to a method for forming a packaging substrate for a light emitting diode, which includes providing a silicon substrate having a first surface, a second surface, and a plurality of through holes; Denso's enhanced PECVD technology forms an insulating layer covering the first and second faces, and simultaneously forms an insulating neck ring (Insulating co 丨 ar) covering the inner walls of the plurality of through holes. And then forming a conductive layer covering the insulating layer and the insulating neck ring. [Embodiment] FIG. 1 is a manufacturing flowchart of the first and second embodiments of the present invention. Figures 2 through 2 show sectional views of the silicon substrate at each step in the figure]. According to the first embodiment of the present invention, as shown in FIG. 2 (a), a stone evening substrate 210 with a thickness of about 100 is provided (step 11). Shixi substrate 210 has a first

Li Ci 4EPITAXY / 04005Tvv, 9304001TW 1242895-face 212 and-second face 214. Next, as shown in the outline, a plurality of through holes 220 are formed on the surface of the silicon substrate 21 by means of dry money engraving (R), wet chemical side or laser through holes, and the size of the holes is about 2 / m ~ 80 // m (as in step 13). Then referring to FIG. 2 (a), the first surface 212 and the second surface 214 of the silicon substrate 210 are covered with an insulating layer 230 by using electro-enhanced chemical vapor deposition (pECVD) technology, and at the same time, an inner wall of the through hole 220 is formed. Insulating neck ring 24o (as in step 15). It must be noted that the use of PECVD technology in this step is different from the conventional technology. Its main advantage is that at the same time as the insulation layer 230 and the insulation neck ring 24 are deposited, the plasma is also used to splash the insulation layer 230 and the insulation neck ring 240. The upper surface molecules make their distribution more uniform and the structure more dense, so they can completely cover the inner wall of the through hole 220 to form a good insulation. The effect of the plasma splash is related to the appearance ratio (aSpect Ratn) of the through hole 220. In this embodiment, the preferred thickness of the insulating neck ring 240 is between 2000A and 5000A, the thickness of the silicon substrate 210 is between 100 # m and 500 # m, and the through hole 220 When the pore size is between 20 // m and 80 // m, a better effect can be obtained. A second embodiment of the present invention will now be described, in which the first two steps (i.e., step 11 and step 13) are the same as the first embodiment. Formed in the plurality of through holes 220

Li Ci 4EPITAXY / 04005TW, 930401TW / 1242895 (that is, after step 13), the silicon substrate 210 is sent into a high temperature furnace containing a reaction gas, which may be oxygen, atmosphere, ammonia, water or a certain proportion The mixed gas of the aforementioned gases covers the first surface 212 and the second surface 214 of the Shixi substrate 210 with an insulating layer 230 containing an oxide or a nitride (step 17). It must be noted that an insulating neck ring 240 is also formed on the inner wall of the through-hole 220 at the same time when step 17 is performed. However, this insulating neck ring 240 cannot completely cover the inner wall of the through-hole 22 and will cause subsequent leakage. produce. Therefore, after the Shixi substrate 21 is sent to the high-temperature furnace for reaction, the insulating neck ring 240 must be treated with plasma enhanced chemical vapor deposition (pECVD) technology so that the insulating neck ring 24 is evenly distributed in the plurality of through holes. The inner wall of the hole 220 to prevent the inner wall from being exposed (as in step 19). In the second embodiment, the PECVD processing step may be performed only on the insulating neck ring 240 that is prone to leakage defects. Compared with the first embodiment, it can save the operating time of the PECVD 'other than that'. The preferred conditions such as the hole size of the through hole 22Q and the thickness of the insulating neck ring 240 are similar to those of the first embodiment. In the next steps, the first embodiment and the second embodiment are the same. Referring to FIG. 2 (d) and step 12, a conductive layer 250 is formed to cover the insulating layer 230 and the insulating neck ring 240. The conductive layer 250 may be any metal material, and besides covering the insulating layer 230 and the insulating neck ring 240, Further filling a plurality of through holes 22

Lici 4EPITAXY / 04005TW, 930401TW 1242895 円 = 12 can be carried out by evaporation, inspection or electroplating. Next, as shown in Figure ，, the conductive layer 250 is patterned using a general lithography process or using laser-YAG) cutting to form electrodes 252 and 254 that meet requirements (as in step 14). 'This completes the light-emitting diode Substrate for packaging. Fig. 2 (f) and Fig. 2 (g) illustrate an example of encapsulating a light-emitting diode die with a substrate produced by the present invention. Figure 2_ shows the traditional packaging method of wiring, where · represents the light-emitting diode die, 27G represents the metal wire, and coffee represents the sealant; the figure) shows another kind of flip chip packaging. The foregoing embodiments are described in detail in order to more clearly describe the features and spirit of the present invention, and the embodiments disclosed above are not a limitation on the scope of the present invention. On the contrary, the above description, as well as various changes and arrangements of equality, are within the purview of the present invention to the protection. Therefore, the scope of the patent scope of the present invention should be interpreted in the broadest sense according to the above description, and cover all possible equal changes and arrangements with equality. [Brief Description of the Drawings] Figure 1: Manufacturing flowcharts of the first and second embodiments of the present invention. Figures 2 (a) to 2 (e): show each step in the manufacturing flowchart of Figure 1 separately

Li Ci 4EPITAXY / 04005TW, 930401TW 9 1242895 Sectional view of Shi Xi substrate. Fig. 2 (f): The substrate produced by the present invention is used to package light emitting diode grains—each example (conventional wire bonding method). ^ Fig. 2 (g) · Another example of encapsulating light-emitting diode die with the substrate produced by the present invention (Flip-Chip Method). [Description of main component symbols] 11 Provide a silicon substrate 13 Form a plurality of through holes in the silicon substrate 15 Use PECVD technology to form an insulating layer and an insulating neck ring 17 Feed the silicon substrate into a high temperature furnace to form an insulating layer and an insulation The neck ring 19 processes the insulating neck ring by PECVD technology, so that the insulating neck ring is evenly distributed on the inner wall of the plurality of through holes 12 to form a conductive layer covering the insulating layer and the insulating neck ring or to further fill the plurality of through holes 14 Pattern the conductive layer to form electrodes 210 silicon substrate 212 first surface 214 second surface 220 through hole 230 insulation layer 240 insulation neck ring 4EPITAXY / 04005TW, 930401TW 10 1242895 250 conductive layer 252 electrode 254 electrode 260 light emitting two Polar body grain 270 Metal wire 280 Sealant

Li Ci 4EPITAXY / 04005TW, 930401TW 11

Claims (1)

1242895 10. Scope of patent application ... 1. A method for forming a package substrate for a light emitting monopole, including: providing a silicon substrate having a first surface, a second surface, and a plurality of through holes; A through hole is formed through the silicon substrate; an insulating layer is formed to cover the first surface and the second surface by plasma enhanced chemical vapor deposition (PECVD) technology, and an insulating collar is formed. Covering the inner wall of the plurality of through holes; and forming a conductive layer covering the insulating layer and the insulating neck ring. 2_ The method described in item 1 of the scope of patent application, the thickness of the silicon substrate is between about 100 " m and 500 // m. 3. The method according to item 1 of the scope of patent application, wherein the pore size of the through hole is between about 20 / ym and 80 // m. 4. The method described in item 1 of the scope of patent application, the thickness of the insulating neck ring is between 2000A and 5000A. 5. The method according to item 1 of the patent application scope, wherein the conductive layer further comprises filling the plurality of through holes. Li Ci 4EPITAXY / 04005TW, 930401TW 12 1242895 6 · —A method for forming a package substrate for a light emitting diode, including: Long: for a Shi Xi substrate 'The Shi Xi substrate has a first side, a second side and a plurality of Through-holes; passing the silicon substrate through a high-temperature furnace containing a reactive gas to form an insulating layer covering the first and second faces, and forming an insulating collar covering the plurality of through-holes Inner wall; treating the insulating neck ring with plasma enhanced chemical vapor deposition (PECVD) technology so that the insulating neck ring is evenly distributed on the inner wall of the plurality of through holes to prevent the inner wall from being exposed; and forming a conductive layer covering The insulating layer and the insulating neck ring. 7. The method as described in item 6 of the scope of patent application, the thickness of the silicon substrate is between about 100 / m to about 500 m. 8. The method as described in item 6 of the scope of the patent application, wherein the pore size of the through hole is between about 20 // m and 80 / ym. 9. The method according to item 6 of the scope of patent application, the thickness of the insulating neck ring is between 2000A and 5000A. Li Ci 4EPITAXY / 04005TW, 930401TW 1242895 1 10. The method described in item 6 of the special fiber, wherein the reaction gas system is selected from the group consisting of oxygen, nitrogen, ammonia, water, and any combination thereof Group. 11. The method according to item 6 of the claim range, wherein the conductive layer further includes filling the plurality of through holes. 12. A method for forming a packaging substrate for a light emitting diode, comprising: providing a silicon substrate, the silicon substrate having a first surface, a second surface, and a plurality of through-holes, the plurality of through-holes passing through the silicon Substrate, the thickness of the silicon substrate is between 100 // m and 500 / ym, and the aperture size of the through hole is between 20 // m and 80 "m; by plasma enhanced chemical vapor deposition ( PECVD) technology forms an insulating layer covering the first surface and the second surface, and forms an insulating collar covering the inner walls of the plurality of through holes; and forming a conductive layer covering the insulating layer and the insulating neck ring. 13. The method according to item 12 of the scope of patent application, the thickness of the insulating neck ring is between 2000A and 5000A. Li Ci 4EPITAXY / 04005TW, 930401TW 14 1242895 14. The method described in item 12 of the scope of patent application, wherein the conductive layer further includes filling the plurality of through holes. Lici 4EPITAXY / 04005TW, 930401TW 15