1240487 玖、發明說明： 【發明所屬之技術領域】 本發明係關於-數位式之輸出輸人元件，其特徵為輸出輸人元件間訊號傳遞 擺幅小於IV，且無須使用内部之參考電壓源及被動元件，可使面積有效下降，並 且輸出及輸入元件間訊號傳遞擺幅下降可以達到降低功率之要求。 【先前技術】 為了驅動晶片外界的較大負載至工作電壓，輸出元件必須要能夠提供足夠的 驅動能力，使輸出訊號可以快速的被提升到工作電壓，這也是—般輸出入元件較為 耗電的主要原H巾HK)所示為目前f知技術之輸出元件設計。降低工^壓 是降低神雜最直方法，但輸出元扭作電_下降會嚴制到輸出元 件中101及102之驅動能力，造成輸出延遲變大，使核心電路處理速度的提升變為 毫無意義。鼠仙發展-組_輸出人元件，使輸出元件的工作電壓仍維持在正 常的工作電壓’但輸出電壓下降至略储lv的電壓，使輸出元件的耗電下降，並 在輸入元件將略低於1V電壓的訊_原至工作電壓再送人核心電路做處理。以此 便可以在獨響電路正常功的前提下降低功率的雜。其巾輸出人元件並不需要 參考電壓源與被動元件，並可以有效的縮小面積需求。 【發明内容】 本發月之目的為—組數位式之輸出人元件，無需使肋部之參考電壓源及 被動元件’且糾人元件使壯“俩壓，錄讀輸人元制之喊傳遞電壓 下降。 本發明之另-目的為降低輸出人元件間之峨傳遞之電壓，其訊號傳遞電壓 小於lv ’且可推動極大負料至於使訊號傳遞速度下降，另可使輸出人元件之功 率消耗下降。 為了達成上述之發明目的，本發明包括—輸出元件(〇u神CeU)，其用以接收 1240487 來自核心電路(Core)傳遞之正常工作電壓之訊號，並輸出一低於lv之輸出訊號傳 送至晶片焊無(PAD)，經由電路板上之傳輸線傳輸至下—級之輸人元件㈣饥 ⑽）；-靜電放電電路(meetIOStatie Diseharge，ESD)，連接於輸人元件與焊接點及 輪出元件鱗接點L讀速放電晶片獅偶發之靜魏流轉護晶片内部核 心電路；-輸入元件，用以接收輸出元件輸出之訊號，並將其回復為正常工作電壓 之擺幅之邏輯訊號，以傳送至晶片内部核心電路。 為了達成本發明所揭示之一降低輸出訊號電壓之目的，前述輸出元件更進一 步包括一預驅動電路(Predriver)，其接收核心電路產生之正常工作電壓之邏輯訊 號，產生控制訊號，傳輸至下級驅動電路(Driver); 一驅動電路，用以接收預驅動 電路產生之邏輯並將之輸出；-回授控制電路，用以感測輸出電壓，於適當時機改 變預驅動電路之邏輯輸出以箝制驅動電路之輸出。 為了達成本發明所揭示之一降低輸出入元件間訊號電壓之目的，前述輸入元 件更進一步包括一輸入訊號感測電路，用以接收已降低之訊號電壓並將其轉換為正 常工作電壓，傳輸至下-級之栓鎖器(Lateh)栓鎖器，用以保持感測電路輸出之 訊號邏輯值。 因此，在一後文中所示之較佳實施例中，本發明所揭示之數位輸出元件由下 列各組件所組成： 靜電放電電路(Electrostatic Discharge，ESD); 預驅動電路(Predriver); 回授控制電路； 驅動電路(Driver)。 本發明所揭示之數位輸入元件由下列各組件所組成： 靜電放電電路(Electrostatic Discharge，ESD); 輸入訊號感測電路； 栓鎖器(Latch)。 1240487 【實施方式】 第-圖為本發明之輸出it件之—較佳實施例，其中輸出猶測包括：預驅 動電路201 ’回授控制電路202，驅動電路203，靜電放電電路204，其中204與習 知技術中相對應之部分並無不同，如第一圖中之1〇3，因此不予資述。 預驅動電路201接收來自核心電路之資料訊號她及控制訊號Εη.，由 Enable控制傳輸閘2〇5決定是否傳輪訊號至下一級之電路，反相器施提供一與 Data反向之訊號傳輸至下級電路。回授控制電路观接收來自2⑴之d血訊號， 由N型電晶體208傳輸至B點，其閘極訊號由反相器2〇7提供。N型電晶體2〇9 及211用以將B點及a點放電至接地電位，其閘極控制訊號各由零伏門植電壓n 型電晶體210及206提供。210之閘極控制訊號為輸出元件之輸出端點c點提供。 驅動電路203包含N型電晶體212及213，用以對C點作充放電之動作。 在輸入Data為低電位時，2〇6輸出高電位將211及213打開，將A及c點降 至接地電位。A點降至接地電位使2〇7輸出高電位打開至使B點降為低電位， 關閉212使C點得穩定在低電位。在Data轉為高電位時，2〇8對B點充電使212 打開對c點充電，同時206關閉211及213使c點得以充電上升電位。在c點充 電超過210之門檻電壓後，21〇打開對A點充電，致使2〇9打開對b點開始放電， 同時207輸出低電位將2〇8關閉以避免直流路徑產生增加粍電。b點放電至低於 212之門檻電壓後將會使212關停止對c點之充電，藉此造成輸出電位較正常工 作電壓低之特點。為了避免在回授控制關閉212之程序中2〇9打開而施尚未關閉 造成直流電與大量的功率消耗，2〇7的設計須與傳統反相器不同。第三圖顯示反相 器207之内部架構。在放電路徑上使用零伏門檻電壓Ν型電晶體3〇ι可以使2〇7 在端點Α之電位上升時即關閉，使2〇8之閘極可快速放電到地準位以確保不會有 直流電之發生。 第四圖為本發明之輪入元件之一較佳實施例，其中輸入元件400包括：輸入 感測電路401，检鎖器4〇2，靜電放電電路403，其巾403與習知技術中滅應之 部分並無不同，如第一圖中之1〇4，因此不予贅述。 1240487 輸入感測電路401接收自晶片外界之輸入，由中等門檻電壓N型電晶體4〇5 作為感測低於IV之傳輸訊號，p型電晶體404做為405之負載，D點為401之輸 出。栓鎖器402負責將D點之訊號傳至晶片内部，由p型電晶體4〇6及反相器4〇7 組成一栓鎖器，407之輸出即為傳送至晶片内部核心電路之端點。 405之中等門檻電壓約為〇.4v，在晶片外界之輸入訊號超過其門檻電壓後便 會將其打開致使D點經由405放電至接地電位，407則輸出高電位致核心電路。在 405之閘極電壓小於其門檻電壓時不會打開，由4〇4對〇點充電致工作電壓電位使 407輸出低電位。 為了顯示此發明之優越性，本較佳實施例以台灣積體電路公司提供之0.25 # m 1P5M製程來實作。第五圖為一輸出元件之模擬圖(TT m〇dd，2rc，225V〜 2.75V)，其中lnput Data為輸入之波形，其擺幅為2.5V。第六圖為一輸出元件在最 差條件下(FFmodel，-25°C，2.25V〜2.75V)之模擬圖。在最差條件下，輸出單元之 傳遞延遲(PropagationDelay)約為1 ns，其輸出訊號擺幅約為IV。其晶片面積使用 為73.5x56.7 #m2。第七圖為一輸入元件之模擬圖(TT mode卜25^ , 225v〜 2.75V)，其中lnput Data為晶片外界輸入之波形，其擺幅為800 mV。第八圖為一 輸入元件在最差條件下(FFmodel，-25°C，2.25V〜2.75V)之模擬圖。在最差條件下， 輸入單元之傳遞延遲(PropagationDelay)約為0.8 ns，其輸出訊號擺幅約為工作電壓 到接地電壓。其晶片面積使用為80.3x79.3 //m2。 【圖式簡單說明】 圖一、習知技術(輸出入元件之實施方法）； 圖二、本發明之較佳實施例(輸出元件）； 圖三、反相器207之内部架構； 圖四、本發明之較佳實施例(輸入元件）； 圖五、輸出元件模擬波形(TTmodd，25°C，2.25V〜2.75V); 圖六、輸出元件模擬波形(FFmodd，-25°C，2.25V〜2.75V); 圖七、輸入元件模擬波形(TTmodd，25°C，2.25V〜2.75V); 圖八、輸入元件模擬波形(FFmodd，·25Χ：，2.25V〜2.75V); 1240487 100 輸出元件（先前技術） 101 驅動電路之上拉P型電晶體 (先前技術） 102 驅動電路之下拉N型電晶體 103 靜電放電電路（先前技術） (先前技術） 104 靜電放電電路（先前技術） 105 輸入元件（先前技術） 201 預驅動電路 202 回授控制電路 203 驅動電路 204 靜電放電電路 205 傳輸閘 206， 反相器 207 208, 具有一般門檻電壓之N型 210 零伏門檻電壓之N型電晶體 209, 電晶體 211， 212, 213 301 零伏門檻電壓之N型電晶體 400 本案之輸入元件 401 輸入感測電路 402 栓鎖器 403 靜電放電電路 404, 具有一般門檻電壓之P型 405 具有中等門檻電壓之N型電 406 電晶體 晶體 407 反相器1240487 发明 Description of the invention: [Technical field to which the invention belongs] The present invention relates to-digital output input elements, characterized in that the signal transmission swing between the output input elements is less than IV, and there is no need to use an internal reference voltage source and Passive components can effectively reduce the area, and the signal transmission swing between output and input components can be reduced to meet the requirements of reducing power. [Previous technology] In order to drive a large load from the outside of the chip to the operating voltage, the output element must be able to provide sufficient driving capacity so that the output signal can be quickly raised to the operating voltage. This is also the general power consumption of the input and output elements. The main original H (HK) is shown as the output element design of the current known technology. Reducing the working pressure is the most straightforward way to reduce the sun ’s noise, but the output element is twisted into electricity. The reduction will strictly limit the driving ability of the output elements 101 and 102, which will cause the output delay to become larger and the core circuit processing speed to increase Meaningless. Mouse Fairy Development-Group_output human components, so that the working voltage of the output components is still maintained at the normal working voltage ', but the output voltage drops to a voltage slightly lower than lv, which reduces the power consumption of the output components, and the input components will be slightly lower At the voltage of 1V, the original voltage is sent to the core circuit for processing. In this way, the power noise can be reduced on the premise of the normal power of the single-sound circuit. Its towel output human components do not need reference voltage source and passive components, and can effectively reduce area requirements. [Summary of the Invention] The purpose of this month is to set up digital output human components, without the need for reference voltage sources and passive components in the ribs, and the correction components to make the two “press and record,” and read the input system of the human element. Voltage drop. Another purpose of the present invention is to reduce the voltage of E-transfer between output human components, whose signal transfer voltage is less than lv 'and can promote great negative material to reduce the signal transmission speed, and also can make the power consumption of output human components. In order to achieve the above-mentioned object of the invention, the present invention includes an output element (〇u 神 CeU), which is used to receive the 1240487 signal of the normal working voltage transmitted from the core circuit (Core), and output an output signal lower than lv Transfer to wafer soldering (PAD), and transfer to lower-level input components via the transmission line on the circuit board;-electrostatic discharge circuit (meetIOStatie Diseharge (ESD)), connected to input components and soldering points and wheels The component scale contacts L read the speed discharge wafer. The internal core circuit of the static Weiwei flow protection chip occasionally used by the lion;-the input component is used to receive the signal output by the output component and return it to positive A logic signal with a swing of a constant operating voltage is transmitted to the core circuit inside the chip. In order to achieve the purpose of reducing the output signal voltage disclosed by the invention, the aforementioned output element further includes a predriver circuit (Redriver), which receives the core The logic signal of the normal working voltage generated by the circuit generates the control signal and transmits it to the lower-level drive circuit (Driver); a drive circuit for receiving the logic generated by the pre-drive circuit and outputting it;-feedback control circuit for sensing The output voltage is measured, and the logic output of the pre-drive circuit is changed at an appropriate timing to clamp the output of the drive circuit. In order to reduce the voltage of the signal between the input and output elements disclosed in the present invention, the aforementioned input element further includes an input signal sensing A circuit for receiving the reduced signal voltage and converting it into a normal operating voltage, and transmitting it to a lower-level latch (Lateh) latch to maintain the logic value of the signal output by the sensing circuit. In a preferred embodiment shown later, the digital output element disclosed in the present invention is composed of the following groups Composition: Electrostatic discharge circuit (ESD); Predriver circuit (Predriver); Feedback control circuit; Drive circuit (Driver). The digital input element disclosed by the present invention is composed of the following components: Electrostatic discharge circuit ( Electrostatic Discharge (ESD); Input signal sensing circuit; Latch. 1240487 [Embodiment] The first figure is the preferred embodiment of the output device of the present invention, wherein the output still measurement includes a pre-drive circuit 201 'Feedback control circuit 202, drive circuit 203, and electrostatic discharge circuit 204, where 204 is not different from the corresponding part in the conventional technology, such as 103 in the first figure, so it will not be described. The pre-driving circuit 201 receives the data signal from the core circuit and the control signal Εη. The Enable controls the transmission gate 205 to determine whether to transmit the round signal to the next level of the circuit. The inverter provides a signal transmission opposite to the Data To the lower circuit. The feedback control circuit 28 receives the d blood signal from 2⑴, which is transmitted by the N-type transistor 208 to point B. The gate signal is provided by the inverter 207. N-type transistors 209 and 211 are used to discharge points B and a to the ground potential. The gate control signals are provided by zero-voltage gate-planted voltage n-type transistors 210 and 206, respectively. The gate control signal of 210 is provided for the output terminal c point of the output element. The driving circuit 203 includes N-type transistors 212 and 213 for charging and discharging the point C. When the input Data is low, the 206 output high potential turns on 211 and 213, and points A and c are lowered to the ground potential. Point A drops to the ground potential to turn the 207 output high potential to turn point B to a low potential, and close 212 to stabilize point C at a low potential. When Data goes to a high potential, 208 charges point B to make 212 turn on and charge point c, while 206 turns off 211 and 213 to make point c charge up to potential. After the charging at point c exceeds the threshold voltage of 210, the charging at point A is opened at 21 °, which causes the opening at 209 to start discharging at point b. At the same time, the low output of 207 will turn off 208 to prevent the DC path from increasing electricity. Discharging point b below the threshold voltage of 212 will cause 212 to stop charging point c, thereby causing the output potential to be lower than the normal operating voltage. In order to avoid that the 209 is turned on and the switch is not turned off in the procedure of the feedback control close 212, which causes direct current and a large amount of power consumption, the design of 207 must be different from the traditional inverter. The third figure shows the internal structure of the inverter 207. Using a zero-volt threshold voltage N-type transistor 30m on the discharge path can make 207 close when the potential of terminal A rises, so that the gate of 208 can be quickly discharged to the ground level to ensure that it will not There is direct current. The fourth figure is a preferred embodiment of a wheel-in element according to the present invention, wherein the input element 400 includes: an input sensing circuit 401, a lock detector 402, an electrostatic discharge circuit 403, a towel 403 and a conventional technology. The corresponding part is not different, such as 104 in the first picture, so it will not be repeated here. The 1240487 input sensing circuit 401 receives input from the outside of the chip. The medium threshold voltage N-type transistor 405 is used to sense the transmission signal below IV. The p-type transistor 404 is used as the load of 405, and the point D is 401. Output. The latch 402 is responsible for transmitting the signal of point D to the inside of the chip. A latch is formed by the p-type transistor 406 and the inverter 407, and the output of 407 is transmitted to the endpoint of the core circuit inside the chip. . The middle threshold voltage of 405 is about 0.4v. After the input signal outside the chip exceeds its threshold voltage, it will be opened to cause point D to discharge to ground potential through 405, and 407 will output a high potential to the core circuit. It will not open when the gate voltage of 405 is lower than its threshold voltage. The working voltage potential caused by 404 to 0 point charging causes the 407 to output a low potential. In order to show the superiority of this invention, the preferred embodiment is implemented by a 0.25 # m 1P5M process provided by Taiwan Semiconductor Manufacturing Company. The fifth figure is an analog diagram of an output element (TT mOdd, 2rc, 225V ~ 2.75V), where lnput Data is the input waveform and its swing is 2.5V. The sixth figure is a simulation diagram of an output element under the worst conditions (FFmodel, -25 ° C, 2.25V ~ 2.75V). Under the worst conditions, the propagation delay of the output unit (PropagationDelay) is about 1 ns, and the output signal swing is about IV. The chip area used is 73.5x56.7 # m2. The seventh diagram is an analog diagram of an input element (TT mode, 25 ^, 225v ~ 2.75V), where lnput Data is the waveform of the external input of the chip, and its swing is 800 mV. The eighth figure is a simulation diagram of an input element under the worst conditions (FFmodel, -25 ° C, 2.25V ~ 2.75V). Under the worst conditions, the propagation delay of the input unit (PropagationDelay) is about 0.8 ns, and its output signal swing is about the operating voltage to the ground voltage. Its chip area is 80.3x79.3 // m2. [Brief description of the drawings] Figure 1. Conventional technology (implementation method of input and output elements); Figure 2. Preferred embodiment of the present invention (output element); Figure 3. Internal structure of inverter 207; The preferred embodiment of the present invention (input element); Figure 5. Analog waveforms of output elements (TTmodd, 25 ° C, 2.25V ~ 2.75V); Figure 6. Analog waveforms of output elements (FFmodd, -25 ° C, 2.25V) ~ 2.75V); Figure 7. Analog waveforms of input components (TTmodd, 25 ° C, 2.25V ~ 2.75V); Figure 8. Analog waveforms of input components (FFmodd, · 25 × :, 2.25V ~ 2.75V); 1240487 100 output Components (Prior Art) 101 Pull-up P-type Transistor for Drive Circuit (Previous Technology) 102 Pull-down N-type Transistor for Drive Circuit 103 Electrostatic Discharge Circuit (Previous Technology) (Previous Technology) 104 Electrostatic Discharge Circuit (Previous Technology) 105 Input Components (prior art) 201 Pre-drive circuit 202 Feedback control circuit 203 Drive circuit 204 Electrostatic discharge circuit 205 Transmission gate 206, inverter 207 208, N-type with general threshold voltage 210 N-type transistor with zero threshold voltage 209 , Crystals 211, 212, 213 301 N-type transistor with zero threshold voltage 400 Input element 401 Input sensing circuit 402 Latch 403 Electrostatic discharge circuit 404, P-type with normal threshold voltage 405 N with medium threshold voltage Type 406 Transistor Crystal 407 Inverter
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