1239039 玫、發明說明： 【發明所屬之技術領域】 本發明係關於例如電漿辅助CVD(化學氣相沈積）、低壓 CVD至屬CVD、介電薄膜CVD、離子注入、蝕刻、低κ 值薄胰加熱處理及脫氣加熱處理裝置等半導體製造裝置中 採用的晶圓保持器，亦關於安裝該等晶圓保持器之處理腔 室及半導體製造裝置。 【先前技術】 通常，在半導體製程中，在充當處理目標之半導體基板 上執仃各種工序，例如薄膜沈積工序及蝕刻工序。在執行 半導體基板處理之處理設備中使用陶器晶座， 半導體基板以《進行域。 例如，第2002-237375號日本專利公開案揭示了此類習知 的-陶器晶座。第2002-237375號日本專利公開案所揭示之 :匈瓮晶座具有一種結構，在位於其表面或内部形成有抗加 熱tl件，且在其邊緣部分形成將其固定至一半導體晶圓之 引腳，且其中在該等引腳之内部形成大量與該半導體晶= 接觸之凸塊。 與本發明相關之狀況為與陶瓷基板之加熱表面上的半導 體晶圓接觸之大量凸塊使得溫度迅速升冑，並<得該加熱 表面具有均勻之溫度。本發明認為在平面表面構成該等前 述凸塊之頂端較為理想。然而，與該等諸多凸塊相關之問 題為：若單一凸塊之平面部分過大，則可破壞該晶座上承 载之晶圓之等溫性能；且在某些狀況下，不能自該承栽表 86740 1239039 面對晶圓進行卸去卡盤。 近年來，半導體基板不斷增大。例如，關於石夕（si)晶圓， 正在由《寸發展為12英寸。隨著半導體基板之直徑之擴大 ，有必要使陶资晶座上的半導體基板之加熱表面（保留表面） 中的溫度分佈在土!.。%之範圍内變化；此外期望其在土 〇 · 5 %心範圍内變化。 【發明内容】 提出本發明以解決上述問題。具體而言，本發明之目的 為實現用於半導體製造裝置之晶_持器，及用於安裝該 保持器之半導ft製造裝置，肖晶圓料器增強所承載之晶 圓之等溫性能，且利用該晶圓保持器，可獲得極佳之晶圓 可移動性。 已發現使用上述第·2_237375號日本專利公開案中提 出之半導體製造裝置晶圓保持器，若—單—結塊之平面部 分表面積紅’則難以將#於該保持器上白勺晶圓卸去卡盤 ，此外’將破壞該晶圓之等溫性能，由此需要提出本發明。 換言之’在根據本發明之具有—晶圓承載表面之晶圓保 持器中，在該曰曰曰®承載表面上形成大量具有—平面部分之 結塊，亚且每一結塊上平面之表面積為7〇 mm2或更小。此 外’孩等多個結塊上多個平面之總表面積為該保持器所承 載之晶圓表面積之40%或更小；一結塊上平面之表面積較 佳為30 mm2或更小，同時總表面積較佳為1〇%或更小。此 外，在半導體製造裝置中安裝一如上所述之晶圓保持器， 已證明充當處理對象之晶圓之溫度與習知相比更為均勻， S6740 1239039 此實現可以更高之產量製造半導體。 自下列結合附圖之詳細說明，熟悉此项技術者將容易瞭 解本發明之上述及其他目的、特點、觀 【實施方式】 本發明人發現’為使晶圓保持器！（圖υ承載之晶圓之溫度 分佈在幻.〇%之範圍内，應在其晶圓承載表面4上形成多個 :、有平面科之結塊2，且每—結塊上的平面之表面積應 為70 mm2或更小。 該晶圓保持器藉由一形成於該晶圓保持器内部或形成於 除其晶圓承載表面以外之表面上的抗加熱元件5對一晶圓 進行加熱，其中在該晶圓上執行—（或多個）預定工序。此時 ’被加熱之晶圓保持器之熱量藉由該等結塊傳遞至該晶圓 。然而’若單一結塊上平面之表面積超出7〇職2，則當藉 由該等結塊傳遞由該抗加熱元件產生之熱量時，在該晶圓 正面易於出現更大之溫度分佈。所承載之晶圓溫度之非均 勻溫度降低意謂著（例如）其中在該晶圓上執行了一薄膜沈 %工序B亥形成之薄膜之厚度及特性將會產生變動。 由於該等原因，所承載之晶圓正面溫度分佈愈輕小愈佳 ;且就實際之溫度分佈而言，吾人所尋求的係±1〇%範圍 内之等溫額定值，且更理想為±〇 5%範圍内之等溫額定值 。已發現為獲得該等範圍内之等溫額定值，該等平面之每 一結塊之表面積應為7 0 mm2或更小。 藉由使電流流過該抗加熱元件，加熱該晶圓保持器。其 中由該抗加熱元件產生之熱量擴散至該晶圓保持器並藉由 H6740 1239039 該等結塊傳遞呈該晶圓。就直接位於該等結塊上方的晶圓 橫截面中的溫度分佈而言，直接位於該等結塊上方的晶圓 底部之溫度最高’而在晶圓上部及輻射方向之溫度將會降 低。已發現若該等結塊上平面之表面積為70 mm2或更小， 則直接在如圖3中示意性說明之結塊上方將存在一高溫區 域7，而圍繞該區域’將存在一溫度低於該高溫區域之低溫 區域8，且由於該高溫區域7與低溫區域8並未到達晶圓之正 面，因此證明該晶圓正面之溫度大體上一致。 然而同時亦發現，若該等結塊上平面之表面積超出7 〇 m m ，该南溫區域7將到達晶圓正面，如圖4中示意性說明 ，且在晶圓正面將出現溫度更低之低溫區域8，其將產生晶 圓正面溫度之分佈。 mm2或更小，則 。同樣，該等結 因為如此可使晶 因此’若該等結塊上平面之表面積為7 〇 可使晶圓正面溫度分体在士 1 Q %之範圍内 塊上平面之表面積更佳為30 lllm2或更小， W止面溫度分佈在±〇.5〇/。之範圍内。 該等結塊上平面之總表面積亦可較佳為該晶圓表面積 鄕或更小。在其晶圓保留表面未製作結塊之晶圓保持 :’由於晶圓與晶圓保留表面完全接觸，因此該晶圓達 大二其黏合於該晶圓保留表面且很難自該晶圓保 卡盤。若該等結塊上平面之總表面積超出該晶 表面k4Q%，則與晶Β料表面未製作 ’使得很難將該晶圓卸去卡盤：鬼… 等晶圓施加了張力。 -引起-圓破裂並同時f 86740 1239039 浐Ώ此較佳應使涿等結塊上平面之總表面積為該晶圓表面 ^ 0 /°或更小’因為此意謂著可易於將該等晶圓卸去卡 士、”且很 > 發生上逑問題。此外，更佳應使該等平面之總 面和為1 〇 /〇或更小’因為在此情形下當將該等晶圓卸去 卡盤時出現之問題完全消失。 根據本發明，用於晶圓保持器之物質在絕緣陶t；之範圍 内’該等物f未受特定限制，但較佳為氮化招（A1N)，因為 其熱導率高且耐蝕性強。下文將詳細描述一根據本發明生 產一以A1N為實例之晶圓保持器之方法。 較佳為比表面積為2.〇至5 Q m2/g之A1N原材料粉末。若比 元、J糸2.0 m /g，氮化鋁之燒結性則將降低。反之，若 比表面積大於5 .〇 m2/g，虛理赋士 & ^ , S k里將成為一問趨，因為粉末黏附 性變得尤為強大。此外，原材料粉末中含有的氧氣量較佳 為重量百分比2%或更小。在燒結形態下，絲氣量超過重 量百分賴，熱導率則切低。_之外原材料粉末中含 有的金屬雜質較佳應為2GGG ppm或更小。若金屬雜質含量 超出此範圍’該燒結形態下該粉末之熱導率則會降低。詳 言之’第IV族元素例如Sl及鐵族元素例如以之含量分別可 為5〇〇PPm或更低，該等S素將對燒結之導熱率:生 減退效應。 0為A1N並非一易燒結材料，因此宜於將一燒結促進劑加 入Al_#料粉末。加入的燒結促進劑較佳為稀土元素化人 物。由於稀土元素化合物與位於氮化銘粉末微粒表㈣ 化鋁或氮氧化鋁反應，用以促進氣仆加、 虱^鋁〈增密並消除充冬 86740 -11 - 1239039 因此其提高了鋁 使氮化鋁燒結導熱率惡化之起因的氧氣 燒結之熱導率。 除氧作用尤為顯著之釔化合物為較佳乏 ^ 、佈土兀素化合物 曰曰 。所加入之量較佳為重量百分比〇 〇1%至。若重旦 乂 比低於。.01%，則很難產生超細燒結，同時燒結：熱；= 低。反之’若所加入之量超出重量百分比5%，則導致在氮 化銘燒結之晶界中出現燒結促進劑，因此若在腐蝕氣触^ 使用該氮化銘燒結’位於晶界之燒結促進劑則被似广成 為鬆散晶粒及微粒的來源。加入的燒結促進劑之量更佳應 為重量百分比1%或更低。若重量百分比小於1%，即使在 界三相點亦不存在燒結促進劑，此提高了耐腐㈣。 為進-步描述稀土元素化合物，可採用氧化物、氮化物 、氟化物及硬脂氧化物。該等氧化物應較廉價並易於獲得 同里其對有機落劑具有高親合力，因此硬脂氧化 物尤為適合’且若將氮化㈣材料粉末與燒結促進劑等一 同W:万、有機/谷劑中’燒結促進劑為硬脂氧化物這一事膏 將提高互溶性。 〃 人將鼠化銘原材料粉末、粉末狀燒結促進劑、預定 今里合」Ιέ合刎’此外視需要加入之分散劑或聚結劑 混合。可採用之混合技術包括球磨機混合及超音波混合。 因此，/昆合可產生一原材料研磨漿。 可將所獲得之研磨爿|# (、" 戒餐杈，且耩由燒結該鑄模產品，可1239039 Description of the invention: [Technical field to which the invention belongs] The present invention relates to, for example, plasma-assisted CVD (chemical vapor deposition), low-pressure CVD dependent CVD, dielectric thin film CVD, ion implantation, etching, low-κ thin pancreas Wafer holders used in semiconductor manufacturing equipment such as heat processing and degassing heating processing equipment are also related to processing chambers and semiconductor manufacturing equipment in which these wafer holders are installed. [Prior Art] Generally, in a semiconductor process, various processes such as a thin film deposition process and an etching process are performed on a semiconductor substrate serving as a processing target. A ceramic wafer holder is used in a processing device that performs semiconductor substrate processing. For example, Japanese Patent Publication No. 2002-237375 discloses such a conventional-ceramic crystal holder. As disclosed in Japanese Patent Publication No. 2002-237375: the Hungarian crystal seat has a structure in which a heat-resistant piece is formed on the surface or inside thereof, and a guide for fixing it to a semiconductor wafer is formed on an edge portion thereof. And a large number of bumps in contact with the semiconductor crystal are formed inside the pins. A situation related to the present invention is that a large number of bumps in contact with a semiconductor wafer on a heating surface of a ceramic substrate cause the temperature to rise rapidly, and < the heating surface has a uniform temperature. In the present invention, it is considered that it is desirable to form the tips of the aforementioned bumps on a flat surface. However, the problems associated with these many bumps are: if the plane portion of a single bump is too large, the isothermal performance of the wafer carried on the wafer can be destroyed; and under certain conditions, it cannot be self-supported. Table 86740 1239039 Remove the chuck facing the wafer. In recent years, semiconductor substrates have been increasing. For example, regarding the si wafer, it is developing from "inch to 12 inch." With the increase of the diameter of the semiconductor substrate, it is necessary to distribute the temperature in the heating surface (reserved surface) of the semiconductor substrate on the ceramic substrate in the soil !. It varies within the range of%; in addition, it is expected to vary within the range of 0.5%. SUMMARY OF THE INVENTION The present invention is made to solve the above problems. Specifically, the purpose of the present invention is to realize a crystal holder for a semiconductor manufacturing device, and a semiconducting ft manufacturing device for mounting the holder. The wafer feeder enhances the isothermal performance of the wafers carried. And, with the wafer holder, excellent wafer mobility can be obtained. It has been found that using the wafer holder of the semiconductor manufacturing device proposed in the aforementioned Japanese Patent Publication No. 2-237375, it is difficult to remove the wafer on the holder if the surface area of the single-block agglomerate is red. The chuck, in addition, will destroy the isothermal performance of the wafer, and thus the invention needs to be proposed. In other words, in the wafer holder having a wafer-bearing surface according to the present invention, a large number of agglomerates with a -plane portion are formed on the wafer-bearing surface, and the surface area of the plane on each agglomerate is 70 mm2 or less. In addition, the total surface area of multiple planes on multiple agglomerates is 40% or less of the surface area of the wafer carried by the holder; the surface area of a plane on a single agglomerate is preferably 30 mm2 or less, and the total The surface area is preferably 10% or less. In addition, the installation of a wafer holder in a semiconductor manufacturing device as described above has proven that the temperature of the wafer serving as a processing target is more uniform than conventional, S6740 1239039 This implementation can manufacture semiconductors with higher yields. From the following detailed description in conjunction with the accompanying drawings, those skilled in the art will easily understand the above and other objects, features, and views of the present invention. [Embodiment] The present inventors have discovered that ′ is a wafer holder! (The temperature distribution of the wafers carried in Figure υ is within the range of .. 0%. Multiple wafers on the wafer bearing surface 4 should be formed, and each of the planes on the wafers has a plane section. The surface area should be 70 mm2 or less. The wafer holder heats a wafer with an anti-heating element 5 formed inside the wafer holder or on a surface other than its wafer carrying surface, Among them, (or more) predetermined processes are performed on the wafer. At this time, the heat of the heated wafer holder is transferred to the wafer through the agglomerates. However, if the surface area of the plane on a single agglomerate is Beyond 70 ° 2, when the heat generated by the anti-heating element is transferred through the agglomerations, a larger temperature distribution tends to appear on the front side of the wafer. The non-uniform temperature reduction of the temperature of the wafer being carried means It means (for example) that the thickness and characteristics of the thin film formed by performing a thin film deposition process Bhai on the wafer will vary. For these reasons, the lighter the temperature distribution of the front side of the wafer, the smaller and better. And as far as the actual temperature distribution is concerned, The required temperature is an isothermal rating in the range of ± 10%, and more preferably an isothermal rating in the range of ± 05%. It has been found that to obtain an isothermal rating in these ranges, such The surface area of each agglomerate of the plane should be 70 mm2 or less. The wafer holder is heated by passing an electric current through the anti-heating element. The heat generated by the anti-heating element is diffused to the wafer holding. The wafer is transferred to the wafer by the H6740 1239039 agglomerates. In terms of the temperature distribution in the cross section of the wafer directly above the agglomerates, the bottom of the wafer directly above the agglomerates has the highest temperature. 'And the temperature in the upper part of the wafer and the radiation direction will be reduced. It has been found that if the surface area of the plane on the agglomerates is 70 mm2 or less, there will be a directly above the agglomerates as schematically illustrated in FIG. 3. High temperature region 7, and there will be a low temperature region 8 that is lower than the high temperature region, and since the high temperature region 7 and the low temperature region 8 do not reach the front side of the wafer, it is proved that the temperature of the front side of the wafer is substantially It ’s the same. But at the same time, The surface area of the upper surface of the agglomerates exceeds 70 mm, the south temperature region 7 will reach the front side of the wafer, as schematically illustrated in FIG. 4, and a lower temperature low temperature area 8 will appear on the front side of the wafer, which will produce The distribution of the temperature of the front of the wafer. Mm2 or less, the same. Because of this, the junctions can crystallize, so 'if the surface area of the plane of the junctions is 70, the temperature of the front of the wafer can be divided in ± 1 Q. In the range of%, the surface area of the upper plane of the block is more preferably 30 lllm2 or less, and the W-stop surface temperature distribution is within the range of ± 0.50 /. The total surface area of the upper plane of the agglomerates may also be preferably Wafer surface area is 鄕 or less. Wafers that are not agglomerated on the wafer retention surface are held: 'Because the wafer is in full contact with the wafer retention surface, the wafer is sophomore and it adheres to the wafer retention surface. And it is difficult to secure the chuck from this wafer. If the total surface area of the upper surface of the agglomerates exceeds the crystal surface k4Q%, then the surface of the crystal B material is not made ′ makes it difficult to remove the wafer from the chuck: ghosts, etc., and the wafer applies tension. -Cause-circle rupture and at the same time f 86740 1239039 浐 Ώ This should preferably be such that the total surface area of the plane on the agglomerates is the surface of the wafer ^ 0 / ° or less' because this means that it is easy to make such crystals "Unloading the caster," and very > the lifting problem occurred. In addition, it is better to make the total sum of these planes 10/0 or less' because in this case when the wafers are unloaded The problem that occurred when removing the chuck completely disappeared. According to the present invention, the substance used for the wafer holder is within the scope of the insulating ceramic t; these substances f are not specifically limited, but are preferably nitrided (A1N) Because of its high thermal conductivity and strong corrosion resistance, a method for producing a wafer holder using A1N as an example according to the present invention will be described in detail below. The specific surface area is preferably 2.0 to 5 Q m2 / g. A1N raw material powder. If the specific element and J 糸 2.0 m / g, the sinterability of aluminum nitride will be reduced. On the other hand, if the specific surface area is greater than 5.0 m2 / g, the hypothetical Fu Shi & ^, Sk It has become a trend because the adhesion of the powder becomes particularly strong. In addition, the amount of oxygen contained in the raw material powder is preferably a weight percentage 2% or less. In the sintered form, the amount of silk gas is more than 100% by weight, and the thermal conductivity is reduced. The metal impurities contained in the raw material powder should preferably be 2GGG ppm or less. If the content of metal impurities is Beyond this range, the thermal conductivity of the powder will be reduced in the sintered form. In particular, the content of the Group IV elements such as Sl and the iron group elements may be 500 PPm or less, respectively. The thermal conductivity of the element will reduce the sintering effect. 0 is A1N is not a sinterable material, so it is suitable to add a sintering accelerator to the Al_ # powder. The sintering accelerator added is preferably a rare earth element. Because of the rare earth Element compounds react with aluminum nitride or aluminum oxynitride located on the surface of nitride powder particles to promote air-thinning, aluminum ^ aluminum densification and elimination of winter 86740 -11-1239039. Therefore, it improves aluminum and aluminum nitride. The thermal conductivity of oxygen sintering, which is the cause of the deterioration of the thermal conductivity of sintering. The yttrium compound with a particularly significant oxygen removal effect is better. .If the weight ratio is lower .01%, it is difficult to produce ultra-fine sintering at the same time: heat; = low. Conversely, if the amount added exceeds 5% by weight, it will cause sintering accelerators to appear in the grain boundaries of nitrided sintering, Therefore, if the nitriding sintering is used in the corrosive atmosphere, the sintering accelerator located at the grain boundary is widely used as a source of loose grains and particles. The amount of the sintering accelerator added is preferably 1% by weight or Lower. If the weight percentage is less than 1%, there is no sintering accelerator even at the boundary triple point, which improves the corrosion resistance. To further describe the rare earth element compounds, oxides, nitrides, fluorides, and Stearic oxides. These oxides should be relatively inexpensive and easy to obtain. They have a high affinity for organic solvents. Therefore, stearic oxides are particularly suitable. : Wan, organic / cereals, the sintering accelerator is stearic oxide, the paste will improve mutual solubility. 〃 The person mixes the raw material powder of the rat chemical powder, the powdery sintering accelerator, and the pre-mixed powder, and the dispersant or coalescing agent added if necessary. Available mixing technologies include ball mill mixing and ultrasonic mixing. Therefore, / Kunhe can produce a raw material slurry. The obtained grinding || ((, "
表成一氮化錯燒社。PI P 共同給燒及後金屬化為兩種可實現此 過程之方法。 86740 -12 - 1239039 將首先描述後金屬化。藉由如噴霧乾燥之技術自該研磨 衆製備顆粒。將該等顆粒加入一預定鑄模並進行平板壓模 。其中壓制壓力理想為〇.丨tW或更大。當壓力小於〇1 t’cm2時，通常狀況下在鑄模物質中不能產生足夠的強度， 使其在處理中易於破裂。 儘管鑄模物質之密度係基於其中含有的黏合劑之量及加 入的燒結促進劑之量而變化，其較佳為丨5細3或更大。 小於1.5 gW之密度將意謂著原材料粉末中微粒間相對較 大之距離，其將阻礙燒結之進展。同時，鑄模物質之密度 較佳从5 g/em。或更小。大社5 之密度使得很難在 其後續步驟之脫脂工序中自該#模物f完全消除黏合劑。 因此很難製造上述超細燒結。 其後，在-非氧化氣體τ在該鐸模物質上執行加熱及脫 脂工序。在氧化氣體（例如空氣）下執行脫脂工序將降低該燒 結之熱導率，因為該剔粉末之表面將被氧化。較佳之非氧 化環境氣體為氮氣及兔氣。脫脂工序中加熱溫度較佳為大 於或等於50(TC且小於或等於1〇〇〇t。當溫度低於時 ’脫脂工序之後在詹壓中殘留多餘之石炭，因為不能完全消 除黏合劑，其在隨後之燒結步驟中干擾燒結。反之，在古 於1〇峨之溫度下，自八_末表面上氧化塗層消除氧氣: 能力下降’、使得殘留之《太少，降低了燒結之熱導率。 脫脂工序後鑄模物質中殘留的碳的量較佳為重量百分比 1.0%或更小。若殘留石炭的含量超過重量百分比1〇%，其將 干擾燒結，此意謂著不能產生超細燒結。 、 %74() 1239039 其後，執行燒結。在1700°C至2000°c下，並在非氧化氮 氣、氬氣或類似氣體下執行該燒結。其中所用之環境氣體 ’例如氮氣中含有的水份之露點較佳為-3 0 °C或更低。若含 有更多的水份，燒結之熱導率則將會降低，因為在燒結過 程中該A1N將與環境氣體中含有的水份反應並產生氮化物 。另一較佳條件為環境氣體中氧氣之體積為體積百分比 0.001 %或更低。更大體積之氧氣將可能導致該A1N被氧化， 削弱該燒結之熱導率。 充當燒結過程中之另一條件，所採用之模具適宜為氮化 硼（BN)模製品。由於例如氮化硼（BN)模製品之模具對燒結 溫度而言具有足夠的耐熱性，且表面具有固態潤滑性，因 此在燒結中當積層收縮時，模具與積層之間的摩擦將會減 小，此將實現製造變形較小之燒結。 對所彳于之燒結進行所需之處理。在隨後步驟中將一導電 膏絲網印刷至該燒結之狀況下，表面粗糙度較佳為5 pm (Ra)或更小。若超出5 μπι，在用於形成電路之絲網印刷中 ，可能在圖案中產生汙潰或針孔等缺陷。表面粗糙度更適 宜為1 μιη (Ra)或更小。 在研磨到上述表面粗糙度過程中，儘管對燒結之兩面均 進行絲網印刷之狀況是理所當然的，但甚至在僅對一表面 進行絲網印刷之狀況下，也最好應在絲網印刷表面之對面 的表面進行該研磨工序。此係因為僅對絲網印刷表面進行 研磨將意謂著在絲網印刷過程中，將自該未研磨表面承載 該燒結，且在該條件下將在未研磨之表面產生毛屑及碎# 86740 1239039 結強度亦將降低。 同樣在形成之電路圖案中’例如該加熱電路（抗加熱元件 電路）’圖案間隔較佳為〇. 1 mm或更大。若間隔小於〇 1 mm ，當電流流經該抗加熱元件時將發生短路，且依據所施加 之黾壓及溫度’將產生漏電流。尤其在將電路用於5 Q 〇。〇或 更高溫度之狀況下，該圖案間隔較佳應為丨更大；更 佳為3 mm或更大。 在將該導電膏脫脂後，接著進行烘烤。在非氧化氮氣、 氬氣或類似氣體下執行脫脂工序。脫脂溫度較佳為5〇〇^或 更高。當溫度低於500 °C時，不能自該導電膏充分消除黏合 劑，在金屬層中遺留下碳，在烘烤過程中碳將與金屬生成 碳化物並因此提高該金屬層之電阻。 適宜將烘烤在1500°C或更高之溫度並在非氧化氮氣、氬 氣或類似氣體下執行。在低於1 5 〇 〇 °C之溫度下，該金屬層 供烤後之氣阻變传極南，因為對導電霄内金屬粉末之、烘烤 不會進入到晶粒生長階段。另一烘烤參數為烘烤溫度不應 超出產生的陶瓷之燃燒溫度。若將該導電膏在高於陶瓷燃 燒溫度之溫度下進行烘烤，併入陶瓷之燒結促進劑開始發 散性揮發，此外，促進了導電膏内金屬粉末中的晶粒生長 ’削弱了陶瓷與金屬層之間的黏結強度。 為確保金屬層電性絕緣，可在金屬層上形成一絕緣塗層 。該絕緣塗層物質較佳應與於其上形成該金屬層之陶瓷相 同。若該陶瓷與絕緣塗層之物質差異顯著，則將產生由熱 膨脹係數之差異所引起的問題，例如燒結後之翹曲。例如 86740 1239039 ’在陶资為剔之狀況下’可將—預定量之第山族或nia族 元素之氧化物/碳化物加入A1N粉末、所加入之黏合劑及溶 劑並與其混合’並將㈣合㈣成—㈣，並且將該膏劑 絲網印刷以將其塗覆於該金屬層。 在該種狀況下，所加入之燒結促進劑之量較佳為重量百 分比0.01%或更大。在數量小於重量百分比Q Q1%時，該絕 緣塗層並未增密，使得很難確保該金屬層之電性絕緣。燒 結促進刎心f更佳應不超出重量百分比20%。超過重量百 分比3G%，·料致損㈣金屬層之過量燒結，其結果將改 變孩金屬層之電阻。儘管並未特定限制，但塗覆厚度較佳 為5 μιη或更大。此係因為在小於5 μιη時，很難確保電性絕 緣0 此外，根據本方法，可根據要求對該充當基板之陶瓷進 行層壓。可藉由黏結劑執行層壓。藉由一種技術，例如絲 網印刷，將該黏結劑（將第IIa族或IIIa族元素化合物，及黏 合劑及溶劑加入氧化鋁粉末或氮化鋁粉末並製成膏劑）塗 覆於黏結表面。所施加的黏結劑之厚度未特定限制，但較 佳應為5 μπι或更大。當厚度小於5 μιη時，在黏結層易於出 現如針孔等黏結缺陷及黏結不規則性。 在非氧化氣體中在500 t或更高之溫度下對陶瓷基板進 行脫脂，黏結劑已塗覆於該等基板之上。藉由將該等陶资 基板層疊在一起，對該層疊施加一預定負載並在非氧化氣 體中對其進行加熱，因此可將該等陶瓷基板相互黏合。該 負載較佳為〇.〇5 kg/Cm2或更大。當負載小於〇 〇5 kg/cm2時 86740 17 1239039 不3b獲得足夠之黏結強度，此外在接合處可能發生缺陷。 儘管用於黏結之加熱溫度未特定限制，只要在該溫度下 陶瓷基板經由黏結層相互充分黏合，但其較佳為15〇〇t或 更高。低於1500°C時，很難獲得充足之黏結強度，使得接 合處易於發生缺陷。在上述脫脂與黏結過程中較佳應將氮 氣或氬氣用作非氧化氣體。 按照上述方法，如此可製造用作晶圓保持器之陶瓷層壓 燒結。就電路而言，應瞭解若其為（例如）加熱電路，則可使 用一鉬線圈，在靜電卡盤電極電路與RF電極之狀況下，其 可為鉬或鎢網格，無需使用導電膏。 在忒種狀況下，可將鉬線圈或網格嵌入Am原材料粉末中 ，且可藉由熱壓製造晶圓保持器。儘管熱壓機中的溫度及 氣可等同於A1N燒結溫度及氣體，但熱壓機理想應運用工〇 kg/cm2或更大之壓力。當壓力小於1〇 kg/cm2時，晶圓保持 斋可此不會展不其性能，因為在A1N與鉬線圈或網格之間出 現間隙。 現將描述共同焙燒。藉由刮漿刀將上述原材料研磨漿鑄 才旲成一薄片。該薄片鑄模參數並未特定限制，但薄片乾燥 後4厚度適宜為3 mm或更小。超出3 mm之薄片厚度將導致 乾燥研磨漿中的較大收縮，提高了在薄片中產生裂缝之可 能性。 使用一例如絲網印刷之技術在上述薄片上塗覆導電膏， 3薄片上形成有一預定形態之充當電路之金屬層。所用之 導電膏可與後金屬化方法中描述之導電膏相同。然而，不 86740 1239039 向該導電膏中加入氧化物粉末不會阻礙該共同焙燒法。 其後，將經歷電路形成之薄片與未經歷電路形成之薄片 層壓。藉由將每一薄片定位以將其層疊在一起進行層壓。 其中，根據要求在薄片之間塗覆溶劑。在層疊狀態下，視 需要可將該等薄片加熱。在將該等薄片加熱之狀況下，加 熱溫度較佳為15G°C或更小。當加熱超出此溫度時將使該等 層壓之薄片嚴重變形。此後對該等層疊在一起之薄片施加 壓力以使其成為-體。所施加之壓力較佳應在！购至⑽ MPa之範圍内。在低wMPa之壓力下，不能將該等薄片充 分-體化且在隨後之工序中可能脫開。同樣，若施加之壓 力超出1 00 MPa，該等薄片變形之程度則過大。 層壓經歷與上述後金屬化方法中相同的—脫脂工序以及 燒結工序。例如脫脂及燒結溫度以及碳之量等參數與後金 屬化万法中相同。在上述將導電膏絲網印刷至薄片中，藉 由將加熱電路、靜電卡盤電極等分別印刷至複數個薄片之 上並將其層壓，可易於製作一具有複數個電路之晶圓保持 器。以此方式可製造一用作晶圓保持器之陶究層壓燒結。 根據要求對所獲得之該陶瓷層壓燒結進行處理。通常藉 由半導體製造裝置’在燒結狀態下該陶是層壓燒結通常不 能獲得所要求之精度。作為處理精度一實例的晶圓承載表 面<平面度較佳為0.5 mm或更小；此外，特佳為〇丨山爪或 更小。超出0.5 mm之平面度易於在晶圓與晶圓保持器之間 產生間隙，使得晶圓保持器之熱量不能均勻地傳送至晶圓 且可導致在晶圓中產生溫度不均勻性。 貝 86740 -19- 1239039 更佳疋條件為該晶圓承載表面之表面粗糖度為5 _㈣ 1⑽度大於5㈣㈣，則由於摩擦在晶圓保持器與晶 圓之間脫落的晶粒之數量可增大。該種狀況下脫落之晶粒 成為汙染#’其對晶圓之工序’例如薄膜沈積及蝕刻，產 生不良效應。此外’理想之表面粗糙度為丨㈣㈣或更小。 此外，可使用公開已知的處理技術，例如機械加工或噴 砂清理，製作根據本發明之具有—平面部分之該等結塊。 在此種狀況下’由於該等結塊之平面部分為前述晶圓保留 表面因此在1作§亥等結塊時必須謹慎，使得該等平面之 表面粗糙度及其平面度總體上在上述用於晶圓承載表面之 表面粗糙度及平面度之範圍内。 如此，可以上述方法製作一晶圓保持器之基本部分。此 外’將-軸與該晶圓保持器連接。儘管該軸之物質未特定 限制，只要其熱膨脹係數與該晶圓保持器陶瓷之熱膨脹係 數相差不是十分明1員’但該軸物質與該晶圓保持器之熱膨 脹係數之差額較佳應為5 χ丨〇-6 κ或更小。 若熱膨脹係數之差额超出5χ1〇-6 κ，則當加熱時可在晶 圓保持器與軸之間的接合處出現裂缝；但即使當將該等二 物體接合時不會出現裂缝，在將其反複用於加熱循環時， 在接合處亦可出現破裂及裂缝。例如，在晶圓保持哭為謂 時’軸之最理想之物質為剔；但亦可使用氮切、碳化石夕 或冨鋁紅柱石。 藉由一黏結層將該軸接合至該晶圓保持器，可將其安裝 。該黏結層之成份較佳由謂、Al2〇3以及稀土氧化物構： 86740 -20 - 1239039 又:'、s寺成份，因為其與陶瓷，例如作為晶圓保持器 及車由之物質的趟，具有令人滿意之可濕性，使得接合強度 相對較高，並易於產生一氣密接合表面。 同樣，亦可使用znQ系破璃陶资充當黏結層之成份。該 選擇較佳，其原因為由於破璃之結晶溫度為彻。CB〇crc 、:所以可將該軸在一相對較低之溫度下接合。然而，由於 半導體製造裝置之處理腔室内的環境氣體某些狀況下可侵 入=破璃成份’依據半導體製造條件，存在不能使用玻璃 陶资之情形。 袖與晶圓保持器待接合之各個接合面之平面度較佳為 .5軸或更小。更大的平面度導致接合面中易於產生間隙 ，阻礙了具有足夠氣密性之接合之產生。〇1 _或更小之 平面度為更佳。此處，晶圓保持器接合表面之平面度更佳 為0.02 mm或更小。同樣，夂接 rR "各接合表面 < 表面較佳為5 μιη (叫或更小。超出此數值之表面㈣度亦意謂著在接入表 面將出現間隙。1 _㈣或更小之表面粗糖度更為適宜。 其後，將電極連接至晶圓保持器。可根據眾所皆知 ；；執行該連接。例如’晶圓保持器與其晶圓保留表面相對 的一侧可局部整平直至該電 ，或τ舳〜人Ε 且在及包路上執行金屬化 等ίΓΓ 可使用活性金屬硬谭材料將由韵1 :衣成的廷極直接連接至該表面。此後，視情況可將兮等 =鍍以提高其抗氧化能力。以此方法，可製作用： 導體製造裝置之晶圓保持器。 此外，可在-裝配於半導體製造裝置内的根據本發明之 狀74(} -21 - 1239039 晶圓保持器上處理半導體晶圓。由於藉由本發明使得晶圓 保持咨之晶圓保留表面之溫度一致，因此晶圓中溫度分佈 人^知相比將更為一致，就沈積之薄膜、加熱處理等而言 ’可產生穩定之特性。 實施例 實施例1 將以重量計99份氮化鋁粉末與以重量計1份y2〇3粉末混 合’並將其與充當黏合劑之以重量計1 〇份聚乙缔醇縮丁醛 與充當溶劑之以重量計5份鄰苯二甲酸酯混合，且以刮漿刀 將居混合物製成直徑4 3 0 m m 、厚度1.0 m m之印刷電路基 板。此處，使用平均微粒直徑為〇 6 μηι且比表面積為3.4 m2/g 之氮化鋁粉末。此外，使用以重量計1 〇〇份之平均微粒直徑 為2.0 μπι之鎢粉以製備嫣膏劑；據此，按以重量計！份之 丫2〇3與以重量計5份之乙基纖維素製備黏合劑；及以丁基卡 必醇（CarbitolTM)充當溶劑。使用一球磨機及一三滾筒磨機 進行混合。藉由將該膏劑絲網印刷至印刷電路基板上，將 該鎢膏劑製成一加熱電路圖案。 將複數個厚度為1.0 mm之獨立印刷電路基板層壓於印刷 有加熱電路之印刷電路基板上以製造層壓。藉由將該等薄 片適當地層疊於一鑄模中，並在10 MPa之壓力同時在50°C 下熱壓2分鐘，以執行層壓。其後將該等層壓製品在氮氣體 中並在600°C下脫脂，並在氮氣體中且溫度1 800°C下燒結3 小時，藉此產生晶圓保持器。此處，燒結後在晶圓保留表 面上執行一研磨工序使其變為1 μπι (Ra)或更小，並且在軸 86740 -22 - 1239039 —曰。執仃研磨工序使其變為5 μπι (Ra)或更小。亦對該 Τ員持進仃處理以精修其外徑。處理後晶圓保持器 寸為外L 340 mm、厚度2〇 mm。並且該晶圓保留表 面14及RF生成電極電路之間距離為1 mm。 其次’製造晶圓保持器，在其上藉由鑽孔工序製造有下 列晶圓承載表面結塊。意即，製造有532個結塊（以15酿之 間距排列），該等結塊上平面之直徑為卜2.54、4、6、8及 1〇随；以及製造有127個結塊（以45随之間距排収晶圓 保持器，該等結塊上平面之直徑為1、2.54、4、6、8、1〇 、12、15 及 20 mm。 藉由在兩個位置局部整平與晶圓保留表面相對側面之表 面直土占加熱電路，將孩晶圓保持器内的加熱電路部分暴 =使用—活性金屬料材料將由鎢製成之電極直接連接 主孩加熱電路之暴露部分。藉由使電流流過該等電極可加 熱該等晶圓保持器，並量測其等溫額定值。藉由將一叫 寸《曰曰圓溫度計設足於該等晶圓保留表面並量測其溫度分 体，可實現該等溫額定值之量測。應瞭解，可調節其電源 ’使得晶圓溫度計中部之溫度為55Qt。該等等溫額定值結 果於表I及表Π中列出。 此外，列入並輸入表I及表Π之，，起模測試"下的内容如下 :當藉由一未圖示之晶圓起模針將晶圓自晶圓保持器起模 時，使其中晶圓完全無破裂及類似問題之晶圓保持器為，，良 好，使其中部分晶圓中出現破裂之晶圓保持器為，，合格”； 且使其中晶圓破裂之晶1M呆持器為” N G"(不合格）。應理解 86740 -23 - 1239039 ，在表I及表II中π表面積"單指結塊上平面之表面積，而π相 對表面積π為該等結塊上平面之總表面積與該等晶圓（1 2英 寸直徑）表面積之比率。Formed as a nitriding fault burning society. PI P co-firing and post-metallization are two ways to accomplish this. 86740 -12-1239039 Post-metallization will be described first. Granules are prepared from the mill by techniques such as spray drying. The pellets are added to a predetermined mold and subjected to flat-plate molding. Among them, the pressing pressure is desirably 0.1 tW or more. When the pressure is less than 0 1 t'cm2, in general, sufficient strength cannot be generated in the mold material, making it easy to break during processing. Although the density of the mold substance varies based on the amount of the binder contained therein and the amount of the sintering accelerator added, it is preferably 5 to 3 or more. A density of less than 1.5 gW will mean a relatively large distance between particles in the raw material powder, which will hinder the progress of sintering. At the same time, the density of the mold material is preferably from 5 g / em. Or smaller. The density of Taisha 5 makes it difficult to completely remove the binder from the mold in the degreasing step of its subsequent steps. Therefore, it is difficult to produce the above ultrafine sintering. Thereafter, the non-oxidizing gas τ is subjected to a heating and degreasing process on the domide substance. Performing a degreasing process under an oxidizing gas (such as air) will reduce the thermal conductivity of the sintering because the surface of the pick powder will be oxidized. Preferred non-oxidizing ambient gases are nitrogen and rabbit gas. The heating temperature in the degreasing step is preferably greater than or equal to 50 ° C. and less than or equal to 1000 t. When the temperature is lower than 'excessive carbon remains in the pressure after the degreasing step because the adhesive cannot be completely eliminated, Interfering with sintering in the subsequent sintering step. On the contrary, at an ancient temperature of 10 Å, the oxygen coating was eliminated from the surface by oxidizing the layer: the capacity was reduced, so that the remaining "too little, reducing the thermal conductivity of sintering The amount of carbon remaining in the mold material after the degreasing step is preferably 1.0% by weight or less. If the content of residual carbon exceeds 10% by weight, it will interfere with sintering, which means that ultra-fine sintering cannot occur % 74 () 1239039 Thereafter, sintering is performed. The sintering is performed at 1700 ° C to 2000 ° c and under non-oxidizing nitrogen, argon, or the like. The ambient gas used therein is, for example, contained in nitrogen. The dew point of the water is preferably-30 ° C or lower. If more water is contained, the thermal conductivity of the sintering will be reduced, because the A1N will interact with the water contained in the ambient gas during the sintering process. Reacts and produces nitridation Another preferred condition is that the volume of oxygen in the ambient gas is 0.001% by volume or less. A larger volume of oxygen may cause the A1N to be oxidized, weakening the thermal conductivity of the sintering. Acting as another in the sintering process Conditions, the mold used is suitable for boron nitride (BN) moldings. For example, molds of boron nitride (BN) moldings have sufficient heat resistance to sintering temperature, and the surface has solid lubricity. When the laminate shrinks, the friction between the mold and the laminate will be reduced, which will achieve sintering with less deformation. Perform the required treatment on the sintering. In a subsequent step, a conductive paste screen When printing to this sintering condition, the surface roughness is preferably 5 pm (Ra) or less. If it exceeds 5 μm, the screen printing used to form the circuit may cause stains or pinholes in the pattern, etc. Defects. The surface roughness is more preferably 1 μιη (Ra) or less. In the process of grinding to the above surface roughness, although it is taken for granted that both sides of the sintering are screen-printed, it is even In the case where one surface is screen-printed, it is also preferable to perform the grinding process on the surface opposite to the screen-printed surface. This is because grinding only the screen-printed surface will mean that during the screen printing process, The sintering will be carried from the unpolished surface, and under this condition, swarf and debris will be generated on the unpolished surface. # 86740 1239039 Junction strength will also be reduced. Also in the formed circuit pattern, for example, the heating circuit (heat resistant Element circuit) 'The pattern interval is preferably 0.1 mm or more. If the interval is less than 0.1 mm, a short circuit will occur when a current flows through the anti-heating element, and leakage will occur according to the applied pressure and temperature' Current. Especially when the circuit is used at a temperature of 5 Q. 0 or higher, the pattern interval should preferably be larger; more preferably 3 mm or larger. After degreasing the conductive paste, baking is performed. The degreasing process is performed under non-oxidizing nitrogen, argon or the like. The degreasing temperature is preferably 500 ° C or higher. When the temperature is lower than 500 ° C, the adhesive cannot be fully removed from the conductive paste, leaving carbon in the metal layer. During the baking process, carbon will form carbides with the metal and thus increase the resistance of the metal layer. It is suitable to perform the baking at a temperature of 1500 ° C or higher and under a non-oxidizing nitrogen gas, argon gas or the like. At a temperature below 15 ° C, the gas resistance of the metal layer after baking is transmitted to the south, because the baking of the metal powder in the conductive layer will not enter the grain growth stage. Another baking parameter is that the baking temperature should not exceed the burning temperature of the ceramic produced. If the conductive paste is baked at a temperature higher than the burning temperature of the ceramic, the sintering accelerator incorporated in the ceramic will start to diffuse and volatilize. In addition, the growth of the crystal grains in the metal powder in the conductive paste is promoted, which weakens the ceramic and metal. Bonding strength between layers. To ensure the electrical insulation of the metal layer, an insulating coating can be formed on the metal layer. The insulating coating material should preferably be the same as the ceramic on which the metal layer is formed. If the material difference between the ceramic and the insulating coating is significant, problems caused by the difference in thermal expansion coefficients, such as warping after sintering, will occur. For example, 86740 1239039 'In the case of pottery materials', you can add a predetermined amount of oxides / carbides of Group shan or nia elements to the A1N powder, the added binder and solvent, and mix with it' and ㈣ Combining ㈣-㈣ and screen printing the paste to apply it to the metal layer. In this case, the amount of the sintering accelerator added is preferably 0.01% by weight or more. When the amount is less than the weight percentage Q Q1%, the insulating coating is not densified, making it difficult to ensure the electrical insulation of the metal layer. The sintering promotes better heart pressure f should not exceed 20% by weight. Exceeding 3% by weight may cause excessive sintering of the metal layer, which will change the resistance of the metal layer. Although not particularly limited, the coating thickness is preferably 5 µm or more. This is because when it is less than 5 μm, it is difficult to ensure electrical insulation. In addition, according to this method, the ceramic serving as a substrate can be laminated as required. Lamination can be performed with an adhesive. The adhesive (a compound of a group IIa or IIIa element, and an adhesive and a solvent are added to an alumina powder or an aluminum nitride powder and made into a paste) by a technique such as screen printing, is applied to the adhesive surface. The thickness of the applied adhesive is not particularly limited, but it is preferably 5 μm or more. When the thickness is less than 5 μm, adhesion defects such as pinholes and adhesion irregularities are liable to occur in the adhesion layer. The ceramic substrates are degreased in a non-oxidizing gas at a temperature of 500 t or higher, and an adhesive has been coated on the substrates. By stacking the ceramic substrates together, applying a predetermined load to the stack and heating them in a non-oxidizing gas, the ceramic substrates can be bonded to each other. The load is preferably 0.05 kg / Cm2 or more. When the load is less than 0.05 kg / cm2, 86740 17 1239039 does not obtain sufficient bonding strength with 3b, and defects may occur at the joint. Although the heating temperature for bonding is not particularly limited, as long as the ceramic substrates are sufficiently adhered to each other through the adhesive layer at this temperature, it is preferably 150,000 t or higher. Below 1500 ° C, it is difficult to obtain sufficient bonding strength, making the joint prone to defects. It is preferable to use nitrogen or argon as the non-oxidizing gas in the above degreasing and bonding processes. According to the method described above, a ceramic laminate sintered for use as a wafer holder can be manufactured. In terms of circuits, it should be understood that if it is, for example, a heating circuit, a molybdenum coil can be used. In the case of an electrostatic chuck electrode circuit and an RF electrode, it can be a molybdenum or tungsten grid without the need for conductive paste. Under these conditions, molybdenum coils or grids can be embedded in the Am raw material powder, and wafer holders can be manufactured by hot pressing. Although the temperature and gas in the hot press can be equivalent to A1N sintering temperature and gas, the hot press should ideally use a pressure of 0 kg / cm2 or more. When the pressure is less than 10 kg / cm2, the wafer remains fast. This will not show its performance, because there is a gap between A1N and the molybdenum coil or grid. Co-firing will now be described. The raw material grinding slurry is cast into a thin sheet by a doctor blade. The die casting parameters are not particularly limited, but the thickness of the die 4 after drying is preferably 3 mm or less. Thicknesses exceeding 3 mm will result in greater shrinkage in the dry slurry, increasing the possibility of cracks in the flakes. A conductive paste is applied to the above-mentioned sheet using a technique such as screen printing, and a metal layer serving as a circuit is formed on the sheet in a predetermined shape. The conductive paste used may be the same as that described in the post-metallization method. However, the addition of oxide powder to the conductive paste does not hinder the co-firing method. Thereafter, a sheet subjected to circuit formation is laminated with a sheet not subjected to circuit formation. Lamination is performed by positioning each sheet to stack them together. Among them, a solvent is applied between the sheets as required. In the laminated state, these sheets may be heated as necessary. In the case where these sheets are heated, the heating temperature is preferably 15 G ° C or less. Heating above this temperature will severely deform the laminated sheets. Thereafter, pressure is applied to these laminated sheets to make them -body. The pressure applied should preferably be! Purchased to within ⑽ MPa. At a low wMPa pressure, these flakes cannot be fully integrated and may come off in subsequent processes. Similarly, if the applied pressure exceeds 100 MPa, the flakes are deformed too much. The lamination undergoes the same degreasing step and sintering step as in the post-metallization method described above. Parameters such as degreasing and sintering temperatures and the amount of carbon are the same as in the post-metallization method. In the above, the conductive paste is screen-printed into a sheet, and a heating circuit, an electrostatic chuck electrode, etc. are separately printed on a plurality of sheets and laminated, so that a wafer holder having a plurality of circuits can be easily manufactured. . In this way, a ceramic lamination sinter can be manufactured for use as a wafer holder. The obtained ceramic laminate sintering is processed as required. Usually, the ceramics are laminated and sintered in a sintered state by a semiconductor manufacturing apparatus', and the required accuracy cannot usually be obtained. As an example of the processing accuracy, the wafer carrying surface < flatness is preferably 0.5 mm or less; moreover, particularly preferred is a mountain claw or less. A flatness exceeding 0.5 mm is liable to generate a gap between the wafer and the wafer holder, so that the heat of the wafer holder cannot be uniformly transferred to the wafer, and temperature unevenness may be generated in the wafer. Shell 86740 -19- 1239039 The better condition is that the surface sugar content of the wafer bearing surface is 5 _㈣ 1⑽ degree is greater than 5㈣㈣, then the number of grains that fall off between the wafer holder and the wafer due to friction can increase. . The crystal grains that fall off under this condition become contamination # ', which has an adverse effect on wafer processes' such as thin film deposition and etching. In addition, the ideal surface roughness is ㈣㈣ or less. In addition, such agglomerates having a -planar portion according to the present invention may be made using publicly known processing techniques such as machining or sandblasting. In this case, because the plane part of the agglomerates is the aforementioned wafer reserved surface, care must be taken when making agglomerates such as §11, so that the surface roughness and flatness of the planes are generally used in the above-mentioned applications. Within the range of surface roughness and flatness of the wafer bearing surface. In this way, the above-mentioned method can be used to make a basic part of a wafer holder. In addition, the '-axis is connected to the wafer holder. Although the material of the shaft is not specifically limited, as long as the difference between the coefficient of thermal expansion and the coefficient of thermal expansion of the wafer holder ceramic is not very clear, the difference between the coefficient of thermal expansion of the shaft material and the wafer holder should preferably be 5 χ 丨 〇-6 κ or less. If the difference in the coefficient of thermal expansion exceeds 5 × 1〇-6 κ, cracks may appear at the joint between the wafer holder and the shaft when heated; but even when the two objects are joined, cracks do not occur. When repeatedly used in a heating cycle, cracks and cracks may occur at the joint. For example, when the wafer keeps crying, the most ideal material for the 'axis' is tick; however, nitrogen cutting, carbonized carbide or mullite may also be used. The shaft can be mounted to the wafer holder by an adhesive layer. The composition of the bonding layer is preferably composed of bismuth, Al203 and rare earth oxides: 86740 -20-1239039 and: ', s temple composition, because it is related to ceramics, such as the wafer holder and the material of the vehicle. , Has satisfactory wettability, making the joint strength relatively high, and easy to produce an air-tight joint surface. Similarly, znQ-based glass-breaking ceramic materials can also be used as a component of the adhesive layer. This choice is preferred because the crystallization temperature of the glass breaks through. CB〇crc ,: So the shaft can be joined at a relatively low temperature. However, because the ambient gas in the processing chamber of a semiconductor manufacturing device can invade under certain conditions = broken glass component 'Depending on the conditions of semiconductor manufacturing, there are cases where glass ceramics cannot be used. The flatness of each joint surface between the sleeve and the wafer holder to be joined is preferably .5 axis or less. The greater flatness results in a gap in the joint surface, which prevents the formation of a joint with sufficient air tightness. 〇1 _ or less flatness is better. Here, the flatness of the wafer holder bonding surface is more preferably 0.02 mm or less. Similarly, the bonding rR " each joint surface " surface is preferably 5 μιη (called or less. A surface degree exceeding this value also means that a gap will appear on the access surface. 1_㈣ or less surface Coarse sugar is more suitable. Thereafter, the electrode is connected to the wafer holder. It is known as such; the connection is performed. For example, 'the side of the wafer holder opposite to its wafer retaining surface may be partially flattened until This electricity, or τ 舳 ～ 人 Ε and performing metallization on the Baotou Road, etc. ΓΓΓ can be connected directly to the surface with a rhinestone 1: clothing-made Tingji using an active metal hard Tan material. Thereafter, depending on the situation, etc. = Plating to improve its oxidation resistance. In this way, it can be used for: wafer holders for conductor manufacturing equipment. In addition, it can be mounted in a semiconductor manufacturing equipment according to the invention 74 (} -21-1239039 The semiconductor wafer is processed on a round holder. Since the temperature of the wafer holding surface is kept consistent by the present invention, the temperature distribution in the wafer will be more consistent than the known one. Etc. 'Can produce stable characteristics. Examples Example 1 Mix 99 parts by weight of aluminum nitride powder with 1 part by weight of y203 powder' and mix it with 10 parts by weight of polyethylene as a binder Butyral was mixed with 5 parts by weight of phthalate as a solvent, and the mixture was made into a printed circuit board with a diameter of 430 mm and a thickness of 1.0 mm by a doctor blade. Here, used An aluminum nitride powder having an average particle diameter of 0.6 μm and a specific surface area of 3.4 m2 / g. In addition, 100 parts by weight of tungsten powder having an average particle diameter of 2.0 μm was used to prepare a Yan plaster; By weight! Parts of Ya2O3 and 5 parts by weight of ethyl cellulose were used to prepare a binder; and butyl carbitol (CarbitolTM) was used as a solvent. A ball mill and a three-roller mill were used for mixing. The tungsten paste was made into a heating circuit pattern by screen-printing the paste onto a printed circuit substrate. A plurality of individual printed circuit substrates having a thickness of 1.0 mm were laminated on the printed circuit substrate printed with the heating circuit to Manufacture laminates. The sheets were appropriately laminated in a mold, and hot-pressed at 50 ° C for 2 minutes at a pressure of 10 MPa to perform lamination. Thereafter, the laminates were placed in a nitrogen gas at 600 ° C. The wafer holder was produced by degreasing and sintering in a nitrogen gas at a temperature of 1 800 ° C for 3 hours. Here, a grinding process was performed on the wafer retaining surface after sintering to make it 1 μπι (Ra) Or smaller, and on the shaft 86740 -22-1239039 —say. The grinding process is performed to make it 5 μπι (Ra) or smaller. The worker is also treated to refine the outer diameter. After the treatment The wafer holder is L 340 mm in outer diameter and 20 mm thick. And the distance between the wafer retaining surface 14 and the RF generating electrode circuit is 1 mm. Next, a wafer holder is manufactured, and the following wafer bearing surface agglomerates are manufactured by a drilling process. That is, 532 agglomerates (arranged at a distance of 15 brewing) were manufactured, and the diameter of the upper plane of these agglomerates was 2.54, 4, 6, 8, and 10; and 127 agglomerates (at 45 The wafer holders are then discharged at a distance, and the diameters of the upper planes of these agglomerates are 1, 2.54, 4, 6, 8, 10, 12, 15 and 20 mm. By partially leveling and crystallizing at two positions, The surface of the round retaining surface opposite to the side directly occupies the heating circuit, and the heating circuit part in the wafer holder is exposed = use-the active metal material will directly connect the electrode made of tungsten to the exposed part of the main heating circuit. Passing an electric current through the electrodes can heat the wafer holders and measure their isothermal ratings. Temperature split can realize the measurement of such temperature ratings. It should be understood that its power source can be adjusted so that the temperature of the middle of the wafer thermometer is 55Qt. The results of these isothermal ratings are listed in Table I and Table Π In addition, the contents of Table I and Table Π are listed and entered. When a wafer is ejected from a wafer holder by a wafer ejection pin (not shown), the wafer holder in which the wafer is completely free of cracks and similar problems is good, so that some of the wafers appear in the wafer holder. The cracked wafer holder is, OK, and the 1M wafer holder that caused the wafer to crack is "NG" (Unqualified). It should be understood that 86740 -23-1239039, in Table I and Table II π "Surface area" simply refers to the surface area of the planes on the agglomerates, and π relative surface area π is the ratio of the total surface area of the planes on the agglomerates to the surface area of the wafers (12 inches in diameter).
表I 序號 結塊直徑 表面積 結塊數量 相對表面積 起模測試 等溫额定值 (mm) (mm2) (%) (%) 1 1 0.8 532 0.6 良好 ±0.3 2 2.54 ' 5.1 532 3.7 良好 ±0.3 3 4 12.6 532 9.2 良好 ±0.4 4 6 28.3 532 20.6 合格 ±0.5 5 8 50.3 532 36.6 合格 ±0.8 6 10 78.5 532 57.4 不合格 ±1.2Table I No. Agglomeration diameter Surface area Agglomeration number Relative surface area Molding test Isothermal rating (mm) (mm2) (%) (%) 1 1 0.8 532 0.6 Good ± 0.3 2 2.54 '5.1 532 3.7 Good ± 0.3 3 4 12.6 532 9.2 Good ± 0.4 4 6 28.3 532 20.6 Passed ± 0.5 5 8 50.3 532 36.6 Passed ± 0.8 6 10 78.5 532 57.4 Failed ± 1.2
表II 序號 結塊直徑 表面積 結塊數量 相對表面積 起模測試 等溫額定值 (mm) (mm2) (%) (%) 7 1 0.8 127 0.1 良好 ±0.3 8 2.54 5.1 127 0.9 良好 ±0.3 9 4 12.6 127 2.2 良好 ±0.4 10 6 28.3 127 4.9 良好 ±0.5 11 8 50.3 127 8.7 良好 ±0.9 12 10 78.5 127 13.7 合格 ±1.1 86740 -24- 1239039 13 12 113.1 127 19J 合格 ±1.2 ——-- ------ J4_ 15 176.7 127 ~—-—-—._ 且8 合格 ±1.5 15 20 314.2 127 不合格 ±1.6 自表i及表π可明顯得出，藉由使單一結塊上平面之表面 積為70 mm2或更小，可使晶圓正面中溫度分佈達到土 ”/。之 範圍内。此外，藉由使前述表面積為3〇 mm2或更小，可使 日曰圓正面中，皿度刀佈達到士 〇 5 %之範圍内。同時，使該等結 塊上平面之總表面積為晶圓表面積之4〇%或更小，可使在 將:曰'圓卸去卡盤時幾乎不發生使其為晶圓表面積之 /〇或更小，可使在將晶圓卸去卡盤時完全不會發生問題。 實施例2 將表I及表Π之晶圓保持器裝配入半導體製造裝置中，其 中在直徑為12英寸切晶圓上形成ΤιΝ薄膜。其結果為，在 使用第6號及第15號晶圓保持器之狀況下，薄膜厚度之 變動較大’為15%或更t ’且在將晶圓卸去卡盤時晶圓被 破壞；在使用第1 2至丨4號晶圓保持器之狀況下，τ丨n薄膜厚 度之變動較大，為15%或更大，且在將晶圓卸去卡盤時晶圓 中發生輕微的破裂；但在使用第⑴號及第7至U號晶圓保 持為時’ Tm薄膜厚度之變動較小，41〇%或更丨，可形成 極好的彻薄膜，且在將晶圓卸去卡盤時完全不存在問題。 «上文說明之本發明，藉由具有一平面部分之結塊， 使單―結塊上平面之表面積為7〇職2或更小，”現等溫 額定值極為優秀之晶圓保持器及半導體製造裝置。同樣， 86740 -25 - 1239039 使該等結塊上平面 、、心表面積為晶圓表面積之4 Q %或更小 ’可使在將晶圓告P本 、 卡'^時問題之發生處於控制之下。 僅選擇所選之會 /、她例以說明本發明。然而，對於熟悉此 員技術者，自上诫彡- 輛不不難發現可對其進行各種變化及修 改，而不會背離隨 " 、订申印專利*81中所限定之本發明之範 ° "卜’上文中對根據本發明之實施例 ::::::意欲限制如隨附之申請專利範圍及其均:: 【圖式簡單說明】 :為一平面圖，其示意地說明了-根據本發明之晶圓保 持器之實例； M保 圖2為圖1中平面剖面a_a之示意圖； 圓剖面的溫度分佈之示 圖3為一表示本發明中貫穿一 思、圖；及 —圖4為-表示比較實例中貫穿一晶圓剖面的溫度 氏▲、圖。 【圖式代表符號說明】 1 晶圓保持器 2 結塊 晶圓承載表面 抗加熱元件電路 问溫區域 低溫區域 H6740 -26-Table II No. Agglomeration diameter Surface area Agglomeration number Relative surface area Molding test Isothermal rating (mm) (mm2) (%) (%) 7 1 0.8 127 0.1 Good ± 0.3 8 2.54 5.1 127 0.9 Good ± 0.3 9 4 12.6 127 2.2 Good ± 0.4 10 6 28.3 127 4.9 Good ± 0.5 11 8 50.3 127 8.7 Good ± 0.9 12 10 78.5 127 13.7 Passed ± 1.1 86740 -24- 1239039 13 12 113.1 127 19J Passed ± 1.2 --- ---- --- J4_ 15 176.7 127 ~ —-—-—._ and 8 pass ± 1.5 15 20 314.2 127 fail ± 1.6 It is obvious from Table i and Table π that the surface area of the upper surface of a single agglomerate is 70 mm2 or less, the temperature distribution in the front side of the wafer can reach within the range of "/." In addition, by making the aforementioned surface area 30 mm2 or less, the Japanese-Japanese circle front side can be cut with a knife cloth. It is within the range of ± 0.5%. At the same time, the total surface area of the upper surface of the agglomerates is 40% or less of the wafer surface area, which makes it almost impossible to remove: It is / 0 or less of the surface area of the wafer, so that there is no problem at all when the wafer is removed from the chuck Example 2 The wafer holders of Tables I and II were assembled into a semiconductor manufacturing apparatus, in which a TiN film was formed on a 12-inch diameter cut wafer. As a result, the No. 6 and No. 15 wafers were used Under the condition of the holder, the thickness of the film has a large change of '15% or more 'and the wafer is destroyed when the wafer is removed from the chuck; when using the wafer holders No. 12 to No. 4 The thickness of τ 丨 n film varies greatly, 15% or more, and a slight crack occurs in the wafer when the wafer is removed from the chuck; however, when using the No. 及 and No. 7 to U crystals When the circle is maintained, the variation of Tm film thickness is small, 41% or more, it can form an excellent film, and there is no problem when removing the wafer from the chuck. «The present invention described above With the agglomeration of a flat part, the surface area of the single-agglomerate upper plane is 70 ° 2 or less, and "wafer holders and semiconductor manufacturing devices with extremely excellent isothermal ratings are now available." Similarly, 86740 -25-1239039 to make these agglomerates on a flat surface with a heart surface area of 4 Q% or less of the wafer surface area can keep the occurrence of the problem under control when the wafer is reported to the card and card. under. Only selected clubs are selected to illustrate the invention. However, for those skilled in the art, from the above commandment, it is not difficult to find that various changes and modifications can be made to it without departing from the scope of the invention defined in the accompanying " and subscription patent * 81 ° "In the above, the embodiments according to the present invention :::::: are intended to limit the scope of the patent application as attached and all of them: [Simplified illustration of the drawing]: is a plan view that schematically illustrates -An example of a wafer holder according to the present invention; FIG. 2 is a schematic view of the plane section a_a in FIG. 1; the temperature distribution of the circular section is shown in FIG. 3; 4 is-a graph showing a temperature ▲ and a cross-section through a wafer in the comparative example. [Illustration of Symbols in the Drawings] 1 Wafer Holder 2 Agglomeration Wafer Carrying Surface Anti-Heating Element Circuit Interrogation Temperature Zone Low Temperature Zone H6740 -26-