1238503 玖、發明說明： 明屬員】 發明領域1238503 发明, Description of invention: Ming member] Field of invention
5 本發明係關於包含至少一組電晶體及一組弓丨線樞 子裝置，特別是關於用以切換多數個電源之電子聿^之 C先前技術J ^ 。 發明背景 功率MOSFET(金屬氧化半導體場效應電晶體）普、 被使用於許多應用中，包含電源供應、手提式裝置r遍地 10車電子元件。MOSFET是具有一問極、一源極以及二二= 端點之三端點型式電晶體。功率MOSFET在這些應用中之 一任務是提供切換功能並且控制自電源至負栽之功率傳 送。功率MOSFET最普遍的應用之一是切換筆記型電腦中 之多數個電源。在這情況中，需要兩組功率]\4081^丁之共 15源極組態，如第1圖之展示。這兩組功率MOSFET基本上背 對背地連接且源極被連接在一起。 在一般的筆記型電腦電源供應系統中，交流電整流器 電壓永遠較高於電池電壓。當功率MOSFET關閉時，電流 仍然經由主體二極體流通至電池，如第2圖之展示。為了防 20 止這電流的流通，需要一組標準的導通/斷電開關。解決方 案之一是在交流電整流器以及主要電池之間以共源極組態 連接兩組功率MOSFET，如第3圖之展示。這設計已經普遍 地使用於目前筆記型電腦供應系統中。 目前，共源極組態的實例是外部地連接兩組分離 1238503 MO ET(以各別封裝或單_封裝覆蓋）之源極在列印電路 板上，如第4圖之展示。在單一封裝之習見的雙組福航 情況中’每-晶片之閘極墊片被使用於閘極互連。閘極柱、 源極柱、以及排極柱皆彼此分離。為了易於結合接線至間 5極柱，閘極塾片一般置放於左上方角落。因為兩組晶片之 閑極墊片以及源極塾片另外被置於閑極以及源極之間，其 Z允許功率M〇SFET之源極被内部連接。這是因為在接線 結合時，如果兩組源極被内部連接在一起，交替的問極及 源極將導致閘極至源極的短路。此外，需要一組額外的電 10路板層用以外部地連接源極。因為裝置之製造可能更加地 複雜，所有這些方法可能相當地昂貴。 發明目的 一因此，本發明的目的就是解決至少一個或多個先前技 術所出現的問題。至少，本發明的目的提供大眾一種有用 15的選擇。 C 明内 ]| 發明概要 因此，本發明提供一種裝置，其包含： 至少一組二端點電晶體，其具有至少兩組閘極塾片及 20 5 少一組源極墊片，其中該等兩組閘極墊片是選擇性可操 作的，並且源極墊片設置在該等兩組閘極墊片之間；以及 至少一組引線框，其具有至少一組用以自源極墊片連 接源、極之源極連接區域，以及至少一組用以連接該可操作 的閘極墊片之閘極連接區域。 1238503 最好是，其中該電晶體至少具有兩側，並且該等兩組 閑極墊片設置相鄰於各側面。而且最好是，該電晶體係矩 形並且具有四個角落，並且各閘極墊片設置在或鄰近於一 分離的角落。該等兩組間極塾片進—步較佳地設置在相鄰 5之角落，或者選擇性地被配置在相對角落。 最好疋，本發明之裝置至少包含兩組該電晶體。該等 兩組電晶體之兩源極墊片連接到至少一源極連接區域，並 且該引線框具有至少兩閘極連接區域，並且該源極連接區 威相對於該閘極連接區域被放大。 1〇 本發明之另一論點係提供一種三端點電晶體，其具有 多少兩組閘極墊片以及至少一組源極墊片，其中該兩組閑 極勢片疋選擇性可操作的，並且該源極塾片設置在該等兩 錐閘極墊片之間。 本發明之另一淪點係提供一種引線框，其具有至少兩 15解間，連接區域以及至少一組源極連接區域以連接至少兩 真、.』電aa體’各该二端點電晶體具有至少兩組閑極塾 片以及至少—組源極墊片，具特徵於該源極連接區域 於閘極連接區域而被放大。 、 _式簡單說明 20 ，接耆將利用範例且參考附圖而說明本發明之較佳實施 例’其中： 第1圖展示一組共源極組態； =圖是展示即使當功率M〇SFET是在關閉狀態時 "t電整流器經由主體二極體而流通至主要電池的分 1238503 解圖； 第3圖展示一種筆記型電腦系統中共源極組態之應用； 第4圖展示習見的單一封裝中之單一及雙組M〇SFET ; 第5圖展示用以内部連接共源極組態之本發明引線框 5 設計； 第6圖展示本發明之功率M〇SFET佈局設計的範例，其 中閘極墊片在各功率MOSFET之上方相鄰角落。 第7圖展示本發明中具有多於兩組功率m〇sfet之引 線框設計的另外範例。 10 【實施方式】 較佳實施例之詳細說明 接著下面將參考附圖利用範例說明本發明。列表丨是一 組件列表，因此圖形中的參考號碼便易於查閱。 本發明所披露之其他目的、特點和優點將可從下面的 15說明而更明顯。熟習本技術者將了解，本發明所討論僅是 範例實施例之說明，並非有意限制本發明之論點，其更廣 泛的論點被實施於範例結構中。 下面的說明假設，例如，上述第丨圖至第4圖展示之功 率MOSFET包含於一組單一電子封裝中。引線框一般以單 2〇 一電子封裝中之一金屬片所形成，其攜載至少一組半導體 構件，例如電晶體，並且提供引線供半導體構件連接至其 他系統構件。 由於MOSFET製造及相關技術已是相當成熟的領域， 因此MOSFET之基本製造及設計將不在此進一步地討論。 1238503 为又巾7吕 極端點。 一 ^點電晶體包含— 閘極、一源極、以及一排 本發明利用内部地遠技+ ^ . 連接兩紐源極而製作一種共源極組 5 10 15 二:可::低成本、簡化電路板配置、並且使電路互連 、篇/ 明提供—種用以製作共源極組態之内部連接 源極，其利用在單一封步中 Τ炙兩組功率MOSFET而達成該 :::接源極。這方法之組合相當簡單並且不會在接線結 5時導致閘極至源極的短路。在—較佳實施例中，第5圖展 示之本發明裝置1〇包含-組引線框20以及-組可以包含至 少-組Μ刪T之電晶體部份3〇。為達成内部源極連接， 第圖之展示中央引線柱合併—起而形成源極連接區域 2 2 ’因而閘極及源極之接腳組態改變，如第5圖所示。亦即， 用以連接源極墊片之中央引線柱，同時也可稱為源極連接 區域22，大於各閘極連接區域24。功率之源極連 接到源極連難域22。該祕連接區域22可以具有任何所 需的形狀。 為了便利接線結合至閘極墊片並且提供所需的功能， 至少一組閘極墊片32被提供在各功率MOSFET上，如第6圖 之展示。兩組閘極墊片32被提供在上方相鄰角落，如所展 20示。但是，如果是必須的情況下，閘極墊片32也可以被提 供在相對角落上。事實上，利用設置源極墊片34在兩組閘 極墊片32之間，兩組閘極墊片32可以如所需要地配置。即 使很少’但有可能需要三角形或甚至是圓形之mosfet， 因而另外的閘極墊片之定位將需要適合於特定的形狀。當 1238503 然，最後設計應該是實際的並且這也是熟習本技術者所明 白。在矩形MOSFET之相鄰角落設置兩組閘極墊片32可能 更有易於製造而且只需要相當少的空間以容納所需的連 接。此外，如果需要的話，MOSFET可以具有多於兩組之 5 閘極塾片32，即使這會增加整體的製造成本。添加額外閘 極墊片32應該是熟習本技術者所習知的。 本發明中MOSFET以及源極連接區域22之設計使得共 源極組態中功率MOSFET之兩組獨立閘極可結合，而不導 致在閘極及源極結合接線之間的短路。本發明提供一種使 1〇用於一般筆記型電腦之電源供應系統的裝置，例如，第6圖 之展示。在一封裝的電晶體部份30中，兩組功率MOSFET 被置於兩側。它們分別地接線結合至引線框20。各功率 MOSFET之後側連接到分別的排極柱36。排極柱36設置於 引線框之一側，在此情況中，如第6圖下侧。閘極及源極柱 15 被置放於相對側，如此它們都可連接至引線框20。第6圖 中，兩組閘極墊片32被置於各功率MOSFET之上方相鄰角 落。各功率MOSFET上之一閘極墊片32結合至對應的閘極 柱。對照於第5圖，第6圖中兩組在閘極柱相同側的中心引 線柱被合併在一起，其被使用作為兩組MOSFET之源極連 2〇 接區域22。結合閘極連接區域24至閘極墊片32以及結合源 極連接區域22至源極墊片34將不會導致結合接線之短路。 本發明之較佳實施例可以被使用於，例如，筆記型電 腦之電源供應系統。當然，本發明可以使用於其他需要的 兩組背對背MOSFET之應用中，例如汽車電子元件、手提 10 1238503 式裝置、電源供應。 上述之本發明裝置可以被包含於單一電子封裝中，亦 即’ -電子封裝可以包含引線框2()以及如上所述之兩植 MOSFET。但是，應該注意到，單一電子封裝可以包含多 5於-組裝置10。在這情況中，單一電子封裝之引線框，目 前具有多數個裝置10,邏輯上可以考慮包含多數個引線框 20。此一組態没计為熟習本技術者所習知。如第了圖所示， 裝置110具有四組設置於電晶體部份13〇2M〇SFet、八組 對應的排極柱136、以及一組引線框12〇。第7圖中各組 10 MOSFET，如上所述，具有兩組可選擇性操作的閘極塾片 132及-組源極墊片134。引線框12〇具有兩組源極連接區域 122及四組閘極連接區域124。當然，如果必須的話，裝置 110可以具有多組MOSFET、源極連接區域122、以及閘極 連接區域124。 15 此外，如果必須的話，MOSFET可以單獨被採用於某 些應用中’例如’某些閘極墊片32可能需要在MOSFET其 中之一側操作，而其他閘極墊片則可能需要在另一側操 作。在此應用中，裝置10可以僅具有一組如上所述之 MOSFET及一組具有源極連接區域22之引線框、以及一組 20閘極連接區域24。在這情況中，閘極塾片32均是可以操作 的。 雖然已利用範例詳細說明本發明之較佳實施例，但顯 然熟習本技術者將發現本發明可有許多的修改及變化。此 外’本發明之實施例不受範例或圖示所限制。然而，應該 11 1238503 瞭解到，此修改及變化都是在下列申請專利範圍所提出之 本發明範相。例如，所展示或所說明實施例之部份特點 可以使用於另-實施例，以產生更進—步的實施例。因此， 本發明將涵蓋申請專利範圍之範嘴及其等效者所彼露的此 5 等修改及變化。 【囷式簡單說明】 第1圖展示一組共源極組態； 第2圖是展示即使當功率M0SFET是在關閉狀態時，電 /”L自父流電整流器經由主體二極體而流通至主要電池的分 10 解圖； 第3圖展示一種筆記型電腦系統中共源極組態之應用； 第4圖展示習見的單一封裝中之單一及雙組m〇sfet ; 第5圖展示用以内部連接共源極組態之本發明引線框 設計; 15 第6圖展示本發明之功率MOSFET佈局設計的範例，其 中閘極墊片在各功率MOSFET之上方相鄰角落。 第7圖展示本發明中具有多於兩組功率MOSFET之引 線框设计的另外範例。 【圖式之主要元件代表符號表】 10…具有兩組MOSFET之裝置 11 〇…具有多於兩組MOSFET之裝置 20…引線框 120…引線框 22…源極連接區域 122…源極連接區域 24…閘極連接區域 124…閘極連接區域 30…電晶體部分 130…電晶體部分 32…閘極墊片 132…閘極墊片 34…源極墊片 134…源極墊片 36…排極柱 136…排極柱 125 The present invention relates to the C prior art J ^ which includes at least one transistor and a set of bows and hubs, and in particular, an electronic device for switching a plurality of power sources. BACKGROUND OF THE INVENTION Power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are commonly used in many applications, including power supplies, portable devices, and 10-car electronic components. A MOSFET is a three-terminal type transistor having a single-source, a single-source, and two-to-two terminals. One of the tasks of power MOSFETs in these applications is to provide switching functions and control the power transfer from the power supply to the load. One of the most common applications of power MOSFETs is to switch most of the power supplies in a laptop. In this case, two sets of power are required, which are 15 source configurations, as shown in Figure 1. These two sets of power MOSFETs are basically connected back to back and the sources are connected together. In a general notebook computer power supply system, the AC rectifier voltage is always higher than the battery voltage. When the power MOSFET is turned off, current still flows to the battery through the body diode, as shown in Figure 2. To prevent this current from flowing, a standard set of on / off switches is required. One solution is to connect two sets of power MOSFETs in a common source configuration between the AC rectifier and the main battery, as shown in Figure 3. This design has been commonly used in current notebook computer supply systems. At present, an example of a common source configuration is to externally connect two separate sources of 1238503 MO ET (covered by individual packages or single package) on a printed circuit board, as shown in Figure 4. In the conventional dual-group Fuhang case of a single package, gate gate pads per chip are used for gate interconnections. The gate pole, the source pole, and the row pole are all separated from each other. In order to easily connect the wiring to the 5-pole post, the gate blade is generally placed in the upper left corner. Because the idler pads and source pads of the two sets of chips are additionally placed between the idler and the source, its Z allows the source of the power MOSFET to be internally connected. This is because if the two sets of sources are internally connected together when the wiring is combined, the alternate question and source will cause a gate-to-source short circuit. In addition, an additional set of electrical 10-layers is needed to connect the source externally. Because the manufacture of the device can be more complicated, all of these methods can be quite expensive. OBJECTS OF THE INVENTION Accordingly, it is an object of the present invention to solve at least one or more problems with the prior art. At least, the object of the present invention is to provide the public with a useful option. C 明 内] | SUMMARY OF THE INVENTION Accordingly, the present invention provides a device comprising: at least one set of two-terminal transistors, which has at least two sets of gate cymbals and at least one set of source pads, wherein Two sets of gate pads are selectively operable and a source pad is disposed between the two sets of gate pads; and at least one set of lead frames having at least one set of A connection source, a source connection region of the electrode, and at least one set of gate connection regions for connecting the operable gate pad. 1238503 Preferably, the transistor has at least two sides, and the two sets of idler pads are disposed adjacent to each side. Further preferably, the transistor system is rectangular and has four corners, and each gate pad is disposed at or adjacent to a separate corner. The step between the two groups of cymbals is preferably arranged at the corners of the adjacent 5 or is optionally arranged at the opposite corners. Preferably, the device of the present invention contains at least two sets of the transistors. The two source pads of the two sets of transistors are connected to at least one source connection area, and the lead frame has at least two gate connection areas, and the source connection area is enlarged relative to the gate connection area. 10 Another aspect of the present invention is to provide a three-terminal transistor having two sets of gate pads and at least one set of source pads, wherein the two sets of idler potentials are selectively operable, And the source tab is disposed between the two cone gate pads. Another aspect of the present invention is to provide a lead frame, which has at least two 15 solutions, a connection area and at least one set of source connection areas to connect at least two true, "electric body" each of the two terminal transistors. There are at least two sets of idler cymbals and at least one set of source pads, which are characterized in that the source connection area and the gate connection area are enlarged. A simple explanation of the formula 20 is followed, and a preferred embodiment of the present invention will be explained using examples and with reference to the accompanying drawings. Among them: FIG. 1 shows a set of common source configurations; Figure 1238503 of the "t" electric rectifier flowing to the main battery through the main diode in the closed state; Figure 3 shows the application of common source configuration in a notebook computer system; Figure 4 shows a common single Single and dual sets of MOSFETs in the package; Figure 5 shows the design of the lead frame 5 of the present invention for internal connection of a common source configuration; Figure 6 shows an example of the layout of the power MOSFETs of the present invention, where the gate The electrode pad is adjacent to the corner above each power MOSFET. Figure 7 shows another example of a leadframe design with more than two sets of power msfet in the present invention. 10 [Embodiment] Detailed description of the preferred embodiment Next, the present invention will be described by using examples with reference to the accompanying drawings. List 丨 is a list of components, so the reference numbers in the figure are easy to look up. Other objects, features and advantages disclosed by the present invention will be more apparent from the following description. Those skilled in the art will appreciate that the discussion of the present invention is merely an illustration of exemplary embodiments, and is not intended to limit the arguments of the present invention, the broader arguments of which are implemented in the exemplary structure. The following description assumes, for example, that the power MOSFETs shown in Figures 1-4 above are contained in a single electronic package. The lead frame is generally formed by a metal sheet in a single electronic package, which carries at least one group of semiconductor components, such as transistors, and provides leads for connecting the semiconductor component to other system components. Since MOSFET manufacturing and related technologies are already quite mature, the basic manufacturing and design of MOSFETs will not be discussed further here. 1238503 is another extreme point. A ^ point transistor includes — a gate, a source, and a row. The present invention uses internal remote technology + ^. To connect a two-source source to make a common source group 5 10 15 2: can :: low cost, Simplify the circuit board configuration and make the circuit interconnect. Provide an internally connected source for making a common source configuration. This is achieved by using two sets of power MOSFETs in a single step ::: Connect to the source. The combination of this method is quite simple and does not cause a gate-to-source short circuit at junction 5. In a preferred embodiment, the device 10 of the present invention shown in FIG. 5 includes-a group of lead frames 20 and-a group may include at least-a transistor portion 30 of the group M. In order to achieve internal source connection, the central lead pillars shown in the first figure are merged together to form a source connection area 2 2 ′, so the pin and source pin configuration changes, as shown in FIG. 5. That is, the central lead post used to connect the source pads can also be referred to as a source connection area 22, which is larger than each gate connection area 24. The source of power is connected to the source connection difficulty area 22. The secret connection region 22 may have any desired shape. To facilitate the bonding of the wiring to the gate pads and provide the required functions, at least one set of gate pads 32 is provided on each power MOSFET, as shown in FIG. 6. Two sets of gate pads 32 are provided in adjacent upper corners, as shown in Fig. 20. However, if necessary, the gate pad 32 may be provided at the opposite corner. In fact, with the provision of the source pads 34 between the two sets of gate pads 32, the two sets of gate pads 32 can be configured as required. Even if few 'but it is possible to require a triangular or even circular mosfet, the positioning of additional gate pads will need to be adapted to a particular shape. Of course, the final design should be practical and it will be clear to those skilled in the art. Placing two sets of gate pads 32 in adjacent corners of a rectangular MOSFET may be easier to manufacture and requires relatively little space to accommodate the required connections. In addition, the MOSFET can have more than two sets of 5 gate pads 32, if desired, even if this would increase the overall manufacturing cost. The addition of additional gate pads 32 should be familiar to those skilled in the art. The design of the MOSFET and the source connection region 22 in the present invention enables the two sets of independent gates of the power MOSFET in a common source configuration to be combined without causing a short circuit between the gate and the source bonding wiring. The present invention provides a device for use in a power supply system of a general notebook computer, for example, as shown in FIG. 6. In a packaged transistor portion 30, two sets of power MOSFETs are placed on both sides. They are individually wire-bonded to the lead frame 20. The rear side of each power MOSFET is connected to a respective column post 36. The pole post 36 is provided on one side of the lead frame, in this case, as in the lower side of FIG. The gate and source posts 15 are placed on opposite sides so that they can be connected to the lead frame 20. In Figure 6, two sets of gate pads 32 are placed at adjacent corners above each power MOSFET. One gate pad 32 on each power MOSFET is bonded to the corresponding gate post. In contrast to FIG. 5, in FIG. 6, the two sets of central lead pins on the same side of the gate post are merged together, and they are used as the source connection area 22 of the two sets of MOSFETs. Bonding the gate connection region 24 to the gate pad 32 and bonding the source connection region 22 to the source pad 34 will not cause a short circuit in the bonding wiring. The preferred embodiment of the present invention can be used in, for example, a power supply system for a notebook computer. Of course, the present invention can be used in other applications that require two sets of back-to-back MOSFETs, such as automotive electronic components, portable 10 1238503-type devices, and power supplies. The device of the present invention described above may be contained in a single electronic package, that is, the '-electronic package may include the lead frame 2 () and the two-planted MOSFET as described above. It should be noted, however, that a single electronic package may contain more than 5 groups of devices 10. In this case, a lead frame of a single electronic package currently has a plurality of devices 10, and it is logical to consider including a plurality of lead frames 20. This configuration is not counted by those skilled in the art. As shown in the figure, the device 110 has four groups of 1302 MOSFETs provided in the transistor portion, eight corresponding pole posts 136, and a group of lead frames 120. Each group of 10 MOSFETs in FIG. 7 has two groups of selectively operable gate fins 132 and a group of source pads 134, as described above. The lead frame 120 has two sets of source connection regions 122 and four sets of gate connection regions 124. Of course, if necessary, the device 110 may have multiple sets of MOSFETs, a source connection region 122, and a gate connection region 124. 15 In addition, MOSFETs can be used alone in certain applications if necessary 'for example' certain gate pads 32 may need to operate on one side of the MOSFET, while other gate pads may need to be on the other side operating. In this application, the device 10 may have only one set of MOSFETs as described above, one set of lead frames with source connection regions 22, and one set of 20 gate connection regions 24. In this case, the gate blades 32 are all operable. Although the preferred embodiments of the present invention have been described in detail using examples, it will be apparent to those skilled in the art that many modifications and variations can be made to the present invention. In addition, the embodiments of the present invention are not limited by the examples or illustrations. However, it should be understood that these modifications and changes are all aspects of the present invention within the scope of the following patent applications. For example, some of the features of the illustrated or illustrated embodiment may be used in another embodiment to produce a further embodiment. Therefore, the present invention will cover these 5 modifications and changes as disclosed by Fan Fan and its equivalent. [Brief description of the formula] Figure 1 shows a group of common source configurations; Figure 2 shows that even when the power M0SFET is in the off state, electricity / "L flows from the parent galvanic rectifier to the main diode The main battery is divided into 10 parts. Figure 3 shows the application of common source configuration in a notebook computer system. Figure 4 shows the single and dual sets of m0sfet in a conventional single package; Figure 5 shows the internal The lead frame design of the present invention connected to a common source configuration; FIG. 6 shows an example of the layout design of the power MOSFET of the present invention, in which a gate pad is adjacent to a corner above each power MOSFET. FIG. 7 shows the present invention. Another example of a lead frame design with more than two sets of power MOSFETs. [The main components of the figure represent the symbol table] 10 ... devices with two sets of MOSFETs 11 〇 ... devices with more than two sets of MOSFETs 20 ... lead frame 120 ... Lead frame 22 ... source connection area 122 ... source connection area 24 ... gate connection area 124 ... gate connection area 30 ... transistor portion 130 ... transistor portion 32 ... gate pad 132 ... gate pad 34 ... Source pad The source pad 36 ... 134 ... 136 ... discharge pole 12 pole row