TWI233077B - Driving circuit for active organic electro-luminescence display - Google Patents
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j 案號 92119606 曰 修正 五、發明說明(1) --- 【發明所屬之技術領域】 本發明係有關一種主動式有機電激發光顯示器之驅動 電路’尤指一種可改善主動式有機發光二極體面板影像不 均勻之驅動裝置與方法。 【先前技術】 有機電激發光顯示器技術(Organic Electroluminescence Display ;0LED) 依驅動方式 可分為被動式 (Passive Matrix ; PM0LED)與主動式(Active Matrix ; AM0LED)。而所謂的主動式驅動〇LED(AMOLED),即是利用 薄膜電晶體(Thin Film Transistor ; TFT),搭配電容來 儲存訊號,藉此控制0LED的亮度灰階表現。 雖然被動式0LED的製作成本及技術門檻較低,卻受制 於驅動方式,解析度無法提高,因此應用產品尺寸侷限於 約5英吋以内,產品將被限制在低解析度小尺寸市場。若 要得到高精細及大晝面則須以主動驅動方式為主,所謂的 主動式驅動是以電容儲存訊號,所以當掃描線掃過後晝素 仍然能保持原有的亮度;至於被動驅動下,只有被掃描線 選擇到的晝素才會被點亮。因此在主動驅動方式下,0LED 並不需要驅動到非常高的亮度,因此可達到較佳的壽命表 現,也可以達成高解析度的需求。0LED結合TFT的技術可 實現主動式驅動0LED,可符合對目前顯示器市場上對於畫 面播放的流暢度,以及解析度越來越高要求,充分展現 0LED上述之優越的特性。 在玻璃基板上成長TFT的技術’可為非晶矽(j Case No. 92119606 Amendment V. Description of the invention (1) --- [Technical field to which the invention belongs] The present invention relates to a driving circuit for an active organic electroluminescent display, especially an improved organic light emitting diode Driving device and method for uneven panel image. [Previous technology] Organic electroluminescence display (0LED) technology can be divided into passive (Passive Matrix; PM0LED) and active (Active Matrix; AM0LED) according to the driving method. The so-called active driving LED (AMOLED) uses a thin film transistor (TFT) and a capacitor to store the signal, thereby controlling the grayscale performance of the 0LED. Although the production cost and technical threshold of passive 0LEDs are low, the resolution cannot be improved due to the driving method. Therefore, the size of the application product is limited to about 5 inches, and the product will be limited to the low-resolution small-size market. In order to obtain high-definition and large daylight, it is necessary to use active driving. The so-called active driving uses capacitors to store signals, so when scanning lines are scanned, the daylight can still maintain the original brightness. As for passive driving, Only the daylight selected by the scan line will be lit. Therefore, in the active driving mode, the 0LED does not need to be driven to a very high brightness, so it can achieve better life performance and also meet the requirements of high resolution. The technology of 0LED combined with TFT can actively drive 0LED, which can meet the requirements for the smoothness of the screen playback and the increasingly higher resolution in the current display market, fully displaying the above-mentioned superior characteristics of 0LED. The technology for growing TFTs on glass substrates can be amorphous silicon (
第5頁 號 92119606 五、發明說明Ή) amorphous silicon ; a-Si)製程與低溫多晶石夕(L〇w Temperature p〇ly-silicon ;LTPS)製程,LTps 71^與8一Page 5 No. 92119606 V. Description of the Invention Ή) amorphous silicon; a-Si) process and low temperature polycrystalline (LTPS) process, LTps 71 ^ and 81
Si TFT的最大分別,在於其電性與製程繁簡的差里。^Tps TFT擁有較高的載子移動率,較高載子移動率意味著tft能 知:供更充伤的電〃il ’然而其製程上卻較繁複;而a g i τ ρ τ 則反之’雖然a-Si的載子移動率不如ltps,但由於其製程 較簡單且成熟’因此在成本上具有不錯的競爭優勢。 如是,由於低溫多晶矽(LTPS)製程能力的限制,導致 所製造出來的薄膜電晶體(TFT)元件其臨界電壓( Threshold Voltage)及電子遷移率(M〇bUity)會產生 變異’因此每個TFT元件的特性會有所不同。當驅動系統 使用類比電壓调變方式以表現灰階時,因不同書素之j F τ 之特性不同,所以即使輸入相同之資料(Data )電壓訊號 ,卻會使有機發光二極體(0LED )產生不同之輸出電流, 造成顯示面板上不同畫素之有機發光二極體元件(〇Le d)發 出之亮度不同。這個現象會使有機發光二極體面板顯示出 灰階不良之影像,嚴重破壞面板影像之均勻性(I mage Uniformity) 〇 現階段AM0LED最迫切需要解決的問題,是如何減輕低 溫多晶石夕薄膜電晶體特性不均勻所帶來的不良影響。由於 這些不良影響會從面板顯示出來的影像馬上就能察覺,因 此’不解決這個問題就很難進行下一步的開發應用。 於是,為解決上述之缺點,美國專利US 6, 229, 506 Active Matrix Light Emitting Diode PixelThe biggest difference between Si TFT lies in the difference between its electrical properties and the complicated process. ^ Tps TFT has a higher carrier mobility. A higher carrier mobility means that tft can know: for more damaging electricity, 'but its process is more complicated; while agi τ ρ τ is the opposite'. The carrier mobility of a-Si is not as good as ltps, but because of its simpler and more mature process, it has a good competitive advantage in terms of cost. If so, due to the limitation of the low temperature polycrystalline silicon (LTPS) process capability, the threshold voltage (Threshold Voltage) and electron mobility (MobUity) of the manufactured thin film transistor (TFT) device will vary. Therefore, each TFT device The characteristics will be different. When the drive system uses an analog voltage modulation method to represent gray levels, because the characteristics of j F τ of different books are different, even if the same data (Data) voltage signal is input, the organic light emitting diode (0LED) will be made. Different output currents are generated, resulting in different brightness of the organic light emitting diode (OLED) elements of different pixels on the display panel. This phenomenon will cause the organic light-emitting diode panel to display a poor grayscale image, which will seriously damage the uniformity of the panel image (I mage Uniformity). ○ At this stage, the most urgent problem for AM0LEDs is how to reduce the low-temperature polycrystalline silicon thin film. Adverse effects of non-uniform transistor characteristics. Since these adverse effects will be immediately noticeable from the image displayed on the panel, it is difficult to carry out the next development application without solving this problem. Therefore, in order to solve the above-mentioned shortcomings, US Patent 6,229,506 Active Matrix Light Emitting Diode Pixel
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92119606 五、發明說明(3) 年 修正92119606 V. Description of Invention (3) Years
Structure And Concomitant Method』,此專利中提出一 專利中有提出一種4T2C (4個TFT電晶體與2個電容)之畫 素電路,如「第4圖」所示,使用自動歸零(Auto-Zero ) 的機制,補償TFT元件臨界電壓(Threshold Voltage)的 變異,以改善影像之均勻性。驅動線路之控制信號的驅動 時序分為歸零階段(Auto-Zero Phase ) 510、載入資料階 段(Load Data Phase ) 520 與發光階段(Illuminate Phase)530 ’請參閱『第5圖』所示,係「第4圖」之控制 信號時序圖。 在歸零階段510之前,電晶體T3及電晶體T4為截止( OFF) ’電晶體T2為導通(ON),此時流過有機發光二極體 (Organic Light Emitting Diode ;OLED) 460 的電流為前 一個畫面框(Frame)之電流,由電晶體T1 2Vsg(源極、閘 極電壓差,即儲存於電容。兩端之電壓差)來控制。 進入歸零階段51 〇之後,先導通(〇N)電晶體T4,接著 導通(ON)電晶體T3,使電晶體11之汲極(1)以丨11)與開極( Gate)相連接,形成—個二極體之接法,然後截止()電 晶體T2,此時電晶體T1之閘極(Gate)電壓會上升至一電壓 值,此電壓值等於高電位(Vdd)減去電晶體n之臨界電壓( m〇ld V〇ltage ;vth),亦即儲存於電容c 壓差為電晶體T1之臨炅雷厭"Structure And Concomitant Method", a patent proposed in this patent includes a 4T2C (4 TFT transistors and 2 capacitors) pixel circuit, as shown in "Figure 4", using Auto-Zero (Auto-Zero ) Mechanism to compensate for variations in the threshold voltage of the TFT element to improve the uniformity of the image. The driving timing of the control signal of the driving circuit is divided into an Auto-Zero Phase 510, a Load Data Phase 520, and an Illuminate Phase 530. 'Please refer to "Figure 5", It is the timing chart of the control signal of "Figure 4". Before the reset phase 510, transistor T3 and transistor T4 are OFF (transistor T2 is ON), and at this time, the current flowing through Organic Light Emitting Diode (OLED) 460 is The current of a frame is controlled by the transistor T1 2Vsg (the voltage difference between the source and the gate, which is stored in the capacitor. The voltage difference between the two ends). After entering the zeroing stage 51 °, the transistor T4 is turned on (ON) first, and then the transistor T3 is turned on (ON), so that the drain (1) of the transistor 11 is connected to the gate (11) with the gate 11). A diode connection is formed, and then the transistor T2 is turned off. At this time, the gate voltage of the transistor T1 will rise to a voltage value, which is equal to the high potential (Vdd) minus the transistor. The threshold voltage of n (m0ld V〇ltage; vth), which is stored in the capacitor c, and the voltage difference is the threshold voltage of transistor T1.
曰瓶11您^界電壓,之後再將電晶體T3截止(OFF ),p可使電晶體τι之臨界電壓(vth)儲存 成歸零階段510之動作。 帝仔在電谷Cs上,兀 接下來進入載入資料階段520,若資料線(Date LiAfter the voltage at the threshold of the bottle 11 is turned off, the transistor T3 is turned off (p), and the threshold voltage (vth) of the transistor τι can be stored as the action of the zeroing stage 510. Emperor Tsai is on the electric valley Cs, and then enters the data loading stage 520. If the data line (Date Li
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修正 ψψ^ 92119Rf)fi 五、發明說明(4) 410上變動之電壓為Δν,透過電晶體T4及電容以 Couple)到電晶體71之閘極((^4)端,因此,儲存於電容 〇3兩&之電壓差為Αγχ [cc/(cc + Cs)]加上原本存於電容Cs 之Vth ’亦即電晶體T1 iVsg會包含電晶體T1之以卜,這使 得電晶體τι輸出之電流僅與資料線410上變動之電壓(Δν )有關’而不受每個畫素内電晶體之Vth之影響。 最後再進入發光階段530,此時讓電晶體T4截止(〇FF) ’且使電曰曰體T2導通(ON),電晶體T1會輸出目前畫面框( F r a m e )之電流流過有機發光二極體& 6 〇,使有機發光二極 體460元件發亮。 雖然此4T2C之晝素電路可以補償各畫素内之電晶體元 件臨界電壓(Vth )的變異,改善顯示器整體影像之均勻性 ’但該專利除了資料線41 〇、掃描線420、電源供應線(vdd )450之外’還需有歸零控制線(Aut〇 — Zero Line) 430與 發光控制線(I 1 luminate Line ) 440等控制之線路,藉此 電容Cs負責記錄全部臨界電壓以及所載入之部份資料電壓 ,而資料載入是利用電容耦合電壓的方式,較為複雜,因 此驅動方式的複雜度會因此增加,造成須使用非標準形式 之資料驅動I C,增加製造之成本。 同樣的為解決習知之問題,Phi l ips公司亦發表一標 題為『A Comparison of Pixel Circuits for Active Matrix Polymer/〇rganic LED Displays』之論文,該論 文中提出一種4T2C之晝素電路,如「第6圖」所示。此電 路巧妙改變上述美國專利US 6, 229, 506中晝素電路(第4Revise ψψ ^ 92119Rf) fi V. Description of the Invention (4) The voltage on 410 is Δν, and the transistor T4 and capacitor are used to reach the gate ((^ 4) of transistor 71, so it is stored in the capacitor. 3 The voltage difference between two & is Aγχ [cc / (cc + Cs)] plus Vth 'originally stored in the capacitor Cs, that is, the transistor T1 iVsg will include the transistor T1, which makes the output of the transistor τι The current is only related to the varying voltage (Δν) on the data line 410 ', and is not affected by the Vth of the transistor in each pixel. Finally, it enters the light-emitting stage 530, at which time the transistor T4 is turned off (0FF)' and When the electric body T2 is turned on, the transistor T1 will output the current of the current frame (Frame) to flow through the organic light emitting diode & 60, so that the organic light emitting diode 460 element is illuminated. The 4T2C day element circuit can compensate the variation of the threshold voltage (Vth) of the transistor element in each pixel, and improve the uniformity of the overall image of the display. However, the patent except for the data line 41 〇, the scan line 420, and the power supply line (vdd) Beyond 450, you need to have a zero-zero control line (Aut〇- Zero Line) 430 and The light control line (I 1 luminate Line) 440 and other control lines, through which the capacitor Cs is responsible for recording all critical voltages and some of the loaded data voltage, and the data loading is a more complicated way using capacitive coupling voltage, so The complexity of the driving method will increase, resulting in the need to use non-standard forms of data-driven ICs, which will increase the cost of manufacturing. Similarly, in order to solve the conventional problems, Philips also published a title entitled "A Comparison of Pixel Circuits for Active Matrix Polymer / 〇rganic LED Displays ”paper, this paper proposes a 4T2C daylight circuit, as shown in“ Figure 6. ”This circuit cleverly changes the above-mentioned US patent US 6,229,506 daylight circuit (No. 4
第8頁 圖)中兩個電容的連接位置,以解決上—篇專利資料電壓 載入方式過於複雜而不易實施之缺失。所以該論文所提之 晝素電路除了資料線610、掃描線6 20、電源供應線(Vdd) 65 0之外,如同美國專利us 6,229,5〇6還需有歸零控制線 (Auto-Zero Line ) 630 與發光控制線(IUuminate Une )6 4 0等控制之線路。 又,該論文中驅動線路之控制信號的驅動時序同美國 專利 US 6, 229, 506 分為歸零階段(Aut〇-Zero Phase) 510 、載入資料階段(Load Data Phase ) 520與發光階段( Illuminate Phase ) 530,請參閱『第5圖』所示,係同時 為「第6圖」之控制信號時序圖。 該執行歸零階段510時,電晶體T64為截止(〇FF), 先導通(ON )電晶體T63,使電晶體T61之汲極與閘極相連 接,形成一個二極體之接法,然後截止電晶體T62,此時 電晶體Τ61之閘極電壓會上升至高電位(Vdd)減去電晶體 T61之臨界電壓(threshold voltage ;Vth),亦即儲存於 電容Cl及電容C2兩者電壓之總和為電晶體Τ6ι之臨界電壓 (vth) ’之後再將電晶體T63截止(0FF),完成歸零階段 5 1 0之動作。 此電路載入資料電壓的方式是透過電晶體T64的導通 ’資料電壓會儲存於電容C1中,此時電容C2兩端之電壓仍 會保持之前所儲存之一定比例之V t h電壓值,即等於[c! / (Cl+C2)]x Vth。因此,電容ci及電容C2兩者電壓之總和為 (¥(1(1](1&13+[(:1/((:1+€2);^\^11),亦即電晶體丁61之73&; 五、發明說明(6) 包含-部份的電晶體T61之Vth電壓值,這可以減 m輸出電流與電晶體T61臨界電壓值的相關性,補 伤電晶體T61因製知因素所造成臨界電壓(hh)之變異 該論文中驅動用電晶體T63的臨界電壓值是由兩1固電° 容(Cl、C2 )共同記憶,而其中一個電容所存之一部份臨 界電壓值資訊會在資料電壓載入時失去,因此該方法僅能 補償一部份因製程因素所造成臨界電壓之變異。 【發明内容】 ' 爰是,本發明之主要目的在於解決上述傳統之缺失, 避免缺失存在’本發明係基於目前AM〇LED的關鍵零組件如 TFT-OLED Data 1C尚未成熟,所以使用目前發展成熟的 TFT-LCD Source 1C之技術來支援TFT 一 〇LED的作動/但因 為TFT-LCD Source 1C是採用電壓調節(v〇ltageThe connection position of the two capacitors in the figure on page 8), to solve the above-mentioned patent document, the voltage loading method is too complicated to be implemented. Therefore, in addition to the data line 610, the scan line 6 20, and the power supply line (Vdd) 65 0, the day-to-day circuit mentioned in this paper also needs a zero-zero control line (Auto-Zero) as in the US patent US 6,229,506. Line) 630 and IUuminate Une 6 4 0 and other control lines. In addition, the driving timing of the control signal of the driving circuit in this paper is divided into the Uto-Zero Phase 510, the Load Data Phase 520, and the light emitting phase ( Illuminate Phase) 530, please refer to "Figure 5", which is also the timing chart of the control signal of "Figure 6". In the execution of the reset phase 510, the transistor T64 is turned off (0FF), and the transistor T63 is first turned on, so that the drain of the transistor T61 is connected to the gate to form a diode connection, and then Turn off transistor T62. At this time, the gate voltage of transistor T61 will rise to a high potential (Vdd) minus the threshold voltage (Vth) of transistor T61, which is the sum of the voltages stored in capacitor Cl and capacitor C2. After the threshold voltage (vth) of the transistor T6ι is turned off, the transistor T63 is turned off (0FF), and the operation of 5 1 0 in the return to zero phase is completed. The way to load the data voltage in this circuit is through the conduction of transistor T64. The data voltage will be stored in capacitor C1. At this time, the voltage across capacitor C2 will still maintain a certain percentage of V th voltage value stored before, which is equal to [c! / (Cl + C2)] x Vth. Therefore, the sum of the voltages of the capacitor ci and the capacitor C2 is (¥ (1 (1) (1 & 13 + [(: 1 / ((: 1 + € 2); ^ \ ^ 11), which is the transistor D 73 of 61 & V. Description of the invention (6) Including-part of the Vth voltage value of transistor T61, which can reduce the correlation between the m output current and the threshold voltage value of transistor T61, and to repair the transistor T61 due to the system Variation of the threshold voltage (hh) caused by factors The threshold voltage value of the driving transistor T63 in this paper is memorized by two solid capacitors (Cl, C2), and one of the threshold voltage values stored in one capacitor The information will be lost when the data voltage is loaded, so this method can only compensate part of the variation of the threshold voltage caused by process factors. [Summary of the Invention] 爰 Yes, the main purpose of the present invention is to solve the above-mentioned traditional defects and avoid Lack of existence 'The present invention is based on the current key components of AMOLED such as TFT-OLED Data 1C, so the technology of TFT-LCD Source 1C, which is currently developed and mature, is used to support the operation of TFT-10LED / but because of TFT- LCD Source 1C uses voltage regulation (v〇ltage
Modulation )的方式,因此須設計一電壓寫入型的驅動電 路。 如是,本發明提出一種可以補償薄膜電晶體臨界電壓 變異的電壓寫入型主動式有機發光二極體顯示器驅動電路 ’改善因薄膜電晶體臨界電壓(Threshold Voltage)特性 不均勻所造成之影像缺陷。 為達上述之目的,本發明提出之驅動裝置每一畫素包 括4個TFT及2個電容,一掃描TFT,一重置TFT,一偵測tft ,一驅動TFT,二電容(Cd、Ct )與一有機電激發光元件 ,其中該掃描T F T之閘極(g a t e )是由該畫素所在列之該條 掃描線所控制,而該掃描TFT之汲極(drain)則連接至該書Modulation), so a voltage write type drive circuit must be designed. If so, the present invention proposes a voltage write-type active organic light emitting diode display driving circuit that can compensate for the variation of the threshold voltage of a thin film transistor ′ to improve image defects caused by unevenness of the threshold voltage characteristics of the thin film transistor. To achieve the above purpose, each pixel of the driving device provided by the present invention includes 4 TFTs and 2 capacitors, a scanning TFT, a resetting TFT, a detecting tft, a driving TFT, and two capacitors (Cd, Ct). And an organic electroluminescent element, wherein the gate of the scanning TFT is controlled by the scanning line in which the pixel is located, and the drain of the scanning TFT is connected to the book
92H9606 —年月 五、發明說明⑺ ----— $所在行之資料線;又重置m及偵測TFT則是由 =住線來控制;而電容Cd係用來儲存的 料電壓值(Vdata),而電容Ct則是用來像t唬的1 壓值(Vth),藉此,電容Cd及電容。兩者“;的: ::::使驅動TFT輸出一相對應大小之電流予有機電激 【實施方式】 茲有關本發明之詳細内容及技術說明,現配合圖式說 明如下: 立請參閱「第1圖所示」,係本發明之每一晝素内電路 示意圖。如圖所示:本發明之晝素200之驅動^路中元件 包括4個TFT及2個電容,其連接關係為: 一/描甘TFT 210,該掃描TFT 210之閘極與一掃描線 1 2 0連接,其汲極則連接至一資料線丨丨〇 ; 一重置TFT 220,該重置TFT 2 20之閘極與一臨界電壓 鎖住線(ThreShold-L〇Ck)130連接,其源極接一電源供麻 線150,其汲極與上述掃描TFT 210之源極相連接;....... 一電容cd,該電容cd有兩端,係設置於上述掃描TFT 210之源極與重置TFT 220之源極之間; 一驅動TFT 240 ’該驅動TFT 2 40之源極_上述電源供 應線1 50相連接; ' 一偵測TFT 230,該偵測TFT 2 30之閘極與上述臨界電 壓鎖住線130連接,其汲極與上述驅動TFT 240之問極相連 接’其源極與上述驅動T F T 2 4 0之没極相連接;92H9606 —Year 5th, the description of the invention⑺ ----—— The data line of the line where $ is reset; the reset m and the detection TFT are controlled by the = line; and the capacitor Cd is used to store the material voltage value ( Vdata), and the capacitor Ct is used as a voltage value (Vth) of t1, thereby the capacitor Cd and the capacitor. "::::: Makes the driving TFT output a current of a corresponding magnitude to the organic electro-excitation. [Embodiment] The detailed content and technical description of the present invention are described below in conjunction with the drawings: Please refer to" " "Shown in Figure 1" is a schematic diagram of the circuit of each day element of the present invention. As shown in the figure: the driving element of the day element 200 of the present invention includes 4 TFTs and 2 capacitors, and the connection relationship is as follows: a / TFT 210, the gate of the scanning TFT 210 and a scanning line 1 20 connection, its drain is connected to a data line 丨 丨; a reset TFT 220, the gate of the reset TFT 2 20 is connected to a threshold voltage lock line (ThreShold-L0Ck) 130, The source is connected to a power source for the twine 150, and the drain thereof is connected to the source of the above-mentioned scanning TFT 210;... A capacitor cd, which has two ends, is arranged on the above-mentioned scanning TFT 210. Between the source and the source of the reset TFT 220; a driving TFT 240 'the source of the driving TFT 2 40_the above power supply line 1 50 is connected;' a detecting TFT 230, the detecting TFT 2 30 The gate is connected to the above-mentioned threshold voltage lock line 130, and its drain is connected to the question of the driving TFT 240, and its source is connected to the above-mentioned driving TFT 240.
電谷Ct,a亥電谷Ct有兩端,係設置於上述重置tft 220之汲極與驅動TFT 24〇之閘極之間; 山、一有機電激發光元件2 5 〇,該有機電激發光元件2 5 〇 一 端為陽極,與上述驅動TFT 24〇之汲極相連接,另一端為 陰極’該負極接一共陰極線(C〇mm〇n Line) 140。 请再配合「第2圖」,係本發明之基板上晝素電路的 連結與控制示意圖。如圖所示··其中掃描線12〇 (S1、S2 、s3 · · · Sn )與資料線11〇 (D1、D2、D3 · · · Dm )之 父會處即為每一晝素200之所在。現同時參閱「第1、2圖 」’其中,該晝素200之主要控制關係如下,其掃描71?丁 210之閘極(gate)是由該晝素2〇〇所在列之該條掃描線12〇 所控制’而該掃描T F T 2 1 0之沒極(d r a i η )則連接至該晝 素20 0所在行之資料線11〇。又重置!^^ 22〇及偵測TFT 23〇 則疋由臨界電壓鎖住線1 30來控制。電容Cd係用來儲存代 表影像信號的資料電壓值(Vdata),而電容Ct則是用來 儲存驅動TFT 240的臨界電壓值(Vth),藉此,電容Cd及 電容Ct兩者儲存電壓的總和會使驅動TFT 240輸出一相對 應大小之電流予有機電激發光元件2 5 0。The electric valley Ct, a Hai electric valley Ct has two ends, which are arranged between the drain of the reset tft 220 and the gate of the driving TFT 24o; the mountain, an organic electric excitation light element 2 5o, the organic electric One end of the excitation light element 2500 is an anode, which is connected to the drain of the driving TFT 24b, and the other end is a cathode. The negative electrode is connected to a common cathode line 140. Please cooperate with "Figure 2" again, which is a schematic diagram of the connection and control of the daylight circuit on the substrate of the present invention. As shown in the figure, where the father of the scanning line 12 (S1, S2, s3, ..., Sn) and the data line 11 (D1, D2, D3, ..., Dm) is 200 times per day. Where. Now refer to "Figures 1 and 2" at the same time. Among them, the main control relationship of the diurnal 200 is as follows. The gate of scanning 71 to 210 is the scanning line listed by the diurnal 200. 12 ′ is controlled and the scanning electrode drai η is connected to the data line 11 of the row where the dioxin 20 is located. Reset again! ^^ 22〇 and detection TFT 23〇 are controlled by the threshold voltage lock line 1 30. The capacitor Cd is used to store the data voltage value (Vdata) representing the image signal, and the capacitor Ct is used to store the threshold voltage value (Vth) of the driving TFT 240. Thus, the capacitor Cd and the capacitor Ct store the total voltage The driving TFT 240 is caused to output a current of a corresponding magnitude to the organic electroluminescent light element 250.
即’顯示面板100上每個晝素200之電路中的重置TFTThat is, the reset TFT in the circuit of each day element 200 on the display panel 100
220及偵測TFT 230都是由同一條臨界電壓鎖住線1 30來控 制,而每個畫素20 0中有機電激發光元件250的陰極則是 共接至一共陰極線1 4 0,共陰極線1 4 0會再透過一個外部之 開關元件1 7 0連接至系統之接地端,該開關元件1 7 〇是由一 顯示信號線1 6 0所控制。每個晝素2 0 0之電路中的驅動τ F T220 and detection TFT 230 are controlled by the same threshold voltage lock line 1 30, and the cathode of the organic electro-optical light element 250 in each pixel 20 0 is connected to a common cathode line 1 40, and a common cathode line 1 40 will be connected to the ground terminal of the system through an external switching element 170. The switching element 170 is controlled by a display signal line 160. Drive τ F T in the circuit of each day element 2 0 0
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El 矣 蒙號 92119606 修正 五、發明說明(9) 24 0的源極係共接至一電源供應線(Vdd ) 1 5 0。 本發明之電路動作說明如下: 請參閱「第3圖」所示,係本發明之控制信號時序圖 。如圖所示:本發明之驅動信號週期可分為三個階段,首 先,臨界電壓鎖住階段(Threshold-Lock Phase ) 310 : 臨界電壓鎖住線(Threshold-Lock)130之信號,會使每個 晝素驅動電路中的重置TFT 220及偵測TFT 230導通(ON) ,當重置TFT 220導通(ON )時,會使原本儲存影像資料 電壓值的電容Cd放電(Discharge)。之後顯示信號線160信 號線會控制顯示面板1〇〇外之開關元件170將之截止(OFF ),如是,使共陰極線1 4 0與系統之接地端呈現斷路( open circuit)的狀態,這時原本流經有機電激發光元件 250之驅動TFT 240的電流不再通過該有機電激發光元件 250,而改流至此時為導通(on )狀態之偵測TFT 230,使 驅動TFT 240進行偵測其臨界電壓之動作。因為驅動TFt 240的電流會經過偵測TFT 230、電容Ct、重置TFT 22 0的 途位迫使電谷Ct上的儲存電壓越來越小,如此將導致驅動 T F T 2 4 0電流也會因此越來越小,此現象會直到驅動τ ρ τ 240電流變成0為止。 最後’電容Cd不會儲存任何電荷(即兩端電壓為〇 ), 電容Ct兩端電壓差則會等於驅動TFT 24〇的臨界電壓值( Vth),即電谷Cd放電重置,而電容將記憶臨界電壓值。 (畫素200電路請參閱「第1圖」)。綜合上述,在經過臨 界電壓鎖住階段310後每個畫素2〇〇電路中的驅動TFT 24〇El 矣 Mongolia No. 92119606 Amended V. Description of the Invention (9) The source of 24 0 is connected to a power supply line (Vdd) 1 50. The circuit operation of the present invention is described as follows: Please refer to "Figure 3", which is a timing chart of the control signal of the present invention. As shown in the figure, the driving signal cycle of the present invention can be divided into three phases. First, the threshold voltage lock phase (Threshold-Lock Phase) 310: the signal of the threshold voltage lock line (Threshold-Lock) 130 will cause each The reset TFT 220 and the detection TFT 230 in the daylight driving circuit are turned on. When the reset TFT 220 is turned on, the capacitor Cd that originally stored the image data voltage value is discharged (Discharge). After that, the display signal line 160 will control the switching element 170 outside the display panel 100 to turn it off. If so, the common cathode line 140 and the system ground terminal will be in an open circuit state. At this time, the original The current flowing through the driving TFT 240 of the organic electro-excitation light element 250 no longer passes through the organic electro-excitation light element 250, but instead flows to the detection TFT 230 which is in an on state at this time, so that the driving TFT 240 detects the Action of critical voltage. Because the current driving TFt 240 will pass through the way of detecting TFT 230, capacitor Ct, and resetting TFT 22 0 to force the storage voltage on valley Ct to become smaller and smaller, this will cause the driving TFT 2 40 current to increase. As it gets smaller, this phenomenon will continue until the drive τ ρ τ 240 current becomes zero. Finally, the capacitor Cd will not store any charge (that is, the voltage across the capacitor is 0), and the voltage difference across the capacitor Ct will be equal to the threshold voltage (Vth) of the driving TFT 24o, that is, the valley Cd will be reset and the capacitor will be discharged. Remember the threshold voltage. (Please refer to "Figure 1" for pixel 200 circuit). In summary, the driving TFT 24 in each pixel 200 circuit after the critical voltage lock-in phase 310 has passed.
第13頁Page 13
的臨界電壓值(Vth)會儲存在自己晝素200電路中的電容Ct 接下來’臨界電壓鎖住線丨30之信號,會使每個晝素 20 0驅動電路中的重置tft 220及偵測TFT 230截止(OFF)The critical voltage value (Vth) will be stored in the capacitor Ct in the circuit of the daytime 200. The signal of the threshold voltage lock line 丨 30 will make each daytime 200 drive the reset tft 220 and detect TFT 230 cut off (OFF)
’再進入第二階段’寫入階段(Write Phase) 320 :在寫 入階段3 20内,各掃描線12〇 (SI、S2 · · .Sn)會依序送 出掃描信號,當掃描信號位移至該條掃描線丨2〇時,該條 掃描線120上所有之晝素中驅動電路的掃描^了 210會導 通(ON ),由於掃描TFT 210的導通(ON )與重置TFT 22 0及偵測TFT 230之截止(〇FF),因此資料線11〇上的資 料電壓(Vdata)可以透過掃描TFT 210的導通(ON)而存 入電容Cd中,電容Ct則因重置TFT 220及偵測TFT 230之截 止(OFF )而始終保持之前所記憶之臨界電壓值(vth )。 如此最後,電容Cd兩端電壓差會等於電源電壓(Vdd )減 去資料電壓(Vdata ),即電容Cd兩端電壓為(Vdd-Vdata)'Re-enter the second phase' Write phase 320: During the writing phase 3 20, each scanning line 12o (SI, S2 · · .Sn) will send the scanning signal in sequence. When the scanning signal is shifted to When the scanning line is 20, the scanning of the driving circuit in all the celestial elements on the scanning line 120 will turn on 210, because the scanning TFT 210 is turned on and resets the TFT 220 and the detection Measure the cut-off (FF) of the TFT 230, so the data voltage (Vdata) on the data line 110 can be stored in the capacitor Cd by scanning the ON of the TFT 210, and the capacitor Ct is reset by the TFT 220 and detected The TFT 230 is turned off and always maintains the threshold voltage value (vth) previously memorized. In the end, the voltage difference between the capacitor Cd will be equal to the power supply voltage (Vdd) minus the data voltage (Vdata), that is, the voltage across the capacitor Cd will be (Vdd-Vdata)
;如是電·容Cd及電容Ct兩者儲存電壓的總和會等於(vdd-Vdata + Vth);而,此電壓總和(vdd-Vdata + Vth)會使驅動 TFT 240在下一階段(顯示階段330 )時可以輸出一相對應 大小之電流予有機電激發光元件2 50,所以此電流(I ) 大小可以下列數學式表示: 1 = (1/2) X ^ X (Vsg-Vth)2 I = (l/2)x y3x(Vdd-Vdata + Vth-Vth)2 1=(1/2)x ^ x (Vdd-Vdata)2 由上述之數學式(其中/3為驅動TFT 240之電導係數(If the storage voltage of the capacitor Cd and the capacitor Ct is equal to (vdd-Vdata + Vth); and this voltage (vdd-Vdata + Vth) will drive the TFT 240 in the next stage (display stage 330) A current of a corresponding magnitude can be output to the organic electroluminescent light element 2 50, so the magnitude of this current (I) can be expressed by the following mathematical formula: 1 = (1/2) X ^ X (Vsg-Vth) 2 I = ( l / 2) x y3x (Vdd-Vdata + Vth-Vth) 2 1 = (1/2) x ^ x (Vdd-Vdata) 2 According to the above mathematical formula (where / 3 is the conductivity coefficient of the driving TFT 240 (
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年 月 Fj t號92119606_年月曰_修正 _ ΪΤ發日 (11)Year Month Fj t No. 92119606_Year Month _Revision _ ΪΤ 发 日 (11)
Transconductance Parameter)得知,驅動TFT 240 輸出 電流(I )之大小與其本身之臨界電壓值(Vth )無關,只 與寫入之資料電壓(Vdata )大小有關,所以可以補償薄 膜電晶體(TFT)因製程因素所造成的臨界電壓(vth )之變 異。 當最後一條掃描線120 (Sn)也完成資料電壓(Vdata )信號的寫入之後,接下來,顯示信號線1 6 〇會控制開關 元件170將之導通(on ),使共陰極線140連接至系統之 接地端,進入第三階段,顯示階段(Display Phase ) 33〇 « 在這顯示階段330,每個晝素20 0驅動電路中的驅動TFT 240就可以輸出與寫入之資料電壓(Vdata )有關之電流( I)予有機電激發光元件250,使有機電激發光元件250 發出適當之亮度,而’此輸出電流(I )大小與驅動TFT 240之臨界電壓值)無關。 綜合上述說明,本發明相較於習知美國專利us 6,2 2 9,5 0 6 ’本案技術資料電壓載入方式之實現可以使用 近似現今普遍之TFT-LCD Source IC (Voltage Mode),避 免複雜之動作。 又’相較於習知之PHILIPS論文『A Comparison ofTransconductance Parameter) learned that the magnitude of the output current (I) of the driving TFT 240 has nothing to do with its own threshold voltage value (Vth), and it is only related to the size of the written data voltage (Vdata). Variation of the threshold voltage (vth) caused by process factors. After the writing of the data voltage (Vdata) signal is also completed in the last scanning line 120 (Sn), the display signal line 160 will control the switching element 170 to be turned on, so that the common cathode line 140 is connected to the system. The ground terminal enters the third phase, the display phase (Display Phase) 33〇 «In this display phase 330, the driving TFT 240 in the driving circuit of each day element 200 can output the data voltage (Vdata) The current (I) is applied to the organic electroluminescent device 250, so that the organic electroluminescent device 250 emits appropriate brightness, and the magnitude of the output current (I) is independent of the threshold voltage of the driving TFT 240). Based on the above description, compared with the conventional U.S. patent US 6,2 2,9,506, the present invention can implement the voltage loading method of the technical data in this case, which can use the TFT-LCD Source IC (Voltage Mode), which is generally common today. Complex actions. Also ’compared to the acquainted PHILIPS paper" A Comparison of
Pixel Circuits for Active Matrix Po1ymer/Organic LED Displays』,本案技術將臨界電壓值全部記錄在一個 電容(臨界電壓儲存電容)内,來補償臨界電壓變異的效 應0Pixel Circuits for Active Matrix Po1ymer / Organic LED Displays ”, the technology of this case records all the threshold voltage values in a capacitor (threshold voltage storage capacitor) to compensate the effect of the threshold voltage variation.
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奪號 92119606 年月曰_^ 五、發明說明(12) 再者,目前AMOLED產業在關鍵零組件的供應仍未成 熟,如TFT -OLED Data 1C,若能使用目前發展成熟的tft-LCD Source 1C之技術來支援TFT-OLED的應用,將會解決 很多驅動1C開發之問題。而TFT-LCD Source 1C是採用 Voltage Modulation的方式,因此須設計如本發明之電壓 寫入型的驅動電路。 本發明使用兩個電容(Cd、Ct )來分別處理兩件不同 的事情,一個電容Ct專門負責全部臨界電壓值(Vth )的 記錄’另一個電容Cd則專門負責全部資料電壓值(Vdata )的記錄。不同於美國專利US 6,229, 506中,電容cs須負 責§己錄全部臨界電壓(V t h )以及所載入之部份資料電壓、 〇(13七8);也不同於?1111^1?3之論文,由電容(]1及電容[2 兩者共同記錄臨界電壓,因此電容C2只有記錄到部份臨界 電壓,記錄在電容C1内之部份臨界電壓最後會失去。 即’本發明提出之主動式有機電激發光顯示器之驅動 電路,可以有以下之優點: 1、可以將臨界電壓值(vth)全部記錄在一個電容ct (臨界電壓儲存電容)内,因此,能完全補償臨界電壓變異 的效應。 ' 2、該資料電壓(Vdata)載入方式之實現可以使用近 似現今普遍使用之TFT_LCD Source IC Uoltage Mc3de), 避免如習知複雜之電路動作。 惟上述僅為本發明之較佳實施例而已,並非用來限定 本發明實施之範圍。即凡依本發明申請專利範圍所做^均The title of the month was 92119606. _ ^ V. Description of the invention (12) Furthermore, the supply of key components for the AMOLED industry is still immature, such as TFT-OLED Data 1C. If the currently mature tft-LCD Source 1C can be used The technology to support TFT-OLED applications will solve many problems driving 1C development. The TFT-LCD Source 1C adopts the Voltage Modulation method, so it is necessary to design the driving circuit of the voltage writing type according to the present invention. The present invention uses two capacitors (Cd, Ct) to deal with two different things respectively. One capacitor Ct is specifically responsible for recording of all critical voltage values (Vth). The other capacitor Cd is specifically responsible for all data voltage values (Vdata). recording. Different from the US patent US 6,229, 506, the capacitor cs is responsible for all the critical voltages (V t h) and some of the data voltages loaded, 0 (13 7 8); also different? In the paper of 1111 ^ 1? 3, the critical voltage is recorded by capacitor (] 1 and capacitor [2), so capacitor C2 only records part of the critical voltage, and part of the critical voltage recorded in capacitor C1 will eventually be lost. 'The driving circuit of the active organic electroluminescent display proposed by the present invention can have the following advantages: 1. The critical voltage value (vth) can be recorded in a capacitor ct (critical voltage storage capacitor), so it can be completely Compensate the effect of the threshold voltage variation. '2. The data voltage (Vdata) loading method can be implemented using the TFT_LCD Source IC Uoltage Mc3de, which is commonly used today, to avoid complicated circuit actions as is known. However, the above are only preferred embodiments of the present invention and are not intended to limit the scope of implementation of the present invention. That is, everything done in accordance with the scope of the patent application of the present invention
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第17頁 T:1 ; By Μ 92119606Page 17 T: 1; By Μ 92119606
Λ_E 曰 修- 圖式簡單說明 【圖式簡單說明 係本發明之每一晝素内電路示意圖。 係本發明之基板上晝素電路的連結與控制示意 係本發明之控制信號時序圖。 係美國專利US 6, 229, 506之晝素電路示意圖 係美國專利U S 6,2 2 9,5 0 6之控制信號時序圖 係Philips公司論文之畫素電路示意圖。 【圖式之標號說明】 顯示面板1 0 0 第1圖 第2圖 圖。 第3圖 第4圖 第5圖 第6圖 掃描線1 2 0 共陰極線140 顯示信號線1 6 0 畫素200 重置TFT 220 驅動TFT 240 電容 Cd 、 Ct 、 Cc 、 Cs 、 臨界電壓鎖住階段3 1 0 顯示階段330 電晶體 ΤΙ、T2、T3、T4 資料線41 0、6 1 0 歸零控制線4 3 0、6 3 0 電源供應線4 5 0、6 5 0 歸零階段51 0 資料線11 0 臨界電壓鎖住線1 3 0 電源供應線1 5 0 開關元件1 7 0 掃描TFT 210 偵測TFT 230 有機電激發光元件2 5 0 Cl、C2 寫入階段320 、T61、T62、T63、T64 掃描線420、620 發光控制線440、640 有機發光二極體460 載入資料階段520Λ_E 修-Simple illustration of the drawing [Simplified illustration of the drawing is a schematic diagram of the circuit of each day in the invention. It is a schematic diagram of the connection and control of the day circuit on the substrate of the present invention. It is a timing chart of the control signal of the present invention. It is a schematic diagram of the diurnal circuit of the US patent US 6, 229, 506. It is a timing diagram of the control signal of the U.S. patent US 6,229,506. It is a schematic diagram of the pixel circuit of the Philips paper. [Explanation of reference numerals of the figure] Display panel 1 0 0 1st figure 2nd figure. Figure 3 Figure 4 Figure 5 Figure 6 Scan line 1 2 0 Common cathode line 140 Display signal line 1 6 0 Pixel 200 Reset TFT 220 Drive TFT 240 Capacitors Cd, Ct, Cc, Cs, critical voltage lock-in phase 3 1 0 Display stage 330 Transistor Ti, T2, T3, T4 Data line 41 0, 6 1 0 Zeroing control line 4 3 0, 6 3 0 Power supply line 4 5 0, 6 5 0 Zeroing phase 51 0 Data Line 11 0 Critical voltage lock line 1 3 0 Power supply line 1 5 0 Switching element 1 7 0 Scan TFT 210 Detect TFT 230 Organic electro-optical light element 2 5 0 Cl, C2 Writing stage 320, T61, T62, T63 , T64 Scan line 420, 620 Luminance control line 440, 640 Organic light emitting diode 460 Load data phase 520
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圖式簡單說明 發光階段5 3 0Schematic description of light-emitting stage 5 3 0
Hill 第19頁Hill Page 19
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TWI391894B (en) * | 2008-05-17 | 2013-04-01 | Lg Display Co Ltd | Light emitting display |
US8981443B2 (en) | 2005-06-30 | 2015-03-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device, and electronic appliance |
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CN103325335B (en) * | 2012-03-21 | 2015-09-09 | 群康科技(深圳)有限公司 | Display and driving method thereof |
CN112581908A (en) * | 2020-12-23 | 2021-03-30 | 上海天马有机发光显示技术有限公司 | Pixel driving circuit, driving method, display panel and display device |
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US8981443B2 (en) | 2005-06-30 | 2015-03-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device, and electronic appliance |
US9640558B2 (en) | 2005-06-30 | 2017-05-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device, and electronic appliance |
US10224347B2 (en) | 2005-06-30 | 2019-03-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device, and electronic appliance |
US10903244B2 (en) | 2005-06-30 | 2021-01-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device, and electronic appliance |
US11444106B2 (en) | 2005-06-30 | 2022-09-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device, and electronic appliance |
TWI391894B (en) * | 2008-05-17 | 2013-04-01 | Lg Display Co Ltd | Light emitting display |
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