1231661 玖、發明說明： [發明所屬之技術領域] 本發明係關於一種將頻率數變換作2次施行之雙變換方 式接收機者。 [先前技術] 習用技術中，已見諸有雙變換方式之接收機，係利用2 個混合電路，對所接收之播送波將頻率數作2次之變換者 (特開2 0 0 0 - 1 74 6 5 3號公報之第2-3頁、第1-4圖參照）。其 係藉第1段混合電路，把播送波變換爲較高之頻率數，藉 此，可容易除去圖像干擾，因而可實現不具天線調諧電路 和RF調諧電路之非調諧方式接收機中，具有優良之干擾特 性。 又，在上述專利公報中所揭示之該種雙變換方式的接收 機，在對於經天線所接收之播送波實行高頻放大後之信號 ，其輸入於一階段之混合電路前，係先予調諧，依此，可 更進一步改善接收感度與干擾特性。對輸入於第一段之混 合電路前的信號予以調諧，則可除去不希望之播送局的電 波與雜訊，俾免輸入於第一段之混合電路中。 但是，上述特開2 0 0 0 - 1 74 6 5 3號專利公報所揭示之接收 機，對於經天線所接收之信號，其在施行高頻放大後，因 係通過調諧電路，故由天線所接收信號中如含有不希望之 播送局電波及雜訊等不要成分時，該不要之成分亦被放大 ，因而造成了問題。又，上述之接收機中，具有以調諧線 圈與變容二極體組合所成之調諧電路，故須另設有天線， -6- 1231661 此種天線，一般使用例如桿形（r 0 d)之天線。因之，桿形天 線與調諧線圈兩者均屬必要，乃具有增加組件數量之問題。 [發明內容] 本發明係鑑於以上之問題，故本發明之目的，係提供一 種雙變換方式之接收機’可確實除去接收信號中不要之成 分，並可減少組件數量者。 爲了解決上述問題，依本發明之雙變換方式接收機，乃 具有：天線調諧電路，係含有調諧線圈與變容二極體；高 頻放大電路，用以對天線調諧電路輸出之信號遂行高頻放 大；第1與第2混合電路，用以對高頻放大電路之輸出作 2次的頻率數變換；及檢波電路，用以對混合電路之輸出 遂行檢波處理；等構成。除了採用雙變換（double conversion) 方式外，同時在高頻放大電路之前段設有天線調諧電路， 故可確實除去含於所接收之播送波內、不希望之播送局電 波與雜訊等不要成分。又，較諸於在高頻放大後設以調諧 電路之狀況，因在天線調諧電路中，把調諧用之線圈作爲 天線使用，故不必再另設調諧用之線圈與天線等，乃可減 少組件之數量。 又，上述之第1混合電路，係用以將高頻放大電路所輸 出信號之頻率數，予以變換爲較諸播送波頻率數還高之頻 率數，而第2混合電路，則係用以將第1混合電路所輸出 信號之頻率，予以變換爲較諸播送波頻率數還低之頻率數 ，如是，即可容易除去所接收播送波內所含之圖像干擾。 又，上述天線調諧電路中所含之調諧線圈，係一種把導 1231661 線捲繞於磁芯之棒形天線，由於棒形天線對周邊存在之人 體影響磁束之變動可抑制爲最小限度，故可穩定的接收播 送波。又，可使用透磁率較大之鐵氧體磁芯（ferrite core) ’即可獲得較大之激起電壓，因而可提高接收感度。 又’上述天線調諧電路中所含之調諧線圈，係一種將導 線作成環狀（l〇op)之環形天線，故使用該種環狀天線時，利 用携帶接收機之框體即可容易形成之。 又’依本發明之接收機可再設以：數位-類比變換部，用 以生成調諧頻率數設定用之控勒電壓，而可加諸於上述天 線調諧電路中所含之變容二極體上；局部振盪器，用以把 頻率數爲可變更之局部振盪信號，輸入於該輸入高頻放大 電路輸出信號之第1電路中；及控制部，在把來自局部振 盪器所輸出之局部振盪信號的頻率數作設定之同時，可生 成爲了使該局部振盪信號之頻率連動天線調諧電路之調諧 頻率數所需的頻率數設定資料；等構成。雙變換方式之接 收機中，一般較多之作法，係把第1混合電路輸出之中頻 信號的頻率數，設定在1 0 Η z附近，此種方式播送波之頻率 數（A Μ播送時，約5 0 0〜1 6 0 0 k Η ζ )與中頻信號之頻率數兩 者差異較大時，倘僅增加墊整電容器（padding condnser)， 實在難以令局部振盪器之振盪頻率數與天線調諧電路之頻 率數作相同之變化，則循跡（tracking)將會超出容許範圍。 但是，如使用數位-類比變換器，將產生之控制電壓施加於 變容二極體上時，即可設定無關於局部振盪器振盪頻率、 而爲任意之調諧頻率數，如是，則可防止產生過大之循跡 -8- 1231661 錯誤。 又’上述之數位-類比變換器，控制電壓可在所定之溫度 係數而隨周圍溫度作變化，故不須使用高價之溫度補償用 電容器等組件，因而可降低構件之成本。 又’上述之數位-類比變換器設有溫度係數設定部，其則 含具有所定溫度係數之元件，溫度係數設定部全體之元件 常數’可依周圍溫度作變化，依此，數位-類比變換器之一 部分設有溫度係數設定部，故可將數位-類比變換器全體之 溫度特性任意設定在所定範圍內。 又，上述之數位-類比變換器、高頻放大電路、第1與第 2混合電路、檢波電路、局部振盪器等，係形成在同一半 導體基板上，而溫度係數設定部則含有依半導體製造加工 形成、其溫度係數互爲不同之複數電阻，故數位-類比變換 器之溫度係數，乃可設定複數之電阻的連接形態，而成爲 所定之値。具體言之，可分別把該等複數之電阻，以半導 體基板上之多晶矽（P 0 1 y - S i 1 i C 〇 η)形成之，調整多晶矽之不 純物及載體之種類，即可令溫度係數爲不同。或是，利用 半導體基板上之Ρ形領域及η形領域，亦可分別形成該等 複數之電阻，調整該Ρ形領域或η形領域之不純物濃度與 載體之種類，即可使溫度係數不同。據此，包括數位-類比 變換器之組件，幾乎均係形成在半導體基板上，故可使製 造容易化、減少構件數量，並降低成本者。 又，上述之數位-類比變換器，係具有電流源，可用以設 定追隨輸入頻率數資料之値的電流値；及溫度係數設定部， - 9- 1231661 可流通該電流源所生成之電流，故該溫度係數設定部之胃 端即可作爲控制電壓輸出之。由於數位-類比變換器係彳衣± 述之方式所構成，故隨著溫度設定部之溫度係數，即可令 數位-類比變換器之輸出電壓（控制電壓）作變化。 [實施方式] 爲了實施發明之最佳形態 以下’配合附圖說明採用適用之雙變換方式的本發明接 收機一實施例。 如第1圖所示，爲本發明接收機之一實施例。如第1圖 所不該第1實施例之雙變換方式接收機，含有天線調諧電 路1 0，高頻放大電路2 0，混合電路2 2、2 8，局部振盪器 2 4、3 0，中頻濾波器2 6、3 2，中頻放大電路3 4，檢波電路 36，PLL電路38、控制部40、DAC (數位-類比變換器）42 及操作部44，等構成。 天線調諧電路1 0係由調諧線圈1 1、電容器1 2、及變容 二極體1 3構成。調諧線圈1 1與變容二極體1 3係成並聯連 接’令該等之並聯共振頻率數的加總，爲肴望收信之播送 波的頻率數，即可衰減播送波以外之其他的播送局電波及 其他的雜訊等。變容二極體1 3之兩端，係可施加逆偏壓之 控制電壓。調諧線圈1 1，係一種磁芯上捲繞導線之棒形天 線、或把導線作成環狀之環形天線。使用棒形天線作爲調 諧線圏1 1時，可將周邊存在之人體影響磁束之變動抑制至 最小限度’而可穩定的接收播送波。又，倘使用透磁率較 大之鐡氧磁體鐡芯時，可獲得較大之激起電壓，而可提高 1231661 收信感度。又，使用環形天線作爲調諧線圈時，利用携帶 型接收機之框體即可容易形成之。 高頻放大電路2 0，係對天線調諧電路1 〇輸出之信號作 高頻放大。混合電路22 (第1混合電路）係把高頻放大電路 2 〇輸出之信號、與局部振盪器2 4輸出之局部振盪信號、 等兩者加以混合。將高頻放大電路2 0輸出信號之頻率數設 爲fl、將局部振盪信號之頻率數設爲f2時，則混合電路 22輸出信號之頻率數即爲f2±fi。 中頻濾波器2 6，係用以僅可令混合電路2 2輸出信號中 預定之頻率數通過，例如，該通過帶域之中心頻率數設定 爲1 0.7 Μ Η z時’藉該中頻清、波器2 6即可選擇該f 2 - f 1成爲 1 0 · 7 Μ Η z之播送波頻率。亦即，如擬接收頻率數fl之播送 波時，由局部振盪器24輸入於混合電路22之局部振盪信 號的頻率數可予設定爲Π + 1 0.7 Μ Η z。 混合電路28 (第2混合電路），係用以混合中頻濾波器26 輸出之信號與局部振盪器3 0輸出之局部振盪信號。假設中 頻濾波器26輸出之信號的頻率數爲f3(=l 0.7MHz)，局部振 盪器3 0輸出之局部振盪信號的頻率數爲f 4時，混合電路 28輸出之信號的頻率數即成爲f3±f4。 中頻濾波器3 2，係僅使由混合電路2 8所輸出信號中之 預定的頻率數成分通過而已。例如，倘設定該通過帶域之 中心頻率數爲45〇kHz時，藉該中頻濾波器32乃選擇f3-f4 爲450kHz成分。 依此，藉前段之混合電路，乃可把來自高頻放大電路2 0 1231661 所輸出之信號頻率數，變換爲較諸播送波頻率數爲高之頻 率數。又，藉後段之混合電路，可將來自前段混合電路所 輸出之信號頻率數，變換爲較諸播送波頻率數爲低之頻率 數。 中頻放大電路3 4，係用以放大由中頻濾波器3 2所輸出 4 5 0 kHz之中頻信號，而檢波電路36則係對中頻放大電路 放大後之中頻信號，施行所定之檢波處理，例如，遂行AM 檢波處理並輸出聲音信號。 局部振盪器24，係用以產生輸入第1階段混合電路22 之頻率數f2( = fl-10.7MHz)的局部振盪信號。PLL電路38 係與該局部振盪器24同時構成頻率合成器（freqUenCy s y n t h e s i z e r)，以控制部4 0變更P L L電路3 8內之可變分頻 率器（圖中未示）的分頻比’即可將局部振盪器2 4之振盪頻 率數設定爲所定之段數（step)，依此，例如AM播送之頻率 數設定爲每段9kHz時，即可將接收頻率數設定爲相同於該 播送頻率數。 局部振盪器3 0，係用以產生輸入於第2階段混合電路之 頻率數f 4 (= 1 0.2 5 Μ Η z)的局部振盪信號。因中頻濾波器2 6 輸出信號之頻率數f3(=10.7MHz)爲固定，故局部振盪器30 係設定固定之頻率數f4。 控制部4 0，係在變更局部振盪器2 4之振盪頻率數時，可 同時遂行作變更天線調諧電路1 〇之調諧頻率數的控制動 作。但是，在本實施例中，因爲AM播送之接收頻率數帶 域（約5 0 〇〜1 6 0 0 k Η z )與局部振盪器2 4產生之局部振盪信 -12- 1231661 號頻率數（約1 〇 μ Η z )差異甚大’故如僅用墊整電容器等時 ，由P L L電路3 8所生成之控制電壓施加於天線調諧電路 1 0內之變容二極體1 3時，將會超出循跡之容許範圍，爲 此，控制部4 0係’爲了設疋對應於局部振邊器2 4之振邊 頻率數的正確調諧頻率數’乃將必要之頻率數設定資料輸 入於DAC 42，而DAC 42則產生對應於該設定資料之控制 電壓。把依此方式所產生之控制電壓加諸於變容二極體1 3 時，循跡可在容許範圍內，而可遂行天線調諧電路1 〇之調 諧電路的設定。 操作部44係用以供接收機使用者選台指示等之用，該操 作內容係送於控制部4 0。 依此，本實施例之接收機係採用雙變換方式，同時，在 高頻放大電路2 0之前段設以天線同步電路1 〇，故可將所 接收、含於播送波中不希望之播送局電波、雜訊等不要成 分，予以確實的除去。又，較諸於在高頻放大後設以調諧 電路之狀況而言，因係把天線調諧電路1 〇內之調諧線圈 1 1作天線使用，故不須另備調諧用之線圏與天線，因而減 少了組件數量。 第2圖爲第2實施例接收機之構成圖。如第2圖所示雙 變換方式接收機之第2實施例，其與第1實施例接收機之 不同點爲：如第1圖所示，接收機所含之高頻放大電路2 0 ，混合電路22、28 ’局部振盪器24、30，中頻濾波器26 、32，中頻放大電路34，檢波電路36，PLL電路38，控制 部4 0，及D A C 4 2等，係予以形成在同一個半導體基板上 1231661 而構成爲一半導體裝置1 Ο 〇 ;及D A C 4 2係具有溫度係數， 其輸出之控制電壓可隨周圍溫度作變化；等。 第3圖爲DAC 42之詳細構成圖。如第3圖所示，DAC 42 係含有 FET 110、111、12〇、121、122、130、131、132、 …1 40、1 4 1、1 42 ;電流源丨丨2 ;類比開關1 23、1 3 3、…1 43 •，變換電路124、134、··. 144 ;及溫度係數設定部150 ;等 之構成。 利用FET 1 10、1 1 1、電流源12〇、121構成第1電流鏡 (c u r r e n t m i r r ο 1·)電路’而以變換電路1 2 4、F E T 1 2 2及類比 開始1 2 3所構成之切換電路，可對該第1電流鏡電路作 •’有效/無效’’之控制。該第1電流鏡電路係對應於D A C 4 2 輸入資料之第1位元（bit) d!，而該第1位元di爲"1"時，亦 即，輸入於變換電路1 2 4之信號爲高準位時，因類比開關 123與FET 122同時成ON狀態，則第丨電流鏡電路之動作 即成’’有效’’，所定之電流I!即流通。 又，F E T 1 1 0、1 1 1、電流源 1 1 2、及 F E T 1 3 0、1 3 1 係構 成第2電流鏡電路，其動作之’’有效/無效”，則由變換電路 1 3 4、F E T 1 3 2及類比開關1 3 3等所構成之切換電路作控制 。該第2電流鏡電路係對應於輸入d A C 4 2之資料的第2 位元d 2，該第2位元d 2爲’1 π時，亦即，輸入變換電路1 3 4 之信號爲高準位時，因類比開關1 3 3及F Ε Τ 1 3 2同時成〇 Ν 狀態，則第2電流鏡電路之動作即成”有效”，所定之電流 12即流通。 同樣的，利用F Ε Τ 1 1 0、1 1 1、電流源丨丨2及f Ε Τ 1 4 0、 -14- 1231661 1 4 1等，構成第η電流鏡電路，以變換電路1 4 4、F Ε Τ 1 4 2 及類比開關1 4 3等所構成之切換電路，對該電流鏡電路的 動作作”有效/無效’’控制。該第η電流鏡電路係對應輸入 D A C 4 2之資料的第η位元d η，當該第η位元d η爲”；[，，時， 亦即，輸入變換電路1 4 4之信號爲高準位時，因類比開關 143及FET 142同時成ON狀態，故第n電流鏡電路之動作 即成’’有效π，所定之電流I η即流通。 本實施例中，輸入DAC 42之η位元的資料，係對應第1 位元d !爲最下位位元、第η位元d η爲最上位之位元者。又 ，把第1電流鏡電路生成之電流11當作1時，第2、第3 、…第η電流鏡電路生成之電流12、13、…Ιη即成爲其之 (溝幅）W及閘長（溝長）L。 上述之第1〜第η電·流鏡電路如以並聯連接形成電流源 ，貝ϋ 2個以上之電流鏡同時動作時，該等複數電流鏡電路 所生成之電流係加算，因此，對應輸入資料的各位元之値 ，對上述第1〜第η電流鏡電路作選擇性動作，即可生成 對應於輸入資料之値的電流。依此，所生成之電流乃供給 溫度係數設定部1 5 0 ° 溫度係數設定部1 5 〇係一種由溫度係數不同之複數電阻 所構成之合成電阻，該合成電阻全體之元件常數（電阻値） 可隨周圍溫度變化。一般可知以半導體製造加工而形成在 半導體基板上之電阻’只要考量不純度之種類及濃度兩項 因素，即可容易作成3種不同之溫度係數。例如，以半導 1231661 體上之多晶矽形成電阻時’調整不純物濃度及載體之種類（p 形或η形）’即可容易實現負値數千〜正値數百ppm/r之溫 度係數。或是，不使用多晶矽，而係利用半導體基板上所 形成之P形領域或η形領域的擴散電阻時，亦屬同樣，藉 由不純物濃度及載體種類之調整，亦可容易眚現負數千〜 正數百ppm /°C之溫度係數。倘考量在半導體基板上可形成 溫度係數差異較大之3種電阻R1、r 2、R 3時，衡酌該3 種電阻R1〜R3之値與連接方法，即可將溫度係數設定部ι5〇 之溫度係數，在所定之範圍內作自由之設定。 第4圖爲將3種電阻作串聯連接後之溫度係數設定部1 5 〇 構成圖。該3種電阻之電阻値分別設爲ri、r2、r3，溫度係 數分別設爲a !、a?、as時，則如第4圖所示溫度係數設定 部1 5 0全體之溫度係數b !爲： bi=(airi+a2r2 + a3r3)/(ri+r2 + r3) 又，供給溫度係數設定部1 5 0之電流設定爲I，則溫度係 數設定部150之一端所顯現、自DAC 42之輸出電壓Vout 爲：1231661 发明 Description of the invention: [Technical field to which the invention belongs] The present invention relates to a receiver of a double conversion method in which frequency numbers are converted into two executions. [Prior art] In the conventional technology, receivers with a double conversion method have been seen, which uses two hybrid circuits to convert the frequency of the received broadcast wave to two times (Japanese Patent Laid-Open No. 2 0 0 0-1 74 6 5 3 (see pages 2-3 and 1-4). It uses the first-stage hybrid circuit to convert the broadcast wave to a higher frequency, thereby making it possible to easily remove image interference, so that a non-tuned receiver without an antenna tuning circuit and an RF tuning circuit can be realized. Excellent interference characteristics. In addition, the receiver of the double conversion method disclosed in the above-mentioned patent publication tunes the signal after the high-frequency amplification of the broadcast wave received by the antenna, before it is input to the one-stage hybrid circuit, and is tuned first. According to this, the receiving sensitivity and interference characteristics can be further improved. Tuning the signal input in front of the hybrid circuit in the first stage can remove the radio waves and noise of the undesired broadcasting station, and avoid input in the hybrid circuit in the first stage. However, the receiver disclosed in the aforementioned Japanese Patent Laid-Open No. 2000-74 74 5 5 has a high-frequency amplification of the signal received through the antenna, and because it passes through a tuning circuit, it is transmitted by the antenna. If the received signal contains unwanted components such as unwanted radio waves and noise, the unwanted components are also amplified, which causes a problem. In addition, the above-mentioned receiver has a tuning circuit formed by a combination of a tuning coil and a variable-capacitance diode, so an additional antenna must be provided. This type of antenna is generally used in the form of a rod (r 0 d) Of the antenna. Therefore, both the rod antenna and the tuning coil are necessary, and there is a problem of increasing the number of components. [Summary of the Invention] The present invention is made in view of the above problems. Therefore, an object of the present invention is to provide a receiver of a double conversion method, which can surely remove unnecessary components in a received signal and reduce the number of components. In order to solve the above problems, the receiver of the double conversion method according to the present invention includes: an antenna tuning circuit including a tuning coil and a varactor diode; and a high-frequency amplifier circuit for performing high-frequency on a signal output from the antenna tuning circuit. Amplification; the first and second hybrid circuits are used to perform two frequency number conversions on the output of the high-frequency amplifier circuit; and the detection circuit is used to perform detection processing on the output of the hybrid circuit; and so on. In addition to the double conversion method, an antenna tuning circuit is also provided in front of the high-frequency amplifier circuit, so it can reliably remove unwanted components included in the received broadcast wave, unwanted broadcast radio waves and noise, etc. . In addition, compared with the situation where a tuning circuit is provided after high-frequency amplification, since the coil for tuning is used as an antenna in the antenna tuning circuit, it is not necessary to provide a separate coil and antenna for tuning, which can reduce components. Of quantity. The first hybrid circuit is used to convert the frequency of the signal output by the high-frequency amplifier circuit to a frequency higher than the frequencies of the broadcast waves, and the second hybrid circuit is used to convert The frequency of the signal output by the first hybrid circuit is converted to a frequency lower than the frequencies of the broadcast waves. If so, the image interference contained in the received broadcast waves can be easily removed. In addition, the tuning coil included in the above-mentioned antenna tuning circuit is a rod antenna in which a 1231661 wire is wound around a magnetic core. Since the rod antenna affects the surrounding human body, the fluctuation of the magnetic beam can be suppressed to a minimum, so it can be used. Receiving a stable broadcast wave. Further, a ferrite core having a large magnetic permeability can be used to obtain a large excitation voltage, thereby improving the reception sensitivity. Also, the tuning coil included in the above-mentioned antenna tuning circuit is a loop antenna in which a wire is formed into a loop (10op), so when using this loop antenna, it can be easily formed by using a housing carrying a receiver. . Furthermore, the receiver according to the present invention may be further provided with a digital-analog conversion section for generating a control voltage for setting a tuning frequency number, which may be added to the varactor diode included in the above-mentioned antenna tuning circuit. The local oscillator is used to input a local oscillation signal whose frequency is changeable into the first circuit of the input high-frequency amplifier circuit output signal; and the control unit is configured to apply the local oscillation output from the local oscillator. At the same time as the frequency of the signal is set, the frequency number setting data required for the frequency of the local oscillation signal to be linked to the tuning frequency of the antenna tuning circuit can be generated; etc. In the double-conversion receiver, there are generally many methods. The frequency number of the intermediate frequency signal output by the first hybrid circuit is set near 10 Η z. When the difference between the frequency of the IF signal and the frequency of the intermediate frequency signal is large, if only the padding condnser is added, it is really difficult to make the frequency of the local oscillator If the frequency of the antenna tuning circuit is changed the same, the tracking will exceed the allowable range. However, if a digital-to-analog converter is used, when the generated control voltage is applied to the varactor diode, an arbitrary tuning frequency number can be set regardless of the local oscillator oscillation frequency. If so, it can prevent the generation of Oversized track-8-1231661 error. Furthermore, the above-mentioned digital-to-analog converter can control the voltage at a predetermined temperature coefficient and change with the surrounding temperature. Therefore, it is not necessary to use expensive components such as capacitors for temperature compensation, thereby reducing the cost of components. Also, the above-mentioned digital-analog converter is provided with a temperature coefficient setting section, which includes a component having a predetermined temperature coefficient, and the component constants of the entire temperature coefficient setting section can be changed according to the surrounding temperature. Accordingly, the digital-analog converter One part is provided with a temperature coefficient setting section, so the temperature characteristics of the entire digital-to-analog converter can be arbitrarily set within a predetermined range. In addition, the above-mentioned digital-analog converter, high-frequency amplifier circuit, first and second hybrid circuits, detection circuits, and local oscillators are formed on the same semiconductor substrate, and the temperature coefficient setting section includes processing according to semiconductor manufacturing. The formation and its temperature coefficient are different from each other, so the temperature coefficient of the digital-to-analog converter can set the connection form of the complex resistance and become a predetermined one. Specifically, the plurality of resistors can be respectively formed by polycrystalline silicon (P 0 1 y-S i 1 i C 〇η) on the semiconductor substrate, and the types of impurities and carriers of the polycrystalline silicon can be adjusted to make the temperature coefficient For different. Alternatively, by using the P-shaped area and the η-shaped area on the semiconductor substrate, the plurality of resistors can be separately formed, and the temperature coefficients can be different by adjusting the impurity concentration in the P-shaped area or the η-shaped area and the type of the carrier. Accordingly, almost all components including digital-to-analog converters are formed on a semiconductor substrate, so that manufacturing can be facilitated, the number of components can be reduced, and costs can be reduced. In addition, the above-mentioned digital-to-analog converter has a current source, which can be used to set a current 値 that follows the input frequency data; and a temperature coefficient setting unit, which can flow the current generated by the current source, so The stomach end of the temperature coefficient setting portion can be used as a control voltage output. Since the digital-to-analog converter is constructed as described above, the output voltage (control voltage) of the digital-to-analog converter can be changed with the temperature coefficient of the temperature setting section. [Embodiment] Best Mode for Implementing the Invention An embodiment of the receiver according to the present invention using an applicable double conversion method will be described below with reference to the drawings. As shown in FIG. 1, it is an embodiment of the receiver of the present invention. As shown in FIG. 1, the dual conversion method receiver of the first embodiment includes an antenna tuning circuit 10, a high-frequency amplifier circuit 20, a hybrid circuit 2 2, 2 8, and a local oscillator 2 4, 3 0, and medium. The frequency filter 26, 32, the intermediate frequency amplifier circuit 34, the detection circuit 36, the PLL circuit 38, the control section 40, the DAC (digital-analog converter) 42 and the operation section 44 are configured. The antenna tuning circuit 10 is composed of a tuning coil 11, a capacitor 12, and a variable capacitance diode 13. The tuning coil 11 and the variable-capacitance diode 1 3 are connected in parallel. 'The sum of the resonance frequencies of these parallel waves is the frequency of the broadcast wave, which can attenuate other broadcast waves. Radio waves and other noise. The two ends of the varactor diode 13 can be controlled by applying a reverse bias voltage. The tuning coil 11 is a rod antenna with a wire wound on a magnetic core, or a loop antenna with the wire formed into a loop. When a rod antenna is used as the tuning line 11, it is possible to suppress the fluctuation of the human body's influence on the magnetic flux in the surroundings to a minimum 'and to stably receive the broadcast wave. In addition, if an oxygen-magnet core with a higher magnetic permeability is used, a larger excitation voltage can be obtained, and the reception sensitivity of 1231661 can be improved. When a loop antenna is used as the tuning coil, it can be easily formed by using a housing of a portable receiver. The high-frequency amplifier circuit 20 is a high-frequency amplifier for the signal output by the antenna tuning circuit 10. The hybrid circuit 22 (first hybrid circuit) mixes the signal output from the high-frequency amplifier circuit 20 and the local oscillation signal output from the local oscillator 24. When the frequency of the output signal of the high-frequency amplifier circuit 20 is set to fl and the frequency of the local oscillation signal is set to f2, the frequency of the output signal of the hybrid circuit 22 is f2 ± fi. The intermediate frequency filter 26 is used to pass only a predetermined number of frequencies in the output signal of the hybrid circuit 22, for example, when the center frequency number of the pass band is set to 1 0.7 Μ Η z ' , Waver 2 6 can select the frequency of f 2-f 1 to be 1 0 · 7 Μ Η z. That is, if it is intended to receive the broadcast wave of the frequency number fl, the frequency number of the local oscillation signal input from the local oscillator 24 to the hybrid circuit 22 can be set to Π + 1 0.7 M Η z. The hybrid circuit 28 (second hybrid circuit) is used to mix the signal output from the intermediate frequency filter 26 and the local oscillation signal output from the local oscillator 30. Assuming that the frequency of the signal output by the intermediate frequency filter 26 is f3 (= 1 0.7 MHz) and the frequency of the local oscillation signal output by the local oscillator 30 is f 4, the frequency of the signal output by the hybrid circuit 28 becomes f3 ± f4. The intermediate frequency filter 32 passes only a predetermined frequency component of the signal output from the hybrid circuit 28. For example, if the center frequency of the pass band is set to 45.0 kHz, f3-f4 is selected as the 450 kHz component by the intermediate frequency filter 32. Based on this, the frequency of the signal output from the high-frequency amplifier circuit 201231661 can be converted into a frequency higher than the frequencies of the broadcast waves by using the preceding hybrid circuit. In addition, by using the hybrid circuit in the latter stage, the frequency of the signal output from the hybrid circuit in the former stage can be converted into a frequency lower than the frequencies of the broadcast waves. The IF amplifier circuit 3 4 is used to amplify the 4 50 kHz IF signal output by the IF filter 32, and the detection circuit 36 is used to amplify the IF signal after the IF amplifier circuit is amplified. Detection processing, for example, performs AM detection processing and outputs a sound signal. The local oscillator 24 is used to generate a local oscillation signal with a frequency number f2 (= fl-10.7 MHz) input to the first-stage hybrid circuit 22. The PLL circuit 38 constitutes a frequency synthesizer (freqUenCy synthesizer) at the same time as the local oscillator 24, and the control unit 40 can change the frequency division ratio of the variable frequency divider (not shown) in the PLL circuit 38. Set the number of oscillation frequencies of the local oscillator 2 4 to a predetermined number of steps. Based on this, for example, when the frequency of AM transmission is set to 9 kHz per step, the number of reception frequencies can be set to be the same as the number of transmission frequencies. . The local oscillator 3 0 is used to generate a local oscillation signal with a frequency number f 4 (= 1 0.2 5 Η Η z) input to the second-stage hybrid circuit. Because the frequency f3 (= 10.7MHz) of the output signal of the intermediate frequency filter 2 6 is fixed, the local oscillator 30 sets a fixed frequency f4. The control unit 40 can perform a control operation to change the number of tuning frequencies of the antenna tuning circuit 10 at the same time when the number of oscillation frequencies of the local oscillator 24 is changed. However, in this embodiment, because the frequency band of the reception frequency (about 500 ~ 1600 k kz) transmitted by AM and the local oscillation signal -12-12661661 ( (Approximately 10 μ Η z) The difference is very large. Therefore, if only capacitors are used to pad capacitors, the control voltage generated by the PLL circuit 38 is applied to the varactor diode 13 in the antenna tuning circuit 10, and it will Beyond the permissible range of the tracking, the control unit 40 "inputs the necessary frequency setting data to the DAC 42 in order to set the correct tuning frequency number corresponding to the frequency of the side edge 24". , And the DAC 42 generates a control voltage corresponding to the setting data. When the control voltage generated in this way is applied to the varactor diode 3, the trace can be within the allowable range, and the tuning circuit of the antenna tuning circuit 10 can be set. The operation unit 44 is used for receiver selection instructions and the like, and the operation content is sent to the control unit 40. According to this, the receiver of this embodiment adopts a double conversion method, and at the same time, an antenna synchronization circuit 10 is provided in front of the high-frequency amplifier circuit 20, so the received and undesired broadcasting station can be included in the broadcasting wave. Unwanted components such as radio waves and noise should be removed reliably. In addition, compared with the situation where a tuning circuit is provided after high-frequency amplification, since the tuning coil 11 in the antenna tuning circuit 10 is used as an antenna, it is not necessary to prepare a separate wire and antenna for tuning. This reduces the number of components. Fig. 2 is a configuration diagram of a receiver according to a second embodiment. As shown in FIG. 2, the second embodiment of the double conversion receiver is different from the receiver of the first embodiment in that the high-frequency amplifier circuit 20 included in the receiver is mixed, as shown in FIG. The circuits 22, 28 'local oscillators 24, 30, intermediate frequency filters 26, 32, intermediate frequency amplifier circuit 34, detection circuit 36, PLL circuit 38, control unit 40, and DAC 42 are all formed in the same circuit. A semiconductor substrate 1231661 is configured as a semiconductor device 100; and the DAC 42 has a temperature coefficient, and the output control voltage can be changed according to the surrounding temperature; etc. FIG. 3 is a detailed configuration diagram of the DAC 42. As shown in Figure 3, the DAC 42 series contains FETs 110, 111, 120, 121, 122, 130, 131, 132, ... 1 40, 1 4 1, 1 42; current sources 丨 2; analog switches 1 23 , 1 3 3, ... 1 43 •, conversion circuits 124, 134, ... 144; and temperature coefficient setting unit 150; and so on. The first current mirror (currentmirr ο 1 ·) circuit is constituted by FET 1 10, 1 1 1, current sources 12 and 121, and the switching is constituted by conversion circuit 1 2 4, FET 1 2 2 and analogy starting 1 2 3 Circuit, it can control the “active / inactive” of the first current mirror circuit. The first current mirror circuit corresponds to the first bit d! Of the input data of the DAC 4 2, and when the first bit di is " 1 ", that is, input to the conversion circuit 1 2 4 When the signal is at a high level, since the analog switch 123 and the FET 122 are turned on at the same time, the operation of the current mirror circuit becomes `` effective '', and the predetermined current I! Flows. In addition, the FET 1 10, 1 1 1, the current source 1 12, and the FET 1 3 0, 1 3 1 constitute a second current mirror circuit. When the operation is “enabled / disabled”, the conversion circuit 1 3 4. The switching circuit composed of FET 1 3 2 and analog switch 1 3 3 is used for control. The second current mirror circuit is the second bit d 2 corresponding to the input data of d AC 4 2 and the second bit When d 2 is' 1 π, that is, when the signal of the input conversion circuit 1 3 4 is at a high level, since the analog switch 1 3 3 and F Ε Τ 1 3 2 are in the ON state at the same time, the second current mirror circuit The action becomes "effective", and the predetermined current 12 flows. Similarly, using F Ε Τ 1 1 0, 1 1 1, current source 丨 2 and f Ε Τ 1 4 0, -14-1231661 1 4 1 And so on, constitute the n-th current mirror circuit, and use a switching circuit composed of a conversion circuit 1 4 4, F Ε Τ 1 4 2 and an analog switch 1 4 3 to control the operation of the current mirror circuit. . The n-th current mirror circuit corresponds to the n-th bit d η of the data input to the DAC 4 2. When the n-th bit d η is "; [,,, that is, the signal input to the conversion circuit 1 4 4 is At the high level, since the analog switch 143 and the FET 142 are turned on at the same time, the action of the n-th current mirror circuit becomes `` effective π, and the predetermined current I η flows. In this embodiment, the η of the input DAC 42 Bit data corresponds to the first bit d! Is the lowest bit, and the nth bit dη is the highest bit. When the current 11 generated by the first current mirror circuit is regarded as 1, The currents 12, 13, ... 1n generated by the 2nd, 3rd, ... th n-th current mirror circuit become its (groove width) W and gate length (groove length) L. The above-mentioned first to nth galvano-current mirrors If the circuit is connected in parallel to form a current source, when two or more current mirrors operate simultaneously, the current generated by these multiple current mirror circuits is added. Therefore, corresponding to each of the input data, the The n-th current mirror circuit performs a selective action to generate a current corresponding to the 値 of the input data. According to this, the generated electricity It is supplied to the temperature coefficient setting unit 150 °. The temperature coefficient setting unit 150 is a composite resistor composed of a plurality of resistors with different temperature coefficients. The overall element constant (resistance 値) of the composite resistor can vary with the ambient temperature. General It can be seen that the resistance formed on a semiconductor substrate by semiconductor manufacturing processing can be easily made into three different temperature coefficients by considering two factors, such as the type of impurity and the concentration. For example, when the resistance is formed by polycrystalline silicon on the semiconductor 1231661 'Adjusting the concentration of impurities and the type of carrier (p-shaped or η-shaped)' can easily achieve a temperature coefficient of negative 〜thousands to positive 値 hundreds of ppm / r. Or, instead of using polycrystalline silicon, it uses a semiconductor substrate. When forming the diffusion resistance in the P-shaped area or the η-shaped area, it is also the same. By adjusting the concentration of impurities and the type of carrier, it is easy to realize a temperature coefficient of negative thousands to hundreds of ppm / ° C. If considered When three types of resistors R1, r2, and R3 with large temperature coefficient differences can be formed on the semiconductor substrate, weighing the three types of resistors R1 to R3 and the connection method, the The temperature coefficient of the temperature coefficient setting section ι50 can be set freely within a predetermined range. Fig. 4 is a structure diagram of the temperature coefficient setting section 15 after three types of resistors are connected in series. The resistance of the three types of resistance 値When the temperature coefficients are respectively set to ri, r2, r3, and the temperature coefficients are set to a !, a ?, as, as shown in FIG. 4, the temperature coefficient b! Of the entire temperature coefficient setting unit 1 50 is: bi = (airi + a2r2 + a3r3) / (ri + r2 + r3) In addition, the current supplied to the temperature coefficient setting unit 150 is set to I, and the output voltage Vout from the DAC 42 appears at one end of the temperature coefficient setting unit 150 is:
Vout = (ri+r2 + r3)I 此一輸出電壓Voiit在周圍溫度變化1 °C時，僅作： △ V^am+ay^ + asiyi 之變動。 第5圖爲將3種電阻作並聯連接之溫度係數設定部1 5 0 的構成圖。如第5圖所示溫度係數設定部1 5 0全體之溫度 係數b 2爲： b 2 = a ! a 2 a 3 ( r 1 1· 2 + r 2 r 3 + r 3 r 1 ) / ( a 1 a 2 r ! r 2 + a 2 a 3 r 2 r 3 + a 3 a 1 r 3 r 1 ) -16- 1231661 又，顯現於溫度係數設定部1 5 0之一端、自D A C之輸出 電壓V out爲： ν〇Ιΐί = 1：ι1·2Γ3ΐ/(Γΐ1*2 + Γ2Γ3 + 1*3ΐ*1) 此一輸出電壓V 〇 ut在周圍溫度變化1 °C時，僅作： △ V = a1a2a3r1r2r3l/(a1a2rir2 + a2a3r2r3 + a3a1r3ri)之變動。 第6圖爲將3種電阻作串聯與並聯連接之溫度係數設定 部構成圖，如第6圖溫度係數設定部1 5 0全體之溫度係數 b 3爲· 又，顯現於溫度係數設定部150之一端、自DAC 42之 輸出電壓Vout爲：Vout = (ri + r2 + r3) I When the output temperature Voiit changes by 1 ° C, only △ V ^ am + ay ^ + asiyi changes. Fig. 5 is a configuration diagram of a temperature coefficient setting unit 15 0 in which three kinds of resistors are connected in parallel. As shown in FIG. 5, the temperature coefficient b 2 of the entire temperature coefficient setting unit 1 50 is: b 2 = a! A 2 a 3 (r 1 1 · 2 + r 2 r 3 + r 3 r 1) / (a 1 a 2 r! R 2 + a 2 a 3 r 2 r 3 + a 3 a 1 r 3 r 1) -16- 1231661 Also appears at one end of the temperature coefficient setting unit 1 50 and the output voltage V from the DAC out is: ν〇Ιΐί = 1: ι1 · 2Γ3ΐ / (Γΐ1 * 2 + Γ2Γ3 + 1 * 3ΐ * 1) When this output voltage V 〇ut changes at ambient temperature of 1 ° C, only do: △ V = a1a2a3r1r2r3l / (a1a2rir2 + a2a3r2r3 + a3a1r3ri). Fig. 6 is a configuration diagram of a temperature coefficient setting unit in which three types of resistors are connected in series and in parallel. For example, in Fig. 6, the temperature coefficient b 3 of the entire temperature coefficient setting unit 1 50 is · and appears in the temperature coefficient setting unit 150. The output voltage Vout from DAC 42 at one end is:
V 〇 u t = ( r 1 + r 2 + r 3 / (r 2 + r 3)) I 該輸出電壓Voiit在周圍溫度變化1°C時，僅作： △ V^an，022331-21-3/0212 + 831-3))1 之變動。 據此，本實施半導體裝置100所含之DAC 42，係具備其 具有所定溫度係數之溫度係數設定部150，可將DAC 42全 體之溫度特性，在所定範圍內任意作設定。特別者，以複 數電流鏡電路並聯連接所構成之電流源，其所生成之電流 在流通於溫度係數設定部1 5 0時，因爲可將產生在溫度係 數設定部150兩端之電壓作爲DAC 42之輸出電壓，因而 即可易於使DAC 42之輸出電壓，隨著溫度係數設定部150 之溫度係數作變化。依此，由控制部輸入之資料乃爲一定 ’周圍溫度變化時，輸出電壓Vo ut即隨該周圍溫度之變化 作變化。 1231661 如是，倘變更溫度係數設定部1 5 0內之該3種電阻R 1〜 R3的連接方法，或變更電阻R 1〜R3之各溫度係數等，均 可對該溫度係作某種程度之任意設定。因此，由PLL電路 3 8輸出而施加於局部振盪器24之電壓，其隨周圍溫度作 變化時，相同的可令D A C 4 2之輸出電壓作變化，因而可 防止因溫度變化所致循跡錯誤之擴大。 又，本實施例之DAC 42與天線調諧電路10，因其構成 並不使用高價位之溫度補償·用電容器等組件，故可降低組 件成本。而DAC 42內之溫度係數設定部150,因可用CMOS 加工或Μ Ο S加工等半導體之加工，即可控制不純物之種類 與濃度’而把溫度補償用之構件形成在半導體基板上，如 是’把構成如第2圖所示接收機的各組件形成在半導體基 板上’即可減少外附之構件，而使製造容易化，降低組件 數量並因而降低成本。 又’本發明並非限制僅爲以上實施例所陳，在本發明技 術思想及要旨範圍內，自有其他種種之技術性變化，例如 ’在上述第2實施例中，所使用之d A C 4 2係就生成對應 於輸入資料之各位元値的電流作說明，惟亦可採用其他方 式之DAC’例如，使用R_2R電阻形或承載電阻形等之dAC 的接收機，亦均適用於本發明。該等狀況中，生成所定動 作電壓之電源中，具有溫度係數設定部丨5 〇，如可令由電 源所生成之動作電壓之値隨溫度作變化，自屬較佳。又， 此種方法亦適用於第3圖所示之電流形D A c 4 2。亦即，在 第3圖中’把溫度係數設定部i 5 〇置換成其電阻値爲固定 -18- 1231661 之電阻，同時，令溫度係數設定部1 5 0設以輸出電壓可隨 周圍溫度作變化之電源，倘把該電源之輸出電壓施加於 FET 1 1 Ο、1 20、1 3 0 …1 40 之洩極（drain)，自屬更佳。 又，上述之第2實施例中，DAC 42所含之溫度係數設定 部1 5 0，係就以不同溫度係數之3種電阻R 1〜R3加以組合 構成作說明，此外，亦可在半導體製造加工中，依擴散或 打入之方式變更添加之不純物的種類及濃度等，可形成4 種以上溫度係數相異之電阻，把該4種以上溫度係數不同 之電阻予以組合，亦可構成溫度係數設定部1 5 0。或是， 僅使用1種之電阻而得所定之溫度係數時，亦可構成使用 2種或1種之電阻構成溫度係數設定部1 5 0。 又，對溫度係數設定部1 5 0內之電阻作精巧之組合，以 令DAC全體之溫度係數達成所希之値後，倘DAC 42內之 溫度係數設定部1 5 0以外之各構成，如有不可忽視之溫度 係數時’則含有該等構成與溫度係數設定部1 5 0之D A C 4 2 全體的溫度係數，最好把溫度係數設定部1 5 0之溫度係數 ’設定成所定之該全體溫度係數之値。 又，上述實施例中，係說明具有調諧線圈1 1與變容二極 體1 3作並聯連接之共振電路的天線調諧電路，惟該共振電 路亦可爲該等元件作串聯連接而構成者。 產業上之利用可能性 如上述’倘依本發明，除了採用雙變換方式外，尙在高 頻放大電路之前段設以天線調諧電路，故可確實除去所接 收之播送波中所含的播送局電波及雜訊等不要成分。又， 1231661 較諸於高頻放大後再設以調諧電路之狀況，因爲天線§周§皆 電路中，係把調諧用之線圈作爲天線使用，故不須再另備 調諧用之線圈與天線，故可降低組件之數量者。 [圖式簡單說明] 第1圖爲第1實施例接收機之構成圖。 第2圖爲第2實施例接收機之構成圖。 第3圖爲D A C之詳細構成圖。 第4圖爲串聯連接有3種電阻之溫度係數設定部構成圖。 第5圖爲並聯連接有3種電阻之溫度係數設定部構成圖。 第6圖爲串聯及並聯有3種電阻之溫度係數設定部構成 圖。 [主要部分之代表符號說明] 10 天 線 調 諧 電 路 11 調 諧 線 圈 12 電 容 器 13 變 容 二 極 體 20 局 頻 放 大 電 路 22 混 合 電 路 24 局 部 振 盪 器 26 中 頻 濾 波 器 28 混 合 電 路 3 0 局 部 振 盪 器 3 2 中 頻 濾 波 器 34 中 頻 放 大 電 路 -20- 1231661V 〇ut = (r 1 + r 2 + r 3 / (r 2 + r 3)) I When the output voltage Voiit changes by 1 ° C in the ambient temperature, only do: △ V ^ an ， 022331-21-3 / 0212 + 831-3)) 1. Accordingly, the DAC 42 included in the semiconductor device 100 of the present embodiment is provided with a temperature coefficient setting section 150 having a predetermined temperature coefficient, and the overall temperature characteristics of the DAC 42 can be arbitrarily set within a predetermined range. In particular, when a current source formed by connecting a plurality of current mirror circuits in parallel, the generated current flows through the temperature coefficient setting unit 150, because the voltage generated across the temperature coefficient setting unit 150 can be used as the DAC 42. The output voltage of the DAC 42 can be easily changed according to the temperature coefficient of the temperature coefficient setting unit 150. According to this, when the data input by the control unit is constant, when the ambient temperature changes, the output voltage Vo ut changes with the change of the ambient temperature. 1231661 If yes, if you change the connection method of the three resistors R 1 to R3 in the temperature coefficient setting unit 150, or change the temperature coefficients of the resistors R 1 to R3, etc., you can set the temperature to some extent. Arbitrarily set. Therefore, when the voltage output from the PLL circuit 38 and applied to the local oscillator 24 changes with the ambient temperature, the output voltage of the DAC 42 can be changed in the same way, thereby preventing tracking errors caused by temperature changes. Expansion. In addition, the DAC 42 and the antenna tuning circuit 10 of this embodiment do not use components such as high-temperature temperature compensation and capacitors because of their configuration, so that the component cost can be reduced. The temperature coefficient setting unit 150 in the DAC 42 can control the type and concentration of impurities by using semiconductor processing such as CMOS processing or MOS processing. Therefore, components for temperature compensation are formed on the semiconductor substrate. Each component constituting the receiver as shown in FIG. 2 is formed on a semiconductor substrate, thereby reducing the number of external components, facilitating manufacturing, reducing the number of components, and thus reducing costs. Also, the present invention is not limited to the embodiments described above. Within the scope of the technical idea and gist of the present invention, there are other various technical changes. For example, in the above second embodiment, d AC 4 2 is used. It is explained that the current corresponding to each element of the input data is generated. However, other methods of DAC 'can also be used. For example, a receiver using a dAC such as R_2R resistance type or load resistance type is also applicable to the present invention. In these situations, the power supply that generates the predetermined operating voltage has a temperature coefficient setting section. It is better if the operating voltage generated by the power supply can be changed with temperature. This method is also applicable to the current shape D A c 4 2 shown in FIG. 3. That is, in FIG. 3, 'the temperature coefficient setting portion i 5 〇 is replaced by a resistance whose resistance 値 is fixed -18-1231661, and at the same time, the temperature coefficient setting portion 1 50 is set so that the output voltage can be adjusted according to the ambient temperature. For a changing power supply, it is better if the output voltage of the power supply is applied to the drain of the FET 1 1 0, 1 20, 1 3 0… 1 40. In the second embodiment described above, the temperature coefficient setting unit 150 included in the DAC 42 is explained by combining three types of resistors R 1 to R 3 with different temperature coefficients. In addition, it can also be used in semiconductor manufacturing. During processing, the type and concentration of impurities added by diffusion or penetration can be changed to form four or more resistors with different temperature coefficients. Combining the four or more resistors with different temperature coefficients can also form a temperature coefficient Setting section 1 5 0. Alternatively, when a predetermined temperature coefficient is obtained by using only one type of resistance, the temperature coefficient setting unit 150 may be configured by using two or one type of resistance. In addition, the resistors in the temperature coefficient setting section 150 are delicately combined to make the temperature coefficient of the entire DAC reach the desired level. If the temperature coefficient setting section in the DAC 42 is other than 150, such as If there is a non-negligible temperature coefficient, the temperature coefficient of the entire DAC 4 2 including these components and the temperature coefficient setting unit 150 is included. It is best to set the temperature coefficient of the temperature coefficient setting unit 150 to the whole Temperature coefficient. Also, in the above embodiment, the antenna tuning circuit having a resonance circuit in which the tuning coil 11 and the varactor diode 13 are connected in parallel is described, but the resonance circuit may also be constituted by connecting these components in series. The possibility of industrial use is as described above. "In accordance with the present invention, in addition to the double conversion method, the antenna tuning circuit is provided in front of the high-frequency amplifier circuit, so that the broadcasting station included in the received broadcasting wave can be reliably removed. Unwanted components such as radio waves and noise. In addition, 1231661 is compared with the situation of setting a tuning circuit after high-frequency amplification, because the antennas § week § all use the tuning coil as the antenna, so there is no need to prepare a separate tuning coil and antenna. Therefore, the number of components can be reduced. [Brief Description of the Drawings] Fig. 1 is a configuration diagram of the receiver of the first embodiment. Fig. 2 is a configuration diagram of a receiver according to a second embodiment. Fig. 3 is a detailed configuration diagram of D A C. Fig. 4 is a configuration diagram of a temperature coefficient setting section in which three types of resistors are connected in series. Fig. 5 is a configuration diagram of a temperature coefficient setting section in which three kinds of resistors are connected in parallel. Fig. 6 is a configuration diagram of a temperature coefficient setting section in which three types of resistors are connected in series and in parallel. [Description of Representative Symbols of Main Parts] 10 Antenna Tuning Circuit 11 Tuning Coil 12 Capacitor 13 Varying Diode 20 Local Frequency Amplifying Circuit 22 Hybrid Circuit 24 Local Oscillator 26 Intermediate Frequency Filter 28 Hybrid Circuit 3 0 Local Oscillator 3 2 IF filter 34 IF amplifier circuit -20-1231661
3 6 檢 波 電 路 3 8 PLL 電 路 40 控 制 部 42 數 位 -類比變換器 44 操 作 部 1 1 0〜 111 場 效 jm hx^i、 電 晶體 112 電 流 源 1 20〜 1 22 場 效 應 電 晶體 123 類 比 開 關 124、 13 4、 1 44 變 換 電 路 1 3 0〜 13 2 場 效 應 電 晶體 1 40〜 142 場 效 應 電 晶體 15 0 溫 度 係 數 設疋咅B -21 -3 6 Detector circuit 3 8 PLL circuit 40 Control section 42 Digital-to-analog converter 44 Operating section 1 1 0 to 111 Field effect jm hx ^ i, transistor 112 Current source 1 20 to 1 22 Field effect transistor 123 Analog switch 124 , 13 4, 1 44 Conversion circuit 1 3 0 ~ 13 2 Field effect transistor 1 40 ~ 142 Field effect transistor 15 0 Temperature coefficient setting 疋 咅 B -21-