TWI226580B - Method of power source design rule checking for line width and conducting hole number of circuit layout - Google Patents

Method of power source design rule checking for line width and conducting hole number of circuit layout Download PDF

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TWI226580B
TWI226580B TW92124082A TW92124082A TWI226580B TW I226580 B TWI226580 B TW I226580B TW 92124082 A TW92124082 A TW 92124082A TW 92124082 A TW92124082 A TW 92124082A TW I226580 B TWI226580 B TW I226580B
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Taiwan
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circuit
circuit layout
power supply
design
diagram
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TW92124082A
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Chinese (zh)
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TW200511122A (en
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Chiou-Feng Tsai
Jr-Feng Lin
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Inventec Corp
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Publication of TW200511122A publication Critical patent/TW200511122A/en

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Abstract

The present invention is related to a method of power source design rule checking for the line width and the conducting hole number of circuit layout. In the invented method, a detecting procedure is set in a circuit layout software such that it is capable of detecting whether each power source connecting pin or the conducting hole disposed on the circuit layout plot fulfills the power source design rule when the detecting procedure is conducted. In addition, an erroneous mark can be generated at the position where the power source design rule is not satisfied. Thus, the erroneous mark can be used as the basis for correcting the circuit layout plot.

Description

12265801226580

發明所屬之技術領域: 本發明係有關於偵測電路佈局圖之方法,卢 — -電路佈局軟體中加入一摘測程# ’該偵測程序 電路佈局圖之電源接腳或導通孔,是否符合電 蚪 則,並在不符合電源設計規則位置處,產生_錯ς., 以供佈局者或設計者方便檢查出該電路佈局圖^符;;電开 :計規則位置處,或不需要再由設計者重覆檢查,“: 計規則之-種偵測電路佈局圖之線寬與導通孔數 里疋否付合電源設計規定之方法。 先前技術: 按,現今的電子設 印刷電路板(P r i n t e d 印刷電路板除了安裝各 各項電子元件間之相互 供之特定功能或作用。 以一般單面的印刷 無法彎曲的材質所製作 (conductor pattern) 路板上電+元件的電路 加入新的功能,使得印 的零件也越來越多,使 之問題。 為了解決上述之問 備中,都設有安裝各種電子元件之 circuit board ,簡稱:pcb),該 種電子元件外,其主要功能係提Z 電流連接’以產生該電子設備所提 電路板而言,其係由絕緣隔熱、並 成,其表面設有複數個導線 或稱佈線’該導線乃提供印刷電 連接,但由於現今電子設備不斷地 刷電路板之佈線越來越複雜,需要 得單面的印刷電路板產生不敷使用 題,目前已有雙面板The technical field to which the invention belongs: The present invention relates to a method for detecting a circuit layout diagram. A circuit test software is added to the circuit layout software. # 'The detection program circuit layout diagram of power pins or vias, whether Electric rules, and _wrongs. Will be generated at locations that do not meet the design rules of the power supply, so that the layout planner or designer can easily check out the circuit layout symbol; Repeated inspection by the designer, ": A rule of detection-a method to detect whether the line width and the number of vias in the circuit layout chart meet the design requirements of the power supply. Previous technology: Press, the current electronic design of printed circuit boards ( Printed printed circuit boards have specific functions or functions in addition to the mutual supply between various electronic components. It is made of a single-sided printed material that cannot be bent (conductor pattern). The circuit of the electrical + components on the circuit board adds new functions. In order to solve the above-mentioned problems, a circuit board (abbreviated as pcb) is installed to install various electronic components. Outside the component, its main function is to provide a Z-current connection to produce the circuit board of the electronic device. It is insulated and insulated, and has a plurality of wires or wiring on its surface. The wires are provided for printing. Electrical connection, but nowadays, as electronic devices continue to brush circuit boards, wiring is becoming more and more complicated, and single-sided printed circuit boards need to be used.

1226580 五、發明說明(2) 一 ' ---- (Double-Slded Boards)及多層板(Multi—Uyer Boards),其中雙面板係於其兩面都有導線及導孔(v丨&), 該導孔係在印刷電路板上充滿或塗上金屬且貫穿之小洞, 用以連接兩面之導線。由於雙面板的面積比單面板大了一 倍,且導線可以互相交錯(可以繞到另一面),使得雙面板 更適合用在複雜的電路上。 而多層板f為了增加可以佈線的面積,其係設有數個 雙面板,並在每個雙面板間放進一個絕緣板後黏牢(壓 合)’多層板的層數就代表了有幾層獨立的佈線層,通常 層數都是偶數’並且包含最外側的兩層。但在多層板中若 只想連接其中一些線路,那麼導孔可能會浪費一些其他層 的線路空間,因此,為了避免這個問題,乃利用埋孔 (Buried vias)和盲孔(Biind ▽““技術穿透其中幾層, 其中盲孔技術係將幾層内部印刷電路板與表面印刷電路板 連接’不須穿透整個板子,而埋孔則是只連接内部的印刷 電路板’所以光是從表面是看不出來的。 再者’每一次設計電路板之電路圖時,都必須要符合 一套規定,例如:導線間的最小保留空隙、最小導線寬度 即其他類似的實際限制等,又這些規定,由於電路的速 度’傳送訊號的強弱,電路對耗電與雜訊的敏感度,以及 材質品質與製造設備等因素而有不同。例如:電流強度上 升’那麼導線的粗細也必須要增加。 據上所述’現今印刷電路板(尤其是多層板),其佈線 設計之電路圖已變的相當複雜,如此,將不易實際做出一1226580 V. Description of the invention (2) A '---- (Double-Slded Boards) and Multi-Uyer Boards, where the double-sided board has wires and vias (v 丨 &) on both sides, The via is a small hole that is filled or coated with metal on the printed circuit board and is used to connect the wires on both sides. Because the area of the double-sided board is double that of the single-sided board, and the wires can be staggered (can be wound to the other side), the double-sided board is more suitable for complex circuits. In order to increase the area that can be wired, the multilayer board f is provided with several double-sided boards, and an insulating board is placed between each double-sided board. The number of layers of the multilayer board represents several layers. Independent wiring layers, usually with an even number of layers, and include the two outermost layers. However, if you only want to connect some of the circuits in the multilayer board, the vias may waste some other layers of circuit space. Therefore, in order to avoid this problem, buried vias and blind vias (Biind ▽ "" technology Penetrating through several of these layers, where the blind hole technology connects several layers of internal printed circuit boards to the surface printed circuit board 'does not need to penetrate the entire board, while buried holes connect only the internal printed circuit board' so only from the surface It cannot be seen. Furthermore, 'Every time you design a circuit diagram of a circuit board, you must meet a set of requirements, such as: the minimum reserved space between wires, the minimum wire width, and other similar practical restrictions. Due to the speed of the circuit, the strength of the transmission signal, the sensitivity of the circuit to power consumption and noise, and the quality of materials and manufacturing equipment are different. For example: the current strength increases, then the thickness of the wire must also be increased. According to the above The circuit diagram of the wiring design of today's printed circuit boards (especially multilayer boards) has become quite complicated, so it will not be easy to implement Make a

1226580 五、發明說明(3) 塊樣本印刷電路板,甚 線設計是否符人規定=手動^方式’也難以確認佈 可以在印刷電:;:正作為保設計ΐ來的電路圖 _ 正*運作,現在一般設計電路圖之設 路設計°軟體1:工c程師,以下簡稱設計者),大都利用-電 (如第2圖所示),;CU=er)來繪製出-電路 圖,並可利β # 體可以讀取該電路設計 運作的Ή 體所提供之各種功能顯示該電路設計圖 =的H以檢驗所設計之電路設計^否可達到設計 言,:之電路佈局人員(以下簡稱佈局者)而 各電子^。路佈局軟體,將關於該電路設計圖之 局軟體在自動轉換的,晶^ 佈局® ’但由於該電路佈 父又或將線路連接到另一,因n,線、線路 桩袍> + 相互父織之電路狀況,若依此電路佑月周古 計目的,⑨,該佈無法達到電路設計圖之設 對該電路你 σ 、、吊而再利用该電路佈局軟體,冉 不同訊號之雷玖π A , 旦又、歲之冤路加以配置,令 惟,m互交織,以繪製成-實際佈局圖 佈局圖完成後,必需再由中,當該實際 雷之雷、Ε 付合電路設計之各項規定,例如1 Γ 電之電源接腳 々·某一些晶 用較粗之線 =冤机車乂大,使付该電源接腳必 <綠見,或该電源接腳必須要有多少 才使1226580 V. Description of the invention (3) For a sample printed circuit board, whether the line design meets human requirements = manual ^ method 'It is also difficult to confirm that the cloth can be printed in the printed circuit:;: as a circuit diagram from the design guarantee _ positive * operation, Now the general design of circuit design circuit design ° software 1: engineers, engineers (hereinafter referred to as the designer), most use-electricity (as shown in Figure 2); CU = er) to draw-circuit diagram, and can benefit β # The body can read the various functions provided by the circuit design and operation. The circuit design diagram = H to check the designed circuit design. ^ Can the design language be reached: The circuit layout staff (hereinafter referred to as the layout operator) ) , Each electron ^. Circuit layout software, which automatically converts the circuit software about the circuit design diagram, layout ^ 'But because the circuit cloth master or the line is connected to another, because of n, line, line robe > + each other The state of the father ’s circuit. If you use this circuit to protect the moon and the moon, you ca n’t achieve the design of the circuit design. You can use the circuit layout software for the circuit. π A, once again, the old road is configured, so that m is intertwined to draw into the actual layout. After the layout is completed, it must be re-centered. When the actual thunder and thunder circuit design Various regulations, such as 1 Γ power supply pin 々 Some thicker wires = larger locomotive, so that the power supply pin must be < green see, or how many power supply pins must be Only make

第6頁 1226580 發明說明(4) ___ 順利地將該電源接腳所輸出之電源傳 都是佈局者無法立即作出因應或,直另一層上,這些 決,而都要等待設計者確認後才能進行^改實際佈局圖解 局者在修改實際佈局圖時,將會發生下如此,該佈 (1) 加粗線寬後,將會與其他相鄰幾路έ問題^ 起; j、艰路相璺在一 (2) 無法在該電源接腳周圍增加導通孔· 而使得該佈局者需要調整該實際佈局圖 要移動其它電子元件之位置,而大幅度地倐至於須 圖,使得電路板完成的時間將會被延緩,尤I=貝,=局 者未能一次將該實際佈局圖上所有錯誤之位^ =出右5又5十 :j者不斷地修改,那在電路佈局人員與設計“::二 使付電路板完成設計的時間延誤,造成無法在預計時間 出使用該電路板之產品,而使得該產品因時間的延誤^ 失其產品競爭力。 、喪 發明内容: 有鑑於佈局者無法自行確$忍貫際佈局圖,是否符合電 路設計規定,而直接修改實際佈局圖之問題,發明人經過 長久努力研究與實驗,終於開發設計出本發明之一種偵測 電路佈局圖之線寬與導通孔數量是否符合電源設計規定之 方法,係在一電路佈扃軟體設有一偵測程序,該偵測程序 可偵測一電路佈局圖上所設置之各電源接腳或導通孔,是 否符合電源設計規則,姐可在不符合電源設計規則位置Page 1226580 Description of the invention (4) ___ The power transmission output from the power supply pin is a layout that cannot be responded to immediately or directly to another layer. These decisions must be confirmed by the designer before proceeding. ^ Change the actual layout diagram. When the actual layout diagram is modified, the following will happen. After the cloth (1) has a thick line width, it will cause problems with other adjacent roads. J. In one (2), it is impossible to add a via hole around the power pin, so that the layout designer needs to adjust the actual layout diagram to move the position of other electronic components, which greatly increases the time required for the diagram to complete the circuit board. Will be postponed, especially I = Bei, = Bureau failed to place all the wrong positions on the actual layout at one time ^ = Out of the right 5 and 50: j are constantly modified, which is in the circuit layout staff and design ": : Second, the time delay for the completion of the design of the auxiliary circuit board makes it impossible to produce the product using the circuit board at the expected time, which makes the product lose its competitiveness due to time delay. Do it yourself The question of whether the consistent layout diagram meets the circuit design requirements and directly modify the actual layout diagram. After long-term research and experiment, the inventor finally developed and designed a method to detect whether the line width and the number of vias of the circuit layout diagram of the present invention The method that meets the requirements of power supply design is to have a detection program in a circuit layout software. The detection program can detect whether each power pin or via set on a circuit layout diagram meets the power supply design rules. Can be used in locations that do not meet power design rules

第7頁 1226580 五、發明說明(5) 如此’該錯誤標記可作為修改該電 义’產生一錯誤標記 略佈局圖之依據。 置d ΐ ΐ查委員能對本發明之目的、形狀、構造裝 配合圖式,詳細說明如:…。識與瞭冑’兹舉實施例 貫施方式: 否符ir月係一種侦測電路佈局圖之線寬與導通孔數量是 c計規定之方法’請參閱第1、2及3圖所示, 電電路佈局軟體1内設有一偵測程序1〇,俾該 佈局軟體1將一電路設計圖20轉換並加以配置成一電 A Fill圖1 2後,右執行該偵測程序1 〇,係可偵測該電路佈 局圖12上各電源接腳120或導通孔122,是否符合電源設計 規則,若各電源接腳120或導通孔122不符合電源設計規 則’則在各電源接腳1 2 〇或導通孔1 2 2之位置處,產生一錯 誤標=11(如第5圖所示),如此,佈局者將可直接對該標 。己α卩伤進行修改,以快速地完成正確無誤的電路佈局圖。 在本發明中,該電路設計圖2〇係利用一電路設計軟體 2所繪製完成的,該電路設計軟體2設有一屬性設定程序 22,該屬性設定程序22係可供設計者在該電路設計圖2〇之 至少一個電源接腳(POWER PIN) 24或導通孔(VIA)之位置 處’分別標示一電流值2 6,而該電路佈局軟體j内尚設有 一屬性對照表1 4,該屬性對照表1 4係依照電源設計規則訂 定’該電源設計規則包括有各種電流值分別是以何種粗細 第8頁 1226580 五、發明說明(6) "一'' ------ ΐΐϊ及多少數目之導通孔傳送,俾該電料計_被該 電路佈局软體1轉換並加以配置成一電路佈局圖12後,該 電路佈局軟體1係可根據該電路設計圖20上之電流值,由 該屬性對照表14中尋找匹配的電源設計規則,並產生各電 源接腳1 20或導通孔丨22對應電源設計規則之一屬性報告檔 3,如此,佈局者亦可由該屬性報告擋3所列内容,檢視該 f路佈局圖12,以確認該電路佈局圖12之各電源接腳丨2〇 或導通孔1 22,是否符合電源設計規則。 在本發明之一較佳實施例中,請參閱第丨及6圖所示, 该偵測程序10被執行後,該電路佈局軟體i係可產生一偵 ^選單16,該價測選單16上包括有複數個偵測模式18及該 七,對照表1 4,该屬性對照表1 4係提供佈局者針對各種電 版定義出其對應之線寬及導通孔數量,而該偵測模式1 8係 可設定該偵測程序10,係對整個電路佈局圖12、其中一個 電路層或指定區1 3域進行偵測,而該指定區域丨3係如第3 及4圖上座標Ul,Yl)、(Χ2,Υ2)、(Χ3,γ3)及(χ4,γ4)所圍住之 區域,或第5圖上座標(^1)及(^)間之區域,且無論 係執行那一個偵測模式18,該偵測程序丨〇都是利用該屬性 對知、表1 4,偵測標示有電流值之各電源接腳丨2 〇或導通孔 1 2 2之位置處,是否符合該屬性對照表丨4定義,並在不符 合該屬性對照表14定義處,產生該錯誤標記η (如第4及5 圖所示),該錯誤標記11係可將各電源接腳12〇或導通孔 122所連接之線路丨24以不同於正確線路之線路顏色表示。 為能了解該偵測模式18是如何對各電源接腳12〇或導Page 7 1226580 V. Description of the invention (5) In this way, “the error mark can be used as a basis for generating an error mark and modifying the layout of the error mark”. Set d ΐ Inspectors can explain the purpose, shape and structure of the present invention in detail, such as:... I understand the implementation method of the following examples: No symbol ir month is a method to detect the line width and the number of vias in the circuit layout chart. The method is specified in c. See Figures 1, 2, and 3, There is a detection program 10 in the electrical circuit layout software 1. The layout software 1 converts a circuit design diagram 20 and configures it into an electrical A Fill diagram 12 and then executes the detection procedure 10 to the right. Test whether the power supply pins 120 or the vias 122 on the circuit layout diagram 12 meet the power supply design rules. If the power supply pins 120 or the vias 122 do not meet the power supply design rules', then each power supply pin 1 2 0 or conductive At the position of hole 1 2 2, an error mark = 11 is generated (as shown in Figure 5). In this way, the layout operator can directly mark the mark. Modifications have been made to quickly complete the correct circuit layout. In the present invention, the circuit design diagram 20 is drawn by using a circuit design software 2. The circuit design software 2 is provided with an attribute setting program 22, which can be used by a designer to design the circuit diagram. At least one of the power pin (POWER PIN) 24 or via hole (VIA) of 20 is marked with a current value of 26, and an attribute comparison table 14 is also provided in the circuit layout software j. The attribute comparison Table 1 4 is determined according to the power supply design rules. The power supply design rules include the thickness of various current values. Page 8 1226580 V. Description of the invention (6) " 一 '' ------ ΐΐϊ and How many vias are transmitted, the electrical meter_ is converted by the circuit layout software 1 and configured into a circuit layout diagram 12, the circuit layout software 1 can be based on the current value on the circuit design diagram 20, The attribute comparison table 14 looks for a matching power supply design rule, and generates an attribute report file 3 corresponding to one of the power supply design rules for each of the power supply pins 120 or vias 22, so the layout planner can also list the contents listed in the attribute report block 3. , The path layout view of FIG. 12 f, to confirm that the circuit layout of FIG respective power supply pins 12 or Shu 2〇 vias 122, whether the power supply design rules. In a preferred embodiment of the present invention, please refer to FIG. 丨 and FIG. 6. After the detection program 10 is executed, the circuit layout software i can generate a detection menu 16 and the price measurement menu 16 Including a plurality of detection modes 18 and the seven, the comparison table 1 4 and the attribute comparison table 1 4 provide the layout planer to define the corresponding line width and the number of vias for various electrical versions, and the detection mode 1 8 The detection program 10 can be set, which detects the whole circuit layout diagram 12, one of the circuit layers or the designated area 1 and 3, and the designated area 丨 3 is the coordinates Ul, Yl on the 3 and 4) , (Χ2, Υ2), (χ3, γ3), and (χ4, γ4), or the area between the coordinates (^ 1) and (^) on Figure 5, regardless of which detection is performed In mode 18, the detection program 丨 〇 uses this attribute to know, Table 1 4 to detect whether each power pin labeled with a current value 丨 2 〇 or the position of the through hole 1 2 2 conforms to this attribute comparison The definition in Table 丨 4, and where the attribute does not match the definition in Table 14, the error mark η is generated (as shown in Figures 4 and 5), and the error Note 11 of each line may be the line Shu power pin 12〇 or vias 122 connect the line 24 to the right of the line is different from the color representation. In order to understand how the detection mode 18 is

第9頁 1226580 五、發明說明(7) 通孔1 2 2之位置處,進行偵測,以下將以指定區域之偵測 模式1 8,進行說明,請參閱第7圖所示: (7 0 1)首先’該偵測模式1 8先要求選擇該電路佈局圖 12中之一電源接腳120或導通孔122 ; (7 0 2 )嗣,該偵測模式丨8標示出該電源接腳丨2 0或導通 孔122與線路124連接之區域; (7 0 3 )再由該電路佈局軟體1根據該電路設計圖2 〇上之 電流值,自該屬性對照表1 4中尋找匹配的電源設計規則; (7 〇 4 )俟,利用對應該電流值之電源設計規則,判斷 該電源接腳1 2 0或導通孔1 2 2所連接線路1 2 4,是否符合該 電源设計規則’若是進行步驟(7 〇 5 ),否則進行步驟 ( 70 6 ); (7 〇 5 )結束該偵測模式; (7 0 6 )即在不符合該電源設計規則之位置處,產生錯 誤標記11。 由上述可知,設計者只要在該電路設計圖2 〇之各電源 接腳2 4或導通孔,正確地標示其電流值,並提供電源設計 規則給佈局者,用以定義屬性對照表丨4後,該電路佈局軟 體1即可利用該屬性對照表14,判斷各電源接腳丨2〇或導通 孔1 2 2是否已符合電源設計規則,而令該佈局者所繪製完 成的電路佈局圖1 2,不用再請設計者確認是否有不符電源 設計規定。 ” 為能更清楚地了解本案在實際實施時,該電路佈局軟 體1、電路設計軟體2係如何相互配合應用,以下依照實際Page 9 1226580 V. Description of the invention (7) The position of the through hole 1 2 2 is used for detection. The following will use the specified area detection mode 1 8 for description. Please refer to Figure 7: (7 0 1) First, the detection mode 1 8 requires that one of the power supply pins 120 or the vias 122 in the circuit layout shown in FIG. 12 be selected; (7 0 2) 嗣, the detection mode 丨 8 indicates the power supply pin 丨20 or the area where the via 122 is connected to the line 124; (7 0 3) The circuit layout software 1 then finds the matching power supply design from Table 1 4 according to the current value on the circuit design diagram 2 0 according to the property. Rules; (7 〇) 俟, use the power supply design rules corresponding to the current value to determine whether the power supply pins 1 2 0 or vias 1 2 2 connected lines 1 2 4 meet the power supply design rules' if it is carried out Step (7 05), otherwise proceed to step (70 6); (7 05) end the detection mode; (7 0 6) That is, an error mark 11 is generated at a position that does not meet the power supply design rule. It can be known from the above that the designer only needs to design the power supply pins 24 or vias of FIG. 2 in the circuit, and correctly indicate the current value, and provide the power supply design rules to the layout person to define the attribute comparison table. The circuit layout software 1 can use the attribute comparison table 14 to determine whether each power pin 丨 20 or the via 1 2 2 has met the power supply design rules, so that the layout planner's completed circuit layout diagram 1 2 It is no longer necessary to ask the designer to confirm whether there is any non-compliance with the power supply design requirements. In order to understand more clearly how the circuit layout software 1 and circuit design software 2 are used in conjunction with each other when this case is actually implemented, the following is based on the actual situation.

第10頁 1226580 五、發明說明(8) 貫施之步驟--說明,請參閱第8圖所示·· (8 0 1).首先,在該電路佈局軟體1中建立該屬性對照表 14 ; (8 0 2 )嗣,在該電路設計軟體2所繪製之電路設計圖2 0 之電源接腳24或導通孔之位置處,分別標示有一電流值; (8 0 3 )嗣,該電路佈局軟體1係可根據該電路設計圖2 〇 上之電流值,由該屬性對照表丨4中尋找匹配的電源設計規 則’並產生各電源接腳1 2 0或導通孔1 2 2對應電源設計規則 之一屬性報告檔3 ;Page 1226580 V. Description of the invention (8) The steps of implementation-for description, please refer to Figure 8 (8 0 1). First, establish the attribute comparison table 14 in the circuit layout software 1; (8 0 2) 嗣, at the position of the power supply pin 24 or via hole of the circuit design diagram 2 drawn by the circuit design software 2, respectively, a current value is marked; (80 0) 嗣, the circuit layout software 1 can be based on the current value in the circuit design diagram 2 0, from the attribute comparison table 丨 4 to find the matching power supply design rules' and generate each power supply pin 1 2 0 or through hole 1 2 2 corresponding to the power supply design rules An attribute report file 3;

(8 0 4 )俟,該偵測程序1 〇被執行時,該偵測程序丨〇先 產生一偵測選單1 6 ; (8 0 5 )最後,再讀取該偵測選單丨6上被選擇之偵測模 式1 8 ’以根據該被選擇之偵測模式丨8,偵測標示有電流值 之各電源接腳1 2 0或導通孔1 2 2之位置處,是否符合該屬性 對照表1 4定義,並在不符合該屬性對照表丨4定義處產生一 錯誤標記1 1。(8 0 4) 俟, when the detection program 10 is executed, the detection program 丨 〇 first generates a detection menu 16; (80 0) Finally, read the detection menu 6 The selected detection mode 1 8 ′ is used to detect whether the position of each power pin 1 2 0 or the through hole 1 2 2 marked with the current value conforms to the attribute comparison table according to the selected detection mode 丨 8. 1 4 is defined, and an error mark 1 1 is generated at a place that does not meet the definition of the attribute comparison table 4.

綜上所述’當設計者利用該電路設計軟體2繪製出該 電路設什圖2 0時’若在該電路設計圖2 〇之各電源接腳2 4或 導通孔之位置處,分別標示出一電流值,即可在該電路佈 局軟體1利用該偵測程序1 〇,將該電路佈局圖丨2上標示出 不符合該電源設計規則之各電源接腳丨2 〇或導通孔丨2 2之位 置處,以供佈局者或設計者方便檢查出該電路佈局圖丨2不 符合電源設計規則位置處,或不需要再由設計者重覆檢 查,如此,即可解決佈局者無法自行確認實際佈局圖1 2,In summary, 'when the designer draws the circuit design diagram 20 using the circuit design software 2', if it is at the position of each power supply pin 24 or via hole of the circuit design diagram 20, it is marked separately A current value can be used in the circuit layout software 1 to use the detection program 1 〇, the circuit layout diagram 丨 2 marked each power pin that does not meet the power supply design rules 丨 2 〇 or via 丨 2 2 For the convenience of the layouter or designer to check out the circuit layout diagram 2 2 The location that does not comply with the power supply design rules, or the designer does not need to repeat the inspection, so that the layoutter cannot confirm the actual situation Layout drawing 12

第11頁 1226580 五、發明說明(9) 是否符合電路設計規定之問題。 按,以上所述,僅為本發明最佳之一具體實施例,惟 本發明之構造特徵並不侷限於此,任何熟悉該項技藝者在 本發明領域内,可輕易思及之變化或修飾,皆可涵蓋在以 下本案之專利範圍。Page 11 1226580 V. Description of the invention (9) Whether the circuit design requirements are met. According to the above, it is only one of the best specific embodiments of the present invention, but the structural features of the present invention are not limited to this. Any person skilled in the art can easily think of changes or modifications in the field of the present invention. , Can be covered by the patent scope of this case.

第12頁 1226580 圖式簡單說明 圖式說明: 第1圖乃本發明之電路佈局軟體與電路設計軟體相互 配合之架構示意圖; 第2圖乃本發明之電路設計圖之示意圖; 第3圖乃第2圖之正確電路佈局圖之示意圖; 第4圖乃第2’圖之一錯誤電路佈局圖之示意圖; 誤電路佈局圖之不 測選單之示意圖; 定區域之偵測模式下之流程 佈局軟體及電路設計軟體相 圖乃第2圖之另一 第6圖係乃本發明之偵 第7圖係乃本發明之指 圖; 第8圖係乃本發明之電 互配合之之流程圖。 主要部分之代表符號: 電路佈局軟體……1 錯誤標記............11 指定區...............13 偵測選單............16 電源接腳............120、 線路..................124 電路設計圖.........20 電流值...............26 偵測程序............10 電路佈局圖.........12 屬性對照表.........14 偵測模式............18 24 導通孔...............122 電路設計軟體......2 屬性設定程序......2 2 屬性報告檔.........3Page 1226580 Brief description of the drawings Brief description of the drawings: Figure 1 is a schematic diagram of the mutual cooperation of the circuit layout software and circuit design software of the present invention; Figure 2 is a schematic diagram of the circuit design diagram of the present invention; Figure 2 is a schematic diagram of the correct circuit layout; Figure 4 is a schematic diagram of the incorrect circuit layout of Figure 2 '; a diagram of the unpredictable menu of the incorrect circuit layout; the flow layout software and circuit in the detection mode of a fixed area The design software phase diagram is another diagram of the second diagram. The sixth diagram is an investigation of the present invention. The seventh diagram is a finger diagram of the present invention. The eighth diagram is a flowchart of the electrical interaction of the present invention. Representative symbols of the main parts: Circuit layout software ... 1 Error mark ......... 11 Designated area ......... 13 Detection menu ... .... 16 Power supply pin ............ 120. Circuit ... 124 Circuit design Figure ......... 20 Current value ......... 26 Detection program ... 10 Circuit layout ... ....... 12 Attribute Comparison Table ...... 14 Detection Mode ......... 18 24 Vias ... ..... 122 Circuit design software ... 2 Property setting procedure ... 2 2 Property report file ... 3

第13頁Page 13

Claims (1)

1226580 六、申請專利範圍 1 · 一種偵測電路佈局圖之線寬與導通孔數量是否符人 :η定之方法’,亥方法係在一電路佈局軟體内設; 夂測私,俾该電路佈局軟體將一電路設計圖轉換並加 以配置成-電路佈局圖& ’若執行㈣測程序,該該電路 佈局軟體將依照下列步驟進行處理: 首先,偵測該電路佈局圖上各電源接腳或導通孔之位 置處,是否符合電源設計規則;1226580 VI. Scope of patent application1. A method for detecting whether the line width and the number of vias of a circuit layout match people: η method, the Hai method is built in a circuit layout software; Convert and configure a circuit design diagram into-circuit layout diagram & 'If the test program is executed, the circuit layout software will process according to the following steps: First, detect each power pin or conduction on the circuit layout diagram Whether the location of the hole meets the power supply design rules; 右電路佈局圖之電源接腳或導通孔之位置處,有不符 合電源設計規則之情況,則在不符合電源設計規則之電源 接腳或導通孔之位置處,產生一錯誤標示。 ” 2·如申請專利範圍第1項所述之方法,其中該電路佈局 軟體内尚設有一屬性對照表,該屬性對照表係依照電源設 計規則訂定,該電源設計規則包括有各種電流值分別是^ 何種粗細之線寬及多少數目之導通孔傳送; 而該電路設計圖係利用一電路設計軟體所緣製完成 的’該電路設計軟體設有一屬性設定程序,該屬性設定程 序係可供設計者在該電路設計圖之至少一個電源接腳或^ 通孔之位置處,分別標示一電流值; 俾該電路設計圖被該電路佈局軟體轉換並加以配置成If the positions of the power pins or vias on the right circuit layout do not comply with the power supply design rules, an error mark is generated at the positions of the power pins or vias that do not meet the power design rules. "2. The method described in item 1 of the scope of patent application, wherein the circuit layout software also has an attribute comparison table, which is determined according to the power supply design rules, which includes various current values. Yes ^ what thickness of the line width and the number of vias are transmitted; and the circuit design diagram is made using a circuit design software 'The circuit design software is provided with an attribute setting program, and the attribute setting program is available for The designer indicates a current value at the position of at least one power pin or ^ through hole of the circuit design diagram; 俾 The circuit design diagram is converted and configured by the circuit layout software 一電路佈局圖後’該電路佈局軟體係依照下列步驟,進行 處理: 首先,根據該電路設計圖上之電流值,由該屬性對照 表中尋找匹配的電源設計規則; 嗣,根據被尋找出來的電源設計規則,產生各電源接After a circuit layout diagram, the circuit layout soft system is processed according to the following steps: First, according to the current value on the circuit design diagram, the matching power supply design rule is found in the attribute comparison table; 嗣, according to the found Power supply design rules 第14頁 1226580 __-^ —------- 六、申请專利範圍 " " ' ' '一"" —— - 腳或‘通孔對應電源設計規則之一屬性報告檔。 、3 · ^申請專利範圍第2項所述之方法,其中該偵測程 序^ ^行後,该電路佈局軟體係可、產生一偵測選單,該偵 剎$單上包括有複數個偵測模式及該屬性對照表,該屬性 對狀表係提供佈局者針對各種電流定義出其對應之線寬及 導通孔數量,而·該偵測模式係可設定該偵測程序,係對整 個電路佈局圖、其中一個電路層或指定區域進行偵測,俾 該偵’則杈式被指定後,將依該偵測模式之處理步驟,進 後續處理。 ~ 4 ·如申請專利範圍第3項所述之方法,其中該偵測模 式係依照下列步驟對各電源接腳或導通孔之位置處,進 偵測: 首先’該偵測模式標示出該電源接腳或導通孔與線路 連接之區域; a再由該電路佈局軟體根據該電路設計圖上之電流值, 自该屬性對照表中尋找匹配的電源設計規則; 俟’利用對應該電流值之電源設計規則,判斷該電源 接腳或導通孔所連接線路,是否符合該電源設計規則; 若不符合該電源設計規則,即在不符合該電源設計規 則之位置處,產生錯誤標記。 5 ·如申請專利範圍第2項所述·之方法,其中該電路佈 ,軟體、電路設計軟體係依照下列步驟進行處理,以偵測 °亥電路佈局圖之各電源接腳或導通孔,是否符合電源設計 規則: —Page 14 1226580 __- ^ —------- VI. Scope of Patent Application " " '' '一 " " ——-Attribute report file of foot or ‘through-hole corresponding power supply design rule. 3, ^ The method described in item 2 of the patent application scope, wherein after the detection procedure ^ ^, the circuit layout soft system can generate a detection menu, and the detection $ list includes a plurality of detections. The mode and the attribute comparison table. The attribute table provides the layouter to define the corresponding line width and the number of vias for various currents, and the detection mode can set the detection procedure for the entire circuit layout. Map, one of the circuit layers or a specified area for detection. After the detection is specified, the detection mode will be followed for further processing. ~ 4 · The method as described in item 3 of the scope of patent application, wherein the detection mode is to detect the position of each power pin or via hole according to the following steps: First, 'the detection mode indicates the power supply. The area where the pin or via is connected to the line; a Then the circuit layout software looks for a matching power supply design rule from the attribute comparison table based on the current value on the circuit design diagram; 利用 'use the power supply corresponding to the current value Design rules to determine whether the lines connected to the power pins or vias conform to the power design rules; if the power design rules are not met, an error mark is generated at a location that does not meet the power design rules. 5 · The method described in item 2 of the scope of patent application, wherein the circuit cloth, software, and circuit design soft system are processed in accordance with the following steps to detect whether each power pin or via of the circuit layout diagram Comply with power supply design rules: — 1226580 六、申請專利範圍 首先,在該電路佈局軟體中建立該屬性對照表; 嗣,在該電路設計軟體所繪製之電路設計圖之電源接 腳或導通孔之位置處,分別標示有一電流值; 嗣’該電路佈局軟體係可根據該電路設計圖上之電流 值,由該屬性對照表中尋找匹配的電源設計規則,並產生 各電源接腳或導通孔對應電源設計規則之一屬性報告檔; 俟,該偵測程序被執行時,該偵測程序先產生一偵測 選單;1226580 6. Scope of patent application First, establish the attribute comparison table in the circuit layout software; 嗣, at the positions of the power pins or vias of the circuit design diagram drawn by the circuit design software, a current value is respectively marked;嗣 'The circuit layout soft system can find matching power supply design rules from the attribute comparison table based on the current value on the circuit design diagram, and generate an attribute report file corresponding to one of the power supply design rules for each power pin or via; Alas, when the detection procedure is executed, the detection procedure first generates a detection menu; 最後,再讀取該偵測選單上被選擇之偵測模式,以根 據該被選擇之偵測模式,偵測標示有電流值之各電源接腳 或導通孔之位置處,是否符合該屬性對照表定義,並在不 符合該屬性對照表定義處產生一錯誤標記。Finally, read the selected detection mode on the detection menu to detect whether the position of each power pin or via marked with a current value conforms to the attribute comparison according to the selected detection mode. Table definition, and an error flag is generated where the attribute does not match the table definition. 第16頁Page 16
TW92124082A 2003-09-01 2003-09-01 Method of power source design rule checking for line width and conducting hole number of circuit layout TWI226580B (en)

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