TWI225692B - The method for pre-retaining CB opening - Google Patents

Abstract

The present invention provides a method for pre-retaining CB opening at DRAM manufacture process. According to the method of the present invention a CB opening is filled with a photoresist and an LPD oxide layer is filled at room temperature to avoid destroying the photoresist. The LPD oxide layer and the photoresist is replaced easy by a polysilicon and BPSG.

Description

1225692 _ Case number 92127862_ 年月 日 __ V. Description of the invention (1) Technical field to which the invention belongs The invention relates to a method for manufacturing a dynamic random access memory, especially a bit line contact window opening reserved in advance Production method. Prior art Dynamic random access memory is a widely used integrated circuit component, and it occupies an extremely important position in today's information electronics industry. A common dynamic random access memory system is formed by a plurality of bit lines (b i t 1 i ne) and word lines. Because in recent years, the manufacturing of integrated circuits has been moving toward reducing the line width. The reduction of line width can reduce the horizontal size of integrated circuits, but the vertical size still increases the difficulty of the process due to the increase of the aspect ratio. . Therefore, traditionally, when making a bit line contact window opening in a dynamic random access memory, it is easy to cause damage to the gate conductor (GC), that is, the word line. The damage of the component causes the problems of short circuit between the word line and the bit line and open circuit of the bit line contact window. Summary of the Invention

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The main purpose is to provide a short circuit according to the invention. A method for avoiding the path between the word line and the bit line Another object of the present invention is to provide a recording A μ-μ, which avoids the break of the contact line of the bit line. Based on the above-mentioned object, the method for making the opening of the present invention. A plurality of gate conductors formed in the present invention (there is a gap between the gate conductors. On the pole conductors and within the gaps described above.) Of course, part of the base material and some of the gates conduct a predetermined interval of gates between the gate conductors. The upper surface of the part of the conductor. Connected to phase deposition (LPD). Next, removing the photoresist layer on a part of the upper surface of the predetermined interlayer is to provide a method for exposing a reserved space, first, a conductor (GC), and then, after forming a photoresist, removing part of the photoresist, and the photoresist The layer still has a gap and the photoresist layer is still covered, forming a liquid-precipitation oxide layer that has been removed from the gap and still covers a specific one to form a one-dimensional line-to-line contact window on a substrate J: and to the deep layer on the These layers are exposed to fill the specific two covers and the specific two. Product (1i qu id photoresist layer of your two gate conductive window openings. Then 'form a polycrystalline silicon (polysi 1 icon) layer on the bit line contact window In the opening and on the oxide layer deposited in the liquid phase. Then, a part of the polycrystalline stone layer is removed to expose the oxide layer deposited in the liquid phase. Then, the oxide layer deposited in the liquid phase is removed to expose a part of the substrate and the part again. These gate conductors. Then, a vaporized layer is uniformly formed on the exposed portion of the substrate and the exposed portion of this gate conductor. Next, a borophosphosilicate glass is formed—

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(BPS G) layer on the nitride layer. Finally, the borophosphosilicate glass layer is removed and the nitride layer is exposed above the polycrystalline silicon layer. By using the method for manufacturing a reserved bit line contact window opening disclosed in the present invention, the problems of short circuit between the word line and the bit line and open circuit of the bit line contact window can be avoided. The advantages and spirit of the present invention can be further understood through the following detailed description of the invention and the accompanying drawings. Embodiments Please refer to Figs. 1A to 1M. Figs. 1A to 1M are not intended for the manufacturing process of the dynamic random access memory of the present invention. The process steps of the preferred embodiment of the present invention will be described below with reference to the drawings and summary description. As shown in FIG. 1A, a plurality of gate conductors (GC) 20a, 20b, 20c, and 20d are formed on the substrate 10. Among them, there are gaps between 20 coffees and 20 b, between 2 0 mouths 2 0 c, and between 2 0 b and 2 0 d, and the gap between 20 Yong 2 Ob is defined as the predetermined gap 21. The photoresist layer 22 is formed between the predetermined gaps 21, 20ain 20c, and 20b and 20d between the GCs 20a, 20b, 20c, 20d, and 20afn 20b, so that the GCs 20a, 20b, 20c, and 20d are completely Photoresist layer 22, page 7, 1225692 V. Description of the invention (4) Covered 'as shown in Figure 1B, said "correcting the next process step", as shown in Figure lc, remove part of the photoresist layer 22, so that exposure is exposed In the part of the substrate 1 between the gap between 20 and 20 c and between the gap between 20 b and 20 d, Gc 20c and GC 20d are also completely exposed, but the left half of GC 20a And the right half of gc 20b only partially exposed. The unremoved photoresist layer 2 2 still fills part of the predetermined gap 21, and the unremoved photoresist layer 22 still covers the right half of the upper surface of the GC 20a and the left half of the upper surface of the GC 2 0 b. unit. It should be particularly noted that the above steps use the characteristics of the photoresist layer 2 2 that is easy to be cleaned, and the bit line contact window is reserved in the predetermined gap 21 by the photoresist layer 2 2 in FIG. 1 c. Openings to avoid damage to the right half of the upper surface of the GC 20a and the left half of the upper surface of the GC 20b when the bit line contacts the window opening as known in the art. Therefore, the unremoved photoresist layer 22 is the position of the bit line contact window opening in the dynamic random access memory. The photoresist layer 22 can be removed by using a dry photoresist or a wet photoresist. Among them, SPM is most commonly used in the wet photoresist removal method. SPM is a mixture of sulfuric acid (H2S04) and hydrogen peroxide (H202). Please refer to FIG. 1D and proceed to the next process step. This step can form a liquid phase deposition (LPD) oxide layer at room temperature (about 25 ~ 40 ° C). 24 at the position where the photoresist layer has been removed.

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? 0: Second: The position where the photoresist layer is removed refers to the gap between the two in Figure lc, the gap between 20 and 20d, and it has been fully exposed. ^ C ° 204 and (^ 20 & The left half of 6 and the right half of 6 (: 201): It should be noted that the height of the LPD oxide layer 24 can be slightly lower than that of the photoresist layer 22. Because the photoresist layer 22 is extremely easy to be at a high temperature It is destroyed in the environment, but because the LpD that can form the oxide layer 24 at room temperature is used in the above process, the position of the bit line contact window opening reserved by the photoresist layer 22 can still be completed in the above process steps The next process step 'as shown in FIG. 1E, the photoresist layer 22 is removed from the predetermined gap 21 and the upper surface of the portion that still covers 6 [20 柳 00201], so that a bit line is formed. Contact window openings 2 6. Next, a polysi 1 icon layer 28 is formed in the bit line contact window opening 26 and on the oxide layer 24 of the LPD, as shown in FIG. 1F. In the next process step, a part of the polycrystalline silicon layer 28 is removed until the upper surface of the LPD oxide layer filling the bit line contact window openings 26 is exposed, as shown in FIG. 1G. The polycrystalline silicon layer 28 is partially removed by chemical mechanical polishing (CMP) or etching. As shown in FIG. 1H, the oxide layer 24 of the LPD is removed, so that part of the substrate 10 and part of the gate conductors are exposed again. The LPD oxide layer 24 can be removed by diluting Hydrofluoric Acid (DHF)

1225692 ^ _ Case No. 92127862 Afternoon Day ______ V. Description of Invention (6) Buffered Hydrofluoric Acid (BHF). The DHF is a mixed solution composed of hydrofluoric acid and water, wherein the volume ratio of hydrofluoric acid to water in the DHF mixed solution is between 1: 500 and 1:30. BHF is a mixed solution consisting of ammonia fluoride, hydrofluoric acid and water. The volume ratio of ammonia fluoride and hydrofluoric acid in the BHF mixed solution is between 6 ·· 1 to 5 ·· 1. The next process step is as shown in FIG. II. A nitride layer 30 is uniformly formed on the exposed portion of the substrate 10, the exposed portion of the GC (the left half of the GC 20c, GC 20d, GC 20a, and GC 20b) and the top surface of the polycrystalline silicon layer 28. The next process step is shown in FIG. 1J, and a borophosphosilicate glass (BPSG) layer 32 is formed on the nitride layer 30. Then, remove the borophosphosilicate glass layer 32 to expose the nitride layer 30 above the polycrystalline silicon layer 28, as shown in Fig. 1K. A Tetra-Ethyl-Oetho-Silicate (TEOS) layer 34 is formed on the exposed nitride layer 30 and borophosphosilicate glass (BPSG) layer 32 above the polycrystalline silicon layer 28, as described in 2L picture. The last process step, as shown in Figure 2M, forms a tungsten plug 36 in TEOS 34 located above the polycrystalline silicon layer 28. From the above description, it is not difficult to find that the method disclosed in the present invention mainly utilizes a liquid phase deposition (1 Uuid phase deposition, LPD) oxide layer 2 4 and a photoresist layer 22 to match each other and reserve bit lines in advance. The manufacturing method of the contact window opening does not need to be etched to fill the contact opening of the contact line as in the conventional technology, so the method disclosed in the present invention can completely avoid the etching of the conventional technology.

1225692 _Case No. 92127862_ Revised Year_ of the Invention (5) Damage to the right half of the upper surface of GC 20a and the left half of the upper surface of GC 20 b when the bit line contacts the window opening , While avoiding the short circuit between the word line and the bit line and the open circuit of the bit line contact window. With the detailed description of the above preferred embodiments, it is hoped that the features and spirit of the present invention may be described more clearly, rather than limiting the scope of the present invention with the preferred embodiments disclosed above. On the contrary, the intention is to cover various changes and equivalent arrangements within the scope of the patent to which the present invention is intended to apply.

Page 11 1225692 Case No. 92127862 Amendment Brief Description of Drawings Brief Description of Drawings Figures 1A ~ 1M are schematic diagrams of the manufacturing process of the dynamic random access memory of the present invention. Explanation of symbols of the drawings 10 substrates 20a, 20b, 20c, 20d gate conductor 2 2 photoresist layer 2 6-bit line contact window opening 3 0 nitride layer 34 tetraethylphosphosilicate layer 2 1 predetermined gap 2 4 Liquid-phase deposited oxide layer 2 8 Polycrystalline silicon layer 32 Borophosphosilicate glass layer 3 6 Pseudoplug

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Claims (1)

1225692 6. Scope of patent application Scope of patent application, a manufacturing method of reserved bit line contact window openings, the method includes at least: providing a substrate; forming a plurality of gate conductors (GC) on the substrate; There is a gap between the gate conductors; a photoresist layer is formed on the gate conductors and in the gap; a part of the photoresist layer is removed to expose a part of the substrate and a part of the gates, the body And the photoresist layer still fills one of the gap between the specific two gate conductors, and the part of the gap and the photoresist layer still covers the upper surface of the part of the specific two gate conductors; forming a sacrificial layer has been removed The position of the photoresist layer; removing the photoresist layer from the predetermined gap and still covering the upper surface of a part of a specific two gate conductors to form a bit line contact window opening; forming a polysilicon layer on the Bit line contact window openings and on the sacrificial layer; Page 13 1225692 Removing part of the polycrystalline silicon layer to expose the sacrificial layer; removing the sacrificial layer and exposing part of the substrate and part of the gate conductors again; forming a nitride layer uniformly on the exposed part of the substrate, The exposed portions of the gate conductors and the upper surface of the polycrystalline silicon layer; forming a borophosphosilicate glass (BPSG) layer on the nitride layer; and removing the borophosphosilicate glass layer to expose the polycrystalline silicon layer The nitride layer above. 2. The manufacturing method as described in item 1 of the scope of the patent application, wherein after removing the borophosphosilicate glass layer, the method further comprises the following steps: forming a tetraethyl-ethyl-phosphite (Tetra-Ethyl-Oetho-Silicate, TEOS) layer is exposed on the nitride layer and the borophosphosilicate glass layer; and a tungsten plug is formed in the tetraethylphosphosilicate layer above the polycrystalline silicon layer. Page 14 1225692 --- 92127862_I Amendment of the previous day VI. Patent application scope " ~ 3, The production method described in item 1 of the patent application scope, wherein the removal of the photoresist layer can be selected from a dry type photoresist And one of the wet type photoresist. 4. The manufacturing method as described in item i of the patent application range, wherein the wet photoresist can be made by SPM, where SPM is a mixed solution of sulfuric acid (H2s〇4) and hydrogen peroxide (H202). 5. The manufacturing method described in item 1 of the scope of patent application, wherein the sacrificial layer is an oxide layer of liquid phase deposition (LPD). 6. The manufacturing method as described in item 5 of the scope of patent application, wherein the liquid-phase-deposited oxide layer is formed at a temperature of about 25 to 40 ° C. 7. The manufacturing method as described in item 5 of the scope of patent application, wherein the liquid-phase deposited oxide layer can be selected from the group consisting of diluted hydrofluoric acid (DHF) and buffered hydrofluoric acid (Buffered Hydrofluoric Acid). , BHF). 8. The production method described in item 7 of the scope of the patent application, wherein the DHF is a mixed solution composed of wind I acid and water. The volume ratio of hydrogen acid and water in the mixed solution is between 1 ·· 50. 0 to 1: 30. 9. The manufacturing method described in item 7 of the scope of patent application, wherein the BHF is Page 15 1225692 __9212 ^ 862 ____ month and year amends __ Six, the scope of the patent application is a mixed solution composed of ammonia fluoride and hydrofluoric acid and water, the volume of ammonia fluoride and hydrofluoric acid in the mixed solution The ratio is between 6 ·· 1 and 5: 1. 10. The manufacturing method as described in item 1 of the patent application park, wherein the removal of the polycrystalline stone layer system may be selected from one of chemical mechanical polishing (CMP) and the remaining method. 11. The manufacturing method described in item 1 of the scope of patent application, wherein the thickness of the I compound layer is about 120A ± 10%. 12. A method for manufacturing a reserved bit line contact window opening, the method at least includes: providing a substrate; forming a plurality of gate conductors (GC) on the substrate; and forming the gate conductors on the substrate. There is a gap between them; a photoresist layer is formed on the gate conductors and in the gap; a portion of the photoresist layer is removed to expose the electrode conductor, and the photoresist layer still fills a predetermined gap and the photoresist layer is still covered The surface; part of the substrate and part of the gates covering a part between the two gate conductors Page 16 1225692 Forming a liquid phase deposition (LPD) oxide layer at a position where the photoresist layer has been removed; removing the photoresist layer in the predetermined gap and still covering the upper surface of a portion of a specific two gate conductors And forming a bit line contact window opening; forming a polycrystalline silicon (Polysiic) layer on the bit line contact window opening and on the liquid-phase deposited oxide layer; removing part of the polycrystalline silicon layer and exposing it The liquid-phase-deposited oxide layer; removing the liquid-phase-deposited oxide layer, and exposing part of the substrate and part of the gate conductors again; uniformly forming a nitride layer on the exposed part of the substrate, The exposed portions of the gate conductors and the upper surface of the polycrystalline silicon layer; forming a borophosphosilicate glass (BPSG) layer on the nitride layer; removing the borophosphosilicate glass layer until the exposure is located above the polycrystalline silicon layer Forming a nitride layer; forming a Tetra-Ethyl-Oetho-Silicate (TEOS) layer on the exposed nitride layer and the borophosphosilicate glass layer; Page 12 1225692 __ Case No. 92127862 6. Scope of patent application and forming a tungsten plug in the tetraethylphosphite oxalate layer above the polycrystalline silicon layer. 1 3. The manufacturing method as described in item 12 of the scope of patent application, wherein the removal of the photoresist layer can be selected from a dry type photoremoval I5 and a wet type photoremoval device. The manufacturing method described in item 12, wherein the wet photoresist can be made by SPM, wherein the SPM grandson is a mixed solution of sulfuric acid (H2S04) and hydrogen peroxide (H202). 15. The manufacturing method as described in item 12 of the scope of the patent application, wherein the oxide layer deposited in the liquid phase is formed at a temperature of about 25 to 40 ° C. 16. The manufacturing method as described in item 12 of the scope of the patent application, wherein the oxide layer deposited in the liquid phase can be selected from the group consisting of Diluted Hydrofluoric Acid (DHF) and Buffered Hydrofluoric Acid (Buffered Hydrofluoric Acid). Acid, BHF). 17. The manufacturing method as described in item 6 of the scope of patent application, wherein the DHF is a mixed solution composed of hydrofluoric acid and water, and the volume ratio of hydrofluoric acid and water in the mixed solution is between 1: 50,000: 1 to 30. 1225692 __- Case No. 92127862 _ ^^ _ VI. Application for patent scope 1 8. The production method described in item 16 for patent scope, where the BHF is composed of ammonia fluoride, hydrofluoric acid and water—mixed Solution, the volume ratio of ammonia fluoride and hydrofluoric acid in the mixed solution is between 6: 1 to 5 ·· 1. 19. The manufacturing method as described in item 12 of the scope of patent application, wherein the removal of part of the polycrystalline silicon layer can be selected from one of chemical mechanical polishing (CMP) and the remaining method. 20. The manufacturing method as described in item 12 of the scope of patent application, wherein the thickness of the nitride layer is about 120A ± 10%. ψ p. 19