TWI224823B - Method for manufacturing a solder ball from stud bump - Google Patents
Method for manufacturing a solder ball from stud bump Download PDFInfo
- Publication number
- TWI224823B TWI224823B TW092132839A TW92132839A TWI224823B TW I224823 B TWI224823 B TW I224823B TW 092132839 A TW092132839 A TW 092132839A TW 92132839 A TW92132839 A TW 92132839A TW I224823 B TWI224823 B TW I224823B
- Authority
- TW
- Taiwan
- Prior art keywords
- wire
- solder
- alloy
- tin
- pad
- Prior art date
Links
- 229910000679 solder Inorganic materials 0.000 title claims abstract description 112
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 28
- 238000000034 method Methods 0.000 title claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 230000004907 flux Effects 0.000 claims abstract description 37
- 239000010410 layer Substances 0.000 claims description 33
- 238000005476 soldering Methods 0.000 claims description 32
- 229910052751 metal Inorganic materials 0.000 claims description 19
- 239000002184 metal Substances 0.000 claims description 19
- 239000004065 semiconductor Substances 0.000 claims description 13
- 229910001316 Ag alloy Inorganic materials 0.000 claims description 10
- 229910045601 alloy Inorganic materials 0.000 claims description 10
- 239000000956 alloy Substances 0.000 claims description 10
- 229910000846 In alloy Inorganic materials 0.000 claims description 8
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 8
- 239000011241 protective layer Substances 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 5
- 229910001297 Zn alloy Inorganic materials 0.000 claims description 4
- MPZNMEBSWMRGFG-UHFFFAOYSA-N bismuth indium Chemical compound [In].[Bi] MPZNMEBSWMRGFG-UHFFFAOYSA-N 0.000 claims description 4
- YZASAXHKAQYPEH-UHFFFAOYSA-N indium silver Chemical compound [Ag].[In] YZASAXHKAQYPEH-UHFFFAOYSA-N 0.000 claims description 4
- 238000005272 metallurgy Methods 0.000 claims description 4
- 229910000597 tin-copper alloy Inorganic materials 0.000 claims description 4
- 229910001152 Bi alloy Inorganic materials 0.000 claims description 3
- QCEUXSAXTBNJGO-UHFFFAOYSA-N [Ag].[Sn] Chemical compound [Ag].[Sn] QCEUXSAXTBNJGO-UHFFFAOYSA-N 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- RHZWSUVWRRXEJF-UHFFFAOYSA-N indium tin Chemical compound [In].[Sn] RHZWSUVWRRXEJF-UHFFFAOYSA-N 0.000 claims description 3
- GZCWPZJOEIAXRU-UHFFFAOYSA-N tin zinc Chemical compound [Zn].[Sn] GZCWPZJOEIAXRU-UHFFFAOYSA-N 0.000 claims description 3
- 229910000861 Mg alloy Inorganic materials 0.000 claims description 2
- RRXGIIMOBNNXDK-UHFFFAOYSA-N [Mg].[Sn] Chemical compound [Mg].[Sn] RRXGIIMOBNNXDK-UHFFFAOYSA-N 0.000 claims description 2
- JWVAUCBYEDDGAD-UHFFFAOYSA-N bismuth tin Chemical compound [Sn].[Bi] JWVAUCBYEDDGAD-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 239000003755 preservative agent Substances 0.000 claims description 2
- 230000002335 preservative effect Effects 0.000 claims description 2
- 229910001174 tin-lead alloy Inorganic materials 0.000 claims description 2
- 229910001128 Sn alloy Inorganic materials 0.000 claims 3
- 229910000851 Alloy steel Inorganic materials 0.000 claims 1
- 238000003466 welding Methods 0.000 description 8
- 238000002788 crimping Methods 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 230000008569 process Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 230000004927 fusion Effects 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- 239000011701 zinc Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910000691 Re alloy Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- TZPTTZOAXIUTMA-UHFFFAOYSA-N [Re].[Sn] Chemical compound [Re].[Sn] TZPTTZOAXIUTMA-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
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- H01L2224/1183—Reworking, e.g. shaping
- H01L2224/1184—Reworking, e.g. shaping involving a mechanical process, e.g. planarising the bump connector
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- H01L2224/11901—Methods of manufacturing bump connectors involving a specific sequence of method steps with repetition of the same manufacturing step
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- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
1224823 五、發明說明Ο) —^— 【發明所屬之技術領域】 本發明係有關於一種銲球製造方法，特別係有關於一 種利用打線形成導線鮮塊之銲球製造方法。 【先前技術】 習知在電子元件之接合面係製作有複數個銲球 〔solder ba 1 1〕，以作為外部電性導接，關於銲球製作 在一如晶圓或半導體封裝結構等基板之技術係有多種方 式’如模具植球〔mo 1 d p 1 a n t i ng〕、電鍍、印刷與打線 等等’基於現有半導體封裝設備之共用考量，以打線並迴 銲成銲球的方法係具有減少設備投資成本之優點。 我國專利公告第5 3 3 5 5 6號揭示有一種以打線技術形成 銲球之「凸塊製程」，第1圖至第5圖則繪示以該習知銲球 製程對應於一基板之銲墊部份之剖面放大示意圖，請參閱 第1圖，首先提供一半導體晶圓1 1 〇，該晶圓丨丨〇係具有一 主動表面111，該主動表面1 11上係配置有複數個銲墊丨i 2 及一保護層1 1 3，且該保護層11 3係露出該些銲墊11 2，並 在該些銲墊112上製作出一墊片狀之凸塊下金屬層114 〔Under Bump Metallurgy，UBM〕，該凸塊下金屬層114 係包含有一黏著層、一阻障層及一融合層，並且一銲料導 線120〔 solder wire〕係由一半導體打線機台之打線接合 工具1 3 0導出，將該銲料導線1 2 〇之一端加熱熔合成一導線 銲塊140〔 stud bump〕；請參閱第2圖，以該打線接合工 具130將該導線銲塊140壓接在該凸塊下金屬層114，接合 於該凸塊下金屬層114之該導線銲塊140係具有一外露之結1224823 V. Description of the invention 0) — ^ — [Technical field to which the invention belongs] The present invention relates to a method for manufacturing a solder ball, and more particularly, to a method for manufacturing a solder ball using wire bonding to form a fresh wire block. [Prior art] It is known that a plurality of solder balls [solder ba 1 1] are produced on the joint surface of electronic components as external electrical conduction. The solder balls are fabricated on a substrate such as a wafer or a semiconductor package structure. The technology department has multiple methods such as “mo 1 dp 1 anti ng”, electroplating, printing and wire bonding, etc. Based on the common considerations of existing semiconductor packaging equipment, the method of wire bonding and back soldering into solder balls has reduced equipment Advantages of investment costs. China's Patent Bulletin No. 5 3 3 5 5 6 discloses a "bump process" for forming solder balls by wire bonding technology. Figures 1 to 5 show the welding process corresponding to a substrate with the conventional solder ball process. An enlarged schematic cross-sectional view of a pad portion is shown in FIG. 1. First, a semiconductor wafer 1 1 10 is provided. The wafer 1 1 has an active surface 111, and the active surface 1 11 is provided with a plurality of solder pads.丨 i 2 and a protective layer 1 1 3, and the protective layer 11 3 exposes the pads 11 2, and a pad-like under bump metal layer 114 is formed on the pads 112 [Under Bump Metallurgy, UBM], the metal layer 114 under the bump includes an adhesive layer, a barrier layer and a fusion layer, and a solder wire 120 is a wire bonding tool by a semiconductor wire bonding machine 130 Lead out, and fuse one end of the solder wire 12 to a wire bump 140 [stud bump]; see FIG. 2, and crimp the wire bump 140 to the metal under the bump with the wire bonding tool 130. Layer 114, the wire bonding pad 140 attached to the metal layer 114 under the bump A knot exposed
圓 第5頁 1224823Circle Page 5 1224823
五、發明說明（2) 線端1 4 1 ’倘若在壓接步驟中未使用助銲劑，則該導線鲜 塊1 4 0與該凸塊下金屬層11 4間之結合強度並不足夠；之 後，請參閱第3圖，執行一研磨或壓平之步驟，將該導線 銲塊1 4 0之頂面研磨為一磨平面1 42〔即去除該結線端 141〕，以利助銲劑丨5〇形成於該磨平面142上，但由於在 未迴銲前導線銲塊140與凸塊下金屬層114之接合強度不 足，因此有可能在研磨或壓平步驟中脫落；並且，請參閱 第4圖’在该導線銲塊1 4 〇上塗施一助鲜劑1 5 〇〔 f 1 u X〕， 以利將该導線銲塊1 4 0迴銲成一銲球1 6 0〔如第5圖所5. Description of the invention (2) Wire end 1 4 1 'If the soldering flux is not used in the crimping step, the bonding strength between the wire fresh block 1 40 and the metal layer 11 4 under the bump is insufficient; Please refer to FIG. 3, perform a grinding or flattening step, and grind the top surface of the wire soldering block 140 to a grinding plane 1 42 (ie, remove the junction end 141) to facilitate the formation of flux 丨 50 On the grinding surface 142, but because the bonding strength of the wire bonding pad 140 and the under bump metal layer 114 is not sufficient before re-soldering, it may fall off during the grinding or flattening step; and, please refer to FIG. 4 ' Apply a preservative 15 [f 1 u X] to the wire soldering block 140 to facilitate re-soldering the wire soldering block 140 into a solder ball 1 60 [as shown in FIG. 5]
示〕，因此，在上述之習知凸塊製程中，需要多次助銲劑 1 5 0之塗施步驟與研磨導線銲塊步驟。 另 製造方 著層、 狀，即 面，以 術製作 該黏著 此種銲 用以形 重覆利 【發明 ，我國專利公 法」，其特點 一阻障層及一 該Ιέ 乾膜 出銲 層與 埭之 成銲 用之 内容 著層與該 之開口界 球於該融 该阻障層 製造方法 告第538434 為在基板之 融合層，其 阻障層仍全 定銲球之形 合層之後， ’以減少對 需要使用到 球之乾膜係為每一銲 耗材。 號係揭示 具銲塾之 中僅將融 面覆蓋在 成位置， 再以該銲 基板之保 多道曝光 球製作所 有一種「銲球之 表面形 合層蝕 s亥基板 以印刷 球為罩 遵層造 顯影之 %須使 成有一黏 刻成墊片 之該表 並迴銲技 幕，姓除 成損害， 步驟，且 用且無法As shown in the figure, therefore, in the conventional bump manufacturing process described above, multiple application steps of the flux 150 and the step of grinding the wire bumps are required. In addition, the layer is formed in a layer or shape, that is, the surface is used to make the adhesive. This invention is used to repeat the benefits [Invention, Chinese Patent Public Law], which is characterized by a barrier layer and a dry film out of the welding layer. The content of the welding layer and the opening boundary ball in the welding method of the barrier layer manufacturing method No. 538434 is a fusion layer on the substrate, and the barrier layer still completely defines the shape of the solder ball. Reduce the need to use the dry film system for each welding consumable. The serial number reveals that only the melting surface is covered in the welding pad, and then all kinds of "blading surface of the solder ball are laminated and etched on the substrate, and the printed ball is used as the cover compliance layer. The percentage of development must be made into a sheet that is engraved into a gasket and back soldered. The last name is divided into damage, steps, and cannot be used.
主要目的係在於提供一種利用導線銲塊之銲 其係將一包含有助銲劑之銲料導線〔solder 本發明之 球製造方法，The main purpose is to provide a soldering using a wire soldering block, which is a solder wire containing a flux [solder ball manufacturing method of the present invention,
12248231224823
wire〕，以打線方式在一基板之銲墊上形成一含有助銲 之導線銲塊〔stud bump with flux〕，以將該導線銲塊 直接迴銲成銲球，達到省略習知磨平導線銲塊與塗施助 劑之製程簡化。 本發明之次一目的係在於提供一種利用導線銲塊之銲 球製造方法，其係在提供基板之步驟中，該基板之銲墊係 已形成有一凸塊下金屬層〔Under Bump Metallurgy， [JBM〕，以增進由打線形成之導線銲塊之結合強度與防止 導線知塊之金屬擴散〔metal diffusi〇n〕。wire], forming a stud bump with flux on a pad of a substrate in a wire bonding manner, so as to directly resolder the wire pad into a solder ball, so as to omit the conventional flattened wire pad Simplified manufacturing process with auxiliaries. A second object of the present invention is to provide a method for manufacturing a solder ball using a wire pad. In the step of providing a substrate, the pad of the substrate has been formed with a metal layer under the bump [Under Bump Metallurgy, [JBM ] In order to improve the bonding strength of wire pads formed by wire bonding and prevent metal diffusion of the wire knowing block [metal diffusion].
本發明之再一目的係在於提供一種利用導線銲塊之銲 球製造方法，其係在提供銲料導線之步驟中，該助銲劑係 為膏狀’以利該助銲劑係填設於該銲料導線之中空管。 本發明之另一目的係在於提供一種利用導線銲塊之銲 球製造方法及其所使用之銲料導線，該銲料導線係具有一 中空管並填充有一膏狀助銲劑，且該銲料導線係選自錫鉛Another object of the present invention is to provide a method for manufacturing a solder ball using a wire soldering block. In the step of providing a solder wire, the flux is paste-like, so that the flux is filled in the solder wire. Hollow tube. Another object of the present invention is to provide a method for manufacturing a solder ball using a wire soldering block and a solder wire therefor. The solder wire has a hollow tube and is filled with a paste-like flux, and the solder wire is selected Since tin lead
合金、錫銅合金、錫銀合金、錫鎂合金、錫鋅合金、錫錮 合金、銦銀合金、錫鉍合金、鉍銦合金、無鉛合金與純錫 之其中一材質’將該銲料導線〔solder wire〕一端之導-線銲塊以打線方式接合在該基板之銲墊上，以省略習知磨 平導線銲塊與塗施助銲劑之步驟，即可迴銲形成銲球。 依本發明之利用導線銲塊之銲球製造方法，其係包含 有：提供一基板，該基板係可為半導體晶圓、半導體晶 片、晶片尺寸封裝件〔Chip Scale Package， CSP〕、封 裝基板或印刷電路板，該基板之一表面係形成有至少一個Alloy, tin-copper alloy, tin-silver alloy, tin-magnesium alloy, tin-zinc alloy, tin-rhenium alloy, indium-silver alloy, tin-bismuth alloy, bismuth-indium alloy, lead-free alloy and pure tin wire] One end of the lead-wire soldering block is bonded to the pad of the substrate by wire bonding, so as to omit the conventional steps of flattening the wire soldering block and applying flux, the solder ball can be re-soldered. A method for manufacturing a solder ball using a wire bonding pad according to the present invention includes: providing a substrate, which can be a semiconductor wafer, a semiconductor wafer, a chip scale package (CSP), a package substrate, or A printed circuit board having at least one surface formed on one surface of the substrate
第7頁 1224823Page 7 1224823
五、發明說明（4) 銲墊；提供一銲料導線〔solder wire〕，該銲料導線係 包含有助銲劑，在一具體實施例中，該助銲劑係填設於該 一·料導線之中空管；之後’將该鲜料導線之一端加熱成一 導線銲塊並將該導線銲塊打線接合在該銲墊上，以使該含 有助銲劑之導線銲塊〔stud bump with flux〕接合於該 基板之銲墊上，最後，迴銲該内含有助銲劑之導線銲塊， 使其成形為鲜球〔s〇lder ball〕。 【實施方式】 本發明之利用導線銲塊之銲球製造方法，將列舉以下V. Description of the invention (4) Solder pad; Provide a solder wire, the solder wire contains a flux, in a specific embodiment, the flux is filled in the hollow of the one-material wire Tube; then 'heat one end of the fresh wire into a wire pad and wire-bond the wire pad to the pad, so that the stud bump with flux is joined to the substrate On the pads, finally, the wire solder block containing the flux is re-soldered to form a solder ball. [Embodiment] The method for manufacturing a solder ball using a wire pad of the present invention will be listed below
之具體實施例說明，如第6圖至第1 〇圖所示，其係在一具 體實施例中一銲球製造方法對應於一基板之銲墊部份之剖 面放大示意圖。The specific embodiment is illustrated in FIG. 6 to FIG. 10, which is an enlarged schematic cross-sectional view of a solder ball manufacturing method corresponding to a pad portion of a substrate in a specific embodiment.
請參閱第6圖，首先提供一基板1〇,該基板1〇係可為 半導體晶圓、半導體晶片、晶片尺寸封裝件〔Chip ScaU Package’ CSP〕、封裝基板或印刷電路板，在本實施例 中，該基板10係為一半導體晶圓，該基板10之一表面11係 形成有至少一個銲墊12，該表面11係為晶圓之主動表面， 該銲墊12係為鋁墊、銅墊或其它金屬f，較佳地，該基板 10之該表面11係形成有一保護層13〔passivati〇n layer〕，以顯露該銲墊12，較佳地，在該銲墊i2上更形 成有凸塊下金屬層14〔 Under Bump Metal lurgy， UBM〕例如包含有鉻、銅、鈦、鎳或金之黏著層、阻障 層及融合層，該凸塊下金屬層14係可延伸至該保護層13 上由於忒凸塊下金屬層14已為常見之結構，在此不多加Please refer to FIG. 6. First, a substrate 10 is provided. The substrate 10 can be a semiconductor wafer, a semiconductor wafer, a chip size package [Chip ScaU Package 'CSP], a package substrate, or a printed circuit board. In this embodiment, The substrate 10 is a semiconductor wafer. One surface 11 of the substrate 10 is formed with at least one solder pad 12, the surface 11 is an active surface of the wafer, and the solder pad 12 is an aluminum pad or a copper pad. Or other metal f, preferably, the surface 11 of the substrate 10 is formed with a protective layer 13 (passivating layer) to expose the bonding pad 12, preferably, a projection is formed on the bonding pad i2 Under Bump Metal lurgy (UBM) includes, for example, an adhesion layer, a barrier layer, and a fusion layer of chromium, copper, titanium, nickel, or gold. The under bump metal layer 14 can extend to the protective layer. Since the metal layer 14 under the bump is already a common structure on the top, it is not added here.
第8頁 1224823 五'發明說明（5) 贅述。Page 8 1224823 Five 'invention description (5) Repeat.
請參閱第7圖，該基板1 0係放置於一半導體封裝設備 之打線機台〈圖未繪出〉，該打線機台係具有一打線壓接 工具30 ’並提供有一銲料導線20〔solder wire〕於該打 線壓接工具30，該銲料導線20係包含有助銲劑22，在本具 體實施例中，該銲料導線2 0係具有一中空管2 1，該中空管 2 1之内徑係不大於該銲料導線2 〇之線外徑，且該助銲劑2 2 係為膏狀，以利將該助銲劑22填充於該銲料導線20之中空 管2 1 ’該銲料導線2 〇係不同於習知打線連接之金線或銘 線，該銲料導線2 〇係選自錫鉛合金、錫銅合金、錫銀合 金、錫鎮合金、錫鋅合金、錫銦合金、銦銀合金、錫鉍合 金、鉍銦合金、無鉛合金與純錫之其中一材質，其具有在 迴銲時形成球狀之良好特性。Please refer to FIG. 7. The substrate 10 is placed on a wire bonding machine (not shown) of a semiconductor packaging device. The wire bonding machine has a wire bonding tool 30 ′ and a solder wire 20 [solder wire ] In the wire crimping tool 30, the solder wire 20 includes a flux 22. In this embodiment, the solder wire 20 has a hollow tube 21, and the inner diameter of the hollow tube 21 Is not larger than the outer diameter of the solder wire 2 0, and the flux 2 2 is paste, so as to facilitate filling the flux 22 into the hollow tube 2 of the solder wire 20 1 'the solder wire 2 0 Unlike the conventional gold wire or name wire for wire bonding, the solder wire 20 is selected from tin-lead alloy, tin-copper alloy, tin-silver alloy, tin town alloy, tin-zinc alloy, tin-indium alloy, indium-silver alloy, tin One of the materials of bismuth alloy, bismuth indium alloy, lead-free alloy, and pure tin has good characteristics of forming a spherical shape during reflow.
之後’請參閱第7及8圖，可以瞬間點火加熱的方式， 將該銲料導線20之一端加熱燒結成一球狀導線銲塊23 〔stud bump〕，並將該導線銲塊23〔stud bump with flux〕打線接合在該銲墊12上之凸塊下金屬層14，以使該 各有助~劑22之導線銲塊23〔stud bump with flux〕接 合=該基板1 0之銲墊12上，由於該導線銲塊23係已包含有 助鲜劑22 ’使得在打線接合時該導線銲塊23對銲墊12〔或 ^塊下金屬層1 4〕之銲接結合強度良好，較佳地，該導線 鲜塊23之打線壓接溫度係可不大於該導線銲塊2 3之熔點， 且在打線壓接之同時施以一超音波振動，以增強該導線銲 塊23對該銲墊12上之凸塊下金屬層14之磨擦接合，在完成 1224823 五、發明說明（6) 打線接合之後’如第9圖所示，該導線銲塊2 3係具有一結 線端24，最後，請參閱第1〇圖，利用該含有助銲劑22之 線銲塊23，在該導線銲塊23上不需要進行研磨與塗施助 劑之步驟，直接迴銲該内含有助銲劑22之導線銲塊23， 其成形為銲球40〔solder ball〕，該迴銲步驟中之加熱 溫度係約比該導線銲塊23之熔點約較高為3〇〜4〇 〇c並持續 約30〜60秒，以形成弧面良好之銲球4〇。 此外，本發明不局限銲球之導線銲塊提供數量，依據 本發明之另一具體實施例，請參閱第丨丨圖，雷同之元件 以相同圖號表示，如基板1G及其元件，可利用打線結球之 y在該基板10之鲜墊12上連續打線形成第—導線鲜塊51 與第二導線銲塊52，第一導線銲塊51係壓接在該銲墊12 ^，第二導線銲塊52係堆疊壓接在第一導線銲塊51上，以 二：3:之鋅塊需求量，由於該第一導線銲塊5 1與該第二 始π地L 52亦由上述之銲料導線20打線構成，故該第一導 2與該第二導線銲塊52内係包含有助銲劑以，其可 書:參L第iV:之ί線銲塊而不會造成助銲劑之塗施困難， ^ @ ，在迴銲過程中，該第一導線銲塊51與該第 融合為一辉球50，以達到簡化研磨與額外 卜ίϊΐΐ步驟，在本實施例中，該基板10之該表面11 ^另覆蓋有—應力緩衝層60，其係包覆該些鲜球50之底 4 ’以增強該些銲球50之結合。 本2明之保護範圍當視後附之申請專利範圍所界定者 為準，任何熟知此項技藝者，在不脫離本發明之精神和範Afterwards', please refer to Figs. 7 and 8. In the instantaneous ignition heating method, one end of the solder wire 20 is heated and sintered into a spherical wire bump 23 [stud bump], and the wire bump 23 [stud bump with (flux) wire bonding to the metal layer 14 under the bump 12 on the bonding pad 12, so that the conductive bump 23 (stud bump with flux) of each of the fluxes 22 is bonded to the bonding pad 12 of the substrate 10, Since the wire solder bump 23 already contains a freshener 22 ′, the wire solder bump 23 has a good welding bonding strength to the solder pad 12 [or the lower metal layer 1 4] during wire bonding. The wire crimping temperature of the fresh wire block 23 may not be higher than the melting point of the wire soldering block 23, and an ultrasonic vibration is applied at the same time as the wire crimping, so as to enhance the convexity of the wire soldering block 23 on the welding pad 12. The friction bonding of the metal layer 14 under the block is completed after completion of 1224823 V. Description of the invention (6) Wire bonding 'As shown in FIG. 9, the wire soldering block 2 3 has a knot end 24. Finally, please refer to section 1〇 Figure. With the wire solder bump 23 containing the flux 22, it is not necessary to feed the wire solder bump 23 The steps of grinding and applying additives directly re-solder the wire solder bump 23 containing the flux 22, which is shaped into a solder ball 40. The heating temperature in this re-soldering step is approximately higher than that of the wire solder. The melting point of the block 23 is about 30 ~ 400c, which lasts about 30 ~ 60 seconds, so as to form a solder ball 40 with a good arc surface. In addition, the present invention does not limit the number of wire solder bumps provided. According to another specific embodiment of the present invention, please refer to FIG. 丨. The same components are represented by the same drawing number. For example, the substrate 1G and its components can be used. The knotting ball y is continuously wired on the fresh pad 12 of the substrate 10 to form a first wire fresh block 51 and a second wire pad 52. The first wire pad 51 is crimped to the pad 12 and the second wire is welded. The block 52 is stacked and crimped on the first wire soldering block 51, with the required amount of zinc blocks of 2: 3: because the first wire soldering block 51 and the second ground L 52 are also made of the solder wire described above. 20 wires, so the first lead 2 and the second wire soldering block 52 contain flux, which can be written: see Lth iV: the wire soldering block without causing difficulty in the application of flux ^ @ During the reflow process, the first wire soldering block 51 and the first fuse are merged into a glow ball 50 to simplify the grinding and additional steps. In this embodiment, the surface 11 of the substrate 10 ^ Also covered with-a stress buffer layer 60, which covers the bottom 4 'of the fresh balls 50 to enhance the bonding of the solder balls 50The scope of protection of this 2 Ming shall be determined by the scope of the attached patent application. Anyone who is familiar with this technology will not depart from the spirit and scope of the present invention.
第10頁 1224823 五、發明說明（7) 圍内所作之任何變化與修改，均屬於本發明之保護範圍。 1224823Page 10 1224823 V. Any changes and modifications made within the description of the invention (7) belong to the protection scope of the present invention. 1224823
圖式簡單說明 【圖式簡單說明】 第1至5圖：習知銲球製程對應於一基板之銲墊部份 Θ 面放大示意圖； 第6至1 〇圖：依據本發明之第一具體實施例，一銲球製造 方法對應於一基板之銲墊部份之剖面放大示 意圖；及 第11至1 2圖：依據本發明之第二具體實施例，另一銲球製 造方法對應於一基板之銲墊部份之剖面放大 示意圖。Brief description of the drawings [Simplified description of the drawings] Figures 1 to 5: enlarged schematic diagrams of the Θ plane of the solder pad portion corresponding to a substrate in the conventional solder ball manufacturing process; Figures 6 to 10: the first specific implementation according to the present invention For example, a solder ball manufacturing method corresponds to an enlarged sectional view of a pad portion of a substrate; and FIGS. 11 to 12: According to a second specific embodiment of the present invention, another solder ball manufacturing method corresponds to a substrate An enlarged schematic view of a cross section of a pad.
元件符號簡單說明： 1〇 基板 13 保護層 2〇 銲料導線 2 3 導線鮮塊 3 0 打線壓接工具 50 銲球 應力緩衝層 11 〇晶圓 11 3 保護層 120銲料導線 140導線銲塊 1 5 0 助銲劑 11 表面 14 凸塊下金屬層 21 中空管 24 結線端 40 銲球 51 第一導線銲塊 61 開孔 111主動表面 11 4凸塊下金屬層 130打線壓接工具 1 41結線端 1 6 0 銲球 12 銲墊 2 2 助鋅劑 52 第二導線銲塊 112銲墊 142 磨平面Simple explanation of component symbols: 10 substrate 13 protective layer 20 solder wire 2 3 fresh wire 3 0 wire crimping tool 50 solder ball stress buffer layer 11 〇 wafer 11 3 protective layer 120 solder wire 140 wire solder block 1 5 0 Flux 11 Surface 14 Metal layer under bump 21 Hollow tube 24 Junction end 40 Solder ball 51 First wire pad 61 Opening hole 111 Active surface 11 4 Metal layer under bump 130 Wire crimping tool 1 41 Junction end 1 6 0 Solder ball 12 Solder pad 2 2 Zinc flux 52 Second wire pad 112 Solder pad 142 Ground surface
第12頁Page 12
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW092132839A TWI224823B (en) | 2003-11-21 | 2003-11-21 | Method for manufacturing a solder ball from stud bump |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW092132839A TWI224823B (en) | 2003-11-21 | 2003-11-21 | Method for manufacturing a solder ball from stud bump |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI224823B true TWI224823B (en) | 2004-12-01 |
| TW200518242A TW200518242A (en) | 2005-06-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW092132839A TWI224823B (en) | 2003-11-21 | 2003-11-21 | Method for manufacturing a solder ball from stud bump |
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| TW (1) | TWI224823B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US8058163B2 (en) * | 2008-08-07 | 2011-11-15 | Flipchip International, Llc | Enhanced reliability for semiconductor devices using dielectric encasement |
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