TWI222692B - Measuring method for the thickness of gate oxide layer - Google Patents

Abstract

A measuring method for the thickness of a gate oxide layer on a semiconductor substrate. First, a rapid thermal procedure (RTP) is used to remove the moisture and organic particles attached on the gate oxide layer of the semiconductor substrate. Next, an ellipsometer is used to measure the thickness of the gate oxide layer instantly.

Description

1222692 V. Description of the invention (1) The technical field to which the invention belongs: the method has the method The invention and a semiconductor + human M, We ^ ^ ^ ^% method for measuring the thickness of the dielectric layer. The thickness of the gate oxide layer formed by the Moe Li-Li test The industry has developed to very large integrated circuits (ulsi), and various manufacturing technologies have been continuously improved. In addition, in order to obtain the crystal density of the structure density for convenient application in the integrated circuit, the two-dimensional dimension of the component has been reduced to the sub-micron calculation. In particular, the integration of integrated circuits, whether it is the manufacture of integrated circuits, the production of integrated circuits, or integrated circuits (2, pac age), includes countless steps and procedures. Therefore, the components often lead to the entire semiconductor-related system. Please refer to the first figure, which shows a large number of metal oxide half field effect transistors used in integrated circuits! . Among them, the metal oxide field effect transistor 1 has a gate structure 4 formed of a self-conductive material, and J is formed on the semiconductor substrate 2 'i and is separated by a gate oxide substrate 2. In addition, in the semiconductor substrate 2 and adjacent to the electrode structure 4, a doped region opposite to the semiconductor substrate is formed as the source / drain region 10. As for the side wall 1222692 of the gate structure 4, V. Description of the invention (2), a side wall spacer 8 is formed to effectively produce an insulation effect. However, as described above, as the size of the semiconductor element is gradually reduced, the data capacity that can be processed by the metal oxide half field effect transistor 1 also decreases. For this reason, in the semiconductor industry, efforts are often made to more accurately control the properties of dielectric materials, reduce the thickness of dielectric layers, and increase the surface area of capacitor structures. Among them, the gate oxide layer 6 as shown in the first figure is often reduced to about 20 angstroms in order to meet the requirements of the semiconductor process.

♦ 凊 As shown in the second figure, after the gate oxide layer 6 is formed on the semiconductor substrate 2 by using a thermal oxidation method, the thickness of the gate oxide layer 6 can generally be measured by using an ellipse meter (eUipsometer). . Among them, the ellipsometer is an instrument for analyzing the physical properties of the film layer, and analyzes the thickness of the film layer by measuring the change of the polarized light reflected from the surface of the film layer. The measured change of polarized light is mainly determined by the amplitude of the parallel component of the reflected light, the amplitude of the vertical component, and the phase shift. From this, the thickness and refractive index of the film layer can be obtained by analysis.

However, it is worth noting that after the oxidation process is completed and the gate oxide layer 6 has been formed on the semiconductor substrate 2, the thickness of the gate oxide layer 6 will continue to increase. Please refer to the third figure, which shows the oxidation reaction of wafers in three batches (wafer batch 1, wafer batch 2 and wafer batch 3), so that A gate oxide layer is formed on the wafer surface. Among them, the thicknesses of the gate oxide layers formed were all about 9.8 angstroms. however,

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Page 6 V. Description of the invention (3) After the oxidation process is completed, the gate oxide layer is added. After about 200 minutes, the number of arrivals—the time at the gate and the old one—increased to about 2. The thickness of the gate oxide layer of the second crystal after the thickness of Angstrom is stigmatized. The upper part of the Gangan r-run continues to 400 minutes? n 9. It was added to a thickness of about 20.5 angstroms even after the oxidation process was completed at 1100 minutes. The extremely rolled layer will also increase the amount of oxygen that can not be effectively measured. That is, the thickness of the gate oxide layer formed is different (q_ " ime), and the thickness of the layer to be emulsified needs to be as small as two. Angstrom, when r :; height: thickness r thickness error 'with the measurement = not inventive content: the main purpose of the degree of Mingzhi is to provide a measure of the true thickness of the leisure oxide layer, the purpose of the uif test is to provide- A method for measuring the thickness of gate oxide layer on 222 advanced rhenium heat treatment to remove the surface of interlayer oxide layer This month provides a method for measuring the thickness of gate oxide layer on semiconductor substrate 1222692

Method. First, a semiconductor substrate may be subjected to a thermal process such as rapid thermal tempering (/ apid thermal procedure; RTP) so that moisture and organic particles on the surface of the gate oxide layer are evaporated, and then removed. And immediately measure the thickness of the gate oxide layer using an ellipsometry. In this way, the true gate oxide layer thickness can be measured effectively. Implementation:

The invention provides a method for measuring the gate oxide layer using an ellipsometry. By performing rapid thermal tempering on the gate oxide layer first, moisture, dust, organic particles, etc. on the surface of the gate oxide layer can be removed together. Then, the thickness of the gate oxide layer is measured, so that the true gate oxide layer thickness can be obtained. A detailed description of the present invention is as follows. As shown in the second figure, a semiconductor substrate 2 is first provided, and a gate oxide layer 6 is formed on the upper surface of the semiconductor substrate 2. Among them, in a preferred embodiment, a single crystal silicon substrate having a crystal orientation of &lt; 100 &gt; can be used as the semiconductor substrate 2 of the present invention. In addition, other types of semiconductor materials, such as gallium arsenide, germanium, or silicon on insulator (SOI) on the insulating layer can also be used as semiconductor materials. And 'because of the characteristics of the surface of the semiconductor substrate to the present invention, it does not cause a special shadow direction, and the crystal orientation can also choose <11〇> or <1 / for the gate oxide layer 6, then It is composed of silicon oxide formed in an oxygen vapor environment at a temperature of about 800 to 1100 ° C. In the same way, the gate oxide layer 6 can also be formed by a suitable chemical combination and procedure of the oxide. E.g,

Page 8 V. Description of the invention (5) The anodic oxide layer 6 can also be formed by using a chemical vapor deposition method based on the dioxide dioxide, which is generally based on ethyl orthosilicate ( TEs) at a temperature of 600 to 800. Between 0 and about 0 &gt; 1 to 10 torr. In a preferred embodiment, the thickness of the gate oxide layer 6 is about 10 to 200 angstroms. Then, referring to the fourth figure, the figure shows a flow chart for measuring the gate oxide layer formed according to the present invention. Among them, the above-mentioned & step 4 () of forming the gate oxide layer 6 on the semiconductor substrate 2 is performed first. Next, step 45 is performed. The semiconductor substrate 2 is subjected to a thermal process such as a rapid thermal procedure (RTP). After the heat treatment process is completed, the gate oxide layer 6 is subjected to a measurement procedure to Determine its thickness. Among them, the heat treatment process for semiconductor substrates is often performed immediately before preparing to measure the gate oxide layer. That is, after the body substrate is subjected to the heat treatment process, the gate is measured immediately. The thickness of the oxide layer. In the implementation of the injection, the above heat treatment procedure is a rapid thermal tempering procedure (RTP), and its operating temperature is about 40 ° and 800 ° C. For 10 to 50 seconds. And, in a preferred embodiment, the operating temperature of the rapid thermal tempering procedure is about 600β (:, and the operation time is about 30 seconds. As for the above process of measuring the thickness of the gate oxide layer, It is performed using an ellipsometer. It is worth noting that in the traditional process, the thickness of the gate oxide layer continues to increase with time, often caused by the moisture (moiSture) attached to the gate oxidation sound and Organic pollution particles (〇rganic parti ^ caused. Among them, when the moisture is attached to the gate oxide layer surface, and the use of ellipse 1222692 V. Description of the invention (6) The thickness of the area where the gate oxide layer meter is not effective. Wide: Outer thickness also includes the oxygen layer attached to the gate when the moisture layer is added :: = etc? Time (_ &quot;—) increases the number, obviously it will also increase the force I. Wet rolling, dust, organic particles, etc. Except when :::: 1 pole: 2 layers thickness before measurement, effective = speed; remove the above-mentioned moisture to evaporate the idler oxygen: the temperature of the substrate of the layer conductor, effectively put it in the true place. By pumping the semiconductor substrate, It has organic particles and so on since i: can :: medium plus: extraction. In this way, after the heat treatment process is completed, the upper surface of the gate oxide layer is exposed. Therefore, after the rapid completion of the tempering process, Immediately using an ellipsometer to measure the gate oxide layer will effectively determine the true thickness of the gate oxide layer. With reference to the fifth figure, 'the figure shows the method according to the invention, Before and after the thermal tempering process, the thickness of the gate oxide layer was measured. Among them, 'Each of the 11 batches (as shown in the wafer batch 1, wafer batch 2 ... wafer batch 11, wafer A gate oxide layer having a thickness of 20 angstroms was formed on the wafer surface of batch 12). Then, after performing the first RTP procedure on twelve batches of wafers, the gate oxide layer was measured. Thickness, and the line segment A is drawn; then, after twelve batches of wafers are placed for 33 hours, they are directly inserted into 1222692. V. Description of the invention (7) The thickness of the gate oxide layer | Go to line segment B; then to line segment C of twelve batches. Among them, if you make a measurement, As shown in the figure, after the thickness of the oxide layer is about two or two hours, the measured ten Λ angstroms are placed in 33 pieces. Among them, the thickness of two κίί circles is shown in the line segment B in the figure. The thickness of the formation layer is increased to about 20 to 20 · 3 angstroms because of the reason: due to the continuous adhesion of moisture and particles to the gate oxide layer L2, the degree rises. Then, a second tearing procedure is performed and a : Ί: 2s test: And get the line segment c in the figure, if you will find twelve. The thickness of the sa, gate oxide layer will decrease again to about 19. 4 to 19. Yizong knows that during rapid thermal tempering Immediately after the procedure, the ellipse was used to identify the τ oxide layer and the measurement procedure was performed to determine the exact thickness of the gate oxide layer.

(2) Refer to the sixth figure, which shows a module 60 for measuring the thickness of the gate oxide layer provided according to the present invention. The measurement module 60 includes a heat treatment device 62 and an ellipsometer 64. As for the heat treatment device 62, in a preferred embodiment, it includes a rapid thermal tempering reaction chamber. After the wafer is placed in the heat treatment device 62, the temperature of the semiconductor substrate can be increased by heating at high temperature 'to evaporate the moisture on the surface of the gate oxide layer. In addition, 'in order to accelerate the effect of removing moisture, a suction pump can be connected to the heat treatment device 62'. By using the suction pump, the evaporated moisture, organic substances, dust and dust (dust) and Contaminated particles and the like are removed from the reaction chamber of the heat treatment apparatus 62. Next, the wafer was immediately placed in an ellipsometry 64 'to measure the thickness of the gate oxide layer. In this way, you will get real

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Gate oxide thickness. Finally, after the measurement procedure is completed, the wafer is removed from the ellipse. V. Description of the invention (8) The invention has great advantages. By placing a crystal circle with a gate oxide layer in a high-temperature environment and performing a rapid thermal tempering process, moisture and contaminated particles accumulated on the surface of the gate oxide layer can be effectively removed and removed. In addition, immediately after the completion of the thermal tempering procedure, the thickness measurement sequence of the gate oxide layer will be measured, which will effectively obtain the true n = of the closed gate oxide layer, and will more accurately control the required gate oxide layer. Thickness, and further improve the yield of the entire semiconductor process. The present invention is described above with reference to the preferred embodiments, and those skilled in the art will be able to make some modifications without departing from the spirit of the present invention. Equivalent field depends.

1222692 Schematic description of the drawings By combining the following detailed description with the accompanying drawings, you can easily understand the above content and the many advantages of this invention. Among them: The first figure is a cross-sectional view of a semiconductor wafer, showing that it is formed according to the current process. Metal oxide transistor structure on semiconductor substrate; The second figure is a cross-sectional view of a semiconductor wafer, showing the steps for forming a gate oxide layer on a semiconductor substrate according to the current process; the third figure is a data chart of the thickness of the gate oxide layer Shows that the thickness of the gate oxide layer will increase with time; the fourth figure is a flowchart for measuring the thickness of the gate oxide layer, showing the steps for measuring the thickness of the gate oxide layer according to the present invention; the fifth figure Is a data chart of the thickness of the gate oxide layer, showing the thickness change of the gate oxide layer after a rapid thermal tempering process; and the sixth figure is a device diagram for measuring the thickness of the gate oxide layer, showing Device for measuring gate oxide thickness. Comparative description of drawing numbers: 2 semiconductor substrate 6 gate oxide layer 40 forming a gate oxide layer on the semiconductor substrate 45 rapid thermal tempering of the semiconductor substrate 50 0 measuring the thickness of the oxide layer

Page 13 1222692 Brief description of the diagram 60 Module for measuring gate oxide thickness 62 Heat treatment device 64 Ellipsometer

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Claims (1)

1222692 VI. Application for patent scope '1. A method for measuring the thickness of a dielectric layer on a semiconductor substrate, the method includes at least the following steps: The semiconductor substrate is subjected to a thermal treatment process to remove the adhesion to the substrate Moisture on the upper surface of the electrical layer; and, measure the thickness of the dielectric layer. 2. The method according to item 1 of the scope of patent application, wherein the above-mentioned dielectric layer is a gate oxide layer. The above-mentioned dielectric layer has a thickness of about 10 to 200 angstroms as in the method of the first patent application. ^ As stated in the method of item 1 of the patent scope, wherein the above-mentioned heat treatment procedure 2 is a rapid thermal procedure (RTP), and its temperature is about 400 to 800 χ: 'and the operation time is about 10 to 5 〇 seconds. The method of 5β Λ application / benefit scope item 1, wherein the above-mentioned heat treatment procedure 进行 'White C Ϊ is performed' and the evaporated wet lice 'is removed from the vacuum environment by using a suction pump. 6. According to the method in the scope of the patent application, when =, j simultaneously removes the organic matter attached to L on the dielectric layer; dust and polluting particles are removed. 5 The patent application scope on page 15 is under the above-mentioned heat treatment. • If the method of patent application scope item 1 is used, after the procedure, the upper surface of the dielectric layer can be exposed. As in the method of patent application scope item 1, The above-mentioned procedure for measuring the eight thickness is performed by using an ellipsometry (ell ipSome ter). ^ "In the first species, the formula for the thickness of the gate oxide layer on the semiconductor substrate" includes at least the following steps: &lt; Wanfa, this method forms a gate oxide layer on the upper surface of the semiconductor substrate; Remove the moisture attached to the surface of the gate oxide layer; and measure the thickness of the gate oxide layer using an ellipsometer. The gate oxide layer 10 mentioned above has the thickness of about 10 to 200 angstroms as in the method of the ninth patent application. 11. The method according to item 9 of the Jingjing patent scope, wherein the thirst removal sequence is performed using a rapid thermal tempering process (RTP), and its operating temperature is about 4 °. The time from 0 to 800 is about 10 to 50 seconds.叩 Probing time of which the above-mentioned rapid heat recovery will be evaporated using a suction pump. 12. If the method in the scope of patent application No. 11 is used, the fire process is performed in a vacuum environment, and the humidity is taken from the vacuum environment. Extraction. 3 1222692 13. According to the method of claim 11 in the scope of patent application, i: During the thermal tempering procedure, ▼ will simultaneously oxidize the gate: ± = fast organic matter, dust and polluting particles are removed. 14. The upper surface of θ 14. If the method of the 9th item of the scope of patent application is applied, after the procedure in 1, the upper surface of the gate oxide layer can be exposed before the above-mentioned removal is performed. The polar oxidation method includes at least the following steps: In another method, the semiconductor substrate is subjected to rapid thermal tempering (rapid ^ RTP) to remove the wetness attached to the surface of the gate oxide layer, and the gate is measured using an ellipsometer. The thickness of the polar oxide layer. 16. The method according to item 15 of the patent application layer has a thickness of about 10 to 200 angstroms. Among them, the above-mentioned gate oxidation 17 · The method of the item 15 in the scope of the patent application, the operating temperature of the fire program is about 400 to 800 t 50 seconds 0, among which the rapid thermal recovery mentioned above and the operating time is about 10 to 18 · If the Fanghuo process in item 15 of the scope of patent application is performed in a vacuum reaction chamber, the moisture is pumped from the vacuum reaction chamber 'wherein the above rapid heat recovery and the use of a pump Fired. μ Page 17 1222692, patent application scope 19. If the method of patent application scope item 15 is used, 1 order will be oxidized to the gate at the same time during -2 tempering process: fast organic matter, dust (j dust) and contaminant particles. "20. Measurement of the thickness of the gate oxide layer on the semiconductor substrate at the top surface includes at least: a device for the thickness of the layer, which is equipped with a thermal processor for removing and attaching the semiconductor substrate Moisture on the surface of the gate oxide layer; and a plate heating private sequence, ellipsometry, used to measure the thickness of the gate oxide layer. 21. If the device of the scope of patent application is applied for item 20, wherein the oxide layer has a thickness of approximately 21, the 22th device of the scope of patent application is applied, where the above-mentioned equipment includes rapid thermal temper Reaction chamber. ", ° The device of the scope of the patent No. 22, the rapid recovery mentioned above * The operating temperature is about 400 to 800 ° c 'and the operating time is about 1. 24. For the device of the scope of the patent application No. 22, where The above-mentioned extraction system can be used by using the extraction system; Dagger's this / Yanran 'is removed from the thermal tempering reaction chamber. 1222692 Page 19