A7 _______B7__ 五、發明説明（彳） 本申請案主張2001年4月30曰申請之美國臨時申請案第 60/287，787號之優先性’該案之全文以引用的方式併入本 文中。 背景 本發明係與以電子束探測系統來取得波形有關。 傳統的電子束探測系統採用閉迴路法取得波形。加州聖 荷西市之席倫伯格（Schlumberger)科技公司所出品的ids 1〇〇〇〇™即為其中一例。在往後的本文中，吾人將稱閉迴路 取獲法為閉迴路法。 有幾個使用閉迴路法的理由。其一，閉迴路法中的回授 迴路可使取獲迴路的輸出有能力對探測點上的電壓變化作 線性式地追蹤。所謂的探測點，是電子束脈衝所指向的位 置。是故，採用了閉迴路法之探測系統其探測點上所量測 出之受測裝置（"DUTM)電壓的可靠度通常是很高的。 圖1是傳統的閉迴路式電子束探測系統100。測試器1〇4 首先會將測試向量模式送至DUT 102。然後在適當的時點， 觸發定時控制器106。定時控制器106 —遭觸發，就會將電 子束脈衝定時信號供應至電光學裝置108。收到電子束脈衝 定時信號後，電光學裝置108就會將主電子束脈衝110射向 DUT 102的探測點。主電子束脈衝110是由遮沒電路所射出 。主電子束脈衝110中的電子會與探測點相互作用，產生出 低能電子，此稱之為次電子，這些次電子當中，有一些所 具有的能量足以克服該位在電光學裝置108及DUT 102間之 本纸張尺度適用中國國家揉準(CNS) A4規格(210X 297公釐) 五、發明説明（2 ) 網目過濾器112的位能障壁。亦即，某些次電子所具有之能 量，足以使其脫離探測點與網目過濾器112間之電場束敷。 由次電子所構成的次電子束114，會由檢測器116所檢知， 產生相應的次電子流-ISEC。次電子流ISEC非線性地隨著DUT 102探測點上之表面電位^^”的變化而變化。 回授迴路118可令網目過濾器電壓VFILTER正比於VDUT變動 ，藉以線性化ISEC與VDUT間的關係。這也就是說，該回授迴 路讓VF1LTER追著VDDT。此回授迴路包含一檢測器116，一減法 器120, 一閘控式積分器122, 一電壓補償132,以及該網目 過濾器112。減法器以參考電流iref及該次電子流Isec為輸入 ，產生出誤差信號_ Verrgr，此信號之振幅乃正比於次電子 流ISEC與參考電流IREF的差。參考電流iref可用像固定電流源 這樣的裝置來產生。該誤差信號VERR()R會被傳送至閘控式積 分器122。閘控式積分器包含一受控閘124，一電容器126 ，一放大器128以及一開關130。誤差信號VERR()R通過該受控 閘124，到達電容器126及放大器128。閘控式積分器隨即提 供出一個輸出電壓，稱之為積分器電壓或vint。網目過濾器 112上的電愿VF1LTER等於V1NT減掉電壓補償132 - VQFFSET，該電 麼補偾可以抑制型式I的區域場效應。vdut及νριιτΕκ間的壓差 決定了可克服網目過濾器112之位能障壁的電子的數目。一 旦VDlIT改變，回授迴路118即發生作用，以維持該有能力克 服位能障壁之電子的數目。亦即，該回授迴路會以改變 + 的方式來維持次電子流1§代的穩定。當 ^FILTER 的改變與VDlJT的改變相同時，此穩定狀態即達到。這 -5 - 本纸張尺度適用中國國家標準(CNS) A4規格(210X297公爱) A7 B7 五、發明説明（3 ) 也就是說，過濾器電壓VFItTER可追蹤到DUT 102探測點上的 表面電壓VDUT的變化（當定時）。（該積分器電壓V1NT 也同樣可以追蹤到DUT上探測點的表面電壓VDDT的變化）。開 關130在每一次的取獲行動開始前均是關上的，以使該閘控 式積分器122處在原始的狀態。在每個電子束脈衝的射出期 ，受控閘124均是關上的，以便准予通行期可以與次電子束 114到達檢測器116的期間相符，以避免該閘控式積分器被 隨機次電子流所產生的白雜訊以及該參考t流過度地充 電。 為能獲取波形，上述之VDUT的量測動作將在測試器104送 出觸發信號後，週期性地重覆多次。這些量測時點標示為 I，t2,…，te，其代表的是觸發時點後的時間延遲。數個量 測時點形成一個掃程。許多應用均以500個量測時點為一個 掃程。每一個掃程中的各時點均以指標代表。 量測中通常會出現吾人所不喜的白雜訊。此種雜訊在本 質上通常是隨機性的；多執行幾個掃程，然後將掃程結果 加以平均，可降低白雜訊的成份。 精確量測出DUT電壓所需的時間（即，取獲時間） ，取決於為穩定該取獲迴路，該VPUTER所需變更的量。當 Vfuter達到穩態值時，1阳與IREF間的差就會下降，對積分器 的充電減緩，最後，V1NT穩定下來。 吾人可以在保有閉迴路法具穩定性及線性此二優點的情 況下，或多或少地將取獲時間縮短一些。影響取獲時間的 因素包括：次電子檢測器的頻寬、主電子束.的脈寬、主電 -6 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 五、發明説明（6 ) 電壓即為吾人所欲位置上之電壓的代表；以及一計算裝置 ’用以儲存該取獲S曲線的線性部份，以於計算吾人所欲位 置上之電壓時使用。 本發明之各面向可包括一或多個下列之特性。該電壓源 可包含一數位至類比轉換器，連接以接收該計算裝置中之 取獲S曲線資料，以隨後供應出該過濾器電壓。計算裝置可 在S曲線的線性範圍内挑選一工作點（vf)，然後駆動該網目 過濾器至該工作點。積分器可包含一電容器、以及一可控 制之開關’其係用以將該電容器放電，使積分器電麼回復 至初始狀態。 在另一面向中，本發明提供出一種電子束探測系統，包 含一電子束源，係用以將電子射至受測裝置的探測點上， 一網目過濾器，以及一檢測器，該檢測器可檢知出該等具 足夠能量，可克服該網目過濾器與探測點間壓差的電子。 該檢測器所產生的輸出，乃正比於其所檢測到之電子數目 。此系統包含一減法器，接收該檢測器的輸出及一參考輸 入，其所產生之輸出則正比於該檢測器輸出與該參考輸入 的差。此系統包含一積分器，接收該減法器之輸出，其所 產生出之輸出乃線性正比於該屢差；以及一計算裝置，餘 存著此電子束探測系統的S曲線資料，其接收積分器的輸出 ，計算出該探測點的電壓，該電壓至少部份是以s曲線資料 為基礎算得。 在本發明之另一面向中，提供出一電雎程式產品，確切 地儲存在機器可讀媒體上，其可計算出受測裝置探測點上 •9- 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) A7 ____B7__ 五、發明説明（7 ) 之電壓。此產品包含之指令，可令處理器接收電子束探測 系統之開取獲迴路的輸出，擷取出S曲線資料，該資料描述 該取獲迴路之輸出是如何地因該受測裝置探測點與該取獲 迴路間壓差的變化而變化，最後，根據該所擷取出s曲線資 料，計算出探測點之電壓。 施行本發明可實現下列一或多個優點β本發明之系統可 使開取獲迴路穩定可靠，而明顯增加取獲速度。取獲速度 的增加，使DUT上所需的電子束劑量減少，a而降低了 DUT 上的電荷污染，使量測更具可靠度。 本發明一或多個具體實施例的細節，將配以附圖說明如 下。本發明其他的特性、目標及優點，將可在說明及圖示 中，以及專利範圍中顯現。 圖式之說明 圖1所示為傳統的取得波形之系統。 圖2所示為本發明之波形取獲系統。 圖3所示為本發明以開迴路取得波形之法。 圖4是本發明另一取得波形之系統。 圖5是幾個在不同DUT電壓下所量得之S曲線例。 圖6所示為本發明方法，其利用s曲線的線性區域來量測A7 _______B7__ V. Description of the Invention (彳) This application claims the priority of US Provisional Application No. 60 / 287,787, which was filed on April 30, 2001. The full text of this case is incorporated herein by reference. BACKGROUND The present invention relates to acquiring waveforms using an electron beam detection system. Traditional electron beam detection systems use closed-loop methods to obtain waveforms. One example is ids 100000 ™ from Schlumberger Technology of San Jose, California. In future articles, I will call the closed-loop acquisition method the closed-loop method. There are several reasons for using the closed loop method. First, the feedback loop in the closed loop method enables the output of the captured loop to be able to track the voltage change at the detection point linearly. The so-called detection point is the position pointed by the electron beam pulse. Therefore, the reliability of the voltage of the device under test (" DUTM) measured at the detection point of the detection system using the closed loop method is usually very high. FIG. 1 is a conventional closed-loop electron beam detection system 100. The tester 104 first sends the test vector pattern to the DUT 102. The timing controller 106 is then triggered at the appropriate point in time. The timing controller 106, when triggered, supplies an electron beam pulse timing signal to the electro-optic device 108. After receiving the electron beam pulse timing signal, the electro-optical device 108 will shoot the main electron beam pulse 110 toward the detection point of the DUT 102. The main electron beam pulse 110 is emitted by a masking circuit. The electrons in the main electron beam pulse 110 will interact with the detection point to generate low-energy electrons. This is called secondary electrons. Some of these secondary electrons have enough energy to overcome the electro-optical device 108 and DUT 102. The paper size of this paper is applicable to China National Standard (CNS) A4 (210X 297 mm). 5. Description of the invention (2) Potential barrier of mesh filter 112. That is, some secondary electrons have sufficient energy to separate them from the electric field beam applied between the detection point and the mesh filter 112. The secondary electron beam 114 composed of secondary electrons will be detected by the detector 116 to generate a corresponding secondary electron stream-ISEC. The secondary electron flow ISEC changes non-linearly with the change of the surface potential ^^ ”at the detection point of the DUT 102. The feedback loop 118 can make the mesh filter voltage VFILTER change proportional to VDUT, thereby linearizing the relationship between ISEC and VDUT This means that the feedback loop makes VF1LTER follow VDDT. The feedback loop includes a detector 116, a subtractor 120, a gated integrator 122, a voltage compensation 132, and the mesh filter 112. The subtractor takes the reference current iref and the secondary electron current Isec as inputs, and generates an error signal _ Verrgr. The amplitude of this signal is proportional to the difference between the secondary electron current ISEC and the reference current IREF. The reference current iref can be used as a fixed current source. The error signal VERR () R is transmitted to the gated integrator 122. The gated integrator includes a controlled gate 124, a capacitor 126, an amplifier 128, and a switch 130. The error signal VERR () R passes through the controlled gate 124 and reaches the capacitor 126 and amplifier 128. The gated integrator then provides an output voltage, called the integrator voltage or vint. The electric voltage VF1LT on the mesh filter 112 ER is equal to V1NT minus the voltage compensation 132-VQFFSET, which can suppress the regional field effect of type I. The pressure difference between vdut and νριττκ determines the number of electrons that can overcome the energy barrier of the mesh filter 112. Once When VDlIT is changed, the feedback loop 118 acts to maintain the number of electrons capable of overcoming the potential barrier. That is, the feedback loop will change the + to maintain the stability of the secondary electron flow 1§. When ^ When the change of FILTER is the same as the change of VDlJT, this stable state is reached. This -5-This paper size applies to China National Standard (CNS) A4 specifications (210X297 public love) A7 B7 V. Description of the invention (3) That is, the filter voltage VFItTER can track the change of the surface voltage VDUT at the detection point of the DUT 102 (when timing). (The integrator voltage V1NT can also track the change of the surface voltage VDDT at the detection point of the DUT.) Switch 130 It is closed before each capture operation is started, so that the gated integrator 122 is in the original state. During each emission period of the electron beam pulse, the controlled gate 124 is closed. The permitted passage period can be matched with the period when the secondary electron beam 114 reaches the detector 116 to prevent the gated integrator from being overcharged by the white noise generated by the random secondary electron flow and the reference t-current. To obtain the waveform The above VDUT measurement operation will be repeated several times periodically after the tester 104 sends out the trigger signal. These measurement time points are marked as I, t2, ..., te, which represent the time delay after the trigger time point. . Several measurement points form a sweep. Many applications use a sweep of 500 measurement points. Each time point in each scan is represented by an index. The white noise that I don't like usually appears in the measurement. This kind of noise is usually random in nature; performing a few more sweeps and then averaging the sweep results can reduce the white noise component. The time required to accurately measure the DUT voltage (ie, the acquisition time) depends on how much the VPUTER needs to be changed to stabilize the acquisition loop. When Vfuter reaches a steady state value, the difference between 1 Yang and IREF will decrease, charging of the integrator will slow down, and finally, V1NT will stabilize. We can shorten the acquisition time to a greater or lesser extent while retaining the advantages of stability and linearity of the closed-loop method. Factors affecting the acquisition time include: the bandwidth of the secondary electron detector, the pulse width of the primary electron beam, and the primary power-6-This paper size applies to China National Standard (CNS) A4 (210X 297 mm) 5. Invention Explanation (6) The voltage is the representative of the voltage at the position we want; and a calculation device 'for storing the linear part of the obtained S curve for use in calculating the voltage at the position we want. Aspects of the invention may include one or more of the following features. The voltage source may include a digital-to-analog converter connected to receive the acquired S-curve data from the computing device to subsequently supply the filter voltage. The computing device can select an operating point (vf) within the linear range of the S curve, and then move the mesh filter to the operating point. The integrator may include a capacitor and a controllable switch 'which is used to discharge the capacitor and restore the integrator to its original state. In another aspect, the present invention provides an electron beam detection system including an electron beam source for emitting electrons to a detection point of a device under test, a mesh filter, and a detector, the detector It can be detected that these electrons have sufficient energy to overcome the pressure difference between the mesh filter and the detection point. The output produced by this detector is proportional to the number of electrons it detects. The system includes a subtractor that receives the output of the detector and a reference input, and the output produced is proportional to the difference between the detector output and the reference input. This system includes an integrator that receives the output of the subtractor, and the output produced by it is linearly proportional to the repeated difference; and a computing device that stores the S-curve data of the electron beam detection system and receives the integrator The voltage of the detection point is calculated, and the voltage is calculated based at least in part on the s-curve data. In another aspect of the present invention, an electronic program product is provided, which is accurately stored on a machine-readable medium, which can calculate the detection point of the device under test. 9- This paper standard applies to China National Standard (CNS) A4 specification (210X 297 mm) A7 ____B7__ 5. The voltage of invention description (7). This product contains instructions that enable the processor to receive the output of the acquisition loop of the electron beam detection system and extract S-curve data. This data describes how the output of the acquisition loop depends on the detection point of the device under test and the The change in the pressure difference between the circuits is obtained, and finally, the voltage of the detection point is calculated according to the extracted s-curve data. The implementation of the present invention can achieve one or more of the following advantages. The system of the present invention can make the retrieval circuit stable and reliable, and significantly increase the retrieval speed. The increase of the acquisition speed reduces the amount of electron beam required on the DUT, a reduces the charge pollution on the DUT, and makes the measurement more reliable. The details of one or more specific embodiments of the present invention will be described below with accompanying drawings. Other features, objects, and advantages of the present invention will become apparent in the description and drawings, and in the scope of patents. Explanation of the drawings Figure 1 shows a conventional waveform acquisition system. Figure 2 shows a waveform acquisition system of the present invention. FIG. 3 shows a method for obtaining waveforms in an open loop according to the present invention. FIG. 4 is another system for obtaining waveforms according to the present invention. Figure 5 shows several examples of S-curve measured at different DUT voltages. Figure 6 shows the method of the present invention, which uses the linear region of the s-curve to measure
Vdut 〇 圖7是本發明利用S曲線的線性區域來量測¥1)1^之另一法。 圖8是本發明利用s曲線的線性區域來量測VDDT之另一法。 各式囷式之間，若有相同的參考數字及名稱，則其所代 表的將會是相同的元件。 -10- 本纸張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 五、發明説明（8 ) 詳細說明 取得波形用之開迴路系統 圖2所示為本發明之開迴路式取獲波形系統200。此系統 包含一電子脈衝源202，一取獲迴路2 04，以及一計算裝置 206。該取獲迴路204包含一網目過濾器及一積分器，該積 分器所產生之輸出表示出探測點上電壓。取獲迴路204可規 劃成閉迴路或開迴路。該計算裝置206所包含者，有用以接 收該取獲迴路204中積分器所輸出之，譬如電壓或電流讀值 之裝置及電雎程式產品。該計算裝置206所包含者，有用以 驅動節點（像是該取獲迴路204之網目過濾器節點）電壓之 裝置及電腦程式產品。該計算裝置206所包含者，有用以根 據該積分器之輸出，以計算該探測點電壓之裝置及電滕程 式產品。 圖3所示為本發明取得波形之法300。如所示，系統在DUT 的調校點上，取得取獲開迴路（像是，該取獲迴路204)的S 曲線（步驟302)。DUT的調校點是DUT上的一個位置，系統量 測此位置之電位以取得S曲線。系統利用該取獲之S曲線來 調校該取獲迴路，使積分器的輸出變化得以線性地正比於 該調校點上電壓的變化（步驟304)。系統取得波形之方法如 下：首先將電子束脈衝射向DUT上某感興趣之位置，像是某 信號接墊點，接著，量測該積分器之輸出，並利用該已調 校迴路之S曲線的線性部份來計算該感興趣位置上之電壓 (步驟306)。系統也可將該調校及取波形步驟會而為一。 •11· 本纸張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 五、發明説明（9 ) 圖4所示為本發明之另一開迴路波形取得系統4〇〇。此系 統400包含一測試器402, 一定時控制器404,電光學裝置406 ，一取獲迴路408, 一類比至數位轉換器（"ADC，，）410，一計 算裝置414，以及一數位至類比轉換器（"DAC")416。 測試器402、定時控制器404以及電光學裝置406的運作均 已說明，示於圖1。取獲迴路408包含一網目過濾器418，一 電子檢知器410，一減法器420，一閘控式積分器422，以及 一電壓補償424。將該閘控式積分器422的輸·出與網目過濾 器418之間的連線切斷，該取獲迴路408就成為開迴路。這 也就是說，當V1NT與VFUTER節點不相連時，取獲迴路408是一 個開迴路。計算裝置414可包括S曲線資料，該資料描述的 是，該取獲迴路408遇上各種不同DUT時的饗應。DAC 416 會回應來自於計算裝置414之信號，送出網目過濾器電壓。 ADC 412負責將類比信號（即積分器的輸出電壓）數位化，送 至計算裝置414。 取得S曲線 系統400有幾種取得DUT 426之S曲線的方式。一般的作法 是：先將取獲迴路408弄成開迴路，接著，變化調校點及網 目過濾器418間之壓差，然後再利用該電子檢知器410檢知 次電流，量測出該次電流相應於該變化的壓差所生的變化。 量測該S曲線之其中一法，乃是在將該過濾器電壓設定在 一個固定的值的情況下，送一個三角電壓信號至DUT上之調 校點。探測射至該調校點上之電子束，繪出以該VD0T三角信 號之上升斜坡為變數之V1NT函數，如此得出S曲線圖。此法 -12- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) A7 _____B7 五、發明説明（10~^ 可取得任一個DUT的S曲線，只要從外部信號源送一個三角 信號至DUT上之調校點上即可。為使外部信號得以送入，需 設計一個連有接腳之接墊。 量測該S曲線的第二種方法則需要透過DAC 416，將一個 三角電壓信號送至網目過濾器418。對非鈍化裝置而言，電 子束可在接地墊或任何僅具直流位準之接墊上測得。對鈍 化裝置而言，電子束則可在任何沒有電壓擺盪之DUT位置上 測得。繪出以該vF1LTER三角信號之上升斜坡為變數之Vint函 數，即得出S曲線圖。 圖5是典型之S曲線圖例，該S曲線是以將VFUTER從低掃至 高，然後再檢知DUT發射出之次電子的方式所取得。若針對 不同的VDUT，進行量測，則各S曲線的位置均將會相對於零 偏壓之S曲線502，橫向移動一個VDDT的量。譬如，s曲線504 ’是在VDUT=-2· 5伏時量測得來的’因此其位置即相對於零 偏壓S曲線502，向左平移了 2.5伏。S曲線506 ,是在Vdut=5 伏時量測得來的，因此，其位置即相對於零偏壓S曲線502 ，向右平移了 5伏。 以上兩種量測法的差別在於，一個*vDUT變動、Vfuter固 定，另一個則是VMT固定、VF1LTER變動。此二法乃以定量方 式量測S曲線，所產生之圖樣其特性相似，所檢知到之次電 子流的大小乃由VF1LTER及VDUT間的壓差決定（因此積分器電 壓VINT亦是如此）。 調校該取獲迴路 -13 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 五、發明説明（n ) 系統有幾種調校該取獲迴路408之方法。其一是，使用線 性回歸法。另一是，調整取獲迴路408的各種參數，期使s 曲線其線性部份的斜率得以最大，使調校點上電壓的變化 關係，可成比例地直接影響到該閘控式積分器422其輸出電 壓的改變。 譬如，計算裝置414可利用S曲線資料，驅動出位準合宜 之網目過濾器電壓。計算裝置414將該過濾器電壓VFUTER設 定在固定的工作點-71(=1^「¥。1^£1)上，該主作點乃取樣 在S曲線的線性區内，因此，所產生出的V1NT將可直接地正 比於DUT 426探測點上之信號電壓擺幅VDUT。 取得波形 為取得DUT 426上感興趣位置之波形，系統400會在不同 的時段中，對探測點進行表面電能的取樣。以下將說明取 樣的過程。測試器402將測試向量駆入DUT 426中。如前所 討論的，測試器402會去觸發該定時控制器404，該控制器 可令電光學裝置406射出電子束脈衝（即該主電子束脈衝） ，至DUT 426的探測點上《射向探測點後所產生出之次電子 ，其中有一些所具有的能量，足以使之脫離探測點與網目 過濾器418間之位能差所形成之電場❶該電子檢測器41〇檢 知出這些次電子，產生次電子流。 DUT 426揲測點的電位（即，VDUT)會因測試器402所提供之 測試向量而改變。當探測點電位改變時，有足夠能量脫離 網目過濾器418的電子數目也會改變，該次電流也因而改變 。減法器420會回應這個改變，產生一輸出電壓，致令該閘 -14· 本纸張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 五、發明説明（12 ) 控式積分器422產生VINT。計算裝置414將代表VINT之數位化 信號予以接收，計算出探測點上之電壓（即VMT)。此計算是 以該已調校之取獲迴路408的S曲線為基礎來執行的。 s曲線所代表的是，該檢知出之次電流isec與該網目過濾 器電壓及VDlIT間之壓差，此二者間的關係（即，ISEC正比於 ^ VflLTER - VdUT))。如前所討論的，只要調校得宜，S曲線的斜 率及偏移都可計算出來（工作點附近 。所以，任一個所量測出之V1NT，都可計算出其相應的¥01^ (帶有偏移）。因為測量期間，VFllTER是固定的，所以V1NT最 終的擺盪情況，就是DUT 426上信號真實的擺盪情況。 實例 以下敘述幾個本發明取得波形之法之實例。這些例子均 是開迴路之配置，利用S曲線之區域線性度來計算該過濾器 電壓 VFUTER。 圖6所示為本發明用以取得波形之取獲迴圈的製備法600 。系統（譬如，系統400)將電子束射在DUT的調校點上（步驟 602)。該電子束可以射在任何不具電壓對比的鈍化區域， 以量測鈍化點上之波形。該電子束可以射在任何具直流位 準的非鈍化點，以量測非鈍化點上之波形（譬如，已知接地 之接合圓墊）。 系統取得N點之波形（步驟604)。在一具體實施例中，系 統取得500點之波形。送出高、低點分別為（Vx+500毫伏）及 (Vx-500毫伏）之交流方波（其中，V:代表可調的工作點），可 以取得500點之波形。該網目過濾器電壓的改變可藉由調整 • 15- 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐) 五、發明説明（13 計算裝置（譬如，計算裝置414)所提供之使用者介面其上的 電壓滑動器來達成。該方波可以每64個指標（或任何數目） 交替一次。如圖5所示，VD„T與VmTE#差產生VINT波形。 最好是，系統調整該過濾器電壓滑動器以取得最大（及非 失真）之波形（步驟606)。應注意，送一個VGFFSET於該過濾器 上，可以抑制型式I之區域場效應。儘可能的取大的斜率， 就可得到最大的波形。利用工作點上之S曲線區域線性特 性，可產生最佳之結果。Vdut 〇 FIG. 7 is another method for measuring ¥ 1) 1 ^ using the linear region of the S curve in the present invention. FIG. 8 is another method for measuring VDDT by using the linear region of the s curve in the present invention. If there are the same reference numbers and names between the various formulas, they will represent the same components. -10- This paper size is in accordance with Chinese National Standard (CNS) A4 specification (210X 297 mm) V. Description of the invention (8) Detailed description of the open-loop system for obtaining waveforms Figure 2 shows the open-loop system of the present invention.取 Waveform System 200. The system includes an electronic pulse source 202, an acquisition circuit 204, and a computing device 206. The acquisition circuit 204 includes a mesh filter and an integrator. The output produced by the integrator indicates the voltage at the detection point. The acquisition circuit 204 may be planned as a closed circuit or an open circuit. The computing device 206 is included to receive the output of the integrator in the acquisition circuit 204, such as a voltage or current reading device and an electronic program product. The computing device 206 includes a device and a computer program product for driving the voltage of a node (such as the mesh filter node for obtaining the circuit 204). The computing device 206 includes devices and electrical products based on the output of the integrator to calculate the voltage at the detection point. FIG. 3 shows a method 300 for obtaining waveforms according to the present invention. As shown, the system obtains the S-curve of the open loop (eg, the acquisition loop 204) at the calibration point of the DUT (step 302). The adjustment point of the DUT is a position on the DUT. The system measures the potential at this position to obtain the S curve. The system uses the acquired S-curve to adjust the acquisition loop so that the output change of the integrator is linearly proportional to the voltage change at the adjustment point (step 304). The method for the system to obtain the waveform is as follows: first, the electron beam pulse is directed to a position of interest on the DUT, such as a signal pad, and then the output of the integrator is measured, and the S curve of the adjusted circuit is used To calculate the voltage at the location of interest (step 306). The system can also perform the adjustment and waveform acquisition steps. • 11 · This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 5. Description of the invention (9) Figure 4 shows another open-loop waveform acquisition system 400 of the present invention. The system 400 includes a tester 402, a time controller 404, an electro-optical device 406, an acquisition circuit 408, an analog-to-digital converter (ADC), 410, a computing device 414, and a digital-to-digital converter. Analog Converter (" DAC ") 416. The operation of the tester 402, the timing controller 404, and the electro-optical device 406 have been described, and are shown in FIG. The acquisition circuit 408 includes a mesh filter 418, an electronic detector 410, a subtractor 420, a gated integrator 422, and a voltage compensation 424. By disconnecting the connection between the output and output of the gated integrator 422 and the mesh filter 418, the acquisition circuit 408 becomes an open circuit. This means that when V1NT is not connected to the VFUTER node, the acquisition loop 408 is an open loop. The computing device 414 may include S-curve data, which describes the response of the acquisition circuit 408 to various DUTs. The DAC 416 will respond to the signal from the computing device 414 and send the mesh filter voltage. The ADC 412 digitizes the analog signal (ie, the output voltage of the integrator) and sends it to the computing device 414. Obtaining the S-curve The system 400 has several ways to obtain the S-curve of the DUT 426. The general method is: first make the acquisition circuit 408 into an open circuit, then change the pressure difference between the adjustment point and the mesh filter 418, and then use the electronic detector 410 to detect the secondary current and measure the The secondary current corresponds to the change resulting from this changing pressure difference. One method of measuring the S-curve is to send a triangular voltage signal to the adjustment point on the DUT when the filter voltage is set to a fixed value. Detect the electron beam incident on the calibration point, and draw a V1NT function using the rising slope of the VD0T triangle signal as a variable, so as to obtain the S curve. This method-12- This paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) A7 _____B7 V. Description of the invention (10 ~ ^ S curve of any DUT can be obtained, as long as one is sent from an external signal source The triangle signal can be sent to the adjustment point on the DUT. In order to send external signals, a pad with pins connected must be designed. The second method of measuring the S-curve needs to pass DAC 416 to a The triangular voltage signal is sent to the mesh filter 418. For non-passivation devices, the electron beam can be measured on the ground pad or any DC-only pad. For passivation devices, the electron beam can be used on any voltage-free device. Measured at the DUT position of the swing. Plot the Vint function using the rising slope of the vF1LTER triangle signal as a variable to get the S curve. Figure 5 is a typical example of the S curve. Highest, and then obtained by detecting the secondary electrons emitted by the DUT. If you measure for different VDUTs, the positions of each S curve will move laterally by a VDDT relative to the zero bias S curve 502 For example, s-curve 50 4 'Measured at VDUT = -2 · 5 volts' Therefore its position is shifted to the left by 2.5 volts relative to the zero bias S-curve 502. The S-curve 506 is measured at Vdut = 5 volts Measured, therefore, its position is shifted to the right by 5 volts relative to the zero bias S curve 502. The difference between the above two measurement methods is that one * vDUT changes, Vfuter is fixed, and the other is VMT fixed , VF1LTER changes. These two methods measure the S curve in a quantitative way. The resulting patterns have similar characteristics. The magnitude of the detected electron flow is determined by the voltage difference between VF1LTER and VDUT (therefore, the integrator voltage VINT The same is true.) Adjusting the acquisition circuit -13-This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) V. Description of the invention (n) There are several ways to adjust the acquisition circuit 408 Method. One is to use the linear regression method. The other is to adjust the various parameters of the loop 408 to maximize the slope of the linear part of the s-curve, so that the relationship between the voltages at the adjustment points can be proportional. Ground directly affects the output voltage of the gated integrator 422. For example, the computing device 414 can use the S-curve data to drive a suitable mesh filter voltage. The computing device 414 sets the filter voltage VFUTER at a fixed operating point -71 (= 1 ^ 「¥ .1 ^ £ 1), the main operating point is sampled in the linear region of the S curve, so the V1NT generated will be directly proportional to the signal voltage swing VDUT at the detection point of DUT 426. Obtaining the waveform is to obtain DUT 426 For the waveform of the position of interest, the system 400 will sample the surface electrical energy at the detection points in different periods. The sampling process is explained below. The tester 402 loads test vectors into the DUT 426. As previously discussed, the tester 402 will trigger the timing controller 404. The controller can cause the electro-optical device 406 to emit an electron beam pulse (ie, the main electron beam pulse) to the detection point of the DUT 426. The secondary electrons generated after the detection point, some of which have enough energy to separate them from the electric field formed by the potential energy difference between the detection point and the mesh filter 418. The electron detector 41 detects these times. Electrons generate a secondary electron stream. The potential (i.e., VDUT) of the measurement point of the DUT 426 is changed by the test vector provided by the tester 402. When the potential of the detection point changes, the number of electrons with sufficient energy to leave the mesh filter 418 also changes, and the current also changes accordingly. The subtractor 420 will respond to this change and generate an output voltage, which will cause the gate to -14. This paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 mm). 5. Description of the invention (12) Controlled integrator 422 generates VINT. The computing device 414 receives the digitized signal representing VINT, and calculates the voltage (i.e., VMT) at the detection point. This calculation is performed on the basis of the S curve of the adjusted acquisition circuit 408. The s-curve represents the relationship between the detected secondary current isec and the mesh filter voltage and the voltage difference between VDlIT (ie, ISEC is proportional to ^ VflLTER-VdUT). As previously discussed, the slope and offset of the S-curve can be calculated as long as it is properly adjusted (near the operating point. Therefore, any measured V1NT can be calculated with its corresponding ¥ 01 ^ (with There is an offset). Because VFllTER is fixed during the measurement, the final swing of V1NT is the true swing of the signal on DUT 426. Examples The following describes several examples of the method of obtaining waveforms according to the present invention. These examples are all open The configuration of the circuit uses the linearity of the S curve to calculate the filter voltage VFUTER. Figure 6 shows the preparation method 600 for obtaining a loop for obtaining a waveform in the present invention. A system (for example, system 400) uses an electron beam The electron beam can be irradiated on the DUT calibration point (step 602). The electron beam can be irradiated on any passivation area without voltage contrast to measure the waveform at the passivation point. The electron beam can be irradiated on any non-passivation with DC level. Point to measure the waveform at a non-passivated point (for example, a known grounded bonding pad). The system obtains a waveform at point N (step 604). In a specific embodiment, the system obtains a waveform at 500 points. Send The high and low points are (Vx + 500 millivolts) and (Vx-500 millivolts) AC square waves (where V: stands for adjustable operating point), and a waveform of 500 points can be obtained. The mesh filter The voltage can be adjusted through adjustments. 15- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm). 5. Description of the invention (13. User interface provided by a computing device (eg, computing device 414). It can be achieved by the voltage slider on it. The square wave can alternate every 64 indicators (or any number). As shown in Figure 5, the difference between VD „T and VmTE # produces a VINT waveform. Preferably, the system adjusts the filter Voltage slider to obtain the maximum (and non-distorted) waveform (step 606). It should be noted that sending a VGFFSET to this filter can suppress the field effect of type I. Take the largest slope as possible, you can Get the largest waveform. Using the linear characteristics of the S curve area at the operating point, the best results can be produced.
系統藉由譬如，調整PMT增益的方式來微調該取獲迴路的 增益，以產生出1伏之波形（步驟608)，使VDUT改變1伏，V1NT 亦改變1伏。 系統對DUT進行量測以取得波形（步驟610)。電子束可以 射在DUT的住一點上。所量測出之V1NT的擺盈情況，反映了 VDUT的擺盪情況。 圖7所示為本發明用以取得波形之取獲迴圈的製備法7〇〇 。系統將電子束射在DUT的調校點上（步驟702)。如上所述 ，該系統可以將電子束射在鈍化點或非鈍化點上。 系統選擇合適的網目過濾器電壓（即工作點Vf)，落在S曲 線的線性區，在圖4所示的系統中，該工作點vf即為DAC的 電壓輸出減去該補償電壓（步驟704)。選擇合適的網目電麈 。系統可以譬如，送一個高、低點分別為VDAC=VMAX=( Vx+500 毫伏 *~V0FFSET)及 毫伏 ~V0FFSET)之三角波（其 *VX可透過使用者介面來調整）。透過對的調整，產生出 VINT所需的三角波。若系統無法以調整νχ方式達到產生νΙΝΤ -16- 本纸張尺度逋用中國國家標準(CNS) A4規格(210X297公釐) A7 ______B7 五、發明説明（14 ) 所需的三角波的目的，則系統可能需要降低該三角波形的 振幅’亦即，藉由降低該三角波之振幅方式，找到s曲線之 線性區。系統以譬如，調整PMT增益的方式來調整該取獲迴 圈的增益，以得到一個合理放大的Vint擺幅。此乃操作在工 作點V，上，位在s曲線的較佳線性區上。 當VINT是三角波形式時，系統取得波形的N個點（步驟706) 。N可以是5〇〇。該系統計算工作點vf附近的小範圍斜率及 偏移（步驟708)。藉由線性回歸技術（以下會肴說明），利用 該N個點的所屬資料，可計算出工作點'附近的s曲線斜率 及偏移。解公式2及3,可得到斜率及偏移b。The system fine-tunes the gain of the acquisition loop by, for example, adjusting the PMT gain to generate a 1 volt waveform (step 608), which changes VDUT by 1 volt and V1NT by 1 volt. The system measures the DUT to obtain a waveform (step 610). The electron beam can be directed at the live point of the DUT. The measured pendulum of V1NT reflects the pendulum of VDUT. FIG. 7 shows a manufacturing method 700 for obtaining a loop for obtaining a waveform according to the present invention. The system directs the electron beam on the calibration point of the DUT (step 702). As mentioned above, this system can irradiate the electron beam on the passivation point or the non-passivation point. The system selects the appropriate mesh filter voltage (that is, the operating point Vf) and falls in the linear region of the S curve. In the system shown in Figure 4, the operating point vf is the voltage output of the DAC minus the compensation voltage (step 704). ). Select the right network cable. For example, the system can send a triangular wave with high and low points of VDAC = VMAX = (Vx + 500 millivolts * ~ V0FFSET) and millivolts ~ V0FFSET respectively (the * VX can be adjusted through the user interface). Through the adjustment, the triangle wave required by VINT is generated. If the system cannot achieve the purpose of generating νΙΝΤ -16- this paper size using the Chinese National Standard (CNS) A4 specification (210X297 mm) A7 ______B7 by adjusting the νχ method, the system requires the triangular wave required for the description of the invention (14). It may be necessary to reduce the amplitude of the triangular waveform, that is, to find the linear region of the s-curve by reducing the amplitude of the triangular waveform. For example, the system adjusts the gain of the acquisition loop by adjusting the PMT gain to obtain a reasonably amplified Vint swing. This is done at the operating point V, which lies on the better linear region of the s-curve. When VINT is in the form of a triangle wave, the system obtains N points of the waveform (step 706). N can be 500. The system calculates a small range slope and offset near the operating point vf (step 708). With the linear regression technique (explained below), using the data of the N points, the slope and offset of the s-curve near the working point can be calculated. Solve equations 2 and 3 to get the slope and offset b.
ViNT^aVFww+b，i = 0, 1，…，N-1 (公式 1) 令 Τ=Σ i(V丨fiTi-aVPILTERi-b) dl/da-0=> Σ i(V1NTraVPILTERrb)VF1LTERi = 〇 (公式 2) 5T/5b=〇=> Σ i(VINTi-aVFILTER.-b) = 0 (公式 3) 系統對DUT進行量測以取得波形（步驟710)。量測出vint ’即可計算出VF1LTER。因為VF1LTER的值在量測期間是固定的， 所以計算之VF1LTER擺盪情況反映的即是VDUT的擺盪情況。 圖8所示為本發明用以取得波形之取獲迴圈的製備法8〇〇 。系統採用閉迴路法來量測DUT上的信號（步驟802)。當外 部信號無法很容易的送至DUT上的信號圓墊時，此時一些已 知的信號，像是時脈信號、資料信號、暫存器位址信號、 晶片選擇信號，等等，也是可以派上用場的。在DUT的接合 焊墊上通常可以找到這些信號，使用傳統的閉迴路法，可 快速地量測出來。 •17· 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) A7 B7 五、發明説明（16 ) (圖5有飽和區之例）。5是小電壓值，譬如，〇 〇1伏，此為 網目過濾器電壓的變化量。系統另會執行一次ν^ = ν一占的 掃描。 兩次量測掃描的公式如下： VINTi=a(VDUTi-V「5 -i = i，2,…，N (公式 7) -VHb+i j = l，2,…，N (公式 8) 其中^及^白雜訊、DUT充電、型式I區域場效應以及其 他誤差的模擬模型。至於型式I區域場效應的·細節，可以參 考席倫伯格1987年六月號之超大型積體電路的診斷及測試 卷1之區域場效應及裝置電麗的量測”議題。第二次掃描的 每一個時點，具有與先前相對應的量測時點相同的觸發延 遲。亦即，對任一卜j，vDUTi=vDDTi 系統將公式8減去公式7，然後加上該N個點，得到 刃 i，j(ViNTi-ViNTj)=-2aN(5+e (公式 9) 其中ε代表誤差。透過上述的相減動作，最後的兩個誤 差因子可絕大部地（或部份地）消除。在Σ加總之後，可期 待ε相較於公式9中之另二項，顯得微小。（此加總之信號 雜訊比增加Ν1/2)。是故， a-Σ ,, 3(νΐΝτΓνΐΝΤ.)/(2Ν(5 ) (公式 10) 算出斜率之後，就可以如下方式計算出VDUT : ^DUTK(VDUTi+VD0Tj)/2=(VINTi+VINTj)/(2a)+Vf+V0FPSET-b/a-(ei+€j)/(2a) k，i, j = l，2, "·，Ν (公式 11) 其中Vmi&V1NTj是量測出來的值；a由（5)所給定；V,及 vmm為已知的常數；b及（^+^)則未知。因為系統所董測 •19· 本紙張尺度逋用中國國家揉準(CNS) A4規格(210X297公釐） 五、發明説明（17 ) 的是電壓的擺況，所以在此處可以忽略。如前所述，（ei + i) 項代表的是量測誤差，像是白雜訊、LFE - I效應以及非線 性度。這些誤差存在於其他的方法中，可在設計系統時， 將其值降至最低。所述之方法極適於量測邏輯波形或小振 幅的類比信號。應注意，若系統執行了兩次的量測掃程， 則白雜訊、信號雜訊比會改善21/2。可選擇讓系統執行多次 的掃程，以期更進一步地降低誤差。執行多次的掃描，系 統可從VDUTK(其中K=l, 2,…，N)，計算出更平均的斜率及波 形。 再調梭 若DUT的表面電壓因裸金屬接墊遭到充電、污染或其上之 直流偏移改變而改變，則該系統雖已預調校過，但持續地 利用該系統來量測輸出波形仍可能發生量測誤差。當DUT 表面電壓改變時，就可能需要執行再調校。對鈍化的DUT 而言’在離開該信號接墊的區域附近進行探測，然後使用 上述之S曲線的區域線性度，可再次調校該系統。該再調校 用之附近區域應該要有與該信號接墊上相同的污染與充電 狀況。對裸金屬接墊（其可具有不同於該接受預調校接墊之 直流偏移）而言，就可使用傳統的閉迴路法。在一些極端的 例子，像是長測試迴路中（譬如，一非常低的觸發頻率）， 使用閉迴路法可花費30分鐘來完成5〇〇個時點的波形量測 。若是如此，使用者就可依囷8所示之方法，對系統進行再 調校。首先，可施行閉迴路法，取得1〇〇點的波形。若所量 測的波形是邏輯波形，則可利用該信號對該開迴路取波形 -20·ViNT ^ aVFww + b, i = 0, 1, ..., N-1 (Formula 1) Let T = Σ i (V 丨 fiTi-aVPILTERi-b) dl / da-0 = > Σ i (V1NTraVPILTERrb) VF1LTERi = 〇 (Formula 2) 5T / 5b = 〇 = > Σ i (VINTi-aVFILTER.-b) = 0 (Formula 3) The system measures the DUT to obtain a waveform (step 710). Measure Vint ’to calculate VF1LTER. Because the value of VF1LTER is fixed during the measurement, the calculated swing of VF1LTER reflects the swing of VDUT. FIG. 8 shows a preparation method 800 for obtaining a loop for obtaining a waveform according to the present invention. The system uses a closed loop method to measure the signal on the DUT (step 802). When external signals cannot be easily sent to the signal pad on the DUT, some known signals at this time, such as clock signals, data signals, register address signals, chip selection signals, etc. are also possible. Come in handy. These signals are usually found on the DUT's bonding pads and can be measured quickly using traditional closed-loop methods. • 17 · This paper size applies to China National Standard (CNS) A4 (210X297 mm) A7 B7 5. Description of the invention (16) (Figure 5 shows an example of the saturation zone). 5 is a small voltage value, for example, 0.001 volt, which is the amount of change in the mesh filter voltage. The system will perform another ν ^ = ν one account scan. The formulas for the two measurement scans are as follows: VINTi = a (VDUTi-V 「5 -i = i, 2, ..., N (Equation 7) -VHb + ij = 1,2, ..., N (Equation 8) where ^ And ^ white noise, DUT charging, type I area field effect and other error simulation models. As for the details of type I area field effect, please refer to the diagnosis of the ultra-large integrated circuit of Schilenberg June 1987 And the measurement of the regional field effect and the measurement of the device in test volume 1 ". Each time point of the second scan has the same trigger delay as the previous corresponding measurement time point. That is, for any time, vDUTi = vDDTi The system subtracts Equation 7 from Equation 8 and adds the N points to obtain the edge i, j (ViNTi-ViNTj) =-2aN (5 + e (Equation 9) where ε represents the error. Subtracting the action, the last two error factors can be largely (or partially) eliminated. After Σ is added up, ε can be expected to be smaller than the other two terms in Equation 9. (This summed up signal The noise ratio increases by N1 / 2). Therefore, a-Σ ,, 3 (νΐΝτΓνΐΝΤ.) / (2N (5) (Equation 10) After calculating the slope, the following method can be used: Calculate VDUT: ^ DUTK (VDUTi + VD0Tj) / 2 = (VINTi + VINTj) / (2a) + Vf + V0FPSET-b / a- (ei + € j) / (2a) k, i, j = 1, 2 , ", Ν (formula 11) where Vmi & V1NTj is the measured value; a is given by (5); V, and vmm are known constants; b and (^ + ^) are unknown. Because the system measures • 19 · This paper size uses the Chinese National Standard (CNS) A4 specification (210X297 mm) 5. The description of the invention (17) is the voltage swing, so it can be ignored here. As before The (ei + i) term represents measurement errors, such as white noise, LFE-I effect, and non-linearity. These errors exist in other methods, which can be reduced when designing the system. The lowest. The method described is very suitable for measuring logic waveforms or analog signals of small amplitude. It should be noted that if the system performs two measurement sweeps, the white noise and signal to noise ratio will be improved by 21/2 .You can choose to let the system perform multiple sweeps, in order to further reduce the error. By performing multiple scans, the system can calculate a more average slope and waveform from VDUTK (where K = 1, 2, ..., N) Re-shuttle The surface voltage of the DUT changes due to bare metal pads being charged, contaminated, or the DC offset changes on it. Although the system has been pre-adjusted, it is still possible to use the system to measure the output waveform. Measurement error. When the DUT surface voltage changes, readjustment may be required. For a passivated DUT, the detection is performed near the area leaving the signal pad, and then the system linearity can be adjusted again using the above-mentioned S-curve area linearity. The area around the recalibration should have the same pollution and charging conditions as the signal pad. For bare metal pads, which can have a DC offset different from that of the pre-adjusted pad, a traditional closed-loop method can be used. In some extreme cases, such as a long test loop (for example, a very low trigger frequency), the closed loop method can take 30 minutes to complete a waveform measurement at 500 points in time. If so, the user can readjust the system according to the method shown in Figure 8. First, a closed-loop method can be implemented to obtain a 100-point waveform. If the measured waveform is a logic waveform, you can use this signal to take a waveform on the open loop -20 ·
A7 B7 五、發明説明（18 ) 配置進行再調校。待該開迴路取波形配置接受再調校後， 使用者就可將電子束射在相同的接墊上，繼續執行開迴路 取獲法。 其他的取獲參數（像是，電容器值及參考電流值）均可加 以最佳化。 本發明可用數位電子電路或電腦硬體、韌體、軟體或它 們的組合實現。本發明之裝置可用電腦程式產品予以實現 ，該產品應可確切地具現於機器可讀之儲存裝置中，以備 可程式之處理器執行；本發明之方法步驟可由可程式之處 理器執行，其執行指令程式，處理輸入資料，產生輪出， 完成本發明之功能。本發明可用一或多個電腦程式實現， 該等電臞程式應可在可程式之系統上執行，該系統應包含 至少連接一可程式之處理器以接收來自於資料儲有系統之 資料及指令且傳送，至少一輸入裝置，以及至少一輸出裝 置。每一個電滕程式均可用高階程序或物件導向程式語言 來實現，若有需要，亦可用組合語言或機器語言；無論是 使用何種語言實現，其都必須是可編譯或組譯之語言。合 適的處理器包括譬如，一般及特殊用途之微處理器。一般 而言，處理器將接收來自於唯讀記憶體及/或隨機存取記憶 體之指令或資料。電腦的基本元件是用以執行指令之處理 器，以及記憶體。一般而言，電碯將包含一或多個大量儲 存裝置以儲存資料；此種裝置包括磁碟，像是内部的硬碟 及移動式碟片；磁光碟片；以及光碟。適合具現電聪程式 指令及資料之儲存裝置包括所有形式的非揮發性記憶禮^ •21 - 五、發明説明（19 ) 包括譬如，半導體記憶體裝置，像是可抹除可程式唯讀記 憶體、電子可抹除可程式唯讀記憶體、以及快閃記憶體裝 置；磁碟，像是内部的硬碟及移動式碟片；磁光碟片；以 及光碟片。前述之任一種裝置均可再配上（或併入）ASIC ("特殊用途積體電路"）。 為能具備與使用者互動之能力，本發明可實現在具有顯 示裝置，像是監視器或液晶顯示螢幕之電腦系統上，以將 資訊顯示給使用者，另需具備鍵盤及指向裝查（像是滑鼠或 執跡球），讓使用者可對電腦系統進行輸入。可將該電腦系 統規劃成可提供出使用者圖形介面，讓使用者得以透過此 種介面與電腦程式互動。 本發明之一些具體實施例已說明完畢。雖是如此，應了 解，可在不脫離本發明之精神與範圍下，做各種修改。譬 如，該預測的過濾器電壓可不必以一個數位值供應至DAC 的方式產生，而可以一可控制的類比電壓源供應。該過濾 器電壓的預測亦不必以先前的量測或先前量測的平均值為 基礎，而可代之以模擬DUT的運作或其他任何所欲之根源為 基礎。該計算裝置可使用查閱表來褚者存S曲線資料。於是 ，其他的具體實施例在下列專利之範圍内。 -22· 本紙張尺度適用中國國家揉準(CNS) A4規格(210X297公釐)A7 B7 V. Description of the invention (18) The configuration is readjusted. After the open-loop waveform acquisition configuration is readjusted, the user can shoot the electron beam on the same pad and continue to perform the open-loop acquisition method. Other acquisition parameters (such as capacitor value and reference current value) can be optimized. The invention can be implemented with digital electronic circuits or computer hardware, firmware, software, or a combination thereof. The device of the present invention can be implemented by a computer program product. The product should be exactly present in a machine-readable storage device for execution by a programmable processor. The method steps of the present invention can be executed by a programmable processor. The instruction program is executed, the input data is processed, and the rotation is generated to complete the functions of the present invention. The present invention can be implemented by one or more computer programs. These electronic programs should be executable on a programmable system. The system should include at least one programmable processor connected to receive data and instructions from the data storage system. And transmitting, at least one input device and at least one output device. Each electrical program can be implemented with a high-level program or object-oriented programming language. If necessary, it can also be combined or machine language; no matter which language is used to implement it, it must be a compilable or translatable language. Suitable processors include, for example, general and special purpose microprocessors. Generally, the processor will receive instructions or data from read-only memory and / or random access memory. The basic components of a computer are a processor that executes instructions, and memory. In general, a battery will contain one or more mass storage devices to store data; such devices include magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; and optical disks. Suitable storage devices with current Satoshi program instructions and data include all forms of non-volatile memory. ^ • 21-V. Description of the invention (19) Includes, for example, semiconductor memory devices, such as erasable and programmable read-only memory , Electronic erasable programmable read-only memory, and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; and optical disks. Any of the aforementioned devices can be equipped with (or incorporated into) an ASIC (" Special Purpose Integrated Circuit "). In order to have the ability to interact with the user, the present invention can be implemented on a computer system with a display device, such as a monitor or a liquid crystal display screen, to display information to the user, and a keyboard and a pointing device (such as Mouse or trackball), allowing users to enter computer systems. The computer system can be planned to provide a graphical user interface for users to interact with computer programs through this interface. Some specific embodiments of the present invention have been described. Nevertheless, it should be understood that various modifications can be made without departing from the spirit and scope of the invention. For example, the predicted filter voltage may not be generated by supplying a digital value to the DAC, but may be supplied by a controllable analog voltage source. The filter voltage prediction need not be based on previous measurements or the average of previous measurements, but can instead be based on simulating the operation of the DUT or any other desired source. The computing device may use a lookup table to store S-curve data. Therefore, other specific embodiments are within the scope of the following patents. -22 · This paper size is applicable to China National Standard (CNS) A4 (210X297 mm)