1220778 五、發明說明（l) ' 一 " " 【發明所屬之技術領域】 本發明係有關於一種内引腳接合之晶片載具，特別係 包含有超晶格薄膜之内引腳接合之晶片載具。 捲帶承載封 I〔 Tape Carrier Package，TCP〕或薄 f f晶〔ChlP 〇n Film，COF〕係以-晶片之銲墊上形成 年數個凸塊與一載帶〔例如捲帶〔Tape〕或薄膜 二FUm〕〕之複數個内引腳接合，以傳遞該晶片之電性， =内,引腳接合方式係利用-晶片載具〔二與 需在UHT〇01〕將該些凸塊與内引腳接合，且 良好：共…tect=:合？使該些凸塊與内引 溫度裝〔Tcp〕製程中’該晶片載具之工作 60(TC之間，然而間，壓合頭之工作溫度係在5〇〇至 係與該載帶〔薄膜，覆晶〔C0F〕製程中，因該壓合頭 合頭之高溫抵壓而變形二4:;:丄：使該載帶不受1 200至30(TC之間，以避免該 二古=碩之工作溫度降至 該些凸塊與内引腳達成良好之丑t Γ而變形’且為維持 溫至400至50〇t之間，習知在二’需將晶片栽具升 中使用之晶片載具，係以 =載封裝〔TCP〕製程讀 具，該金屬晶片載具之工作。传1製作之金屬晶片載 僅適用於捲帶承載封裝〔TC心程在80至15〇t之間，其 晶〔C0F〕製程中；如 ，=並不適用於薄膜覆 將°亥金屬晶片栽具用於薄膜覆晶 第6頁 1220778 五、發明說明（2) 二：〕製程中’將該金屬晶片載具 ^400^500 ^ ^ ，之巩化現象不但會影響該金屬晶明 =…之氧化金屬〔氧化鐵〕粉末更:=品=1220778 V. Description of the invention (l) 'a " " [Technical Field to which the Invention belongs] The present invention relates to a wafer carrier for inner pin bonding, and particularly to an inner pin bond including a superlattice film. Wafer carrier. Tape carrier package I (Tape Carrier Package, TCP) or thin film (ChlP OOn Film, COF) is formed on the wafer pad with several years of bumps and a carrier tape (such as tape [Tape] or film Two FUm]] multiple internal pin bonding to transfer the electrical properties of the chip, = internal, pin bonding method uses-wafer carrier [二 和 Required in UHT〇01] to these bumps and internal lead The feet are engaged and good: total ... tect =: he? During the process of mounting the bumps and the internal lead temperature (Tcp), the work of the wafer carrier is between 60 (TC, however, the working temperature of the pressing head is between 500 and the carrier tape [film In the process of flip chip [C0F], it is deformed due to the high temperature pressure of the pressing head and the head. 2: 4:;: 丄: The carrier tape is not affected between 1 200 and 30 (TC, to avoid the Ergu = The operating temperature of the master is reduced to achieve a good ugly t Γ and deformation of the internal pins, and to maintain the temperature to between 400 and 50 0 t, it is known that the wafer tool must be used in two. The wafer carrier is a reading tool with a carrier package [TCP] process, the work of the metal wafer carrier. The metal wafer carrier produced by Chuan 1 is only applicable to the tape carrier package [TC heart stroke is between 80 and 150 t] , Its crystal [C0F] process; for example, = is not applicable to thin film coating ° Hai metal wafer tool for thin film coating on page 6 1220778 V. Description of the invention (2) II:] During the process' the metal The wafer carrier ^ 400 ^ 500 ^ ^, the sclerosis phenomenon will not only affect the metal crystal = = the oxide of the metal [iron oxide] powder more: = 品 =
晶片=係製程中，其所使用之 該種陶兗製之晶技術：成之昂貴製作，雖然 間〕時可抗氧 ί 作溫度400至500 °Q 染線上產品和無塵=，f J 5化金屬〔氧化鐵〕粉末，污 導電性差，容县、，生：’旦“種陶瓷製晶片載具之電阻高、 不可修護，：夕卜1=受靜電破壞’如有損傷必須換新 時，該適用ΐ:尺！生產線所封裝加工之晶片尺寸更改 以製作不同尺寸之究製晶片m ^•，需再另外開模具 產效益。 瓷晶片載具，其係增加成本且不符生 【發明内容】 載具，利用一：：的係在於提供-種内引腳接合孓晶片 合金為材料製薄膜形成於一以鐵 氧化金屬粉末I ^ 、 使忒載具本體高溫受熱時之 之氧化金屬粉末、、亏t Ϊ出該載具本體，以避免該載具本體^ 对物末巧染產品和無塵室。 本'發"明 載具，利帛—=i的係在於提供一種内引腳接合之晶片 本體上形成為材料製作之載具本體，於該載具 超日曰格薄膜後’ 一導電硬質膜再形成於該超Wafer = In the manufacturing process, the ceramic crystal technology used by it: It is expensive to make, although it can be resistant to oxygen at times. Working temperature 400 to 500 ° Q Dyeing line products and dust-free =, f J 5 Chemical metal [iron oxide] powder, poor conductivity, Rongxian, and Sheng: 'Dan' type ceramic wafer carrier has high resistance and cannot be repaired: Xi Bu 1 = damaged by static electricity. If it is damaged, it must be replaced with a new one. In this case, the rule is: Ruler! The size of the wafer packaged in the production line is changed to produce a research wafer of different sizes m ^ •, and another mold is required to produce the benefit. Porcelain wafer carrier, which increases the cost and does not conform to the [invention] Content] The carrier uses one :: The system is to provide-a kind of internal pin bonding 孓 wafer alloy as a material formed of a thin film of iron oxide metal powder I ^, the 忒 carrier body when the high-temperature heating of the oxidized metal powder ， 亏 t tuck out the vehicle body to avoid the vehicle body ^ to the product and clean room at the end of the product. This 'fat', "clear vehicle, the advantage is to provide an internal guide A carrier made of material is formed on the foot body of the wafer The body, after the carrier is super thin and thin, a conductive hard film is formed on the super
第7頁 之内引 晶格薄 一載帶 部及一 載該晶 載部與 避免該 i也 9 '— 晶片載 腳接合之晶 膜，該載具 之複數個内 結合部，該 片，該超晶 該結合部， 載具本體之 導電硬質膜 具之抗氧化 以強化該晶片載具之抗氧化能力、表面硬度 片載具， 本體係用 引腳，該 晶片承載 格薄膜係 §亥超晶格 氧化金屬 再形成於 能力、表 五、發明說明（3) 晶格薄膜上， 和導電性。 依本發明 具本體及一超 複數個凸塊與 有一晶片承載 平面，用以承 體之該晶片承 片承載部，以 無塵室，較佳 上，以強化該 性。 其係包含有一載 以接合一晶片之 載具本體係包含 部係具有一承載 形成於該載具本 薄膜係覆蓋該晶 粉末污染產品和 該超晶格薄膜 | 面硬度和導電 【實施方式】 參閱所附圖式，本發明將列舉以下之實施例說明。 依本發明之第一具體實施例，請參閱第丨及2圖，一種 内引腳接合之晶片載具100，其係包含有一載具本體11〇及 一超晶格〔super lattice〕薄膜120 ,該載具本體11〇之材 質係為一鐵合金金屬〔例如工具鋼〕，並經熱處理程序而 具有一在HRC55至65之間之硬度，用以接合一晶片之複數 個凸塊與一載帶之複數個内引腳，該載具本體丨丨〇係包含 有一晶片承載部111及一結合部11 2，該晶片承載部j j j係 具有一承載平面113及至少一真空孔114，該承載平面113 之平行度係在5 // m以下，用以承載該晶片，該超晶格薄膜 120係形成於該載具本體11〇之該晶片承載部丨丨1與該結人 1220778 五、發明說明（4) 部112上，並覆蓋該晶片承載部ill與該結合部112 ,該真 空孔114係用以吸附該晶片，該超晶格薄膜12〇係以一物理 蒸锻製程〔Physical Vapor Deposition，PVD〕中之濺鍍 或離子蒸嫂技術所形成之奈米級氮化物薄膜，該超晶格薄 膜1 2 0之晶格〔1 a 11 i c e〕係小於該載具本體之鐵合金金屬 晶格，以避免該載具本體11 0之氧化鐵粉末逸出而污染產 品和無塵室’較佳地，一導電硬質膜130再形成於該超晶 格薄膜120上’該導電硬質膜130係以一物理蒸鍍製程中之 濺鍍或離子蒸鍍技術所形成之超晶格硬質薄膜，且用以形 成該導電硬質膜130之靶材中包含有複數個金屬材料，以 增強該晶片載具1 0 0之表面硬度、機械性質與導電性，該零 導電硬質膜130之硬度係在Hv2500至3400大於該超晶格薄 膜120之硬度〔Hv 1700至2400〕，且該導電硬質膜130係有 效阻隔該超晶格薄膜1 2 0之氧化，以強化該晶片載具丨〇 〇之 抗氧化能力。 利用該超晶格薄膜1 20形成於該以鐵合金為材料製作 之載具本體110上，使該載具本體110之氧化金屬粉末無法 滲透出該金屬晶片載具之表面，以避免該載具本體1丨0在 高溫〔工作溫度400至500 °C之間〕時之氧化金屬粉末污染 產品和無塵室，於該載具本體110上形成該超晶格薄膜120_ 後，該導電硬質膜130再形成於該超晶格薄膜120上，以強 化該晶片載具100之抗氧化能力、表面硬度和導電性。 請再參閱第3圖’ 一種内引腳接合之晶片載具之製造 方法，其包含之步驟有：「提供一載具本體」2 1 〇、「蒸The inner lead-in lattice is thin on page 7 and a crystal film carrying the crystal-carrying portion and avoiding the i 9'- wafer foot bonding, a plurality of internal bonding portions of the carrier, the piece, the The bonding part of the super crystal, the oxidation resistance of the conductive hard film of the carrier body to strengthen the anti-oxidation ability of the wafer carrier, the surface hardness sheet carrier, the pins for this system, the wafer carrier grid film are § Hai super crystal Lattice oxidized metal is re-formed on the ability, Table V, description of the invention (3) on the lattice film, and conductivity. According to the present invention, the wafer carrier having a body, a plurality of bumps, and a wafer carrying plane for supporting the wafer carrier is preferably a clean room to enhance the property. The system includes a carrier for bonding a wafer. The system includes a carrier that is formed on the carrier. The film covers the crystal powder contaminated product and the superlattice film | surface hardness and conductivity. [Embodiment] See In the drawings, the present invention will be illustrated by the following examples. According to a first specific embodiment of the present invention, please refer to FIGS. 丨 and 2, a wafer carrier 100 with internal pin bonding, which includes a carrier body 110 and a super lattice film 120, The material of the carrier body 11 is an iron alloy metal (such as tool steel), and has a hardness between HRC55 and 65 after heat treatment process, used to join a plurality of bumps of a wafer and a carrier tape. A plurality of inner pins. The carrier body includes a wafer carrying portion 111 and a bonding portion 112. The wafer carrying portion jjj has a carrying plane 113 and at least one vacuum hole 114. The parallelism is below 5 // m for carrying the wafer, and the superlattice film 120 is formed on the wafer bearing portion of the carrier body 110, and the knot 1220778 V. Description of the invention (4 ) Portion 112 and covers the wafer bearing portion ill and the bonding portion 112, the vacuum hole 114 is used to adsorb the wafer, and the superlattice film 120 is subjected to a physical vapor forging process [Physical Vapor Deposition, PVD] Sputtering or ion evaporation The nano-level nitride film is formed, and the lattice [1 a 11 ice] of the superlattice film 1 2 is smaller than the iron alloy metal lattice of the carrier body to avoid iron oxide powder of the carrier body 110. Escape and pollute the product and the clean room. Preferably, a conductive hard film 130 is formed on the superlattice film 120. The conductive hard film 130 is formed by sputtering or ion evaporation in a physical evaporation process. The superlattice hard film formed by the technology, and the target used to form the conductive hard film 130 includes a plurality of metal materials to enhance the surface hardness, mechanical properties, and conductivity of the wafer carrier 100. The The hardness of the zero-conductive hard film 130 is greater than the hardness of the superlattice film 120 at Hv2500 to 3400 [Hv 1700 to 2400], and the conductive hard film 130 effectively blocks the oxidation of the superlattice film 120 to strengthen The wafer carrier has an oxidation resistance. The superlattice film 120 is formed on the carrier body 110 made of ferroalloy as a material, so that the oxidized metal powder of the carrier body 110 cannot penetrate the surface of the metal wafer carrier to avoid the carrier body. 1 丨 0 The oxidized metal powder contaminates the product and the clean room at a high temperature (between 400 and 500 ° C operating temperature). After the superlattice film 120_ is formed on the carrier body 110, the conductive hard film 130 is then Formed on the superlattice film 120 to strengthen the oxidation resistance, surface hardness and conductivity of the wafer carrier 100. Please refer to FIG. 3 again. A method for manufacturing a wafer carrier with internal lead bonding includes the following steps: "provide a carrier body" 2 1 0, "steam
第9頁 1220778 五、發明說明（5) 錄一超晶格〔super lattice〕薄膜」220及「蒸鍍一導電 硬質薄膜」23 0，首先，於「提供一載具本體」21〇之步驟 中，提供一載具本體該載具本體係具有與上述之載具本體 11 0相同之構件，如晶片承載部及結合部，該載具本體之 材質係為一鐵合金金屬〔例如工具鋼〕；於「蒸鍍一超曰 格:super lattice〕薄膜」22〇之步驟中，利用二又物理蒸曰曰 鍍製程中之濺鍍或離子蒸鍍技術將一超晶格薄膜形成於該 載具本體上，該超晶格薄膜係覆蓋該晶片承載部與該妙二 部，該超晶格薄膜之晶格〔lattice〕係小於該鐵合金0^ 屬之晶格，以避免該載具本體之氧化鐵粉末逸出而污 品和無塵室；於步驟220之後，執行「蒸鍍一導電硬質、 膜」230之步驟，利用一物理蒸鍍製程中之濺鍍或離蒎 鍍技術將一導電硬質薄膜形成於該超晶格薄膜上，且？以 形成該導電硬質膜之靶材中包含有複數個金屬材料，以辦 =該曰:曰片載具之表面硬度和導電十生，並有效阻隔該‘ 薄膜咼溫時之氧化現象，以強化該晶片載具之抗氧化 力，車乂佳地，於「蒸鍍一超晶格〔super lattice〕 220之步驟之前，先執行一「熱處理該載具本趙」2ι 驟，使该載具本體之硬度在脉(：55至65之間再執一， : = 具本趙之承載平面」212之步驟，使該載· 具本體之承載平面之平行度係在5 V m以下。 ⑽本發Λ之Λ引腳接合之晶片載具，其適用於捲帶承載 或4膜覆晶〔COF〕之製程，供作晶片之 成複數個凸塊與一載帶〔例如捲帶〔Tape〕或薄膜 形Page 9 1220778 V. Description of the invention (5) Record a super lattice film 220 and "evaporate a conductive hard film" 23 0. First, in the step of "providing a carrier body" 21 Provide a carrier body. The carrier system has the same components as the carrier body 110 described above, such as a wafer bearing portion and a joint portion. The material of the carrier body is an iron alloy metal (such as tool steel); In the step of "evaporating a super lattice film" 22, a superlattice film is formed on the carrier body using sputtering or ion evaporation techniques in two physical vapor deposition processes. The superlattice film covers the wafer bearing portion and the second part, and the lattice [lattice] of the superlattice film is smaller than that of the iron alloy 0 ^ to avoid the iron oxide powder of the carrier body. Escaped dirt and clean room; after step 220, perform the step "evaporating a conductive hard film" 230, and use a sputtering or ion plating technique in a physical evaporation process to form a conductive hard film On the superlattice film, and? The target material for forming the conductive hard film includes a plurality of metal materials, so that the surface hardness of the carrier and the conductivity of the carrier are ten years, and effectively block the oxidation phenomenon of the thin film at high temperature to strengthen The anti-oxidation power of the wafer carrier is good. Before the step of "evaporating a super lattice 220", first execute a "heat treatment of the carrier" and make the carrier itself. The hardness is between pulses (: 55 to 65), and the steps of 212 == the bearing plane of the main body and the main body of the carrier are equal to or less than 5 V m. ⑽ 本 发Λ's Λ pin-bonded wafer carrier, which is suitable for the process of tape carrier or 4-film chip-on-chip (COF), for wafers with a plurality of bumps and a carrier tape (such as tape or tape) shape
第10頁 A220778 之複數個内 引腳接合作 會被磨損而 研磨拋光， 蒸鍍一超晶 片載具，不 棄，故本發 加工、可修 之保護範圍 熟知此項技 任何變化與 引腳接 業之後 影響精 使該載 格薄膜 必像傳 明之内 補更新 當視後 藝者， 修改， 裝作業 片載具 將該晶 電硬質 材質之 合之晶 效益。 請專利 離本發 本發明 五、發明說明（6) [F Π m〕〕 具'經多次内 之承載平面 承栽部重新 面，再重新 複使用該晶 損後即需丟 低成本、易 本發明 為準，任何 圍内所作之 合之封 ’該晶 準度， 具本體具有一 與一導 統陶瓷 引腳接 之經濟 附之申 在不脫 均屬於 ，當該晶片載 之晶#承載部 片載具之晶片 新的承載平 薄膜，而可重 晶片載具在磨 片載具係具有 範圍所界$者 明之精神和範( 之保護範圍。A220778 on page 10 of the multiple internal pin connections will be worn out and polished. A super wafer carrier is evaporated and not discarded. Therefore, the scope of protection and repair of this process is familiar with any changes in this technology and pin connection. After that, the effect of the carrier film will be like the internal update of the rumor, and it will be treated as a post-artist, modified, and mounted on the work piece carrier. Please file a patent for this invention. V. Description of the invention (6) [F Π m]] With the bearing plane bearing part resurfaced after multiple times, and the crystal loss will be lost after low cost and easy use. The present invention shall prevail. Any combination of seals made within the circle, the crystal accuracy, with the body having an economical connection with a lead ceramic pin, all claims belong to, when the wafer is carried by the crystal # The wafer of the partial carrier is a new carrier flat film, and the reloadable wafer carrier has the spirit and scope (the scope of protection) in the abrasive carrier.
1220778 圖式簡單說明 【圖式簡單說明】 第1圖：依據本發明之内引腳接合之晶片載具之立體圖； 第2圖：依據本發明之内引腳接合之晶片載具之截面示意 圖；及 第3圖：依據本發明之内引腳接合之晶片載具之製造流程 圖。 元件符號簡單說明： 100晶片載具 110載具本體 馨 111晶片承載部 112結合部 113承載平面 11 4真空孔 1 2 0超晶格薄膜 130導電硬質薄膜 210提供一載具本體 211 熱處理該載具本體 212研磨拋光該載具本體之承載平面 220蒸鍍一超晶格薄膜 230蒸鍍一導電硬質薄膜1220778 Brief description of the drawings [Simplified description of the drawings] Figure 1: A perspective view of a wafer carrier with internal pin bonding according to the present invention; Figure 2: A cross-sectional schematic diagram of a wafer carrier with internal pin bonding according to the present invention; And FIG. 3 is a flowchart of manufacturing a wafer carrier for pin bonding in accordance with the present invention. Simple description of the component symbols: 100 wafer carrier 110 carrier body 111 wafer carrier 112 coupling part 113 carrier plane 11 4 vacuum hole 1 2 0 superlattice film 130 conductive hard film 210 providing a carrier body 211 heat treatment of the carrier The body 212 grinds and polishes the carrier plane of the carrier body 220 and vapor-deposits a superlattice film 230 and vapor-deposits a conductive hard film
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