TW591845B - Alternating current output parallel power system and share current control method thereof - Google Patents

Abstract

The present invention relates to an alternating-current (AC) output parallel power system and a share current control method thereof. The parallel AC power supply system includes at least an AC output, a phase-locked system, and a load share current circuit. The AC output is connected to an output bus via inverters for load power supply. The high-precision phase-locked system is used for synchronizing all the output phases and the load share current circuit is used for distributing loads evenly. By way of a control loop, each inverter quickly calculates the unbalanced power to restrain the cross current increase. Also, by adding a direct-current (DC) input voltage (DC bus) into the control loop, not only the inverter response can be corrected but also the cross current increase can further be restrained for ensuring the system stability.

Description

发明 Description of the invention [Technical field to which the invention belongs] The present invention relates to an AC output parallel power supply system and a current sharing control method thereof, and more particularly, to use unbalanced power calculation and circulating current limitation to modify the response of the inverter to ensure stable operation. UPS (Uninterruptible Power Supply) in parallel. [Previous technology] With the development of economy and science, people's reliability of electric power source is getting higher and higher. Especially in today's era where economic information is relatively developed, once a variety of digital devices such as computers are powered off, a large amount of data may be lost, resulting in serious economic losses. In view of this, uninterruptible power supply equipment came into being. The purpose of the uninterruptible power supply system (UPS) is to ensure that the load can still obtain an uninterrupted and stable normal AC power input under a variety of harsh city power conditions. Therefore, a uninterruptible power supply system (UPS) is used as a protective power supply device. , 'Its reliability is very important. In practical applications, the working conditions of a UPS can be very harsh, such as fluctuations in the power grid, lightning strikes, load transients (even short circuits), non-stop operation 24 hours a day, etc. Testing its reliability. At present, the reliability of a single online UPS for civil (commercial) can reach 99.9% within the acceptable cost range. However, if you want to further improve the reliability, not only is it difficult to implement technically but also the cost (mainly the cost of components and equipment) Will increase sharply. In order to meet the requirements of some key equipment or systems for higher reliability, while the cost does not increase too much, people have thought of a solution that uses a single UPS to work in N + 1 (N + X) redundancy to improve reliability. As mentioned in US Patent No. 5,257,180 (specifically referring to inverters and not UPSs). The solution proposed in the aforementioned patent case can indeed increase the reliability of the operation of the inverter, but most of its implementation uses hardware circuits to control the gain of the controller, and it cannot play a better control performance on the transient state of the system; its circulation The parallel analysis method requires virtual vectors, and even further decomposes them into two vectors, but does not take into account that the output impedance of each inverter may cause problems of amplitude or phase difference. The method is more complicated and reduces its reliability. The cost is also relatively high; in addition, as a frequency converter application suitable for UPS, the DC bus voltage input of the frequency converter is not considered, and the coupling interaction between the frequency converter and other modules is also ignored; meanwhile, the The source of the synchronous timing signal can only be independent of the module. Once the system is damaged, it will crash. [Summary] Therefore, the main object of the present invention is to provide a parallel system of uninterruptible power supply modules capable of controlling current sharing, which can change the gain of the controller when abnormal phenomena such as overcurrent, non-linear load or short circuit occur, At the same time, the circulating current is controlled from a viewpoint of balanced power, and the output impedance is considered to make the output more reliable, and it is not necessary to decompose the circulating current into different vectors. The main technical measures adopted to achieve the foregoing purpose are to make the aforementioned system include at least one uninterruptible power supply module, so that the AC output of its inverter is connected in parallel to a bus (BUS) to provide energy to the load, and The power-off power modules are connected by synchronous timing lines, shunt lines, and communication lines to form a connection 591845; of which: the synchronous timing lines include synchronous timing signals, which synchronize the frequency and phase of all inverters in the system; All inverters in the system distribute the load current according to a preset ratio, and make the circulating current basically zero or reach a level that will not cause harm by the unbalanced power% flowing between the inverters; this communication line is provided for each The exchange of information between the parallel uninterruptible power supply modules is a necessary part to realize the function of real-time monitoring system operating status. The aforementioned shunt line further includes a switch to allow a single ® frequency converter to operate normally. A secondary object of the present invention is to provide a current sharing control method for an AC output parallel power system. The main technical measures adopted in order to achieve the aforementioned purpose are to make the aforementioned method use the output unbalance power to adjust the active power. The specific method is as follows: the parallel output voltage, load current, and the shunt generated by the shunt line. The load current signal is sampled; the difference between the load current signal and the load current signal is used to calculate the instantaneous shunt error of the current; the sum of the product of the output voltage and the error current in an output period is averaged to calculate the relative Unbalanced power of the system; Adjust the reference voltage of this unit by using the number of front row, and in the case of output voltage phase difference and small difference in output impedance, it is similar to adjusting the active power. 7 The aforementioned method can also use DC bus to compensate the active power. The specific method is to detect the difference between the DC bus voltage and the DC bus set voltage in real time, and make the adjustment gain and the reference voltage have a negative feedback relationship. The aforementioned method can also use the current sharing error to improve the transient circulation. The specific method is: sampling the load current of the machine and the shared load current signal generated by the shunt line; the current is obtained from the difference between the shared load current signal and the load current signal The instantaneous current sharing error is multiplied by the instantaneous current sharing error to adjust the gain to obtain the compensation current reference 加入 added to the current inner loop, which is used to adjust the input of the current inner loop, thereby improving the parallel transient current balance. [Embodiment] The uninterruptible power supply module (N + 1) parallel redundancy scheme proposed here, the preferred embodiment is an on-line (ON) with a digital signal processor (DSP, Digital Signal Processor) as a controller LINE) is realized on the basis of uninterruptible power supply module. The inverter of the uninterruptible power supply module (INVERTER) adopts a half-bridge structure. As shown in the first figure, a schematic diagram of the system architecture of a parallel power supply module parallel system is disclosed, which consists of an unspecified number of uninterruptible power supply modules (1 ◦) (101) ~ (10N) in parallel, each The uninterruptible power supply (1 0) (1 0 1) ~ (1 0 N) AC output part, if the parallel power is large, let its output pass through a power distributor (20) (Pod, Power Output Distribution) powers the load in parallel. If the power of the parallel uninterruptible power supply module is small, they can be interconnected via the wiring phase to collectively increase the energy of the load. Due to the need for transfer bypass, the AC input Line in requires the same city power supply and connected in parallel; the external battery (not shown in the figure) to increase the discharge time of the user can work with the battery regardless of the mains or battery mode. In addition to the above power lines, each of the uninterruptible power supply modules (10) (1 01) ~ (10 N) completes the exchange of all signals through the following lines, which include: a shunt line (2 1) (Load Share Current) is responsible for the exchange of load current information of each machine. The voltage on it represents the average output current of the uninterruptible power supply modules (10) (101) to (10N). A synchronous timing signal line (2 2) (Synchronizing Clock

Signal), which is responsible for synchronizing the phases of all parallel uninterruptible power supply modules (10) (1 0 1) to (1 0 N). A communication line (2 3) (Communication Line), for each parallel uninterruptible power supply module (10) (101) ~ (10N) to exchange information, is a necessary part to realize the function of real-time monitoring system operating status. The uninterruptible power supply modules (1 0) (1 0 1) to (1 0N) shown in the aforementioned first figure are single-phase input and single-phase output, but the same applies to three-phase input and single-phase output systems. The input is increased by two phases (S-phase, T-phase), and the inverter part is not changed. The phase-locking and bypass are based on the R-phase and as shown in the third figure, they are the aforementioned uninterruptible power supply modules (1 0 ) (1 0 1) ~ (1 0 N) function block diagram (the figure only uses one of the uninterruptible power supply modules (1 〇) as an example), the main structure includes an inverter (1 1), drive PWM drive circuit (1 2) of inverter (1 1), inductor current detector (1 3), output voltage detector (1 4), load current detector (15) located on output end of inverter (1 1) ), Etc. and a control unit (30); of which: the load current detector (1 5) is connected to other uninterruptible power supply modules (1 0) through a shunt line (1 6) and the aforementioned shunt line (2 1). . The text control unit (30) can be implemented in software by a digital signal processor (DSP).

Since the control unit (30) of the uninterruptible power supply module (10) (101) to (10N) is mainly implemented by software, the uninterruptible power supply module (1 0) (1 0 1) to (1 〇N) ) Under different working conditions, the control gain parameters can be easily adjusted, which not only increases flexibility, but also improves reliability. The control of the parallel system is divided into two parts: slower steady state control and faster transient state control. The following is described in conjunction with the third figure: 1. Steady state control: It is composed of a digital signal processor. The control unit (30) contains a control system that can handle the steady-state characteristics of the output and has a slower control speed. The control time may be controlled once per output voltage cycle, or close to 591845.

For easy understanding, each uninterruptible power supply module can be approximately equivalent to a series of an ideal AC voltage source and an output impedance (as shown in the second figure). Each uninterruptible power supply module (10) (101) The differences between ~ (10N) are:% (1) The output impedance (Zs) is not consistent; (2) The phases of the equivalent voltage sources are different ((9); (3) The amplitudes of the equivalent voltage sources are not equal (V). The above-mentioned differences can predict the _ problems that may be encountered after uninterrupted power supply modules are connected in parallel: First, the inconsistent output impedance (Zs) under load (no-load parallel is also equivalent to load), will cause each The degree of decrease of the output voltage of the uninterruptible power supply module is inconsistent. Therefore, when the load is in a steady state, the inconsistency of Zs will affect the amplitude and phase of the individual AC output voltage. If the output impedance is close to resistive, it will be approximately The problem caused by the unequal amplitude of the equivalent voltage source, if the output impedance is close to inductive, it may affect the phase of the equivalent voltage source. Secondly, at no load, if the amplitude of the equivalent voltage source is equal and the phase is not too great Big difference (0) There will be a current (conventionally called Cross Current) between the two uninterruptible power supply modules connected in parallel with the output voltage at a certain angle, which shows that both modules have a large virtual power. Reactive Power. In addition, the parallel output voltage is the vector sum of the AC output voltages of all parallel uninterruptible power supply modules. Take two parallels as an example. Due to the phase difference, the combined output voltage will be less than The output voltage of each 11 stand-alone units, so that each uninterruptible power supply module will raise the reference voltage (Vref) to make the combined output voltage reach the desired value, and as a result, the virtual work will be further increased. The no-load is basically the same, but the output current includes the two components of the load current and the circulating current. It can be seen that the larger the phase difference, the larger the loop or virtual work. When this 値 reaches a certain level, the parallel system is possible. Crash. For this reason, no matter in line mode or battery mode, the phase between the parallel uninterruptible power supply modules must be guaranteed to have a small error It is possible to run the system in parallel within a stable range. In order to meet the phase-locking requirements between the uninterruptible power supply modules, a main control module can be generated in each uninterruptible power supply module to send a synchronous timing signal (see section Syn clock in the three pictures), other uninterruptible power supply modules become slave modules, and after receiving the synchronization timing signal, the reference voltage and the synchronization signal phase are kept consistent. Because the synchronization timing signal is generated inside the system It can be further synchronized with the PWM of the system's own switch, so that the circulating current will be minimized due to the influence of the asynchronous power switch. Furthermore, under the premise that the phase difference of the output voltages in parallel is zero, the amplitude of the equivalent voltage source is not large. Equivalent also causes circulating current under no load, but the difference is that the phase of this circulating current is basically the same as the phase of the output voltage. The power shows the active power exchange (that is, the exchange of energy) between the modules, and the output voltage. Higher uninterruptible power supply modules will output active power, and lower voltages will absorb power. The output power is equivalent to the load on the uninterruptible power supply module. It will not have any adverse effect on the uninterruptible power supply module, but it is quite dangerous to absorb power. If the absorbed power is too large, and 591845 If it cannot be unloaded in time, the energy will accumulate on the DC BUS capacitor, and the DC BUS voltage will increase as the DC BUS voltage is too high, which causes the uninterruptible power supply module to generate a protective action and cut off the output. When the output has a load, as long as the output power of each module is greater than the absorbed power, in general, it will not be harmful to the uninterruptible power supply module, but some uninterruptible power supply modules have more loads, and some Less, the load sharing is not balanced, but it should be noted that this unbalanced state is a vicious cycle process if it is not controlled. This is because each single unit adjusts its own reference voltage according to the output voltage, and the combined output voltage must be lower than the output voltage of the uninterruptible power supply module with the highest steady-state output voltage before the parallel connection. Therefore, before the parallel connection, The uninterruptible power supply module with the highest steady-state output voltage will think that the output voltage is low after the parallel connection, and it will naturally increase its reference voltage. In the long run, the lower the lower the lower the lower the original output over time. The highest voltage uninterruptible power supply module will definitely load 100% of the load, and the rest will be no-load or even purely absorb power, which will eventually cause the DC BUS voltage to be too high and must be tripped for protection. To control the output voltage difference, the voltage difference must be detected first, but the output voltage of the parallel system is the vector sum of the output voltage of each machine. It is not independently controlled by a certain uninterruptible power supply module, so the real voltage difference is Undetectable. To this end, the present invention introduces a parameter of "Unbalance Power", which represents the difference between the power that each UPS unit should (or expect) to output after the parallel connection and the actual output power of the unit (see The unl3aiance power calculate block in the third figure), the calculation formula is · 591845

Pun, ibal

Xt) * vQ (i) dt 1) (2) K (0 = hoad (0 hoad (0 n〇ad is the command to share the output current of the parallel system), which can be a total load current divided by the parallel uninterruptible power supply The average number of modules is 値 related 或是, or other proportions 値, where: (0 is the actual load current as the output voltage, as long as the unbalanced power and the reference voltage establish a negative feedback relationship, the output voltage difference can be suppressed. Load imbalance and protection against excessive DC BUS voltage, this control loop is called the current sharing power regulation loop. Vref-vseiting ^ K ^ punbal (3)

Kening--the initial set voltage 値

Kx——Current-adjusted power loop adjustment gain. Due to the DC offset error of the detection circuit and the quantization error of the A / D sampling, the actual measured b (0 and U0 is even when there is only one uninterruptible power supply module. Under working conditions, there may still be non-zero data, in order to make only one uninterruptible power supply module work without erroneous adjustment, it is necessary to design a control dead zone (Dead Zone, see Figure 3). The choice of adjusting gain mainly considers the trade-off between the degree of current sharing and the accuracy of output voltage adjustment. The larger the & load sharing, the more average the output voltage adjustment accuracy may be. However, the output voltage adjustment accuracy may be lower. The exchange of Active power 'is usually effective, but under certain conditions (such as changing the load from 14 591845 to no load), because the output impedance and response delay of each uninterruptible power supply module are not Too consistent, and the output voltage fluctuates greatly, and the active power exchange between parallel machines is also particularly fierce. At this time, the gain of & must be large to avoid the occurrence of dangerous conditions. However, the accuracy of steady-state output adjustment is required. Control of the increase of K, so we must find a new way to make up for the lack of active power between the parallel machine (Active Power) in special cases. From the foregoing, we can know that under the premise of good phase lock, active Absorption means the accumulation of energy on the DC BUS capacitor. The more the absorption, the higher the voltage on the DC BUS capacitor. Using this, the difference between the current β voltage of the DC BUS capacitor and the normal set voltage is used to further compensate. Active power is adjusted, as shown in the third figure of the bus compensation (BUS Compensation) block, and its relationship is: vref = vsetting + K, AVBUS (4) ^^ BUS = ^ realBUS ^ BUSsetting (of which Hall 20) (5) νsetting--the initial setting voltage 値

κ2--D C B U S Voltage compensation loop adjustment gain I

KealBUS-current DC BUS voltage 値 vBUSse " ing-DC BUS voltage setting 値 (initial 値) The fluctuation of DC BUS voltage is not only affected by the output / absorbed power of the inverter, but also controlled by the PFC / battery boost section. Overshoot of the BUS voltage for a period of time during the transient process (unloading) is unavoidable, so this part of the adjustment must also set a dead zone to avoid the effects of transients on a smaller time scale. Although the DC BUS voltage compensation loop and the current sharing power regulation loop are controlled differently, the effect is basically the same. Under no load, the absorbed power also means that the DC BUS voltage has increased, but the load is not the same. The DC BUS voltage compensation loop only works when the absorbed power is greater than the output power (and the load is completely unbalanced at this time). ). From this, it can be seen that the main regulation that produces the main function most of the time is the current sharing power regulation loop, and the DC BUS compensation loop will only function when it is further adjusted. 2. Transient control: With the above-mentioned steady-state control method, stable parallel operation can be performed safely, but the transient process (such as parallel loading, unloading, etc.) is still not effectively controlled, mainly due to the aforementioned method It is adjusted once in each output cycle (or even longer), which is a slower adjustment, and it is basically powerless for transient changes in the millisecond range. In the third figure, the control unit (30) contains the block diagram of most transient control. The control time may be controlled once per power switching cycle or close to this time. In the figure, in addition to the shunt line (16) and the derived line, it can be used as a frequency converter alone, including a voltage outer loop (by the output voltage detector (1 4) and an instant * voltage control software) (Constructed) and current inner loop (constructed by the inductor current detector (1 3) and an instant current control software), under normal circumstances, the sampling and control speed of the voltage outer loop and the current inner loop can be the same, However, under certain considerations, the control speed of the voltage loop can be appropriately reduced without affecting the output characteristics. The shunt circuit (16) described here further includes a switch (not shown in the third picture, but included in the shunt circuit, shown in the fourth picture), so that the inverter can also be used alone. 16 591845 or system control, turn on the switch to isolate external influences. The transient performance has a huge impact on the reliability of the parallel system. For example, if RCD LOAD is input, if there is no parallel transient control, it is likely that one of the uninterruptible power supply modules will bear most of the Rush Current, while other uninterruptible power supply modules have a small burden; if the output voltage of a certain uninterruptible power supply module is somewhat distorted, the circulating current caused at the distortion point may be large. In order to enable the parallel system to share the load current immediately and evenly, the present invention is based on the digital control of the frequency converter (1 1), and an instantaneous current sharing loop is added to the current inner loop (see the third figure), which is the aforementioned instantaneous _ Current Control (Real Time Current Control). The input of this loop is similar to the input of the steady state control. It represents the current difference of the unbalanced current (see the fourth figure), but in time, it performs frequency sampling once per switching cycle (about 50uS) and Calculate the error 値 and add to the input of the original current inner loop after necessary processing. Its control relation is as follows: U0 = "2 * ('(,)-' (,)) (6) ——current sharing compensation current κη added to the current inner loop —— real-time current sharing inner loop control gain ® transmission The experiment proves that the instantaneous current sharing inner loop can quickly and effectively balance the transient current, and at the same time, it has a good ability to suppress the steady-state circulation caused by voltage distortion and output phase difference. The increase of A is more conducive to balancing the transient and steady-state circulating currents between the uninterruptible power supply modules, but it should be noted that the selection of 仏 should not be too large, otherwise it may introduce too much from the current sharing signal line. Interference causes ripple in the output current. The uninterruptible power supply module (1 0) (1 0 1) 17 591845 to (1 0 N) shown in the fourth figure further includes a switch SW, SW 1 to SW N, as a separate one When the output inverter is operated, it is only necessary to turn on the switches SW, SW 1 to SW N without changing the calculation method of control. Another issue that needs attention during the transient process is output current limiting. As the name suggests, current limiting is a measure to limit the maximum output current in order to protect the inverter. In practical applications (as shown in Figure 5), casting a rectified load, an inductive load, a load overload, or a short circuit will cause a current limit. action. There are more or less differences between the uninterruptible power supply modules in the parallel system, the current limit points and the time to enter the current limit are different. And these differences can easily cause the output current of each machine to reciprocate rapidly during current limiting, which will cause high frequency fluctuation share current error. This signal is easily added to the current inner loop to form the output current. If the oscillation is severe, the inverter of the uninterruptible power supply module can be damaged. The present invention therefore adds an adaptive current limit control. In short, the control principle is: when the output current is near the current limit point, the gain and current limit point of each loop are adaptively adjusted according to the current and output voltage at that time, so that This enables the uninterruptible power supply module to smoothly enter and exit the current-limiting state. Even when the load is short-circuited, the gain is greatly reduced and the current-limiting point is greatly reduced. If yes, the measure can make the uninterruptible power supply module maintain a large current output without damaging the inverter, which is beneficial to short-circuited loads. The input fuse (FUSE) or over-current circuit breaker (BREAKER) of the device is blown to restore power to other loads. Combining the above-mentioned steady-state and transient-state control methods, the control result of the solution proposed by the present invention can achieve no-load circulation < 0.4A, load imbalance < 1%, and the effect is very satisfactory. 18 591845 In some special cases, I hope that the load is intentionally unevenly distributed. For example, the battery capacity of a certain uninterruptible power supply module is much lower than other uninterruptible power supply modules. Reduce it accordingly so that it can work for a longer time; for example, a non-stop power supply module with different power capacity is connected in parallel, and it is hoped that the load is proportional to its power capacity. In the solution proposed by the present invention, the load current sharing mainly depends on the current sharing difference signal as a reference for adjustment, and the current sharing difference signal is derived from the difference between the average current signal and the local load current. The generation of the average current signal depends on The matching of the output current sampling circuit of each uninterruptible power supply module (see Figure 4). If the current sampling gains are equal, and the matching impedance (Matching Impedance) is also equal, the load sharing is averaged. If one of them is not equal, the load sharing is There is inconsistency. Under the condition that the matching impedance is equal, the uninterruptible power supply module with a small sampling gain has a large load. In order to meet these practical special needs, a parallel-programmed resistor network (see Figure 6) is reserved on the load current sampling circuit, which is composed of an electronic switch (40) and corresponding precision resistors. It is composed of R1 ~ R4. As long as the impedance of the resistor network is changed, the gain of the current sampling circuit is changed. Currently, there are 16 kinds of impedances for 4 groups of switches, which can be freely selected. The uninterruptible power supply module also has 16-level load adjustment capability. 〇 The high reliability of the parallel system comes from the parallel operation of multiple machines, but this is based on the premise that a single point of failure does not affect the overall operation of the system. There are two main aspects of single-point faults in the currently proposed schemes: one is the output failure of a single machine (open, short, output high / low voltage, abnormal frequency, etc .; the other is the abnormal parallel control logic of the system and the 19 591845 signal line failure ( Synchronization, current sharing, master-slave, communication lines, etc.) 1 · Stand-alone output failure: The stand-alone output failure is the most common and most likely failure in the actual operation of a parallel system. It can also be divided into two categories, one is non-emergency The abnormal faults mainly include over-temperature faults, DC bus voltage faults (DC BUS Voltage FAULT), and the other types are emergency abnormal faults, such as short circuit, abnormal output frequency, etc. For non-emergency faults, the handling is relatively simple because of such problems Does not immediately affect key quantities such as output voltage and phase, has a relatively easy time to cut off the output, isolate the faulty machine, and will not affect the other uninterruptible power supply modules in the network for a short time. Abnormal faults, which not only have a serious and rapid impact on the machine, but also directly relate to other machines in the grid. Can respond in time, the parallel system has the possibility of crashing. For this reason, fault handling should take priority to such faults. The present invention adopts multiple methods of multi-layer interception design for such faults. The previously set fault protections are: First One type is parallel current sharing protection, which operates when the current sharing error of each machine is greater than the set threshold. The second type is parallel phase protection, which operates when the phase difference between the output reference voltage phase and the synchronization signal is greater than the set threshold. Now, a parallel network is used. As an example, the phase of an uninterruptible power supply module is abnormal to illustrate the principle of fault protection: If the output phase of a uninterruptible power supply module is significantly different from the output phase of other machines in the network, a large uniformity will be formed. Current difference, the abnormal current sharing power module with an abnormal current is larger than other normal uninterruptible power supply modules (equivalent when only two are connected in parallel, other protection will be used). When this difference is 20 591845 is greater than a certain This is one of the time when the machine issues protection commands, alarms and cuts off the output from the network to isolate the faulty machine. This is one of the reasons. If the protection fails or is not applicable ( When there are only two parts connected in parallel, the current sharing difference is equal), the control unit (30) will still detect the phase difference between the output voltage * and the reference voltage, and if the difference is greater than a certain value, it will be protected. In the statistical analysis of faults (inverter faults), the damage to the power switch in the inverter is the first place, and the abnormality of other parts will eventually lead to the damage of the power switch, and most of the power switch failures will occur within a certain period of time. A short circuit (such as overcurrent and overvoltage) is formed inside, so the focus of consideration in the protection of roadblocks is how to identify and isolate the unit when the power switch of a certain uninterruptible power supply module is short-circuited, while other uninterruptible power supplies are The power module will not be greatly affected, and the load is not in danger of power failure. Considering that a short circuit of the power switch will first cause a short circuit of the DC BUS of the machine, and quickly lower the DC BUS voltage, and then converge from the output of the parallel network A large amount of sink current in the bus (BUS), that is, absorbing power from the network (as shown in Figures 7 and 8, the power switch of the uninterruptible power supply module (10) is abnormal), and The output power of the other uninterruptible power supply modules (1001) ~ (10N) ® has increased significantly, but each machine has a limited current, so it will not affect the parallel system within a short time (20 ~ 40ms). It is safe, and the output voltage of the system will only decrease to zero at this time, and the impact on the load is limited. Therefore, as long as it is judged whether the absorbed power of the unit (only one cycle) is greater than a certain setting, you can know whether there is a possibility that the power switch is damaged. Based on this principle, the present invention designs absorption active power protection (also known as negative power protection). Because it does not rely on any external information, it only calculates the absorbed power of this machine 21 591845, which is highly independent, and the power calculation itself is The filtering process is very good, and when a fault such as a short circuit of the power switch of the inverter occurs, the energy absorbed by the machine from the network is very considerable, and the response to the absorbed power is the most rapid and timely. Under similar faults, the response time is less than two output cycles (2 cycles), which is sufficient to ensure that one uninterruptible power supply module can protect the safety and load of the remaining uninterruptible power supply modules from power failure when the power switch is short-circuited. Threat. At the same time, for general faults (such as power changes caused by abnormal phase lock), negative power protection is still effective. The aforementioned three protection mechanisms are in a parallel relationship. As long as one of them is triggered, the output of the uninterruptible power supply module is cut off, so as not to affect the safety of the network. 2 · The parallel control logic of the system is abnormal and the signal line is faulty. The status of the network circuit and the need to exchange information with the computer, and allow users to know the status of the parallel uninterruptible power supply modules in time. It is necessary to collect all operating parameters of all uninterruptible power supply modules in the network. Depends on the communication agreement. However, the logic of the agreement may be wrong, the hardware of the communication may be abnormal (such as short circuit, open circuit, damage, etc.), and the communication part is not redundantly backed up, which may lead to serious consequences. For the effective protection of such faults, the following methods can be adopted: One is to debug the communication information; to the key control logic, the software uses redundancy judgment. On the other hand, fault detection is performed on each communication line and its related hardware. The fault detection is for the communication line and the synchronous timing line. When the uninterruptible power supply module cannot receive the communication signal or the synchronous timing signal for a period of time, it is determined that the communication signal or the synchronous timing signal line connected to the 591845 has failed. In addition, the communication line operation depends on the normal communication power supply. When the power supply voltage is in the normal range (such as 値 15 ± 3V), if the input of a certain communication line of the uninterruptible power supply module is low, if its normal output It should be high potential (inverted), however, when the communication power supply is short-circuited or the voltage is too low, the potential output by the communication circuit is reversed ('from inverting to in-phase), so the relationship can be used to judge communication Is the power supply abnormal? It can be known from the above that the main technical means of the present invention is a digital control parallel system containing a communication protocol (a dynamic main control module can be selected in the system) and an active shunt (which can distribute current proportionally). These designs have at least the following characteristics and advantages: 1 · To achieve parallel redundant work of multiple online uninterruptible power supply modules (Online UPS), and to facilitate online expansion and thermal maintenance of parallel power systems, This allows the gain 控制器 of the controller to be changed during transients such as overcurrent, non-linear loads, or short circuits. Control the circulating current from a balanced power point of view and consider the output impedance without decomposing the circulating current into different vectors. _ 2 · The present invention further includes a switch on the shunt line, so that a single inverter can also work normally. 3. The present invention can either add a controller to the system to send a synchronization signal, or select a dynamic master control module in the system to send a synchronous timing signal to avoid system crash due to the failure of the external control failure. With the aforementioned design, the operation of the parallel system can be made more stable, and the efficiency is significantly improved compared to the existing parallel system, so it has met the requirements of the invention. Although the present invention has been described and illustrated in detail with specific drawings and texts 23 591845, those skilled in the art can make changes and modifications according to the present invention without departing from the characteristic scope of the present invention. The patent features of the present invention are specifically defined by the scope of subsequent patent applications. [Schematic description] (1) Schematic part: The first diagram: a schematic diagram of the connection of the parallel system of the present invention. The second figure is an equivalent schematic diagram of the parallel system of the present invention.

The third figure is a control block diagram of the uninterruptible power supply module in the parallel system of the present invention. The fourth figure is a schematic diagram of the current sharing signal of the parallel system of the present invention. Fifth figure: Schematic diagram of parallel current limiting of the parallel system of the present invention. FIG. 6 is a schematic diagram of a controllable load current detection resistor circuit according to the present invention. The seventh figure: It is a schematic diagram showing the negative power protection caused by the damage of the power switch. The eighth figure: It is a curve diagram showing the negative power protection caused by the damage of the power switch. (2) Part of drawing number: (1 0) (1 0 1) ~ (1 0 N) uninterruptible power supply module (1 1) inverter (1 3) inductor current detector (1 5) load current detector (2 0) Power distributor (2 2) Synchronous timing signal line (3 0) Control unit (1 2) PWM drive circuit (1 4) Output voltage detector (1 6) Shunt line (2 1) Shunt line (2 3) Communication line (4 0) electronic switch

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Claims (1)

591845 Scope of applying for a patent .... ....... (... 1 · An AC output parallel power system including at least one uninterruptible power supply module, so that the AC output of its inverter is connected in parallel to the bus (BUS), and provide energy to the load, and connect the parallel uninterruptible power supply between the groups' to form a connection with the following lines: a synchronous timing line, including synchronous timing signals, so that the frequency of all inverters in the system Synchronized with the phase; a shunt line, so that all inverters in the system can distribute load current according to the preset ratio, and by controlling the unbalanced power flowing between the inverters, the circulating current is basically zero or reaches unbalanced The degree of damage that can be caused by j A communication line for each parallel uninterruptible power supply module to exchange information is a necessary part to realize the function of real-time monitoring of the system's operating status. 2 · An AC output parallel power supply system, including at least one inverter , With its AC output connected in parallel to the bus (BUS) to provide energy to the load, and the following lines are set up between each inverter: a synchronous timing line, Contains synchronous timing signals to synchronize the frequency and phase of all inverters in the system; A shunt line enables all inverters in the system to distribute the load current according to a preset ratio, and the unbalanced power flowing between the inverters Make the circulating current basically zero, or reach a level that will not cause harm. A communication line is used for exchanging information between each parallel uninterruptible power supply module. It is a necessary part of 25 591845 to realize the real-time monitoring system operation status function. 3 · If applying The AC output parallel power supply system described in item 1 or 2 of the patent scope 'The synchronous timing line is externally added with a synchronous timing signal, so that the inverters in the system output AC inverters with the same frequency and phase in parallel to the busbar pair The load provides energy. 4 • The AC output parallel power supply system described in item 1 or 2 of the scope of patent application 'The synchronization timing signal of the synchronous sequence line is generated internally in the system. 5 · As stated in item 1 or 2 of the scope of patent application The above-mentioned AC output parallel I power system, the shunt line is to make all the inverters connected in parallel according to the total load And the number of parallel connections average dream current. 6 · As described in the patent application scope of the 1 or 2 AC output parallel power supply system, the shunt circuit is based on the proportion of load sharing, so that even if the inverter capacity is the same, the different Proportional load distribution. 7 · As in the AC output parallel power supply system described in item 1 or 2 of the scope of patent application, the shunt circuit can change the matching impedance between each inverter, and 0 enables inverters with different capacities to be connected in parallel. 8 · such as The AC output parallel power supply system according to item 1 or 2 of the scope of the patent application, the shunt circuit further includes a switch to disconnect from other inverters, so that the inverter acts as a separate AC power supply connected to the load. Or further phase lock in other ways and distribute the load current. 9 · The AC output parallel power supply system described in item 1 or 2 of the scope of patent application, the inverter contains a digital signal processor (Digital 26 591845 Signal Processor), which controls the synchronous timing line, shunt line and communication line. 1 0 · According to the AC output parallel power supply system described in item 9 of the scope of patent application, the digital signal processor has a built-in fast control software, which is a transient control. After detecting the inverter input DC bus voltage, Inverter output voltage, output current, inverter inductor current, and current command of the shunt line 计算 Calculate at least once or slightly less than once in each switching cycle to control the inverter's PWM to ensure that the inverter's fast response meets the expected characteristics. 1 1 · The AC output parallel power supply system described in item 9 of the scope of patent application, the digital signal processor has a built-in slow-speed control software for system steady-state and circulating current control, and the output impedance calculated through the shunt line The unbalanced power generated by the phase difference and voltage difference is adjusted once or slightly less than once in each output voltage cycle to control the circulating current flowing between the inverters. 1 2 · According to the AC output parallel power supply system described in item 9 of the scope of the patent application, the digital signal processor can be used to complete the steady state and transient control 'and can be used by a microprocessor with a performance close to the digital signal processor ( Microprocessor), so that the control gain can be adjusted in different situations. 1 3 · The AC output parallel power supply system described in item 1 of the scope of patent application, this inverter refers to the output inverter in the uninterruptible power supply module. 1 4 · According to the AC output parallel power supply system described in item 1 or 2 of the scope of patent application, the inverter can be a three-phase AC output inverter. The three phases are controlled in the same way, and among them, Phase-locked operation. 1 5 · —A kind of current sharing control method for adjusting active power by using unbalance power 27 591845, which is used to connect at least one inverter with an AC output connected to a bus to supply AC power in parallel to provide energy to a load The system; and control it in the following steps: sampling the parallel output voltage, load current, and shared load current signal generated by the shunt line; calculating the instantaneous current sharing error from the difference between the shared load current signal and the load current signal; The sum of the product of the output voltage and the error current in one output cycle is averaged to calculate the unbalanced power of the machine relative to the parallel system. The reference voltage of the machine is adjusted by using the number in the front row. In a small case, it is similar to adjusting the active power. 16 · The method described in item 15 of the scope of patent application is used for applications similar to uninterruptible power supply module inverters in parallel. 17 · The method as described in item 15 of the scope of patent application, the adjustment gain is inversely proportional to the current imbalance. 1 8 · According to the method described in item 15 of the scope of patent application, the unbalanced power includes consideration of three factors such as output impedance, output phase difference, and output voltage difference. 19. · A current sharing control method using a DC bus to compensate for active power, which is used for at least one inverter connected to an AC power parallel system that provides energy to a load through an AC output; it detects the DC bus voltage and the DC bus in real time The difference between the set voltage is set, and the adjustment gain and the reference voltage have a negative feedback relationship. 28 591845 2 0 • The method described in item 19 of the scope of patent application is used in applications similar to the parallel connection of uninterruptible power supply module inverters. 2 1 · As described in item 19 of the scope of patent application, the magnitude of the adjustment gain is inversely proportional to the current imbalance. 2 2 · —A current sharing control method that uses the current sharing error to improve the transient circulation. It is used for at least one inverter connected to the bus with an AC power parallel system that provides energy to the load. Control the following steps: The load current of the machine and the shared load current signal generated by the shunt line are sampled; the instantaneous current sharing error of the current is obtained from the difference between the shared load current signal and the load current signal; the instantaneous current sharing error is multiplied by the adjustment gain to obtain the current. The loop compensation current reference 用以 is used to adjust the input of the current inner loop to improve the current balance of the parallel transient. 2 3 · The method described in item 22 of the scope of patent application is applied to applications similar to the parallel connection of uninterruptible power supply module inverters. 2 4 · According to the method described in item 22 of the patent application scope, the adjustment gain is inversely proportional to the current imbalance. 2 5 · —A method for judging the absorption of active power for fault protection, | It is used for at least one inverter connected in parallel to an AC power supply system that provides power to the bus with an AC output; the control method for each inverter is: sampling The output voltage of the parallel machine and the load current of the machine; Calculate the output active power; If the active power is negative and less than the set protection point, a protection action is issued. 29 ^ e The method described in item 25 of the patent scope, its negative power § ten expressions: where n is the number of points sampled in a cycle k-0 〇 2 7 · As described in item 25 of the scope of patent application Method, it is determined that the amount of 鞴 Λ is only the output voltage of the parallel machine (that is, the local machine) and the load current of the local machine 'do not depend on the communication signals of other parallel machines. 2 8 · The method as described in item 25 of the scope of patent application, the parameter judged by this method is the absorbed active power, and the calculation of power is used to form a filtering process, which has good anti-interference. 2 9 · The method described in item 25 of the scope of patent application, this method is particularly suitable for fault protection against damage to the switching devices of the inverter, and the action time is very fast. 3 〇 · The method described in item 25 of the scope of patent application, this method can be used in applications similar to the AC output of multiple uninterruptible power supply module inverters in parallel. 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