586210 ⑴ 玫、發明說明 (發明說明應敘明：發明所屬之技術領域、先前技術、内容、實施方式及圖式簡單說明) 技術領域 本發明係關於半導體的乾蝕刻和濕蝕刻製程，特別是有 關於一種用以控制維持電流及提升突波電流承受能力之半 導體製程與結構，例如適用於單向、雙向的閘流體，特別 是交流電二極體（Silicon Diode for Alternating Current，SiDAC)、交 流切換三極管（Triode AC Switching，Triac)以及（BBD，Break over Diode)等元件製造上。 先前技術 一般的半導體結構係重複使用沉積、蝕刻、擴散、植入 等製程，造成各線層間具有不同電性以控制電流而達到半 導體元件的動作目的。圖1為一常見的半導體元件結構， 其中的維持電流（holding current) IH即為當閘流體能維持在 順向導通模式（forward conducting mode)下的最小電流。如果小 於這個值，閘流體就會切換至順向阻斷模式（forward blocking mode)。IH 可由 B.JAYANT BALIGA 所著 ’’Power Semiconductor Devices”一書中的第263頁至第279頁中所提及之下列方程 式計算出： 4=(2.'.填(1-〜上.4) 圖1顯示習知的半導體結構，其利用陰極短路（cathode short)結構1 3形成維持電流I η 0 其中，Ls為基極電流流向陰極短路13 ( cathode short)的 流動路徑長度’且Ls=(Li+L2)，Li為射極的一半長度， 而L2為射極的厚度。因此由上式可知，路徑長度Ls的大 -6- ⑺ 小與Ih的大小成反比關係。此外，由於基極的摻雜濃度會 影響基極的片電阻（Sheet resister)係數，即基極摻雜濃 度越高將導致其片電阻係數越低，並且由於基極的片電阻 係數下降，將使流經基極的維持電流IH增大。由以上可知 ’基極的砸1離子掺雜濃度與維持電流IH為正相關。亦即， 基極的硼離子濃度越高，則維持電流IH越大。 然而，隨著基極硼離子濃度的提高會使α npn下降，使從 forward block切換至forward conduct的速度變慢，或是從 forward conduct切換至forward bl〇ck的速度變慢，因此將 會導致逆向A波峰值電流ipp (reverse surge peak current)的下 降’亦即元件對於突波所帶來的突波峰值電流的承受度 (surge performance)下降。 發明内交 如上所述之傳統陰極短路（cath〇de sh〇rt)結構1 3，如欲降 低基極摻雜濃度以提昇對逆向突波峰值電流的承受能力時 ,必須重新設計陰極短路的位置及射極厚度，才能改變維 持电流IH的大小，以達到增加對逆向突波峰值電流承受能 力之目的。因此，本案的發明人利用凹洞短路點（cavity 結構取代上述陰極短路結構13,並且藉由控制凹 洞:豆路點結構的深度，以控制維持電流Ih的大小，因此可 ❿藉由降低基極硼離子的捧雜濃度來提昇對逆向突波峰值 •、勺表又肖b力，而不需重新設計陰極短路的位置及射極 厚度。 目的，本發明提供一種用以製造一可 根據本發明的上述 (3) (3)586210 制維持電流及提升突波學值電流承受能力之凹洞短路 點結構的製程，包含下列步驟：植入硼離子於-半導姊底 材上，並經擴散以形成一基底層；形成一具射極區圖；之 矛-光阻層於該基底層上’用以定義一射極區的位置… 積射極材料於該射極區的位置上，並經擴散形成 再移除該第-光阻層，上述射極材料可以為鱗；形成一且 光罩圖罘一光阻層於该射極表面上，用以定義出該凹 洞短路點的位置；以及姓刻該第二光阻層的表面以形成該 凹洞短路點後，再去除該第二光阻層。 此外，本發明提供一種半導體結‘，包含一基極〜 射極位於該基極層之h其中，少—： 側邊具有-凹洞。根據本發明的—實施例，若該凹洞的深 度不大相至少—射極的厚度’則可以控〜倘… 大於該至少—射極的厚度，則iH將趨於飽和 取終成為一定值。 以下將詳細說明本發明的一個較佳實施例 明還可以廣泛地實施在其侦沾余、Α / 尽發 受所述實施例所限定，其範；']中。本發明的範圍不 其範圍以後附的專利範圍 本發明提供-種用以形成可控制維持電流及提 值電流承受能力之凹洞短路點結構的方法，其包本下列峰 驟：植入爛離子於一半導體底材上，並經擴散以；成其 厂“广一具射極區圖案之第-光阻層於該基底斧/ 以疋義一射極區位置，沉積射極材料於該射極區的位置 (4) (4) 上， 具光 該凹 成該 圖 構的 1所 的流 半長 例， 徑L 所示 從 因此 持電 的蚀 最大 參 導體 述， 度與 洞短 基極 陰極586210 玫 Rose, description of the invention (the description of the invention should state: the technical field to which the invention belongs, the prior art, the content, the embodiments and the simple description of the drawings) TECHNICAL FIELD The present invention relates to dry etching and wet etching processes of semiconductors, especially Regarding a semiconductor process and structure for controlling the sustaining current and improving the surge current withstand capability, for example, it is suitable for unidirectional and bidirectional thyristors, especially for the Silicon Diode for Alternating Current (SiDAC), and the AC switching transistor (Triode AC Switching, Triac) and (BBD, Break over Diode) and other components. In the prior art, general semiconductor structures repeatedly use processes such as deposition, etching, diffusion, and implantation, resulting in different electrical properties between the wire layers to control the current to achieve the purpose of the semiconductor element. Figure 1 shows a common semiconductor device structure. The holding current IH is the minimum current when the gate fluid can be maintained in the forward conducting mode. Below this value, the sluice fluid will switch to forward blocking mode. IH can be calculated from the following equations mentioned in pages 263 to 279 of the book "Power Semiconductor Devices" by B.JAYANT BALIGA: 4 = (2. '. Fill (1- ~ on.4 Figure 1 shows a conventional semiconductor structure that uses a cathode short structure 13 to form a sustain current I η 0 where Ls is the length of the path of the base current to the cathode short 13 (cathode short) 'and Ls = (Li + L2), Li is half the length of the emitter, and L2 is the thickness of the emitter. Therefore, it can be known from the above formula that the large -6-⑺ of the path length Ls is inversely proportional to the size of Ih. In addition, since the base The doping concentration of the electrode will affect the sheet resister coefficient of the base, that is, the higher the doping concentration of the base, the lower the sheet resistivity, and because the sheet resistivity of the base decreases, it will flow through the base. The sustain current IH of the electrode increases. From the above, it can be seen that the doping concentration of the base electrode is positively correlated with the sustain current IH. That is, the higher the boron ion concentration of the base electrode, the larger the sustain current IH. However, With the increase of the base boron ion concentration, α npn will decrease, and The speed of switching from ard block to forward conduct becomes slower, or the speed of switching from forward conduct to forward blck becomes slower, so it will cause the reverse A-wave peak current ipp (reverse surge peak current) to decrease. The surge performance of the surge peak current caused by the surge is reduced. Inventing the traditional cathod short structure (cathode short) structure as described above 1 3, if you want to reduce the base doping concentration to When improving the ability to withstand reverse surge peak current, the position of the cathode short circuit and the thickness of the emitter must be redesigned in order to change the magnitude of the sustaining current IH in order to increase the ability to withstand the reverse surge peak current. The inventor uses a cavity short-circuit point (cavity structure instead of the above-mentioned cathode short-circuit structure 13), and controls the depth of the cavity: bean path point structure to control the magnitude of the sustaining current Ih. Therefore, the base boron ion can be reduced by reducing the The concentration of impurities is used to increase the peak value of the reverse surge, and the surface is sharp, without the need to redesign the position of the cathode short circuit and the thickness of the emitter. The invention provides a process for manufacturing a cavity short-circuit point structure capable of maintaining the current according to the present invention (3) (3) 586210 and improving the surge current capacity, and includes the following steps: implanting boron ions in -On a semiconducting substrate and diffused to form a base layer; forming an emitter region map; spear-photoresist layer on the base layer 'to define the location of an emitter region ... The material is at the position of the emitter region, and the first photoresist layer is removed by diffusion formation. The above emitter material can be scales; a photoresist layer is formed on the surface of the emitter. It is used to define the position of the short circuit point of the cavity; and after the surface of the second photoresist layer is engraved to form the short circuit point of the cavity, the second photoresist layer is removed. In addition, the present invention provides a semiconductor junction ′, which includes a base electrode ~ the emitter electrode is located in the base layer h, and less—: the side has-recesses. According to the embodiment of the present invention, if the depth of the cavity is not large, at least the thickness of the emitter can be controlled. If ... is greater than the thickness of the at least emitter, iH will tend to be saturated and eventually become a certain value. value. In the following, a preferred embodiment of the present invention will be described in detail. It can also be widely implemented in its detection mode, A / is limited by the embodiment, and its scope; ']. The scope of the present invention is not within the scope of the appended patents. The present invention provides a method for forming a cavity short-circuit point structure capable of controlling the sustaining current and increasing the current carrying capacity. On a semiconductor substrate and diffused to form a first photoresist layer with a pattern of an emitter region on the semiconductor substrate and depositing an emitter material on the emitter At the position (4) (4) of the zone, there is a half-length example of the current flowing in the recess of the pattern, and the diameter L is shown from the maximum parameter of the eclipse thus holding the electric current.
^的傳統的陰極短路結構丨3。如前所述， 動路徑長度…一中，Ll等於射：：::H 並經擴散形成一射極後再移除該第一光阻層，形成一 罩圖案之第二光阻層於該射極區的表面上，以定義出 洞短路點的位置，以及蝕刻該第二光阻層的表面以形 凹洞短路點後，再去除該第二光阻層。 2為根據本發明上述方法所完成之具有凹洞短路點結 半導體裝置，其中，本發明使用凹洞短路點2丨取代圖 度，L2等於射極20的厚度）。根據本發明的—個實施 本發明的凹洞短路點21係以㈣製程所形成，因此路 2會明顯縮短’因而導致Ih的流動路徑 的傳統陰極短路結構13為短。 車又於圖^ The traditional cathode short structure 丨 3. As mentioned earlier, in the moving path length ..., L1 is equal to the emission :::: H, and after diffusion forms an emitter, the first photoresist layer is removed to form a second photoresist layer in a mask pattern. On the surface of the emitter region, the position of the short circuit point of the hole is defined, and the surface of the second photoresist layer is etched to form the short circuit point of the cavity, and then the second photoresist layer is removed. 2 is a semiconductor device with a recessed short-circuit point junction completed according to the above method of the present invention, wherein the present invention uses a recessed short-circuit point 2 丨 instead of a pattern, and L2 is equal to the thickness of the emitter electrode 20). According to an implementation of the present invention, the cavity short-circuit point 21 of the present invention is formed by a sintering process, so that the path 2 will be significantly shortened ', and the conventional cathode short-circuit structure 13 that causes the flow path of Ih is short. Car and map
前述式子：得知，維持電流lH與路徑Ls成反比關係， ’本發明藉由控制凹洞短路點21的深度，可 流心尤其，當路捏“Ο時（亦即，凹洞短料ZThe foregoing formula: It is learned that the sustaining current lH is inversely proportional to the path Ls. 'The present invention can be eccentric by controlling the depth of the short-circuit point 21 of the cavity. Z
::深度達到射極2〇的厚度），路徑“I 的維持電流Ih。 巧不本發明的具有凹洞短路點結構 裝置的維持電& lH與基極掺雜濃度的關係。如 維持電流ιΗ與基極硼摻雜濃度成正 逆向突波……反比關係1此，= 路點結構可以提供較大的維持 ：： 删摻雜濃度。圖3中“線3“g 4lH而不會 短路結構的維持電;的;=示如圖1所 评电成Ιη變化曲線，曲線32顯示 (5) 586210:: Depth reaches the thickness of the emitter 20), the sustain current Ih of the path "I. It is a coincidence between the sustain current of the device with a cavity short-circuit point structure of the present invention and the base doping concentration. For example, the sustain current ιΗ is positively and negatively surged with the base boron doping concentration ... inversely proportional relationship 1 this, = waypoint structure can provide greater maintenance :: delete doping concentration. "line 3" g 4lH without short-circuit structure in Figure 3 The sustaining power of; = is shown as the change curve of the power as shown in Figure 1, curve 32 shows (5) 586210
明之凹洞短路點結構的維 清楚了解 .— ^ η ’交化曲線。由圖3可以 …上的基極领摻雜濃度情況下本發明之凹洞 =結構相較於傳統的陰極短路結構，，著較高的維持 雜 因Α在本發明中’使用較低的基極硼離子的摻 二辰户 :便可得到與傳統陰極短路結構相同的最小基本維 :::u(H-min)，意即維持了原有的電“強度(即具有相 冋的Ih縱軸大小）。 '、而由圖3的曲線3 3得知，基極蝴離子的摻雜濃度越 小則逆向突波峰值電流承受能力將增加1即藉由降低基 極棚掺雜濃度而維持原有的維持電流&大小時，將導致對 突波有著較高的承受能力。 圖4A至圖4G說明製造本發明之具有凹洞短路點結構2 1 的半導體裝置的方法。如圖4A所示，首先，在電性為Ν· 勺底材40表面上，進行離子植入製程，例如於此實施例中 使用刪離子，並在例如1150_140(rc下進行大約1〇到8〇 小時的擴散製程（實際的擴散時間依元件規格需求而定）， 以形成電性為P的基極層4 1。然後在基極層4 1上形成厚 度例如，至少為5000A的氧化層42，以避免其他離子的沉 積0 其次，參考圖4B，形成光阻層43後，再以光罩曝光而 留下所需圖案於氧化層42上’然後進行蚀刻，以形成射極 區（emitter area)如圖4B及圖4C所示。接著然後進行預先 沉積磷步驟（phosphorous pre-deposition process)而形成磷沉積 層4 4於射極區上，以取代傳統的磷離子植入製程，如此可The dimension of the structure of the short-circuit point of Mingzhi's cavity is clearly understood. — ^ Η ′ cross curve. As can be seen from FIG. 3, in the case of the doping concentration of the base collar, the cavity = structure of the present invention has a higher maintenance factor compared to the conventional cathode short-circuit structure A. In the present invention, 'a lower base is used. With the addition of polar boron ions, you can get the same minimum basic dimension as the traditional cathode short-circuit structure: :: u (H-min), which means that the original electrical "strength" Axis size). 'From the curve 33 in Figure 3, the smaller the dopant concentration of the base butterfly ions, the higher the reverse surge peak current carrying capacity will be increased by 1, that is, maintained by reducing the doping concentration of the base shed. The original sustaining current & size will result in a higher ability to withstand surges. Figures 4A to 4G illustrate a method of manufacturing a semiconductor device with a recessed short-circuit point structure 21 according to the present invention. As shown in Figure 4A As shown, firstly, an ion implantation process is performed on the surface of the substrate 40 having an electrical conductivity of N · spoon. For example, in this embodiment, ion implantation is used, and diffusion is performed at, for example, 1150-140 (rc for about 10 to 80 hours) Process (the actual diffusion time depends on the component specifications) The base layer 41 having a property of P. Then, an oxide layer 42 having a thickness of, for example, at least 5000 A is formed on the base layer 41 to avoid the deposition of other ions. Next, referring to FIG. 4B, after the photoresist layer 43 is formed, Then, it is exposed with a photomask to leave a desired pattern on the oxide layer 42 and then etched to form an emitter area as shown in FIG. 4B and FIG. 4C. Then, a phosphorous pre-deposition step is performed. deposition process) to form a phosphorus deposition layer 44 on the emitter region to replace the traditional phosphorus ion implantation process.
-10 - (6) (6)586210 節省磷離子植入設備所需的支出。最後，移除光阻層W而 形成如圖4D所示之結構。 如圖4E所示，於1000到14〇(rc下進行大約i小時的擴 散製程後，磷沉積層44會向下擴散形成電性為n+的射極 46。圖4F顯示，具圖案的光阻層45覆蓋於射極46及氧化 層42的表面，以定義出凹洞短路點位置。最後進行银刻並 去除光阻層45後，形成本發明之凹洞短路點結 圖4G所示。 如 以上所述僅為本發明之較佳實施例而已，並非用以限 發明之申請專利範圍；熟習本項技藝之人士可在下述之申尹 I巳圍所揭示之本發明精神 ^ 研竹卜進仃各種寺效改變或修 圖式簡單說明 圖1顯示傳統的陰極短路結構。 圖2顯示本發明之凹洞短路點結構。 Γ用以說明維持電流與基極硼離子接雜濃度的關係。 步驟。 1#主要部 13 陰極短路結構 20 射極 21 凹洞短路點 31 曲線陰極短路結構下 32 曲線凹洞短路點結構 線 586210 ⑺ 33 曲線逆向突波峰值電流I 40 底材 41 基極層 42 氧化層 43 光阻層 44 沉積層 45 光阻層 46 射極 變化曲線-10-(6) (6) 586210 Save the expenses required for phosphorus ion implantation equipment. Finally, the photoresist layer W is removed to form a structure as shown in FIG. 4D. As shown in FIG. 4E, after a diffusion process of about 1 hour at 1000 to 140 ° C, the phosphorus deposition layer 44 diffuses downward to form an emitter 46 having an electrical conductivity of n +. FIG. 4F shows a patterned photoresist The layer 45 covers the surface of the emitter 46 and the oxidized layer 42 to define the position of the short-circuit point of the cavity. Finally, the silver short-cut and the photoresist layer 45 are removed to form the short-circuit point of the cavity of the present invention as shown in FIG. 4G. The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of patent application for the invention; those skilled in the art can apply the spirit of the present invention disclosed in the following application:仃 A brief description of various temple effect changes or revisions. Figure 1 shows the traditional cathode short-circuit structure. Figure 2 shows the cavity short-circuit point structure of the present invention. Γ is used to explain the relationship between the maintenance current and the base boron ion doping concentration. Steps 1 # Main part 13 Cathodic short-circuit structure 20 Emitter 21 Cavity short-circuit point 31 Curved cathodic short-circuit structure 32 Curved cavity short-circuit point structure line 586210 ⑺ 33 Curve reverse surge peak current I 40 Substrate 41 Base layer 42 Oxidation Layer 43 Barrier layer 44 is a deposited layer 45 of photoresist layer 46 emitter curve
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