TW582672U - Negative self-bias circuit for FET mixers - Google Patents

Negative self-bias circuit for FET mixers

Info

Publication number
TW582672U
TW582672U TW091201486U TW91201486U TW582672U TW 582672 U TW582672 U TW 582672U TW 091201486 U TW091201486 U TW 091201486U TW 91201486 U TW91201486 U TW 91201486U TW 582672 U TW582672 U TW 582672U
Authority
TW
Taiwan
Prior art keywords
bias circuit
negative self
fet mixers
mixers
fet
Prior art date
Application number
TW091201486U
Other languages
English (en)
Inventor
Yong-Hee Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of TW582672U publication Critical patent/TW582672U/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/12—Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes
    • H03D7/125—Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes with field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Superheterodyne Receivers (AREA)
  • Networks Using Active Elements (AREA)
TW091201486U 1997-09-30 1998-10-26 Negative self-bias circuit for FET mixers TW582672U (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/941,476 US6163689A (en) 1997-09-30 1997-09-30 Negative self-bias circuit for FET mixers

Publications (1)

Publication Number Publication Date
TW582672U true TW582672U (en) 2004-04-01

Family

ID=25476538

Family Applications (1)

Application Number Title Priority Date Filing Date
TW091201486U TW582672U (en) 1997-09-30 1998-10-26 Negative self-bias circuit for FET mixers

Country Status (4)

Country Link
US (1) US6163689A (zh)
JP (1) JP4021548B2 (zh)
KR (1) KR100262455B1 (zh)
TW (1) TW582672U (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4527469B2 (ja) * 2004-08-20 2010-08-18 三菱電機株式会社 ダイオードミキサ
DE102010028987A1 (de) 2010-05-14 2011-11-17 Johann Wolfgang Goethe-Universität Frankfurt am Main Subharmonischer Mischer

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58127741U (ja) * 1982-02-22 1983-08-30 日本電気株式会社 受信機
DE69220102T2 (de) * 1991-02-19 1997-09-25 Nippon Electric Co Funkrufempfänger
US5606738A (en) * 1994-02-24 1997-02-25 Nippon Telegraph And Telephone Corp. Frequency conversion circuit with linear feedback
US5799248A (en) * 1995-12-20 1998-08-25 Watkins-Johnson Company Quasi-double balanced passive reflection FET mixer

Also Published As

Publication number Publication date
KR100262455B1 (ko) 2000-08-01
KR19990029111A (ko) 1999-04-26
JPH11163637A (ja) 1999-06-18
US6163689A (en) 2000-12-19
JP4021548B2 (ja) 2007-12-12

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Legal Events

Date Code Title Description
MK4K Expiration of patent term of a granted utility model