TW571500B - Distributed power system - Google Patents
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- TW571500B TW571500B TW91113102A TW91113102A TW571500B TW 571500 B TW571500 B TW 571500B TW 91113102 A TW91113102 A TW 91113102A TW 91113102 A TW91113102 A TW 91113102A TW 571500 B TW571500 B TW 571500B
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Description
571500 五、發明說明(1) 本發明係一種分布式電源系統,尤指一種用於有保持 時間要求之分布式電源系統。/或、用於正常輸入直流範圍較 窄,而又要求其輸出電壓可在輸入電壓偶爾短時間跌落期 間保持不變之電源變換器上。 請參閱第一圖,係一般分布式電源系統之架構圖,其 係由功率因數校正(Power Factor Correction,簡稱PFC )變換器1 a 、前端(Front End,FE)直流變換器2 a 及負載端變換器3 a連接組成,其中功率因數校正變換器 1 a係將交流輸入電壓轉換成高壓直流電壓(一般是4 0 0 V ),並實現輸入端功率因數校正;前端直流變換器2 a係將前述之高壓直流電壓轉換成直流電壓(一般為4 8 或1 2 V ),並將該直流電壓送至負載端變換器3 a ,以 轉換成對應負載所需要的電壓; 前述之前端直流變換器2 a於設計上,係在正常情況 下,工作在較小的占空比,留有足夠的裕量,而使其在保 持時間内,如2 0毫秒,當該功率因數校正變換器1 a之 儲能電容放電,其輸出電壓由正常值4 0 0V下降至3 0 〇V期間,由於該前端直流變換器2 a工作仍在調節範圍 之内,故能保持輸出電壓不變。 惟,該電源系統在正常工作狀態下,其前端直流變換 器2 a之占空比較小,相對地效率、功率密度均較低;功 率因數校正變換器1 a之儲能電容能量利用率低。 或有一如同上述之系統架構圖,其中前端直流變換器 2 a 係採用不對稱半橋(Asymmetric Half Bridge,A Η571500 V. Description of the invention (1) The present invention is a distributed power system, especially a distributed power system with a hold time requirement. It is used for power converters with a narrow normal input DC range and requiring its output voltage to remain constant during occasional short-term drops in the input voltage. Please refer to the first figure, which is a structural diagram of a general distributed power system, which is composed of a Power Factor Correction (PFC) converter 1 a, a Front End (FE) DC converter 2 a, and a load terminal. Converter 3 a is connected, where power factor correction converter 1 a converts AC input voltage to high-voltage DC voltage (generally 400 V) and implements power factor correction at the input end; front-end DC converter 2 a The aforementioned high-voltage DC voltage is converted into a DC voltage (generally 4 8 or 12 V), and the DC voltage is sent to the load-side converter 3 a to be converted into the voltage required by the corresponding load; the aforementioned front-end DC converter 2 a is designed, under normal circumstances, works at a small duty cycle, leaving sufficient margin to keep it within the hold time, such as 20 milliseconds, when the power factor correction converter 1 a During the discharge of the energy storage capacitor, its output voltage drops from the normal value of 400V to 300V. Since the front-end DC converter 2a is still within the adjustment range, the output voltage can be kept unchanged. However, under normal operating conditions of the power supply system, the duty ratio of the front-end DC converter 2 a is small, and the relative efficiency and power density are low; the energy utilization efficiency of the energy storage capacitor of the power factor correction converter 1 a is low. Or there is a system architecture diagram as above, in which the front-end DC converter 2 a uses an asymmetric half bridge (A Η
571500 五、發明說明(2) B )電路拓撲,其變壓器採用不對稱繞組,如第二圖,其 在正常工作狀態下,可提高該前.端直流變換器2 a之占空 比,且在功率因數校正變換器1 a輸出之電壓由正常值4 0 0 V下降至3 0 0 V期間,前端直流變換器2 a輸出電 壓不變; 對於A Η B變換器,理論上其占空比之變化範圍在〇 〜0 · 5 ,占空比愈小則變換器上、下半部對稱工作狀況 愈”不對稱”,元件應力越不平衡、效率越低,因此,在理 想的工作狀態下,該占空比應盡量接近0 · 5 。 該A Η Β變換器在輸出電壓穩定不變的情況,其輸入 電壓越高,則占空比越小,因此,若不加任何處理,為了 實現保持時間,在該功率因數校正變換器1 a之儲能電容 放電、輸出電壓由正常值400V下降至300V期間, 它必須工作在調節範圍内,始能保持輸出電壓不變。亦即 ,該AHB變換器在輸入電壓3 0 0V時占空比最大,如 此亦造成其在正常工作時(輸入電壓4 0 0 V )占空比很 小,該A Η B變換器工作效率差。 惟,該電源系統之A Η Β變換器之輸出紋波增大、副 邊互補支路功率分佈更加不均衡;功率因數校正變換器1 a之儲能電容能量利用率低。 另有一如同上述之系統架構圖,其中前端直流變換器 2 a採用AHB變換器,其變壓器採用可變匝比(Range Winding),如第三圖,即在輸入電壓由正常值4〇0 V 下降至3 0 0 V期間用開關改變變壓器變匝比,以提高在571500 V. Description of the invention (2) B) Circuit topology, the transformer uses asymmetric windings, as shown in the second figure, which can increase the duty cycle of the front-end DC converter 2 a under normal operating conditions, and During the period when the output voltage of the power factor correction converter 1 a drops from a normal value of 400 V to 300 V, the output voltage of the front-end DC converter 2 a remains unchanged. For A A B converters, theoretically, the duty cycle The variation range is 0 ~ 0 · 5. The smaller the duty ratio, the more "asymmetric" the symmetrical working conditions of the upper and lower half of the converter, the more unbalanced the component stress and the lower the efficiency. Therefore, under ideal working conditions, The duty cycle should be as close as possible to 0 · 5. In the case where the output voltage of the A Β B converter is stable, the higher the input voltage is, the smaller the duty cycle is. Therefore, if no processing is performed, in order to achieve the hold time, the converter 1 a is corrected at the power factor. During the period when the energy storage capacitor is discharged and the output voltage drops from the normal value of 400V to 300V, it must work within the adjustment range to keep the output voltage constant. That is, the duty cycle of the AHB converter is the largest when the input voltage is 300V. This also results in a small duty cycle during normal operation (input voltage of 400V), and the A Η B converter has poor working efficiency. . However, the output ripple of the A Η B converter of the power supply system is increased, and the power distribution of the complementary legs of the secondary side is more unbalanced; the energy utilization efficiency of the energy storage capacitor of the power factor correction converter 1 a is low. There is another system architecture diagram as above, in which the front-end DC converter 2 a uses an AHB converter, and its transformer uses a variable winding ratio (Range Winding), as shown in the third figure, where the input voltage drops from a normal value of 400 V Change the transformer turns ratio with a switch from 300 V to 300 V
571500 五、發明說明(3) 正常工作狀態下前端直流變換器2 a之占空比; 惟,該電源系統在保持時間、段,該A Η B變換器的工 作狀態時有突變,輸出電壓易有波動;功率因數校正變換 器1 a之儲能電容能量利用率低。 緣是,本發明人乃特潛心的研究並配合學理運用,以 設計出一能夠充分利用功率因數校正變換器之儲能電容的 容量,而實現長的保持時間,並且減小前端直流變換器的 輸入電壓變化範圍,從而提高其效率和功率密度之分布式 電源系統。 為達成此一目的,本發明之具體作法係在功率因數校 正變換器與前,端直流變換器之間連接一後備升壓(Β ο 〇 t s )變換器,並與一二極體並聯,該後備升壓變換器係由一 升壓變壓器拓撲、一控制器及一滯環比較器連接組成,由 於該後備升壓變換器僅在保持時間段工作,在這段時間, 功率因數校正變換器之輸出電壓若逐漸下降,該後備升壓 變換器即會將此電壓提升並穩定在設定輸出電壓值,供給 前端直流變換器轉換成直流電壓,以此實現該前端直流變 換器之輸入電壓變化範圍很小,而該功率因數校正變換器 之儲能電容能量則能充分利用。 本發明之另一目的,在於提供一可提高效率和功率密 度之分布式電源系統,由於該後備升壓變換器僅在保持時 間段工作,工作時間相當短,因此可設計在高頻率高功率 密度,體積很小,同時交流輸入電壓在正常時不工作(前 端直流變換器之能量由二極體非由後備升壓變換器傳遞時571500 V. Description of the invention (3) Duty cycle of the front-end DC converter 2 a under normal operating conditions; However, the power system has a sudden change in the working state of the A Η B converter during the hold time and period, and the output voltage is easy. There is fluctuation; the energy utilization efficiency of the energy storage capacitor of the power factor correction converter 1 a is low. The reason is that the inventor's intensive research and scientific application have been used to design a capacity that can fully utilize the energy storage capacitor of the power factor correction converter to achieve a long hold time and reduce the front-end DC converter. A distributed power supply system with an input voltage range that improves its efficiency and power density. To achieve this, a specific method of the present invention is to connect a backup boost (B ο 〇ts) converter between the power factor correction converter and the front-end DC converter, and in parallel with a diode, the The backup boost converter is composed of a boost transformer topology, a controller, and a hysteresis comparator connection. Since the backup boost converter works only during the hold time, during this time, the power factor correction converter If the output voltage gradually decreases, the backup boost converter will boost this voltage and stabilize it at the set output voltage value, and then supply it to the front-end DC converter to convert it into a DC voltage. Small, and the energy storage capacitor energy of the power factor correction converter can be fully utilized. Another object of the present invention is to provide a distributed power supply system capable of improving efficiency and power density. Since the backup boost converter operates only in the holding time period, the working time is relatively short, so it can be designed at high frequency and high power density. , The volume is small, and the AC input voltage does not work under normal conditions (when the energy of the front-end DC converter is transmitted by the diode not by the backup boost converter)
第6頁 571500 五、發明說明(4) ),因而不消耗功率。 為了使 貴審查委員能更進一步了解本發明之特徵及 技術内容,請參閱以下有關本發明之詳細說明與附圖,然 而所附圖示僅供參考與說明用,並非用來對本發明加以限 制者。 請參閱第四圖,本發明係一能夠充分利用功率因數校 正變換器之儲能電容的容量,而實現長的保持時間,並且 減小前端直流變換器的輸入電壓變化範圍,從而提高其效 率和功率密度之分布式電源系統,該分布式電源系統係在 功率因數校正變換器1及前端直流變換器2之間連接一後 備升壓變換器4 ,並與一二極體5相並聯,該前端直流變 換器2可為A Η B或其他電路拓撲;後備升壓變換器4設 定輸出電壓V 2set略低於功率因數校正變換器1之正常輸 出電壓Vlset。 該後備升壓變換器4包括一升壓變換器拓撲4 1 、一 一滯環比較器4 2及一控制器4 3 ,其中: 升壓變換器拓撲4 1係由開關元件Q 2 、電感L 2 、 二極體D 1及電容C 2連接組成,該開關元件在本創作實 施例中係一金氧半導體,其源極端接地,汲極端與電感L 2 —端、二極體D 1 —端相接,電感L 2另端與功率因數 校正變換器1之輸出端連接,二極體D 1另端與電容C 2 一端、前端直流變換器2之輸入端連接,電容C 2另端接 地。 滯環比較器4 2連接於功率因數校正變換器1之輸出Page 6 571500 V. Description of the invention (4)), so it does not consume power. In order to allow your reviewers to further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the accompanying drawings are for reference and explanation only, and are not intended to limit the present invention. . Please refer to the fourth figure. The present invention is one that can make full use of the capacity of the energy storage capacitor of the power factor correction converter to achieve a long holding time and reduce the input voltage range of the front-end DC converter, thereby improving its efficiency and A distributed power system of power density, which is a backup boost converter 4 connected between a power factor correction converter 1 and a front-end DC converter 2 and connected in parallel with a diode 5, the front end The DC converter 2 can be A Η B or other circuit topology; the backup boost converter 4 sets the output voltage V 2set slightly lower than the normal output voltage Vlset of the power factor correction converter 1. The backup boost converter 4 includes a boost converter topology 4 1, a hysteresis comparator 4 2 and a controller 4 3, wherein: the boost converter topology 4 1 is composed of a switching element Q 2 and an inductor L 2. Diode D 1 and capacitor C 2 are connected. The switching element is a metal-oxide semiconductor in this creative embodiment. The source terminal is grounded, the drain terminal is connected to the inductor L 2 -terminal, and the diode D 1 -terminal. When connected, the other end of the inductor L 2 is connected to the output end of the power factor correction converter 1, the other end of the diode D 1 is connected to one end of the capacitor C 2 and the input end of the front-end DC converter 2, and the other end of the capacitor C 2 is grounded. Hysteresis comparator 4 2 is connected to the output of power factor correction converter 1
第7頁 571500 五、發明說明(5) 端,係由比較器、電阻連接及參考電壓V r e f組成,請參 閱第六圖,其作用有二,並參閱第五圖,在功率因數校正 變換器1的起動過程中,當該功率因數校正變換器1之輸 出電壓V 1尚未升至V high時(V high設定為介於V 2set 和V 1 s e t之間的任意值),禁止該後備升壓變換器4工’ 作;在該功率因數校正變換器1之輸出電壓V 1降低至V 1 〇 w之後,禁止該後備升壓變換器4工作,以避免後備升 壓變換器4中的元件工作電流過大。 控制器4 3連接於滯環比較器4 2之輸出端與開關元 件Q 2之閘極端,該控制器4 3用以控制開關Q 2元件之占 空比,當V V 2 set時,該後備升壓變換器4之輸出穩 定在V 2set值,而當V 1> V 2set時,該後備升壓變換器 4不工作,二極體5導通、傳遞功率。 當交流電壓正常輸入時,即功率因數校正變換器1之 輸出正常,該後備升壓變換器4之占空比自然為零、不工 作,二極體5導通,此時,該前端直流變換器2之輸入電 壓為V 1 set。 當交流電壓斷電或大幅跌落時,功率因數校正變換器 1之儲能電容放電、輸出電壓下降,當降低至V 2set時, 該後備升壓變換器4之占空比自然由零開始上升,將其輸 出電壓穩定在V 2 s e t,二極體5關斷,前端直流變換器2 之輸出電壓保持不變。 當功率因數校正變換器1之輸出電壓繼續降低至一定 值V low(如為V lse t之一半)時,該後備升壓變換器4Page 7 571500 V. Description of the invention (5) The terminal is composed of a comparator, a resistor connection, and a reference voltage V ref. Please refer to the sixth diagram, which has two functions, and refer to the fifth diagram. In the power factor correction converter During the start of 1, when the output voltage V 1 of the power factor correction converter 1 has not risen to V high (V high is set to any value between V 2set and V 1 set), the backup boost is prohibited The converter 4 works; after the output voltage V 1 of the power factor correction converter 1 is reduced to V 100 watts, the backup boost converter 4 is prohibited from operating to prevent the components in the backup boost converter 4 from operating. Overcurrent. The controller 4 3 is connected to the output terminal of the hysteresis comparator 42 and the gate terminal of the switching element Q 2. The controller 4 3 is used to control the duty cycle of the switching Q 2 element. When VV 2 set, the backup is increased. The output of the voltage transformer 4 is stabilized at the value of V 2set, and when V 1 > V 2set, the backup boost converter 4 does not work, and the diode 5 is turned on and transfers power. When the AC voltage is normally input, that is, the output of the power factor correction converter 1 is normal, the duty cycle of the backup boost converter 4 is naturally zero, does not work, and the diode 5 is turned on. At this time, the front-end DC converter The input voltage of 2 is V 1 set. When the AC voltage is powered off or dropped sharply, the storage capacitor of the power factor correction converter 1 discharges and the output voltage drops. When it drops to V 2set, the duty cycle of the backup boost converter 4 naturally rises from zero. The output voltage is stabilized at V 2 set, the diode 5 is turned off, and the output voltage of the front-end DC converter 2 remains unchanged. When the output voltage of the power factor correction converter 1 continues to decrease to a certain value V low (for example, half of V lse t), the backup boost converter 4
571500 五、發明說明(6) 之開關元件Q 2被滯環比較器4 2關斷,前端直流變換器 2之輸入和輸出電壓迅速下降至、零。 若交流電壓斷電時間不大設計的保持時間,則會隨著 交流電壓的恢復,功率因數校正變換器1之輸出電壓回升 ,後備升壓變換器4之占空比隨之減小,當功率因數校正 變換器1之輸出電壓高於V 2set,後備升壓變換器4之占 空比自然減至零、二極體5導通,恢復正常工作狀態,而 此過程中該前端直流變換器2之輸出電壓穩定不變。 復參閱第六圖,係本發明之實施例圖,其中功率因數 校正變換器1中的儲能電容為4 4 0微法拉、正常輸出電 壓V 1 s e t為4 0 0 V ;前端直流變換器2採用A Η B變 換器、後備升壓變換器4之開關頻率為3 0 0 Κ Η ζ 、電 感L 2磁芯為RM6 、電容C 2為1 0微法拉;控制器為 U C C 3 8 1 3 ,量測之波形如第七圖,由該波形圖可知 ,其保持時間為2 8 · 8毫秒,在保持時間内,功率因數 校正變換器1之輸出電壓V 1由40 0V降至2 2 0V (V low)、而A Η B變換器2之輸入電壓V 2變化值僅由 4 0 0又降低至37〇又(又2361:)。 據此,透過本發明實現保持時間之設計,能達到下述 功效· 1 ·能夠充分利用功率因數校正變換器的儲能電容的 能量,實現長的保持時間或減小該儲能電容的容量。 2 ·提高變換器在正常工作狀態下的效率,從而提高 功率密度。571500 V. Description of the invention (6) The switching element Q 2 is turned off by the hysteresis comparator 4 2, and the input and output voltages of the front-end DC converter 2 rapidly drop to zero. If the AC voltage power-off time is not long enough for the designed holding time, the output voltage of the power factor correction converter 1 will rise as the AC voltage recovers, and the duty cycle of the backup boost converter 4 will decrease accordingly. The output voltage of the factor correction converter 1 is higher than V 2set, the duty cycle of the backup boost converter 4 is naturally reduced to zero, the diode 5 is turned on, and the normal working state is restored. The output voltage is stable. Referring again to the sixth figure, it is a diagram of an embodiment of the present invention, wherein the energy storage capacitor in the power factor correction converter 1 is 4 40 microfarads, and the normal output voltage V 1 set is 4 0 V; the front-end DC converter 2 Using A Η B converter, backup boost converter 4 with a switching frequency of 3 0 0 κ Η ζ, inductor L 2 magnetic core is RM6, capacitor C 2 is 10 microfarads; controller is UCC 3 8 1 3, The measured waveform is shown in Figure 7. From this waveform, it can be seen that its hold time is 2 8 · 8 ms. During the hold time, the output voltage V 1 of the power factor correction converter 1 is reduced from 40 0V to 2 2 0V ( V low), and the change value of the input voltage V 2 of the A 变化 B converter 2 is reduced from only 4 0 to 37 0 (again, 2361 :). According to this, the design of the holding time through the present invention can achieve the following effects: 1. The energy of the energy storage capacitor of the power factor correction converter can be fully utilized to achieve a long holding time or reduce the capacity of the energy storage capacitor. 2 · Improve the efficiency of the converter under normal operating conditions, thereby increasing power density.
571500 五、發明說明(7) 3 ·對前端直流變換器的性能沒有不利影響。 4 ·通用於各種電路拓撲形、式的前端直流變換器。 綜上所述,透過本發明之電路設計,具有如下述諸多 特點: A ·能夠充分利用功率因數校正變換器的儲能電容的 能量,實現長的保持時間或減小該儲能電容的容量。 B ·使前端直流變換器工作在較大占空比,能夠降低 副邊整流器的電壓定額,提高效率和功率密度。 C ·後備升壓變換器工作時間短,因此可設計在高頻 率和高功率密度,體積很小,並且該變換器自然地投入和 退出工作,在此過程中,沒有任何的電壓或電流過衝。 是以,本發明完全符合專利申請之要件,具產業上利· 用性,故爰依專利法提出申請之,請詳查並准予本案,以 保障發明者之權益,若鈞局之貴審查委員有任何的稽疑 ,請不吝來函指示。 按,以上所述,僅為本發明最佳之具體實施例,惟本 發明之特徵並不侷限於此,任何熟悉該項技藝者在本發明 之領域内,可輕易思及之變化或修飾,皆可涵蓋在以下本 案之專利範圍。571500 V. Description of the invention (7) 3 There is no adverse effect on the performance of the front-end DC converter. 4 · Commonly used in front-end DC converters of various circuit topologies. In summary, the circuit design of the present invention has the following characteristics: A. The energy of the energy storage capacitor of the power factor correction converter can be fully utilized to achieve a long holding time or reduce the capacity of the energy storage capacitor. B · Make the front-end DC converter work at a larger duty cycle, which can reduce the voltage rating of the secondary rectifier and improve efficiency and power density. C · The backup boost converter has a short working time, so it can be designed at high frequency and high power density, with a small volume, and the converter is naturally put in and out of work. In the process, there is no voltage or current overshoot . Therefore, the present invention fully complies with the requirements for patent applications and has industrial applicability. Therefore, if you apply for the application in accordance with the Patent Law, please check and approve the case in detail to protect the rights of the inventor. If there is any suspicion, please follow the instructions. According to the above, it is only the best specific embodiment of the present invention, but the features of the present invention are not limited to this. Any person skilled in the art can easily think of changes or modifications in the field of the present invention. Both can be covered by the patent scope of this case.
第10頁 571500 圖式簡單說明 第一圖係傳統分佈式電源系統之架構圖。 第二圖係於第一圖之前端直流變換器採用不對稱半橋 電路拓撲之電路圖。 第三圖係於第一圖之前端直流變換器採用不對稱半橋 變換器之電路圖。 第四圖係本發明之架構圖。 第五圖係本發明滯環比較器之輸出入電壓之關係圖。 第六圖係本發明之實施例圖。 第七圖係本發明實施例於各點量測之波形圖。 圖號名稱說明571500 Brief description of the diagram The first diagram is the architecture diagram of a traditional distributed power system. The second diagram is a circuit diagram of an asymmetric half-bridge circuit topology in the front-end DC converter of the first diagram. The third diagram is a circuit diagram of an asymmetric half-bridge converter in the front-end DC converter of the first diagram. The fourth figure is a structural diagram of the present invention. The fifth diagram is a relationship diagram of the input and output voltages of the hysteresis comparator of the present invention. The sixth diagram is an embodiment diagram of the present invention. The seventh diagram is a waveform diagram measured at various points in the embodiment of the present invention. Drawing number name description
1 功率因數校正變換器 2 前端直流變換器 3 負載端變換器 4 後備升壓變換器 4 1 升壓變換器拓撲 4 2 滯環比較器 4 3 控制器 5 二極體 la 功率因數校正變換器 2 a 前端直流變換器1 Power factor correction converter 2 Front-end DC converter 3 Load-side converter 4 Backup boost converter 4 1 Boost converter topology 4 2 Hysteresis comparator 4 3 Controller 5 Diode la Power factor correction converter 2 a Front-end DC converter
3 a 負載端變換器3 a load-side converter
第11頁Page 11
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