TW569347B - Method for selectively removing metal compound dielectric layer with high dielectric constant - Google Patents

Abstract

A method for selectively removing a metal compound dielectric layer with a high dielectric constant comprises using an etching gas having a high selectivity to the metal compound dielectric layer to selectively removing the metal compound dielectric layer formed on the surface of a silicon material without damaging the silicon material layer. The etching gas includes a halogen-containing gas, or a mixture gas containing a halogen gas and an inert gas, or a mixture gas containing a halogen gas, an inert gas, and an oxidant gas.

Description

569347

[Field of the Invention] The present invention relates to an etching method, and particularly to the selective removal of a metal compound dielectric layer with a high dielectric constant. [Background of the Invention] Traditional semiconductor technology is based on As the metal oxide half metal oxlde semiconductor (M0s) transistor layer: the "element size is getting smaller and smaller, the dioxide layer = must be lowered to make the gate The same can be maintained between the electrode and the channel region. The reduction of the thickness of the oxygen cut layer in the valley H will cause a severe tunneling current (tunnelmg current). Even if the silicon oxide layer is free of defects and impurities, or at an ideal ratio (st〇ichi) 〇metry) difference, but when the thickness is less than 3 nanometers (nm), the oxide dream layer will still leak a lot ^. As long as there are a few angstrom values (A) changes in thickness, the channel current will be in several bits The number of the number changes. More complicated is that the quality of the silicon oxide layer is generally imperfect. 0 This causes another current transfer mechanism, which not only increases the leakage current and accelerates the failure of the gate oxide layer. Given the thin silicon oxide layer Turn into The problems caused by this are that some dielectric materials with high dielectric constant have been applied to the gate dielectric layer of transistors. These dielectric materials with high dielectric constant are some metal oxides, such as hafnium dioxide (Zr 〇2) or hafnium dioxide (Hf〇2), etc. The dielectric constant of this kind of material is about 20 ~ 25, about 5 ~ 6 times that of silicon dioxide. Therefore, this type of metal oxide dielectric material is used When used as a gate dielectric layer, if the thickness is 5 to 6 nanometers (nm) ', its equivalent oxide thickness (e (luivalent 〇xide

569347 V. Description of the invention (2) Thickness (EOT) is about 1.0 nm. In the fabrication of metal oxide gate dielectric layers of complementary metal oxide semiconductors (CMOS), the gate dielectric layers of the source / dead regions must be selectively removed in order to The subsequent metal silicide process is performed. However, the traditional method using a dry etching process to remove the metal oxide gate dielectric layer lacks sufficient selectivity to the Shixi substrate because it requires a large amount of physical relief or money deposits. The additional metal oxide dielectric layer cannot be removed smoothly with a wet finish. When a concentrated HF solution is used to etch the metal oxide dielectric layer, its etching is relatively low, and the uniformity after etching is quite poor, and the concentrated HF solution will etch the exposed isolation structure, and it will also cause a gate Undercuts of the metal oxide dielectric layer under the gate electrode serve as the gate dielectric layer. Therefore, methods to remove the metal oxide dielectric layer without harming other components need to be developed. [Objective and Summary of the Invention] In view of this, the object of the present invention is to provide a method for selectively removing a metal compound dielectric layer with a high dielectric constant. The etchant used has a metal compound dielectric layer pair. The silicon material layer has a good etching selection ratio and has a high remaining rate for the metal compound dielectric layer. The etching gas used for etching the metal compound dielectric layer of the present invention is a halogen-containing gas, and the applicable metal compound dielectric layer includes hafnium oxide (Hf〇) 'oxidation * (zr〇2), oxidized oxide (ul205), gas Oxidation errors, acid breaks, and acid breaks. The above-mentioned etching gas for etching the metal compound dielectric layer is halogen-containing

569347 V. Description of the invention (3) Gas and inert gas (i n e r t g a s). The etching gas used to etch the dielectric layer of the metal compound is a fluorine-containing tooth, an inert rolled body (iner t g a s), and an oxidant gas. The above-mentioned tooth-containing gas may be cf4, chf3, cM2, (: H3F,

Cl2, BC13, Br2, HF, HC1, broken, HI, NF3, sFe, or a mixture thereof. The above inert gas may be He, Ar, Xe, n2 or a mixture thereof. The aforementioned oxidant gas may be &, Co or a mixture thereof. ^ Invented and provided the method for selectively removing a gold compound dielectric layer with a high dielectric constant as described above in a process for manufacturing a transistor, the steps of which are as follows: i. Forming a metal compound dielectric layer on a semiconductor substrate; and In gold, chemical: a gate electrode is formed on the dielectric layer. Next, a light ion doping is performed on the semiconductor electrodes on the semiconductor electrodes. After that, at the gate gap wall. Continue to perform in the + conductor substrate that is not covered by the gate electrode and the interstellar wall—by the formation of a dopant ion dopant—to form a source / drain with a faded :: pole two LDD) structure. After that, the metal compound dielectric layer was dry-etched using the above-mentioned tooth-containing gas to remove the metal compound dielectric layer that is not covered by the gate electrode and the spacer. J = Out: "Surface" facilitates the formation of a metal silicide layer on the source / drain surface, thereby reducing the source / drain [Detailed description of the invention] Jshift Ϊ "high dielectric constant metal compound dielectric layer 'β, this The invention proposes a metal compound dielectric layer with high selectivity for silicon! Method, when selectively removing the exposed surface metal compound " electrical layer 'will not affect the immediately exposed material of the stone 夕 (for example: silicon

569347 V. Description of the invention (4) Substrate, shallow trench isolation structure, etc.). Next, the present invention will be described in detail with reference to the cross-sectional views of the substrates at different process stages shown in Figs. 1A to 1D. First, please refer to FIG. 1A. In this cross-sectional view of the substrate, the shallow trench isolation structure 105 has been formed in the semiconductor substrate 100 using known semiconductor manufacturing techniques. The semiconductor substrate 100 is usually made of single crystal silicon or other semiconductor materials, and can also be a silicon on-insulator structure (SOI structure). Shallow trench

The material of the structure m is usually oxygen cut (Si02) or nitrogen cut (after iH) to form a metal compound dielectric layer 101 with a high dielectric constant on the semiconductor substrate 100. The metal compound with a high dielectric constant The electrical layer 101 is a dielectric material containing a metal element, and suitable metal elements are hafnium (Hf), zirconium (Zr), and aluminum (A1). The dielectric material containing these metal elements is, for example, compounded with oxygen (〇). HfO2, Zr02, and alumina (ai205) can also be hafnium oxide combined with nitrogen (N) and oxygen (0), and nitrogen oxide, or Samarium silicate and hafnium silicate combined with lithium sulphate (S i 03). The dielectric constant of this metallized dielectric layer 101 is higher than that of the & polar oxide layer formed by the traditional thermal oxidation method. Dielectric constant. The dielectric constant of the metal compound dielectric layer 101 is approximately 10 to 40. The formation method is a chemical vapor deposition (CVD) method. In this embodiment, the metal compound dielectric layer 101 is As the gate dielectric layer of the transistor, its thickness is about ~ 20 angstroms. Then the metal compound dielectric layer A gate electrode stack is formed on 1 0 1

0503-8564TKf; TSMC2002-0405; Amy.ptd page 7 569347 V. Description of the invention (5) '-^ --- layer 104, the gate electrode stack layer 104 is, for example, a double-layered gate electrode stack. In this embodiment, the gate electrode stack layer 104 includes a first gate electrode layer 102 and a second gate electrode layer (capping layer) sequentially formed on the metal compound dielectric layer 101. 10), its formation method is a vapor deposition (CVD) method. Suitable materials for the first gate electrode layer 102 include titanium nitride (ηN), tungsten nitride (WN), and silicon germanium (SiGe), and suitable materials for the second gate electrode layer 103 include polycrystalline stone. (PoiysiHcon), SiGe, tungsten (W), and the like. 'The above-mentioned gate electrode stacking layer 104 may also be a daylight layer of other types. For example, the first gate layer 102 is a conductive material, and the second gate layer 102 is an insulating θ edge material. In the present invention, the type of the gate electrode stack layer 104 is not limited. Next, referring to FIG. 1B, a gate electrode 201 is formed on the metal compound dielectric layer 101, and a part of the surface 203 of the metal compound dielectric layer 100 is exposed. The formation of the gate electrode 201 generally includes etching the gate electrode stacking layer 104 using a mask layer having a gate pattern to define the gate electrode 201. After that, a spacer 002 is formed on the side wall of the gate electrode 201. Before forming the spacers 202, a light ion doping is further performed on the semiconductor substrate 100, and after the spacers 200 are formed, a dense ion doping is further performed on the semiconductor substrate 100 to form a lightly doped drain electrode. A source / drain 204 of a lightly doped drain structure (LDD structure). Next, referring to FIG. 1C, after forming the source / drain 204, in order to reduce the parasitic resistance of the source / drain 204 of the transistor element (sheet

569347 5. Description of the invention (6) resistance Rs and Rd. Therefore, a metal silicide layer must be formed on the surface of the source / drain 204. Therefore, before the metal silicide layer is formed on the surface of the source / drain 204, the metal compound dielectric layer ιo exposed on the surface 203 must be removed. The inventor's research found that dry plasma etching of the metal compound dielectric layer 10i using an etching gas containing a tooth element gas can effectively remove the exposed metal compound dielectric layer 101 without subsequent exposure. The semiconductor substrate 100 and the shallow trench isolation structure i 05 cause damage. Among the above etching gases, the halogen-containing gas may be a gas containing fluorine (F), for example, CF4, CHF3, CH2F2, CH3F, HF, NF3, or SF6. The tooth-containing gas can also be a gas containing Cl (C1), for example: ci2, BC13, or HC1. The autogen-containing gas may also be a gas containing bromine (), such as βΓ2, or HBr. In addition, the halogen-containing gas may be a gas containing iodine (I), such as HI. In addition, the above-mentioned various element-containing gases can also be arbitrarily mixed 'to be used as a process gas for the remaining metal compound dielectric layer 101. In addition, the etching gas includes an inert gas in addition to a halogen-containing gas, and the inert gas may be helium (He), argon (Ar), xenon (xe), nitrogen (&), or a mixture thereof. . In addition, the #etching gas may further include an oxidant gas, that is, the composition of the etching gas is a halogen-containing gas, an inert gas, and an oxidant gas. The oxidant gas may be oxygen (02), carbon monoxide (CO), or a mixture thereof. Next, referring to FIG. 1D, after removing the metal compound dielectric layer 101 on the surface of the source / drain 204, the metal silicide process is continued, so that

0503-8564THVf. TSMC2002-0405Amy.ptd Page 9 569347

V. Description of Invention (7)

A metal silicide layer 401 is formed on the L surface, and the material can be nickel silicide (NiSi), cobalt silicide (CoSi2), or the following special examples 1, 2, and 3 for etching the metal silicide. An example of the conditions is also listed, and the results of the etching of the polycrystalline silicon by the etching metal silicide are also listed. The metal silicide layer to be etched is hafnium oxide (Hf 02). I 倏 β: I 气体 gas composition is CF4 / CH2F2, flow rate is 40/80 (unit ·· standard cubic centimeter, sccm), pressure is 5 m Torr, transformer coupled plasma (TCP ) Has a power of 600 watts (W) and a bias voltage of 200 watts (W). Remaining results: (a) The lasting rate of oxidation to (Hf02) was 343A / min (Angstroms / minute), and the uniformity was 3.8%; (b) The remaining rate of the polycrystalline fragment was l55A / min, uniform The degree is 14 ° / 〇; (c) The etching selectivity ratio of the oxide to (Hf02) to the polycrystalline silicon is 2.2. Example 2 The metal silicide layer to be etched is hafnium oxide (Hf02). Etching conditions: The composition of the etching gas is CF4 / CHF2 / 02, the flow ratio is 30/60/10 (seem), the pressure is 5 m Torr, and the pressure-variable light plasma (Tcp)

0503-8564TWf: TSMC2002-0405: Amy.ptd Page 10 569347 V. Description of the invention (8) The power is 600 watts (W) and the bias voltage is 200 watts (W). Etching results: (a) the etching rate of hafnium oxide (Hf02) is 306A / min (Angstroms / minute), and the uniformity is 5.7%; (b) the remaining rate of polycrystalline stone is 98A / min, The uniformity is 14.7%; (c) The remaining selection ratio of hafnium oxide (H f 〇 2) to polycrystalline silicon is 3.1. Example 3 The metal silicide layer to be etched is hafnium oxide (jj f 〇 2). Remaining conditions ·· The composition of the etching gas vessel is CF4 / 02 / Ar, the flow rate is 5/200/100 (seem), the pressure is 20 m Torr, and the power of the transformer voltage plasma (TCP) is 600 watts ( W) with a bias of 100 watts (w). The remaining results: (a) The etching rate of oxidation to (Hf02) is 138A / min (Angstroms / minute) 'uniformity is 5.8%; (b) The etching rate of polycrystalline silicon is 80A / min, and the uniformity is 100 / 〇; (c) The etching selectivity of the polycrystalline silicon by oxidation to (H f 〇 2) is 丨 · 7. To sum up, the etchant for etching a metal compound dielectric layer provided by the present invention has three main composition formulas, the first is composed of a tooth-containing gas and the second is composed of a tooth-containing gas and Composed of inert gas, the third is composed of tooth element gas, inert gas and oxidant gas. The metal compound dielectric layer of this etchant has a good etching selection ratio to the silicon material layer, which can reach 2 or more, and the etchant has a good effect on the metal compound dielectric layer.

0503-8564TW; TSMC2002-0405: Amy.ptd Page 11 569347 5. Description of the invention (9) The touch rate is fast. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make changes and retouching without departing from the spirit and scope of the present invention. The scope of protection shall be determined by the scope of the patent application.

0503-8564TWf; TSMC2002-0405; Amy.ptd Page 12 569347 The diagram is briefly explained in order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible. The following exemplifies a preferred embodiment in conjunction with the accompanying drawings The detailed description is as follows: Figures 1A to 1D are cross-sectional views of the substrate at different stages of the process. [Symbol description] Semiconductor substrate ~ 100; metal compound dielectric layer ~ 101; first gate electrode layer ~ 102; second gate electrode layer ~ 103; gate electrode stack layer ~ 104; shallow trench isolation structure ~ 105 Gate electrode ~ 201; bulkhead ~ 202; exposed surface of metal compound dielectric layer ~ 203; source / drain ~ 204; metal silicide layer ~ 401.

0503-8564TWf; TSMC2002-0405; Amy.ptd page 13

Claims (1)

569347 VI. Method 1 of Patent Application for Selective Removal of Metal Compound Dielectric Layer with High Dielectric Constant Provide a metal compound dielectric layer with high dielectric constant on one surface; / q only on the metal oxide Forming a mask layer on the dielectric layer; and performing dry plasma etching on the metal compound dielectric layer using an etching gas containing a tooth gas. ^ 2. The method for selectively removing a metal compound dielectric layer having a high dielectric constant as described in item 1 of the scope of the patent application, wherein the metal compound dielectric layer is selected from free hafnium oxide (HfO2), oxidation Zirconium (ZrO2), alumina (Al205), hafnium oxynitride, zirconium oxynitride, hafnium silicate and zirconium silicate. 3, The method for selectively removing a metal compound dielectric layer with a high dielectric: number as described in item 1 of the scope of the patent application, wherein the element-containing gas is freely selected CF4, CHF3, CH2F2, CH3F, C12 , BC13, Br2, HF, HC1, HBr, HI, NF3, SFe and their mixtures. 4. The method for selectively removing a metal compound dielectric layer having a high dielectric constant as described in item 1 of the scope of the patent application, wherein the etching gas further includes an inert gas. 5. The method for selectively removing a metal compound dielectric layer having a high dielectric constant as described in item 4 of the patent application, wherein the inert gas system is selected from He, Ar, Xe, & In the group of people. 6. The method for selective removal and constant metal compound dielectric layer as described in item 4 of the scope of the patent application, wherein the method of selecting a halogen-containing gas system is as follows: $ person '~ / ^ ^ J ^ ^ 0503-8564TlVf; TSMC2002-0405; Amy.ptd No. 14 569347 VI. Patent Application ® Free CF4, CfiF3, CH2F2, CH3F, Ci2, BCJ, β ......, 牝, SF6 and their mixed 3 ;. Medium ..., positive, 7. The method for selecting a metal compound dielectric layer with a selectivity constant as described in item 4 of the scope of the patent application, which removes a commercial dielectric oxidant gas. ^ The oxygen oxide further includes 8. The method for selecting a dielectric layer of a metal compound with a selectivity of eight constants as described in item 7 of the scope of patent application. Choice of middle and middle oxidant gas systems in the Chinese ethnic group. 9. The method described in item 7 of the patent scope for the selective removal of a high-dielectric compound c electric double layer 'wherein the tooth-containing gas Select HBr VNF3; C; 2F2'CH3F'C12'BCl3'Br2.HF.HCl. Select freely ^ such as mixed in the group consisting of the broad body layer two; gas selective removal with high dielectric A constant metal compound dielectric process includes: providing a substrate for manufacturing a transistor using the method; forming a metal compound dielectric layer on the semiconductor substrate; and forming on the metal compound dielectric layer A gate electrode; doped with a light ion into the side wall of the gate electrode to form a gap between the gate electrode side and the gate electrode; In the covered semiconductor substrate, concentrated ion doping is performed to form With lightly doped drain (LDD) 0503-8564TW; TSMC2002-0405; Amy.ptd Page 15 569347 6. Source / Pole of patent application structure One uses an etching gas containing halogen gas to dielectricize the metal compound Layer-by-layer dry plasma etching to remove the metal compound dielectric layer that is not covered by the gate electrode and the spacer, until the source / drain is exposed and formed on the source / non-electrode surface A metal stone oxide layer. 11. The method for selectively removing a metal compound dielectric layer having a high dielectric constant as described in item 10 of the scope of the patent application, wherein the metal compound dielectric layer is selected from free hafnium oxide (HfO2) and oxidation Among the groups of zirconium (ZrO2), alumina (Al2O5), oxynitride, oxynitride, oxalate, and dream acid. 1 2 · The method for selectively removing a metal compound dielectric layer having a high dielectric constant 2 as described in item No. 丨 0 of the scope of patent application. Cl2, BC13, Br2, HF, HC1 Η Br, ΗI, N F3, S Fe, and their mixtures. 13 · The method for selectively removing a metal compound dielectric layer having a high dielectric constant as described in item 10 of the scope of the patent application, wherein the etching gas and the body include an inert gas. 14. In the method for selectively removing a metal compound dielectric layer having a dielectric constant of $ as described in item 13 of the scope of the patent application, the clean gas is free of the group consisting of He, Ar, Xe,% and mixtures in. 15. The method for selectively removing a metal compound dielectric layer having a high dielectric constant as described in item 13 of the scope of the patent application, wherein the halogen-containing n Y is selected from cf4, chf3, ch2f2, ch3f, ci2, bci3, Br2, HF: HC1 569347 6. Scope of patent application, HBr, HI, NF3, SF6 and their mixed households. 16. The method for selectively removing a metal compound dielectric layer having a high dielectric constant as described in item 10 of the scope of the patent application, wherein the etching gas further includes an inert gas (iner t g a s) and an oxidant gas. 17. The method for selectively removing a metal compound dielectric layer having a high dielectric constant as described in item 16 of the scope of the patent application, wherein the inert gas " " is selected from He, Ar, X e, Ν2 and their mixture. ·· 18 · The method for selecting a metal compound dielectric layer with a selective transfer constant as described in item 16 of the scope of the patent application, "Eight times ^ 丨 select free%, CO and its mixture of groups. Y to roll Chemical agent gas system 19. Selective removal of metal compound dielectric layers with a dielectric constant of ° as claimed in item 16 of the scope of application for patents, selective removal of highly selective free CL, CHF3, CH2f2, CH3F, 'wherein Plain gas system, broken, HI, NF3, 6 and their mixed 2; BC13, Br2, HF, HC1 mouth group. 0503-8564T ^ f; TSMC2002-0405; Amy.ptd page 17