TW559410U - CMOS single-chip RF receiver including phase locked loop - Google Patents
CMOS single-chip RF receiver including phase locked loopInfo
- Publication number
- TW559410U TW559410U TW091209497U TW91209497U TW559410U TW 559410 U TW559410 U TW 559410U TW 091209497 U TW091209497 U TW 091209497U TW 91209497 U TW91209497 U TW 91209497U TW 559410 U TW559410 U TW 559410U
- Authority
- TW
- Taiwan
- Prior art keywords
- chip
- locked loop
- phase locked
- receiver including
- including phase
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/14—Demodulator circuits; Receiver circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
- H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
- H03D3/24—Modifications of demodulators to reject or remove amplitude variations by means of locked-in oscillator circuits
- H03D3/241—Modifications of demodulators to reject or remove amplitude variations by means of locked-in oscillator circuits the oscillator being part of a phase locked loop
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Superheterodyne Receivers (AREA)
- Noise Elimination (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW091209497U TW559410U (en) | 2002-06-20 | 2002-06-20 | CMOS single-chip RF receiver including phase locked loop |
US10/462,716 US20040022329A1 (en) | 2002-06-20 | 2003-06-17 | Single chip CMOS RF receiver included PLL therein |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW091209497U TW559410U (en) | 2002-06-20 | 2002-06-20 | CMOS single-chip RF receiver including phase locked loop |
Publications (1)
Publication Number | Publication Date |
---|---|
TW559410U true TW559410U (en) | 2003-10-21 |
Family
ID=31185940
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW091209497U TW559410U (en) | 2002-06-20 | 2002-06-20 | CMOS single-chip RF receiver including phase locked loop |
Country Status (2)
Country | Link |
---|---|
US (1) | US20040022329A1 (zh) |
TW (1) | TW559410U (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100390716C (zh) * | 2005-07-21 | 2008-05-28 | 玴荣科技股份有限公司 | 单向多频道通信系统和方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR0143023B1 (ko) * | 1994-08-03 | 1998-08-01 | 김광호 | 디지탈 무선전화기의 송수신 신호처리 회로 |
JP2000307458A (ja) * | 1999-04-21 | 2000-11-02 | Nec Corp | Pll内蔵チューナic |
JP2002135116A (ja) * | 2000-10-20 | 2002-05-10 | Fujitsu Ltd | Pll回路と分周方法 |
JP2002290233A (ja) * | 2001-03-27 | 2002-10-04 | Fujitsu Ltd | Pll回路のモード切替方法及びpll回路のモード制御回路 |
-
2002
- 2002-06-20 TW TW091209497U patent/TW559410U/zh not_active IP Right Cessation
-
2003
- 2003-06-17 US US10/462,716 patent/US20040022329A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20040022329A1 (en) | 2004-02-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4K | Issue of patent certificate for granted utility model filed before june 30, 2004 | ||
MM4K | Annulment or lapse of a utility model due to non-payment of fees |