TW554470B - Method of forming a conductive structure in a low k material layer and equipment for forming the low k material layer - Google Patents

Method of forming a conductive structure in a low k material layer and equipment for forming the low k material layer Download PDF

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TW554470B
TW554470B TW91121106A TW91121106A TW554470B TW 554470 B TW554470 B TW 554470B TW 91121106 A TW91121106 A TW 91121106A TW 91121106 A TW91121106 A TW 91121106A TW 554470 B TW554470 B TW 554470B
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layer
dielectric
low
material layer
dielectric material
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TW91121106A
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Chinese (zh)
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Wen-Jeng Wu
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Macronix Int Co Ltd
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Abstract

A method of forming a conductive structure in a low k material layer is described. A first dielectric layer, a low k material layer and a second dielectric layer are formed on a substrate sequentially, wherein the first dielectric layer, the low k material layer and the second dielectric layer are formed in-situ. Then, a photolithography process and an etching process are performed to form an opening in the second dielectric layer, the low k material layer and the first dielectric layer exposing the substrate. A conductive layer is filled into the opening to form a conductive structure.

Description

554470 五、發明說明(l) 本發明是有關於一種形成半導體元件的方法其及設 備,且特別是有關於一種於低介電材料層中形成導電結構 之方法及形成低介電材料層之設備。554470 V. Description of the invention (l) The present invention relates to a method and a device for forming a semiconductor element, and more particularly to a method for forming a conductive structure in a low-dielectric material layer and a device for forming a low-dielectric material layer .

在半導體的製造過程中,導電結構之間通常是以介電 材料作為隔離導電結構的絕緣體。其中,導電結構例如是 内連線(Interconnect)、閘極或是介層插塞(Plug)。隨著 半導體元件線寬不斷的縮小,相鄰之結構之間的間距亦隨 之縮小。因此利用具有低介電常數之介電材料以作為介電 層的材料’可以藉以減少寄生電容以及降低“延遲。而一 般常用的低介電材料層例如有含氫的矽酸鹽(Hydr〇gen Silsesquioxane,HSQ)、含甲基的矽酸鹽(MethyiIn the semiconductor manufacturing process, dielectric materials are often used as insulators to isolate conductive structures between conductive structures. The conductive structure is, for example, an interconnect, a gate, or a plug. As the line width of semiconductor devices continues to shrink, the spacing between adjacent structures also decreases. Therefore, the use of a dielectric material with a low dielectric constant as the material of the dielectric layer can reduce parasitic capacitance and reduce "delay." Generally, the commonly used low dielectric material layer includes hydrogen silicate (Hydrogen). Silsesquioxane (HSQ), methyl-containing silicates (Methyi

Si lsequioxane,MSQ)以及有機介電材料例如對二甲苯聚 合物(Parylene)等等。 而習知於介電層 底上沈積一層介電層 介電層中形成一開口 完成導電結 電材料,例 作為介電層 沈積在矽基 低介電常數 (Adhesion) 基底與有機 力。 構之製作 如是對二 之材料。 底上以作 之有機介 不夠好。 介電材料 之後, ’之後 。特別 甲笨聚 然而, 為 電材料 在習知 之間形 導電結構之方法, 再利用一微影蝕刻 再於開口中填入一 是,目前低介電常 合物(Parylene), 將低介電常數之有 電層時卻存在有一 與矽基底之間的黏 方法中,已有研究 成一黏著層以改善 係先在碎羞 製程,以名 導電材料印 數之有機介 經常被用來 機介電材; 問題,就是 著力 是利用於_ 兩者之黏著(Silsequioxane, MSQ) and organic dielectric materials such as Parylene and the like. It is customary to deposit a dielectric layer on the bottom of the dielectric layer to form an opening in the dielectric layer to complete the conductive junction material. For example, as a dielectric layer, it is deposited on a silicon-based low dielectric constant (Adhesion) substrate and organic force. The construction of the structure is the material of the second. The bottom line is not good enough. After the dielectric material, 'after. However, it is a method of forming conductive structures between electrical materials in the conventional way, and then using a lithographic etching to fill the openings with one. At present, the low dielectric constant (Parylene) will reduce the dielectric constant. When there is an electrical layer, there is an adhesion method with the silicon substrate. There has been research into an adhesive layer to improve the system in the shattering process. The organic dielectric printed with the name conductive material is often used as the dielectric material. The problem is that the focus is on the adhesion of the two

554470 五、發明說明(2) 然而’由於習知沈積低介電常數之有機介電材料之方 法大都是利用一低壓化學氣相沈積法(LpCVD)或是一常壓 化學氣相沈積法(APCVD)。而在LPCVD機台或APCVD機台中 並無法進行有機介電層與無機介電層之原位^^^纟^沈 積製程。因此,在習知方法中為了形成此黏著層將會使得 製程複雜化。 中开=雷ίΓ月的目的就是在提供一種於低介電材料層 ::二導電:構之方法及形成低介電材料層之設備,以改 = 有低介電常數之有機介電材料與石夕基底之 間之黏著力較差之問題。 本發明的另一目的是接供入 導電姓mϋπ Λ、^ί供種於低介電材料層中形成 导電、、、σ構之方法及形成低介電材料 方法會有製程較為複雜之缺點材抖層之ϋ改善習知 本發明提出一種於低介電材料 法及形志彳氏介雷:fef ^成導電結構之方 沄及形成低;丨電材枓層之設備,此方法 形成一第一介電層。接著,在黛一人’、先在一基底上 材料層,並且在低介電材料層2上形成-低介電 第一介電層、低介電材料層以及^二人二介電層,其中 (In-Situ)沈積之方式所形成。在本發明中層係以一原位 與第二介電層之材質係分別為一無機H中’第一介電層 之厚度係大於第一介電層之厚户。盆 且第二介電廣 來作為一黏著層之用,而第二^ ^ ,第一介電層係用 之用,而低介電材料層之材質係為一 ^作為一罩幕廣 發明更包括在有機材質之低介電材料質。此外,本 ^ 4雜一無機材 9487twf.ptd $ 6頁 乃4470 五、發明說明(3) 一介雷居 θ之間之黏著力。在本發明中,形成第 曰、低”電材料層以及第二介電芦之方氺孫4丨® 積設備具有—輸而此電漿增益型化學氣相沈 人管件以ί入人無機反應氣體,以及另一輸 Τ乂通入有機反應氣體,以使 層可以以原位沈積之方式 珂負層/、有機材貝 層時摻雜無機材料。在形‘:以在沈積有機材質 及第二介電片j 2成第一介電’、低介電材料層以 以此光阻層iii寞在第二介電層上形成-光阻層,並且 ^ φ a ^ ^罩幕進仃一第一蝕刻製程,以圖案化第二 "電層,而形成一第一開口。 2 一 層為一罩篡推/咕 以先阻層與第二介電 層m :一第二蝕刻製程’以圖案化低介電材料 開口。續…第二介電層為-罩幕進 開口 := 圖案化第一介電層,而形成-第三 #,以路基底。之後,再於在第三開口填入一導電 層,以形成一導電結構。 ν冤 杰古一又本發明在低介電材料層(有機材質)與基底之間形 ^有一,丨電層(無機材質),因此可以改善兩者之間之黏著 由於本發明之有機材質之低介電材料層以及無機材質 =^介電層/第二介電層可以以原位沈積之方式形成, 因此較習知之方法較為簡化。 瓶旦ί讓本發明之上述和其他目的、特徵、和優點能更明 ”、、 ’下文特舉一較佳實施例,並配合所附圖式,作詳554470 V. Description of the invention (2) However, because of the conventional method of depositing organic dielectric materials with low dielectric constants, most of them use a low pressure chemical vapor deposition (LpCVD) method or an atmospheric pressure chemical vapor deposition method (APCVD). ). In the LPCVD machine or the APCVD machine, the in-situ deposition process of the organic dielectric layer and the inorganic dielectric layer cannot be performed. Therefore, in order to form this adhesive layer in the conventional method, the process is complicated. The purpose of Zhongkai = Leiyiyi is to provide a method for forming a low-dielectric material layer :: two-conductivity: structure and a device for forming a low-dielectric material layer, in order to change the organic dielectric material with a low dielectric constant and The problem of poor adhesion between Shi Xi substrates. Another object of the present invention is to introduce the conductive surnames mϋπ Λ, ^ ί for seeding in a low-dielectric material layer to form a conductive, sigma, and sigma structure, and a method for forming a low-dielectric material, which has the disadvantage of a complicated process. Improvement of the material shake layer The present invention proposes a method for forming low-dielectric materials and forming a dielectric medium: fef ^ forming a conductive structure and forming a low layer; 丨 a device for forming a material layer, this method forms a first A dielectric layer. Next, a material layer is first formed on a substrate, and a low-dielectric first dielectric layer, a low-dielectric material layer, and a two-dielectric layer are formed on the low-dielectric material layer 2. (In-Situ). In the present invention, the layers are made of an in situ and a second dielectric layer, respectively, and the thickness of the first dielectric layer in an inorganic H is greater than that of the first dielectric layer. The second dielectric layer is used as an adhesive layer, and the second ^ ^, the first dielectric layer is used, and the material of the low dielectric material layer is used as a cover. Including low dielectric materials of organic materials. In addition, this ^ 4 miscellaneous one inorganic material 9487twf.ptd $ 6 pages is 4470 V. Description of the invention (3) An adhesive force between Lei Ju θ. In the present invention, the first and second low-electricity material layers and the second dielectric element are integrated. The equipment has the following advantages: the plasma gain type chemical vapor deposition pipe fittings are used to enter the human inorganic reaction. Gas and another organic reaction gas, so that the layer can be deposited in situ, and the inorganic layer is doped with inorganic materials. In the shape of: to deposit organic materials and The second dielectric sheet j 2 is a first dielectric material, a low-dielectric material layer, so as to form a photoresist layer on the second dielectric layer with the photoresist layer iii, and ^ φ a ^ ^ The first etching process is used to pattern the second "electrical layer" to form a first opening. 2 The first layer is a mask tweezers / first resist layer and the second dielectric layer m: a second etching process. Patterned low-dielectric material openings. Continued ... The second dielectric layer is a mask-entry opening: = patterned the first dielectric layer to form a -third # to the road substrate. After that, it is opened in the third A conductive layer is filled in to form a conductive structure. Ν In addition to the present invention, a low-dielectric material layer (organic material) and a substrate are used in the present invention. The shape ^ has an electrical layer (inorganic material), so the adhesion between the two can be improved. Because of the low-dielectric material layer of the organic material and the inorganic material of the present invention, the dielectric layer / second dielectric layer can be The in-situ deposition method is formed, so it is more simplified than the conventional methods. Pingdanlong makes the above and other objects, features, and advantages of the present invention clearer. Drawings, detailed

554470 五、發明說明(4) 細說明如下: 圖式之標示說明: 102、104 :反應室 106 :載氣 I 0 8 :原料 II 0 :無機反應氣體 11 2 :冷卻井 114 、 120 :泵 11 6 :線圈 11 8 ·電極 126 :晶圓 128 :磁場供應器 1 3 0 :冷卻器 132、134 :射頻電源供應器 1 4 2、1 4 4 : 網路匹配器 136 :加熱器 200 :基底 202 :第一介電層 204 :低介電材料層 206 :第二介電層 2 0 8 :光阻層 210 、 212 > 214 :開口 216 :導電層 實施例554470 V. Explanation of the invention (4) The detailed description is as follows: 102, 104: reaction chamber 106: carrier gas I 0 8: raw material II 0: inorganic reaction gas 11 2: cooling well 114, 120: pump 11 6: Coil 11 8Electrode 126: Wafer 128: Magnetic field supply 1 3 0: Cooler 132, 134: RF power supply 1 4 2, 1 4 4: Network matcher 136: Heater 200: Base 202 : First dielectric layer 204: Low dielectric material layer 206: Second dielectric layer 208: Photoresist layers 210, 212 > 214: Opening 216: Conductive layer embodiment

9487twf.ptd 第8頁 554470 五、發明說明(5) 第1圖所不,其繪示為依照本發明一較佳實施例之形 成低介電材料層之設備示意圖;第2八圖至第2E圖所示,其 繪不為依照本發明一較佳實施例之於低介電材料層中形成 導電結構之流程剖面示意圖。 請先參照第2A圖,首先在一基底2〇〇上形成一第一介 電層202,其中第一介電層2〇2係為一無機材質層,其係用 來改善基底2 0 0與後續所形成之有機材質層之間之黏著 力:在本實施例中,第一介電層2〇2之材質例如是氧化矽 或氮化矽,且其厚度例如是5〇〇埃至15〇〇埃。 接著,在第一介電層202上形成一低介電材料層204, 其中低介電材料層204係為一有機材質層,且有機材質之 低介電材料層204中更包括摻雜有一無機材料,藉以提高 有機材質之低介電材料層2〇4與第一介電層202之間之黏著 $ ’並提高有機材質之低介電材料層2〇4與後續形成在低 $電材料層204上之一無機材質層之間之黏著力。在本實 $例中,低介電材料層2〇4之材質例如是低介電常數之高 分子聚合物,且其厚度例如是6〇〇〇埃至4〇 〇〇〇埃。 之後’在低介電材料層204上形成一第二介電層206, 其中第二介電層2〇6係為一無機材質層,且第二介電層206 之厚度較第一介電層202之厚度厚,其後績係用來作為一 f幕層之用。在本實施例中,第二介電層206之材質例如 疋氣化矽或氮化矽,且其厚度例如是25〇〇埃至3500埃。 ★ 在本發明中,第一介電層202、低介電材料層2〇4以及 第二介電層2 0 6係以一原位沈積之方式所形成,且其形成9487twf.ptd Page 8 554470 V. Description of the invention (5) Not shown in Figure 1, which is a schematic diagram of a device for forming a low-dielectric material layer according to a preferred embodiment of the present invention; Figures 28 to 2E As shown in the figure, it is not a schematic sectional view of a process for forming a conductive structure in a low-dielectric material layer according to a preferred embodiment of the present invention. Please refer to FIG. 2A firstly, a first dielectric layer 202 is formed on a substrate 200. The first dielectric layer 202 is an inorganic material layer, which is used to improve the substrate 200 and Adhesion between subsequent organic material layers: In this embodiment, the material of the first dielectric layer 20 is, for example, silicon oxide or silicon nitride, and the thickness is, for example, 500 angstroms to 15 angstroms. 〇Angels. Next, a low-dielectric material layer 204 is formed on the first dielectric layer 202. The low-dielectric material layer 204 is an organic material layer, and the low-dielectric material layer 204 of an organic material further includes an inorganic material doped therein. Materials to improve the adhesion between the low-dielectric material layer 204 of the organic material and the first dielectric layer 202, and to improve the low-dielectric material layer 204 of the organic material and subsequently form the low-dielectric material layer Adhesion between one inorganic material layer on 204. In this example, the material of the low-dielectric material layer 204 is, for example, a high-molecular polymer with a low dielectric constant, and the thickness thereof is, for example, 6,000 angstroms to 4,000 angstroms. Afterwards, a second dielectric layer 206 is formed on the low dielectric material layer 204. The second dielectric layer 206 is an inorganic material layer, and the second dielectric layer 206 is thicker than the first dielectric layer. The thickness of 202 is thick, and the subsequent performance is used as an f curtain layer. In this embodiment, the material of the second dielectric layer 206 is, for example, ytterbium silicon or silicon nitride, and the thickness thereof is, for example, 2500 angstroms to 3500 angstroms. ★ In the present invention, the first dielectric layer 202, the low-dielectric material layer 204, and the second dielectric layer 206 are formed by an in-situ deposition method, and they are formed.

第9頁 554470 五、發明說明(6) 之方法例如是一電漿增益型化學氣相沈積法(PECVD),而 此電漿增益型化學氣相沈積之設備如第1圖所示。 請參照第1圖,形成低介電材料層204之原料108係放 置在反應室1 0 2中。在本實施例中原料1 0 8例如是雙-對二 甲苯(di - para-xylylene)或是雙-苯環丁烧 (bis-benzocyclobuten,BCB)等其他低介電常數之有機原 料。在本實施例中將以雙-對二甲苯所形成之低介電材料 層2 0 4為例以詳細說明之,但並非用以限定本發明。 接著,待雙-對二甲苯108被加熱(約攝氏150度)而揮 發成氣態之後,透過載氣1 〇6之帶動便可以將雙-對二甲苯 之氣體傳送至反應室104中。反應室104之溫度係為攝氏 650度左右,當雙-對二甲苯之氣體在攝氏650度之溫度 下,便會由雙體形式分解成單體(Monomer)形式,而形成 對二曱苯(para-xy ly lene)。之後,對二甲苯單體便可以 藉由一輸入管件而通入電漿反應室100中,以進行沈積反 應。 在此設備中,連接各反應室之管件上係安裝有許多閥 門,以控制氣體的通入與否。另外,在反應室1 〇4與電漿 反應室100之間的管件上還連接有另一管路,此管路係用 來將無用之廢氣導至冷卻井112中,其中冷卻井112係連接 有一系114 ’用以將廢氣抽至冷卻井112中。由於對二甲苯 氣體一旦降至室溫溫度以下時,便會轉變成高分子 (Polymer)固態形式,因此在各反應室與管路上皆須藉由 加熱器1 3 6以將溫度保持在一定的溫度,以避免對二甲苯Page 9 554470 5. Description of the invention (6) The method is, for example, a plasma gain chemical vapor deposition (PECVD) method, and the plasma gain chemical vapor deposition equipment is shown in FIG. Referring to Fig. 1, a raw material 108 for forming the low-dielectric material layer 204 is placed in the reaction chamber 102. In this embodiment, the raw material 108 is, for example, di-para-xylylene or bis-benzocyclobuten (BCB) and other organic materials with a low dielectric constant. In this embodiment, the low-dielectric material layer 204 formed of bis-para-xylene will be taken as an example for detailed description, but it is not intended to limit the present invention. Next, after the di-para-xylene 108 is heated (about 150 degrees Celsius) and volatilized to a gaseous state, the gas of the di-para-xylene can be transferred to the reaction chamber 104 through the carrier gas 106. The temperature of the reaction chamber 104 is about 650 degrees Celsius. When the gas of bis-para-xylene is at a temperature of 650 degrees Celsius, it will be decomposed into a monomer (Monomer) form from the dimer to form p-diphenylbenzene ( para-xy ly lene). Thereafter, the para-xylene monomer can be passed into the plasma reaction chamber 100 through an input pipe to perform a deposition reaction. In this equipment, a number of valves are installed on the fittings connecting the reaction chambers to control the flow of gas. In addition, another pipe is connected to the pipe between the reaction chamber 104 and the plasma reaction chamber 100. This pipe is used to guide the waste gas to the cooling well 112, and the cooling well 112 is connected. There is a series 114 'for pumping exhaust gas into the cooling well 112. As the para-xylene gas drops to a polymer solid state once it drops below room temperature, a heater 1 3 6 must be used in each reaction chamber and pipeline to maintain the temperature at a certain level. Temperature to avoid paraxylene

9487twt'.ptd 第10頁 554470 五、發明說明(7) 聚合物(parylene)附著在管壁上。同時’當欲將對二甲苯 廢氣排出時,便可以利用泵11 4將其抽至冷卻井11 2,並將 的廢棄的固態對二甲苯聚合物(parylene)收集起來。 在此設備中,更包括配置有一無機反應氣體反應室 110,而反應室110中之無機反應氣體可藉由另一輸入管件 而通入至電漿反應室100中。在本實施例中,無機反應氣 體系包括SiH4、N2、02、NH3以及Ar。 本此設備中,還包括一線圈11 6、與線圈11 6連接之_ 射頻電源供應器1 3 2以及與配置在線圈11 6與射頻電源供應 器132之間之一網路匹配器142。除此之外,還包括一電極 118、與電極118連接之一射頻電源供應器134以及配置在 電極118與射頻電源供應器134之間之一網路匹配器144。 藉由上述之裝置,便可以在電漿反應室1〇〇中產生電漿, 使得所通入之反應氣體進行電漿增益型化學氣相沈積反 應,而於晶圓1 2 6上沈積成薄膜。 另外’在電漿反應室1 〇〇之兩側更配置有一磁場供應 器128,以提供一磁場於電漿反應室中1〇〇,藉以提高帶電 粒子之碰4里頻率。而在晶圓1〇〇之底下更包括配置有一冷 卻器130,用以控制晶圓126之溫度,進而控制晶圓126上 之沈積反應的速度。而在整個電漿反應器1〇〇之底下係配 置有一系120 ’以使電漿反應室1〇〇中之壓力保持在一低壓 環’境。 因此’利用本發明之沈積設備以形成第一介電層 202、低介電材料層2〇4以及第二介電層2〇6(如第2a圖所9487twt'.ptd Page 10 554470 V. Description of the invention (7) The polymer (parylene) is attached to the pipe wall. At the same time, when the para-xylene exhaust gas is to be discharged, it can be pumped to the cooling well 11 2 by the pump 114 and the discarded solid parylene polymer can be collected. This equipment further includes an inorganic reaction gas reaction chamber 110, and the inorganic reaction gas in the reaction chamber 110 can be passed into the plasma reaction chamber 100 through another input pipe. In this embodiment, the inorganic reaction gas system includes SiH4, N2, 02, NH3, and Ar. The device further includes a coil 116, a radio frequency power supply 1 2 connected to the coil 116, and a network matcher 142 disposed between the coil 116 and the radio frequency power supply 132. In addition, it also includes an electrode 118, a radio frequency power supply 134 connected to the electrode 118, and a network matcher 144 disposed between the electrode 118 and the radio frequency power supply 134. With the above-mentioned device, a plasma can be generated in the plasma reaction chamber 100, so that the reaction gas passed through can be subjected to a plasma gain type chemical vapor deposition reaction, and deposited on the wafer 1 2 6 as a thin film. . In addition, a magnetic field supplier 128 is arranged on both sides of the plasma reaction chamber 100 to provide a magnetic field 100 in the plasma reaction chamber, thereby increasing the frequency of the collision of charged particles 4 miles. A cooler 130 is further included below the wafer 100 to control the temperature of the wafer 126, thereby controlling the speed of the deposition reaction on the wafer 126. A series of 120 'is arranged below the entire plasma reactor 100 to keep the pressure in the plasma reaction chamber 100 at a low pressure environment. Therefore, the deposition apparatus of the present invention is used to form the first dielectric layer 202, the low-dielectric material layer 204, and the second dielectric layer 206 (as shown in FIG. 2a).

9487twf.ptd 第11頁 5544709487twf.ptd Page 11 554470

五、發明說明(8) 示)時,是先由一輸入管件將反應室11〇中之無機反應氣體 通入至電漿反應室100中,以於晶圓126上形成第一介電層 202。之後,再由另一輸入管件將反應室1〇4中之低介電常 數之有機原料氣體通入至電漿反應室1〇〇中,以於第一介 電層202上形成低介電材料層2〇4。在形成低介電材料層 204的同時,更可以由反應室11〇中通入無機材料,以^低 介電材料層204摻雜有無機材料。續之,再將反應室11〇中 之無機反應氣體通入至電漿反應室1〇()中, 料層m上形成第二介電層206。 於低介電材 因此,利用本發明之設備以形成第一介電層202、低 op 層204以及第二介電層206時係以原位沈積的方式 /成的,而且在有機材質之低介電材料層204中更可以 摻雜入無機材料。 一介電層202、 ’在第二介電層 預定形成開口之 Μ之,凊繼續參照第2 a圖,在形成第 低介電材料層204以及第二介電層2〇6之後 206上形成圖案化之一光阻層2〇8,暴露出V. Description of the invention (shown in (8)), the inorganic reaction gas in the reaction chamber 11 is first passed into the plasma reaction chamber 100 through an input pipe to form a first dielectric layer 202 on the wafer 126 . After that, another low-dielectric constant organic raw material gas in the reaction chamber 104 is passed into the plasma reaction chamber 100 through another input pipe to form a low-dielectric material on the first dielectric layer 202. Layer 204. When the low-dielectric material layer 204 is formed, an inorganic material can be passed through the reaction chamber 110, and the low-dielectric material layer 204 is doped with an inorganic material. Continuing, the inorganic reaction gas in the reaction chamber 11 is passed into the plasma reaction chamber 10 (), and a second dielectric layer 206 is formed on the material layer m. Because of the low dielectric material, the device of the present invention is used to form the first dielectric layer 202, the low op layer 204, and the second dielectric layer 206 by in-situ deposition. The dielectric material layer 204 may further be doped with an inorganic material. A dielectric layer 202 is formed on the second dielectric layer to form an opening M. Then, referring to FIG. 2a, it is formed on the second dielectric layer 204 and the second dielectric layer 206 after the formation of 206. Patterning one photoresist layer 208, exposing

然後,請參照第2B 咕 h ^ "、/u叫價u 8馮一罩篡推扞 第一姓刻製程,以圖案化第二介雷 開口 210。 平_ ,丨電層2〇6 ’而形成一第Then, please refer to Section 2B. ^ &Quot;, / u 叫 价 u 8 Feng Yizhao usher in defense of the first surname engraving process to pattern the second mediator opening 210. Level_, 丨 the electrical layer 206 'to form a first

之後,請參照第2C圖,繼續以光阻姑人 _為-罩幕進行一第二㈣製:,阻以層= 料層204,而形成一第二開口 212 乂圖案化低介電 電材料層204與光阻層208係同樣為;㈤由於4After that, please refer to FIG. 2C, and continue to perform a second patterning with the photoresist mask as the mask: the masking layer = material layer 204 to form a second opening 212. Patterned low-dielectric material layer 204 is the same as the photoresist layer 208;

~ ’機材質,因此於P~ ’Machine material, so in P

9487twf.ptd 第12頁 554470 五、發明說明(9) 介電材料層204時,光阻層2〇8恐無法完全 刻製程之侵银。然而,由於形成在低介電抗第一敍 篦一介雷® #从 y力乂牡m "逼材料層204上之 第-"電層206係為一無機材質層,因此 二靖程過程中被移除掉之後,便可p層·^ ❼上V使第二開口212可以順利形成。 行-圖’以第二介電層206為-罩幕進 仃第二蝕刻製程,以圖案化第一介電層20P,&#+@ 三開口214,並暴露出甘^·2,而形成第 206之戽心: 其中,由於第二介電層 :第:Λΐ 層2〇2之厚度厚,雖第-介電層2〇6 同樣都是無機材質層’但由於第-介電 抗蝕刻=力以使第三開口214可以順利形成。 岸?〗f著、’請參照第2£圖,在第三開口214中填入一導電 形成:導電結構。其中於第三開口214中填入導 Γ未曰m *方法係首_^在基底m上方沈積—層導電材質層 或一曰外不興並填滿第三開口214,之後再利用一回姓刻製程 ^電層^機暴械露研/來製程以去除多餘導電材質層,直到第二 第-發明中’第一介電層202、低介電材料層204以及 $二”層206都是作為絕緣用之介電層,因此用來作為 第一介電層2〇2與用來作為罩幕層206之第二介電 ^卜,A 、疋介電材質,才不會影響介電層之絕緣功效。另 盔嫵本發明之低介電材料層204與基底200之間係形成 貝之第一介電層2〇2,因此可改善基底20〇與低介電9487twf.ptd Page 12 554470 V. Description of the invention (9) When the dielectric material layer 204 is used, the photoresist layer 208 may not be completely etched with silver. However, since the first dielectric layer 206 formed on the first dielectric layer of the low-dielectric reactance ## 力 力 乂 mm " material layer 204 " is an inorganic material layer, the process of the second process After being removed, V can be formed on the p-layer, so that the second opening 212 can be formed smoothly. The line-pattern 'uses the second dielectric layer 206 as a mask to perform a second etching process to pattern the first dielectric layer 20P, &# + @ 三 saying 214, and exposes Gan ^ · 2, and Form the core of the 206th: Among them, because the thickness of the second dielectric layer: the Λΐ layer 002 is thick, although the -dielectric layer 206 is also an inorganic material layer, but because of the -dielectric reactance Etching = force so that the third opening 214 can be formed smoothly. shore? [F], “Please refer to FIG. 22, and fill a conductive formation in the third opening 214: conductive structure. Wherein, the third opening 214 is filled with the guide 未 m. The method is to deposit a layer of conductive material or a layer of conductive material on the base m, or fill the third opening 214, and then use a surname. The engraving process ^ electrical layer ^ machine blasting process to remove excess conductive material layers, until the "first dielectric layer 202, low dielectric material layer 204, and $ 2" layer 206 in the second-invention are all As the dielectric layer for insulation, it is used as the first dielectric layer 202 and the second dielectric layer 206 as the cover layer 206. A and A dielectric materials will not affect the dielectric layer. Insulation effect. In addition, the first dielectric layer 202 is formed between the low-dielectric material layer 204 of the present invention and the substrate 200, so the substrate 20 and the low-dielectricity can be improved.

7twf.ptcj 第13頁 554470 五、發明說明(10) 材料層204之間之黏著力。而且,本發明在低介電材料層 204中摻雜無機材料,可使低介電材料層2〇4與第一介電層 2 0 2/第二介電層2〇6之間之黏著力更佳。此外,利用本發曰 明,沈積設備以形成第一介電層20 2、低介電材料層2〇4以 及第二介電層206可以以原位沈積的方式形成,因此可改 善習知方法中製程較為繁瑣之缺點。 綜合以上所述,本發明具有下列優點: 1 ·由於本發明在低介電材料層(有機材質)與基底之間 形成有一介電層(無機材質),因此可以改善兩者2間 著力。 t由於本發明之有機材質層以及無機材質層可以以原 位沈積之方式形成,因此較習知之方法較為簡化。 發明已以較佳實施例揭露如上,然其並非用以 限疋=發明,任何熟習此技藝者,在不 和範圍内’當可作些許之更動與润飾 : = : = 範園當視後附之申請專利範圍所界定本發月之保口蔓7twf.ptcj Page 13 554470 V. Description of the invention (10) Adhesion between material layers 204. Moreover, the present invention is doped with an inorganic material in the low-dielectric material layer 204, so that the adhesion between the low-dielectric material layer 204 and the first dielectric layer 202 / the second dielectric layer 206 can be achieved. Better. In addition, using the present invention, the deposition equipment can be used to form the first dielectric layer 20 2, the low-dielectric material layer 204, and the second dielectric layer 206, which can be formed by in-situ deposition, thereby improving the conventional method. The disadvantages of the middle process are more complicated. To sum up, the present invention has the following advantages: 1. Since the present invention forms a dielectric layer (inorganic material) between the low dielectric material layer (organic material) and the substrate, the two forces can be improved. Since the organic material layer and the inorganic material layer of the present invention can be formed by in-situ deposition, it is more simplified than the conventional method. The invention has been disclosed in the preferred embodiment as above, but it is not intended to limit the invention. Anyone who is familiar with this skill can, within the scope of discord, make some changes and retouching: =: = Fan Yuan Baokouman, as defined by the attached patent scope

9487twf.ptd 第U頁 554470 圖式簡單說明 第1圖是依照本發明一較佳實施例之形成低介電材料 層之設備不意圖;以及 第2A圖至第2E圖是依照本發明一較佳實施例之於低介 電材料層中形成導電結構之流程剖面不意圖。9487twf.ptd Page 554470 Brief Description of Drawings Figure 1 is a schematic diagram of a device for forming a low dielectric material layer according to a preferred embodiment of the present invention; and Figures 2A to 2E are preferred according to the present invention. The embodiment is not intended to be a flow cross-section of a conductive structure formed in a low-dielectric material layer.

9487twf.ptd 第15頁9487twf.ptd Page 15

Claims (1)

554470554470 種於低介電材料層中形成導電結構的方法,包 在 基底上形成一第一介電層; 在該第一介電層上形成一低介電材料層; 人在該低介電材料層上形成一第二介電層,其中該第一 介電層、該低介電材料層以及該第二介電層係以一原位 (In-Situ)沈積製程所形成; 進行一微影蝕刻製程,以在該第二介電層、該低介電 材料層以及該第一介電層中形成一開口,暴露出該基底; 以及 在該開口中填入一導電層,以形成一導電結構。 2.如申請專利範圍第1項所述之於低介電材料層中形 成導電結構的方法,其中形成該第一介電層、該低介電材 料層以及該第二介電層之設備係利用一電漿增益型化學氣 相沈積機台所形成,該機台運作之步驟包括: 將一第一無機反應氣體通入一電漿反應室中,以形成 該第一介電層; 將一有機反應氣體通入該電漿反應室中,以形成該低 介電材料層;以及 將一第二無機反應氣體通入該電漿反應室中,以形成 該第二介電層。 3 ·如申讀專利範圍第1項所述之於低介電材料層中形 成導電結構的方法,其中該第一介電層之材質包括氮化矽 或氧化石夕。A method for forming a conductive structure in a low-dielectric material layer, including forming a first dielectric layer on a substrate; forming a low-dielectric material layer on the first dielectric layer; a person on the low-dielectric material layer A second dielectric layer is formed thereon, wherein the first dielectric layer, the low dielectric material layer, and the second dielectric layer are formed by an in-situ deposition process; and a lithographic etching is performed. A process for forming an opening in the second dielectric layer, the low dielectric material layer, and the first dielectric layer to expose the substrate; and filling a conductive layer in the opening to form a conductive structure . 2. The method for forming a conductive structure in a low-dielectric material layer as described in item 1 of the scope of patent application, wherein the device system for forming the first dielectric layer, the low-dielectric material layer, and the second dielectric layer is Formed by a plasma gain type chemical vapor deposition machine, the operation steps of the machine include: passing a first inorganic reaction gas into a plasma reaction chamber to form the first dielectric layer; A reaction gas is passed into the plasma reaction chamber to form the low-dielectric material layer; and a second inorganic reaction gas is passed into the plasma reaction chamber to form the second dielectric layer. 3. The method of forming a conductive structure in a low-dielectric material layer as described in item 1 of the scope of the patent application, wherein the material of the first dielectric layer includes silicon nitride or stone oxide. 9487twf.ptd 第16頁 554470 ^'申請專利範圍 成、_ 4 ·如申請專利範圍第1項所述之於低介電材料層中形 ^電結構的方法,其中該第二介電層之材質包括氮化層 或氧化矽。 $ 5 ·如申請專利範圍第1項所述之於低介電材料層中形 電結構的方法,其中該低介電材料層之材質係為一 機材質。 Λ 成 ·如申請專利範圍第1項所述之於低介電材料層中形 電結構的方法,其中在形成該低介電材料層時,更包 ♦雜一無機材料於該低介電材料層中。 7.如申請專利範圍第1項所述之於低介電材料層中形 電結構的方法,其中該第二介電層之厚度係大於該 一介電層之厚度。 布 士道t如申請專利範圍第1項所述之於低介電材料層中形 至15〇^ϊ構的方法,其中該第一介電層之厚度係為500埃 成導9電範固第1項所述之於低介電材料層中形 埃至二:埃 其中該低介電材料層之厚度係為_〇 成導二結如構申:方專法利^ 至3500埃。 中該第一介電層之厚度係為2500埃 11· 一種於低介電材料恳由必#播 括·· 何枓層中形成導電結構的方法,包 在一基底上形成一第一介電層9487twf.ptd Page 16 554470 ^ 'Applicable patent scope, _ 4 · The method for forming an electrical structure in a low-dielectric material layer as described in item 1 of the patent application scope, wherein the material of the second dielectric layer Including nitride or silicon oxide. $ 5 · The method for forming a medium-sized electrical structure in a low-dielectric material layer as described in item 1 of the scope of the patent application, wherein the material of the low-dielectric material layer is an organic material. The method for forming a medium-shaped electrical structure in a low-dielectric material layer as described in item 1 of the scope of patent application, wherein when the low-dielectric material layer is formed, an inorganic material is further included in the low-dielectric material Layer. 7. The method for forming a dielectric structure in a low-dielectric material layer according to item 1 of the scope of patent application, wherein the thickness of the second dielectric layer is greater than the thickness of the one dielectric layer. The method of forming a structure in a low dielectric material layer as described in item 1 of the scope of patent application is a method of Bushett t, in which the thickness of the first dielectric layer is 500 angstroms to 9 ohms. The low dielectric material layer described in item 1 is Angstroms to Angstroms: Angstroms, where the thickness of the low dielectric material layer is _0, and the second junction is structured as described above: Fang Zhuanfali ^ to 3500 Angstroms. The thickness of the first dielectric layer is 2500 angstroms. A method of forming a conductive structure in a low dielectric material layer including a conductive layer, and forming a first dielectric layer on a substrate Floor 9487twf.ptd 第17頁 5544709487twf.ptd Page 17 554470 在该第一介電層上形成—低介電材料層; 人雷;該;Π材料層上形成—第二介電層,,中該第-)丨電層、该低介電材料層以及該第二介電層係以一原位 (In-Si tu)沈積製程所形成; 在該第二介電層上形成一光阻層,· 以該光阻層為一罩幕進行_筮θ μ 々I -八發私 早爭逆仃第一蝕刻製程,以圖案化 忒第一"電層,而形成一第一開口; 層與該第二介電層為一罩幕進行-第二蝕刻 製耘:以圖案化該低介電材料層,而形成一第二開口; 牵化::::::層為一罩幕進行一第三蚀刻製程,以圖 二化該第-)丨電層’而形成一第三開口,並暴 底;以及 在該第三開口填入一導電層,以形成一導電結構。 1 2 ·如申租專利範圍第丨丨項所述之於低介電材料層中 形成導電結構的方法,|中形成該第一介電層、該低介電 ,料層以及該第二介電層之設備係利用一電漿增益型化學 氣相沈積機台所形成,該機台運作之步驟包括: 將一第一無機反應氣體通入一電漿反應室中,以形成 該第一介電層; 將一有機反應氣體通入該電漿反應室中,以形成該低 介電材料層;以及 將一第二無機反應氣體通入該電漿反應室中,以形成 該第二介電層。 13·如申請專利範圍第11項所述之於低介電材料層中A low dielectric material layer is formed on the first dielectric layer; a human thunder; and a second dielectric layer is formed on the Π material layer, the-) 丨 dielectric layer, the low dielectric material layer, and The second dielectric layer is formed by an in-situ deposition process; a photoresist layer is formed on the second dielectric layer, and the photoresist layer is used as a mask to perform _ 筮 θ μ 々I-The first etching process is used to pattern the first electrical layer to form a first opening; the layer and the second dielectric layer are performed as a curtain-the second Etching: patterning the low-dielectric material layer to form a second opening; drafting :::::: layer is a mask for a third etching process, and the second one is-) 丨The electrical layer 'forms a third opening and exposes the bottom; and a conductive layer is filled in the third opening to form a conductive structure. 1 2 · The method for forming a conductive structure in a low-dielectric material layer as described in item 丨 丨 of the patent application scope, forming the first dielectric layer, the low-dielectric layer, the material layer, and the second dielectric The electrical layer equipment is formed using a plasma gain type chemical vapor deposition machine. The operation steps of the machine include: passing a first inorganic reaction gas into a plasma reaction chamber to form the first dielectric. Layer; passing an organic reaction gas into the plasma reaction chamber to form the low-dielectric material layer; and passing a second inorganic reaction gas into the plasma reaction chamber to form the second dielectric layer . 13. In the low dielectric material layer as described in item 11 of the scope of patent application 9487twt'.ptd 第18頁 5544709487twt'.ptd Page 18 554470 ί ί電結構的方法,其中該第-介電層之材質包括氮化 你> V ·如申請專利範圍第11項所述之於低介電材料層中 心成導電纟士播 电〜構的方法,其中該第二介電層之材質包括 石夕或氧化矽。 來丨、5·如申請專利範圍第11項所述之於低介電材料層中 二、導電結構的方法,其中該低介電材料層之材質係為一 有機材質。 ^ 、16 ·如申請專利範圍第1 1項所述之於低介電材料層中 形成導電結構的方法,其中在形成該低介電材料層時,更 包括彳參雜一無機材料於該低介電材料層中。 ,17 ·如申請專利範圍第1 1項所述之於低介電材料層中 形成導電結構的方法,其中該第二介電層之厚度係大於該 第一介電層之厚度。 18 ·如申請專利範圍第i丨項所述之於低介電材料層中 形成導電結構的方法,其中該第一介電層之厚度係為500 埃至15〇〇埃。 1 9 ·如申請專利範圍第11項所述之於低介電材料層中 形成導電結構的方法,其中該低介電材料層之厚度係為 6000 埃至40000 埃。 2 0 ·如申請專利範圍第丨丨項所述之於低介電材料層中 形成導電結構的方法,其中該第二介電層之厚度係為2500 埃至35〇〇埃。ί ί The method of the electrical structure, wherein the material of the -dielectric layer includes nitriding you > V · As described in item 11 of the scope of the patent application, the conductive dielectric layer is formed at the center of the low-dielectric material layer. Method, wherein the material of the second dielectric layer includes Shi Xi or silicon oxide. Next, 5. The method for conducting structures in the low-dielectric material layer as described in item 11 of the scope of patent application. 2. The material of the low-dielectric material layer is an organic material. ^, 16 · The method for forming a conductive structure in a low-dielectric material layer as described in item 11 of the scope of patent application, wherein when forming the low-dielectric material layer, it further includes doping an inorganic material into the low-dielectric material layer. In the dielectric material layer. 17, The method for forming a conductive structure in a low dielectric material layer as described in item 11 of the scope of the patent application, wherein the thickness of the second dielectric layer is greater than the thickness of the first dielectric layer. 18. The method for forming a conductive structure in a low-dielectric material layer as described in item i 丨 of the scope of patent application, wherein the thickness of the first dielectric layer is 500 Angstroms to 15,000 Angstroms. 19 · The method for forming a conductive structure in a low-dielectric material layer as described in item 11 of the scope of patent application, wherein the thickness of the low-dielectric material layer is 6000 Angstroms to 40,000 Angstroms. 2 0. The method for forming a conductive structure in a low-dielectric material layer as described in item 丨 丨 of the patent application, wherein the thickness of the second dielectric layer is 2500 angstroms to 3500 angstroms. 9487twf.ptd 第19頁9487twf.ptd Page 19
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