TW554423B - Tungsten gate structure and method for producing the same - Google Patents
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554423 五、發明說明(1) 【發明領域】 本發明是有關於半導體製程技術,且特別是有關於一 種鎢金屬閘極結構及製造方法,可防止金屬閘極中之鎢金 屬氧化’以提供良好的金屬閘極品質。 【發明背景】 半導體§己憶體元件(mem〇ry device)可分為可讀寫之 記憶體與唯讀(read on 1 y)之記憶體,而可讀寫之記憶體 又可分為DRAM及SRAM兩大種類。目前又以DRAM為主要應用 之§己憶體元件,其係由一電容(capaCit〇r)及一電晶體 (transistor)所組成。 由於對於記憶體的研究快速,記憶體的容量以每三年 提升四倍的速度成長,如目前普遍之2 5 6 Mb DRAM,容量更 大之DRAM如1Gb DRAM也已為各企業界與學術界廣為研究 中。 到目前為此,經摻雜之複晶矽(doped poly —si iicQn) 材料已廣泛應用於半導體元件之閘電極,並且會沉積一石夕 化鎢(tungsten Si 1 icide)以降低閘電極之電阻值。石夕化 鎢薄膜之電阻值約為1 〇 〇 # m · c m,對於記憶體容量更大且 閘極線寬更精細之1 G b以上D R A Μ而言,其電阻值仍為過 高,故需要能提供更低電阻值之金屬閘極材料,例如嫣 (tungsten ; W)金屬,其電阻值約為1〇 · cm,近年來已 有許多相關之研究出現。 於美國專利第6340 62 9號中揭露,一鎢金屬閘極結構554423 V. Description of the Invention (1) [Field of the Invention] The present invention relates to semiconductor process technology, and more particularly to a tungsten metal gate structure and manufacturing method, which can prevent the tungsten metal in the metal gate from oxidizing to provide good Metal gate quality. [Background of the Invention] Semiconductors § Memory devices can be divided into read-write memory and read-only memory (read on 1 y), and read-write memory can be divided into DRAM And SRAM. At present, DRAM is the main application of § memory device, which is composed of a capacitor (capaCitor) and a transistor (transistor). Due to the rapid research on memory, the memory capacity is increasing four times every three years. For example, the current 2 56 Mb DRAM, and larger DRAM such as 1 Gb DRAM have also been used by various business and academic circles. Widely researched. To this end, doped poly-si iicQn materials have been widely used in gate electrodes of semiconductor devices, and a tungsten Si 1 pesticide can be deposited to reduce the resistance value of the gate electrodes. . The resistance value of Shixihua tungsten thin film is about 100mm. The resistance value is still too high for DRA M above 1 Gb with larger memory capacity and finer gate line width. There is a need for metal gate materials that can provide lower resistance values, such as Tungsten (W) metal, which has a resistance value of about 10 cm, and many related studies have appeared in recent years. Disclosed in US Patent No. 6,340,62, a tungsten metal gate structure
0548·8242TWF(N) : 91010 ; Shawn.ptd 第 4 頁 " ' -- 5544230548 · 8242TWF (N): 91010; Shawn.ptd page 4 " '-554423
、、子 故‘鎢金屬开免:金屬擴散至其下方之複晶矽材料, 其材質為氮二:成一擴散阻障層於複晶石夕層上, 上。 鎢(WN),以利鎢金屬形成於上述擴散阻障層 於鶴金屬層形成後 以作為閘極形成之餘刻 質通常為氮化矽,其形 (LP-furnace) 〇 ’通常會更形成一頂蓋(cap)層, 罩幕(etching mask),其形成之材 成方法通常為高溫之低壓爐管製程Therefore, ‘tungsten metal is exempted: the metal is diffused to the polycrystalline silicon material below it, and its material is nitrogen 2: it forms a diffusion barrier layer on the polycrystalline stone layer. Tungsten (WN) is used to form tungsten metal on the above diffusion barrier layer. After the formation of the crane metal layer, the remaining etching material is usually silicon nitride, and its shape (LP-furnace) is usually more formed. Cap layer (etching mask), the forming method is usually high temperature and low pressure furnace control process
而使用鎢金屬作為閘極材料仍有其缺點,於美國 專利第6346467號中揭露’於後續氮化矽層之高溫擴管、,However, the use of tungsten metal as the gate material still has its shortcomings. It is disclosed in U.S. Patent No. 6,346,467.
程中,於高溫(約900。〇且含氧環境之爐管製程下,便會 造^鎢金屬氧化之情形發生。雖然爐管機台皆已配置了曰隔 絕室(load lock)及相關之氮氣淋浴盒(N2 sh〇wer b〇x)利 用氮氣減少晶圓進爐管前之爐管内部之氧氣濃度(〇2 density),但是於微量的氧氣(<1〇〇ppm)存在下,仍會造 成此不期望之鎢金屬氧化情形,且於後續之氮化矽材"料形 成後,經由檢測機台(如KLA檢測)檢測出晶圓表面由前程 鎢金屬氧化所造成之氮化矽層下方埋入式缺陷(embedded defects)現象,此缺陷不屬於微浮粒子(particle)而是由 於鎢金屬氧化所造成,不僅影響其本身鎢閘極材料之品 質,所連帶造成之ll化矽層之表面均勻度不一,於後續蝕 刻製程結束後,較嚴重者可能會發現蝕刻殘留所形成兩字 元線連結情形,並於後續電性測試中發現字元線對字元線 斷路(word line to word line sh〇rt)之情形,對於金屬In the process, under high temperature (approximately 900 ° C and oxygen-containing furnace control process, tungsten metal oxidation will occur. Although the furnace tube machine has been equipped with a load lock and related The nitrogen shower box (N2 shower b0x) uses nitrogen to reduce the oxygen concentration (02 density) inside the furnace tube before the wafer enters the furnace tube, but in the presence of a trace amount of oxygen (<100 ppm), This undesired tungsten metal oxidation situation will still be caused. After the subsequent formation of silicon nitride material, the testing machine (such as KLA inspection) detects the nitrided surface of the wafer caused by the tungsten oxide oxidation. Embedded defects under the silicon layer. This defect is not a micro-floating particle but is caused by the oxidation of tungsten metal, which not only affects the quality of the tungsten gate material itself, but also causes silicon silicon. The surface uniformity of the layer is not uniform. After the subsequent etching process is completed, the more severe ones may find the connection between the two word lines formed by the etching residue, and the word line to word line disconnection is found in the subsequent electrical test. line to word line sh〇rt), for metal
〇548-8242TWF(N) - 91010 · Shawn.ptd 第5頁 554423 五、發明說明(3) 間極製程影響嚴重。 【發明概要】 有鑑於此,本發 屬氧化之一種金屬閘 溫爐管製程中產生氧 為達上述目的, 構及製造方法,藉由 屬與後續形成絕緣層 層之氧原子結合,防 構品質。 簡言之,本發明 驟包括··形成一薄氧 複晶矽層於該薄氧化 層上,沉積一鎮金屬 障層於該鎢金屬層上 觸氧原子而氧化;沈 定義該絕緣層、該第 層、遠複晶秒層、及 層之鎢金屬閘極結構 由於本發明之製 此在後續的高溫爐管 金屬氧化所造成後續 (embedded defects) f !!主要目的就是提供可防止閘極金 和衣矛王,可防止閘極金屬於後續之高 化之情形。 、 本發明提供了一種新的鎢金屬閘極結 形,一氮化鈦/鈦之複合層中之鈦金 之高溫爐管製程中,與擴散過I化鈦 止了鎢金屬閘極的氧化,以維持其結 之鎢金屬閘極結構及製造方法,其步 化層於一半導-體基底表面上;沈積一 層上,沉積一第一阻障層於該複晶矽 層於該第二阻障層上;沉積一第二阻 ,以避免鎢金屬層於後續熱製程中接 積一絕緣層於該第二阻障層上;以及 二阻障層、該金屬層、該第一阻障 戎薄氧化層,以形成一具有絕緣頂蓋 〇 程可大幅改善鎢金屬閘極之品質,因 製程後,可防止金屬閘極結構中因嫣 絕緣頂蓋層下方之埋入式缺陷 的發生,如此可提高產品良率、改善 »〇548-8242TWF (N)-91010 · Shawn.ptd Page 5 554423 5. Description of the invention (3) The interpolar process has a serious impact. [Summary of the Invention] In view of this, the present invention is a kind of metal gate temperature furnace that generates oxygen during the control process in order to achieve the above-mentioned purpose. . In short, the present invention includes: forming a thin oxygen polycrystalline silicon layer on the thin oxide layer, depositing a metal barrier layer on the tungsten metal layer to oxidize by contacting oxygen atoms; Shen defines the insulating layer, the The tungsten metal gate structure of the first layer, the far-secondary crystal layer, and the layer is due to the fabrication of the present invention and subsequent defects caused by the oxidation of the high-temperature furnace tube metal. The main purpose is to provide protection against gate gold. The King of Spears can prevent the gate metal from increasing in the future. The present invention provides a new tungsten metal gate junction structure. In the process of high-temperature furnace control of titanium gold in a titanium nitride / titanium composite layer, the oxidation of the tungsten metal gate is stopped by diffusion of titanium oxide. In order to maintain its junction, a tungsten metal gate structure and a manufacturing method, a stepped layer is deposited on the surface of a half-conductor substrate; a layer is deposited, and a first barrier layer is deposited on the polycrystalline silicon layer on the second barrier Layer; depositing a second barrier to prevent the tungsten metal layer from accumulating an insulating layer on the second barrier layer in the subsequent thermal process; and two barrier layers, the metal layer, and the first barrier layer Oxidation layer to form an insulating cap can greatly improve the quality of the tungsten metal gate. After the manufacturing process, it can prevent the occurrence of embedded defects in the metal gate structure under the insulating cap layer. Improve Product Yield, Improve »
554423 五、發明說明(4) 產品可靠度。 【實施例】 本發明之實施例將配合第1圖至第3圖作一詳細敘述如 下,百先如第1圖所示,在一半導體基底丨〇,例如矽基底 上,依,統製程技術依序形成一薄氧化層丨2和一複晶矽層 14。、薄,化層1 2係用來作為閘極氧化層,通常是以乾式或 濕式熱氧化法在7〇〇〜1 000下緩慢形成,厚度約在3〇〜1〇〇 埃之間。複晶矽層14為掺雜(doped)的複晶矽層,以形成 NM〇S凡件為例,可藉由電漿化學氣相沈積法(PECVD)臨場 (in_situ)進行摻雜磷化氫(ph〇sphine)或砷化三氫 (arsine)氣體’形成厚約1〇⑽〜2〇〇(}埃的複晶矽層。 接下來’以物理氣相沈積法(pvD)在複晶矽層14上沈 積擴散阻障層15,其材質為氮化鎢(WN),其厚度介於 3 0〜1 0 0埃’以形成一鎢金屬與複晶矽層間之擴散阻障 (diffusion barrier)。並於沈積完擴散阻障層15後,接 下來,在擴散阻障層1 5上以物理氣相沈積法(pvD)沈積一 鶴金屬層1 6,作為此金屬閘極之閘極部分材料,其厚度介 於20 0〜1 0 0 0埃。接著利用物理氣相沉積法(pVD),沉積一 鈦金屬(Ti)層,厚度約為5〇〜3〇〇埃,並臨場(in —situ)地 氮化上述鈦金屬層形成由氮化鈦18b與鈦金屬18a所組成之 氮化鈦/鈦複合層,其中氮化鈦/鈦之厚度比介於3 : 1〜 1 :1,氮化鈦/鈇複合層(TiN/Ti)18b/18a可視為此金屬閘 極結構中之氧阻障(ο X y g e n b a r r i e r )層,並利用此複合層554423 5. Description of the invention (4) Product reliability. [Embodiment] The embodiment of the present invention will be described in detail with reference to Figs. 1 to 3 as follows. As shown in Fig. 1, Baixian is a semiconductor substrate, such as a silicon substrate. A thin oxide layer 2 and a polycrystalline silicon layer 14 are sequentially formed. The thin and thin layer 12 is used as the gate oxide layer. It is usually formed slowly by dry or wet thermal oxidation at 700 ~ 1000, and the thickness is about 30 ~ 100 angstroms. The polycrystalline silicon layer 14 is a doped polycrystalline silicon layer. Taking the formation of NMOS as an example, doped phosphine can be performed in-situ by plasma chemical vapor deposition (PECVD). (Phosphine) or arsine gas ('arsine') gas to form a polycrystalline silicon layer having a thickness of about 10 ⑽ to 200 (}) angstroms. Next, 'physical vapor deposition (pvD) was performed on the polycrystalline silicon A diffusion barrier layer 15 is deposited on layer 14 and is made of tungsten nitride (WN) and has a thickness between 30 and 100 angstroms to form a diffusion barrier between a tungsten metal and a polycrystalline silicon layer. After the diffusion barrier layer 15 is deposited, next, a crane metal layer 16 is deposited on the diffusion barrier layer 15 by a physical vapor deposition method (pvD) as the material of the gate portion of the metal gate. , Its thickness is between 200 and 100 angstroms. Then a physical vapor deposition (pVD) method is used to deposit a titanium metal (Ti) layer with a thickness of about 50 angstroms to 300 angstroms. situ) nitride the titanium metal layer to form a titanium nitride / titanium composite layer composed of titanium nitride 18b and titanium metal 18a, wherein the thickness ratio of titanium nitride / titanium is between 3: 1 ~ 1: 1, nitrogen Turn into / Fu composite layer (TiN / Ti) 18b / 18a visual oxygen barrier (ο X y g e n b a r r i e r) layer, using for this purpose the composite layer of the metal gate structure
0548-8242TWF(N) ^ 91010 ; Shawn.ptd 第7頁 5544230548-8242TWF (N) ^ 91010; Shawn.ptd p. 7 554423
五、發明說明(5) 中氮化鈦18b作為氧分子之擴散阻障(dif fusi〇n baRier) 層,並利用鈦較鎢更易與氧分子氧化之特性,使擴散經過 氮化欽層18a之氧分子於未與鎢金屬層16接觸前便先與鈦 金屬1 8a接觸並形成氧化,以確保鎢金屬未接觸氧分^, 鎢金屬的氧化效應也不致發生。 接著沈積一絕緣層20,將來作、為閘極結構的絕緣頂蓋 層(cap layer),其方法係利用低壓化學氣相沈積法 (LPCVD)於500〜900 °C下沈積一厚度介於丨〇〇〇〜2〇〇〇之氮化 碎層。 接下來,以傳統的微影成像與反應性離子蝕刻技術以 CHF3、C12等蝕刻源,將上述各層定義成第2圖所示的閘極 結構二蝕刻完畢後,可使用氧電漿的乾式去光阻程序與濕 式洗淨程序將光阻去除,而透過濕式洗淨程序可將未被閘 極結構覆蓋的薄氧化層去除。如&,得到—具有絕緣頂蓋 層20的鎢金屬閘極結構G,其具有理想的閘極鎢金屬品 質0V. Description of the invention (5) Titanium nitride 18b acts as a diffusion barrier (dif fusión baRier) layer for oxygen molecules, and utilizes the characteristic that titanium is more easily oxidized with oxygen molecules than tungsten, so that diffusion through the nitride layer 18a Before the oxygen molecules are in contact with the tungsten metal layer 16, they are in contact with the titanium metal 18 a and are oxidized to ensure that the tungsten metal is not in contact with the oxygen, and the oxidation effect of the tungsten metal will not occur. Next, an insulating layer 20 is deposited, which will be used as a gate cap insulating layer in the future. The method is to use a low pressure chemical vapor deposition method (LPCVD) to deposit a thickness between 500 and 900 ° C. The nitrided fragmented layer is between 2000 and 2000. Next, using conventional lithography imaging and reactive ion etching techniques such as CHF3, C12 and other etching sources, the above layers are defined as the gate structure shown in Figure 2. After the second etching is completed, an oxygen plasma can be used to dry the electrode. The photoresist process and the wet cleaning process remove the photoresist, and the thin oxide layer not covered by the gate structure can be removed through the wet cleaning process. As & obtained-a tungsten metal gate structure G with an insulating cap layer 20, which has an ideal gate tungsten metal quality 0
請參照第3圖,在此之後,可依照傳統製程技術,先 以離子植入與快速熱回火程序製作淡摻雜源極/汲極區 (LDD)24,然後以化學氣相沈積與回蝕刻程序形成絕緣側 壁層22,最後再以離子植入與快速熱回火形成源極/汲極 區2 6 ’而完成一鎢金屬閘極的製作。 本發明之嫣金屬閘極之結構如第3圖所示,包括:一 閘極氧化層,位於一半導體基底表面上;一複晶矽層,位 於該閘極氧化層上;一擴散阻障層,位於該複晶矽層上;Please refer to Figure 3. After that, according to the traditional process technology, a lightly doped source / drain region (LDD) 24 can be fabricated by ion implantation and rapid thermal tempering procedures, and then chemical vapor deposition and tempering can be performed. The insulating sidewall layer 22 is formed by an etching process, and a source / drain region 2 6 ′ is formed by ion implantation and rapid thermal tempering to complete the fabrication of a tungsten metal gate. The structure of the metal gate of the present invention, as shown in FIG. 3, includes: a gate oxide layer on a semiconductor substrate surface; a polycrystalline silicon layer on the gate oxide layer; a diffusion barrier layer On the polycrystalline silicon layer;
554423554423
鹤金屬層 位於該擴散阻障層上 氧阻障層,位於該 鎢金屬層上;以及_絕緣層,位於爷立 .....- 了位於該鎮金屬問極兩側之絕緣;二2層上,更包括 淡摻雜源極/汲極區,以形成一完整之技原么極/沒極區以及 雖然本發明已以較佳實施例 ·烏金屬閘極結構。 限定本發日月,任何熟習此技藝者 2然其並非用以 和範圍内,當可作各種之更動與潤飾,精神 範圍當視後附之申請專利範圍 =本發明之保護The crane metal layer is located on the diffusion barrier layer and the oxygen barrier layer is located on the tungsten metal layer; and the _insulation layer is located on Yeli .....- the insulation located on both sides of the town's metal interrogator; 2 On the layer, a lightly doped source / drain region is further formed to form a complete technical memo / dead region, and although the present invention has been described with a preferred embodiment, a black metal gate structure. Limit the date and time of this issue. Anyone who is familiar with this skill is not used within the scope. It can be used for various changes and retouching. The scope of the spirit is based on the scope of the attached patents = the protection of the present invention.
0548-8242TWF(N) ; 91010 : Shawn.ptd $ 9頁 554423 圖式簡單說明 第卜3圖為一系列剖面圖,用以說明本發明一較佳實 施例製作複晶矽金屬閘極鎢金屬閘極結構及製造方法。 符號說明】 10〜半導體基底; 1 4〜複晶矽層; 1 6〜鐵金屬層; 18b〜氮化鈦層; 2 2〜絕緣側壁; 26〜源極/汲極區 1 2〜薄氧化層; 1 5〜擴散阻障層;. 18a〜鈦金屬層; 2 0〜絕緣層; 24〜淡摻雜源極/汲極區 G〜閘極結構。0548-8242TWF (N); 91010: Shawn.ptd $ 9, page 554423 Brief description of the diagram Figure 3 is a series of cross-sectional views, which are used to illustrate the fabrication of a polycrystalline silicon metal gate tungsten metal gate Pole structure and manufacturing method. Explanation of symbols] 10 ~ semiconductor substrate; 1 ~ 4 ~ polycrystalline silicon layer; 16 ~ ferrous metal layer; 18b ~ titanium nitride layer; 2 ~ 2 insulating sidewall; 26 ~ source / drain region 1 ~ 2 thin oxide layer 15 ~ diffusion barrier layer; 18a ~ titanium metal layer; 20 ~ insulating layer; 24 ~ lightly doped source / drain region G ~ gate structure.
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