TW550998B - Printed circuit board with mixed type of dielectric layer, and the manufacturing method thereof - Google Patents

Printed circuit board with mixed type of dielectric layer, and the manufacturing method thereof Download PDF

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Publication number
TW550998B
TW550998B TW91101955A TW91101955A TW550998B TW 550998 B TW550998 B TW 550998B TW 91101955 A TW91101955 A TW 91101955A TW 91101955 A TW91101955 A TW 91101955A TW 550998 B TW550998 B TW 550998B
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Taiwan
Prior art keywords
printed circuit
dielectric
circuit board
dielectric layer
layer
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TW91101955A
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Chinese (zh)
Inventor
Guang-Shian Juang
Jau-Chin Jeng
Jang-Yun Hung
Jr-Hau Ye
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Unimicron Technology Corp
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Publication of TW550998B publication Critical patent/TW550998B/en

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Abstract

The present invention provides a printed circuit board with mixed type of dielectric layer, and the manufacturing method thereof, which can provide the electrical integrity and optimized material characteristics for the partial circuit or component welding sites on the printed circuit board. Thus, the method only requires to replace the dielectric material in part of the layout area without having to increase an additional layout layer or totallyreplace with a dielectric layer made of different material.

Description

550998 8 6 1 21 w f. d 〇 c/0 1 2 ^ B7 五、發明說明(/ ) 印丨币口々 本發明是有關於一種具有混合型介電層之印刷電路 板及其製造方法,特別是有關於一種應用於印刷電路板之 具有混合型介電層之印刷電路板及其製造方法。 由於消費者對電子產品的要求除了功能強大外’更 要求要輕、薄、短、小,因此市面上的電子產品的積集度 (integration)越來越高,功能越來越強。裝設電子元件的印 刷電路板也開始越作越多層,以便使電子元件可以更密集 的裝設於印刷電路板上,使電子產品所佔的空間能更小’ 因此對於印刷電路板之生產製造,一方面要提高其表面積 使用率,一方面也要提高良率以降低生產成本。 經濟部智慧財產局員工消費合作社印製 -------------裝--- (請先閱讀背面之注意事項再填寫本頁) 製作多層印刷電路板時,爲求取各層間能有良好的 配合,在製圖、製版時必須力求精密,其製作原理爲將各 層電氣線路於極薄之單面或雙面板上完成蝕刻線路之工 作,並鑽好黏合時之定位孔。此時於各層間插入中間結合 板,再放入大壓床上之平板之間加熱,緩慢加壓,使各層 間殘餘之空氣可以完全排出。接著繼續加壓及加溫使中間 結合板之樹脂達到固化狀態。最後取出基板,再依雙面穿 孔電鍍印刷電路板之流程進行製作。簡而言之,多層印刷 電路板之製造方法是將經過蝕刻及電鍍之後的各層電路板 重疊起來,並在各層之間夾入一片絕緣層(prepreg)板, 然後加熱使樹脂融化形成膠狀,最後變成完全聚合之樹 脂。在樹脂開始膠化時,即施加壓力,迫使樹脂流動以塡 滿線路空隙,並全面黏住各層疊板,以形成完全密封之印 刷電路板。 3 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 550998 8 6 I 21 w f. d 〇 c / 0 1 2 A7 B7 五、發明說明(1 ) 其中,絕緣層一般是由一層玻璃纖維布含注入樹 脂,經特殊方法聚合而成之環氧(epoxy)樹脂黏結材料,又 稱爲”B”stage (半成品)。而其他常用材料還包栝:聚四 氟乙烯(PTFE,Polytetrafluoroethylene )、全氟乙烯 _丙 嫌共聚物(FEP,pertluoro ethylene-propylene copolymer)、 聚丙儲(polypro pylone)等。因絕緣層是配置於各層電路 間,其不只是阻止了層間電荷的移動,還具有介電體分極 之電氣作用,因此絕緣層又稱爲介電層(interconnect dielectrics) 〇 然而,如前所述,因電子產品的積集度越來越高, 使印刷電路板上導體層線路越來越密集,或者線路上有無 線電高頻運作的積體電路(1C)元件,如此會使得導線電阻 和導線電容値增加,使得時間延遲(RC delay)上升。所謂 時間延遲乃是指金屬導線的電阻値和金屬導線間的介電材 質所產生的寄生電容(parasitic capacitor)之乘積。時間延 遲對積體電路元件的功能有很大的影響,像是會使得訊號 傳輸速度降低、電路功率耗損上升、和串擾雜訊(cross talk noise)增加。習知對此問題解決方式,通常是增加額外的 佈線層,或者是使用以一種穩定的低介電係數(Low & stable Dk)材料。此種穩定的低介電係數材料,其需求之特 性,基本上必須滿足熱穩定性(thermal stability)高、玻璃 轉換溫度(glass transition temperature)高、高製程整合 能力、低漏電流、低介電常數…等,例如爲··聚四氟乙嫌 (俗稱鐵氟龍—PTFE,Poly tetrafluoroethylene)、聚苯醚 4 本紙張尺度適用中國國家標準(CNS)A4規格(21〇χ 297公釐) --------— I! -裝·! (請先閱讀背面之注意事項再填寫本頁) 訂· 經濟部智慧財產局員工消費合作社印製 經濟部智慧財產局員工消費合作社印製 550998 86 1 2twf.d〇c/〇 ! 0 A7 ---------i7 —_____ 五、n說明()) 環氧樹脂(PP〇/epoxy,poly phenylene 〇xide ep〇xy)等, 其可適^於高速或高頻之印刷電路板。然而,此類材料之 成本_,即使該層線路板上只有局部線路需要使用此種 W电層材貞’ g卩仍須整層介電層全面使用此昂貴之介電層 材質,又或者是必須增加額外的佈線層,都會造成成本上 之浪費。 因此,本發明之目的係在提供一種具有混合型介電 層之印刷電路板及其製造方法,爲使印刷電路板局部線路 或零件焊接處之電性完整性及材料特性最佳化,在不需增 加額外佈線層或全面替換不同材料介電層之情況下,僅更 替局部佈線區域之介電材料。如此可降低材料成本,簡化 佈線設計,進而增加佈線面積或減少層數。 爲解決上述的問題點及爲達成上述之目的,本發明 提出一種具有混合型介電層之印刷電路板,適用於一印刷 電路板,此印刷電路板由一絕緣蕊、至少一線路層以及至 少一介電層依序疊合而成。前述介電層之材質爲第一介電 物質,其特徵在於··此介電層具有至少一圖案化開口,而 此圖案化開口內塡滿第二介電物質。 又,本發明提出一種具有混合型介電層之印刷電路 板製造方法,包括:1.提供一印刷電路板,此印刷電路板 係由一絕緣芯層、一第一導體層疊合形成。2.於第一導體 層上以例如簾幕式塗佈之方式形成一介電層,使第一導體 層疊合於介電層與絕緣芯層之間。而此介電層之材質爲一 感光型介電材質。3·以曝光顯影之方式移除部分介電層, (請先閱讀背面之注意事項再填寫本頁) 裝 訂: 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐) 550998 A7 8612t\vf.doc/012 五、發明說明(> ) 以形成至少一圖案化開口,並暴露出第一導體餍。4於前 述圖案化開口內塡入充滿一第二介電物質。 又’本發明提出一種具有混合型介電層之印刷電路 板製造方法’包括:1·提供一印刷電路板,此印刷電路板 係由一絕緣芯層、一第一導體層疊合形成。2·於第一導體 層上以例如網版印刷之方式形成一介電層,使第〜導體層 疊合於介電層與絕緣芯層之間。此介電層具有至少二圖案 化開口,並暴露出第一導體層,而介電層之材質爲一第一 71鼠物質。3.匕圖案化開口內塡入充滿—^第二介電物質。 其中,前述第二介電物質爲低介電係數材料,例如 爲聚四氣乙嫌、聚苯酸環氧樹脂。 依照本發明之特徵,每一圖案化開口內所塡充之介 電材質,可以針對不同需求而塡入各種不同的介電材質, 而不需增加額外佈線層或全面替換不同材料且較昂貴之介 電層,可降低材料成本,簡化佈線設計,進而增加佈線面 積或減少層數。 爲讓本發明之上述和其他目的、特徵、和優點能更 明顯易懂,下文特舉一較佳實施例,並配合所附圖式,作 詳細說明如下: 圖式之簡單 第la〜le圖繪示本發明具有混合型介電層之印刷電 路板製造方法流程示意圖; 第2a〜2d圖繪示本發明具有混合型介電層之印刷電 路板製造方法並形成盲孔之流程示意圖。 6 (請先閱讀背面之注意事項再填寫本頁)550998 8 6 1 21 w f. D oc / 0 1 2 ^ B7 V. Description of the Invention (/) Printing 丨 Coin 々 The present invention relates to a printed circuit board with a hybrid dielectric layer and a manufacturing method thereof. In particular, it relates to a printed circuit board with a hybrid dielectric layer applied to a printed circuit board and a method for manufacturing the same. In addition to consumers' requirements for electronic products, in addition to being powerful, they also require lightness, thinness, shortness, and smallness. As a result, the integration of electronic products on the market is getting higher and higher, and functions are becoming stronger. The printed circuit boards on which electronic components are installed have also begun to become more and more multilayered, so that electronic components can be more densely mounted on printed circuit boards, so that the space occupied by electronic products can be smaller. Therefore, for the production of printed circuit boards On the one hand, it is necessary to increase the surface area utilization rate, and on the other hand, it is necessary to increase the yield rate to reduce production costs. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs ------------- Installation --- (Please read the precautions on the back before filling out this page) When making multilayer printed circuit boards, There can be good coordination between the layers. It is necessary to strive for precision when drawing and making plates. The production principle is to complete the etching of each layer of electrical circuits on a thin single-sided or double-sided board, and drill the positioning holes for bonding. At this time, insert the intermediate bonding plate between each layer, and then place it between the plates on the large press to heat and slowly press so that the residual air between the layers can be completely exhausted. Then continue to pressurize and heat so that the resin of the intermediate bonding board reaches a cured state. Finally, the substrate is taken out, and then manufactured according to the process of double-sided through-hole electroplating printed circuit board. In short, the manufacturing method of a multilayer printed circuit board is to overlap each layer of the circuit board after etching and plating, sandwich an insulating layer (prepreg) between the layers, and then heat to melt the resin to form a gel. Finally it becomes a fully polymerized resin. When the resin begins to gel, pressure is applied to force the resin to flow to fill the gaps in the circuit and fully adhere to the laminated boards to form a completely sealed printed circuit board. 3 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 550998 8 6 I 21 w f. D oc / 0 1 2 A7 B7 V. Description of the invention (1) Among them, the insulation layer is generally A layer of glass fiber cloth containing epoxy resin, polymerized by a special method of epoxy resin bonding material, also known as "B" stage (semi-finished product). Other commonly used materials include: polytetrafluoroethylene (PTFE), pertluoro ethylene-propylene copolymer (FEP), polypro pylone, etc. Because the insulating layer is arranged between the circuits of various layers, it not only prevents the movement of charges between the layers, but also has the electrical function of dielectric polarization. Therefore, the insulating layer is also called interconnect dielectrics. However, as mentioned earlier, Due to the increasing accumulation of electronic products, the conductor layers on printed circuit boards are becoming denser, or there are integrated circuit (1C) components that operate at high frequency on the circuit, which will lead to wire resistance and wires. The capacitance 値 increases, causing the time delay (RC delay) to increase. The so-called time delay refers to the product of the resistance 电容 of a metal wire and the parasitic capacitor generated by the dielectric material between the metal wires. The time delay has a great impact on the function of the integrated circuit components, such as reducing the signal transmission speed, increasing the circuit power loss, and increasing cross talk noise. Conventional solutions to this problem are usually to add additional wiring layers or to use a stable low & stable Dk material. The characteristics of this stable low dielectric constant material must basically meet high thermal stability, high glass transition temperature, high process integration capability, low leakage current, and low dielectricity. Constants, etc., for example, ... polytetrafluoroethylene (commonly known as PTFE, Poly tetrafluoroethylene), polyphenylene ether 4 The paper size applies the Chinese National Standard (CNS) A4 specification (21〇χ 297 mm)- -------— I!-Installed! (Please read the precautions on the back before filling out this page) Order Printed by the Employees 'Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 550998 86 1 2twf.d〇c / 〇! 0 A7- ------- i7 —_____ V. n Explanation ()) Epoxy (PP〇 / epoxy, poly phenylene 〇xide ep〇xy), etc., which can be suitable for high-speed or high-frequency printed circuit boards. However, the cost of such materials_, even if only local wiring on this layer of circuit board requires the use of this W electrical layer material, it is still necessary to fully use the expensive dielectric layer material for the entire dielectric layer, or The need to add additional wiring layers will result in wasted costs. Therefore, the object of the present invention is to provide a printed circuit board with a hybrid dielectric layer and a method for manufacturing the same. In order to optimize the electrical integrity and material characteristics of the printed circuit board's local circuits or parts, When additional wiring layers need to be added or dielectric layers of different materials are completely replaced, only the dielectric materials in the local wiring area are replaced. This can reduce material costs, simplify wiring design, and then increase the wiring area or reduce the number of layers. In order to solve the above-mentioned problems and achieve the above-mentioned object, the present invention provides a printed circuit board with a hybrid dielectric layer, which is suitable for a printed circuit board. The printed circuit board consists of an insulating core, at least one circuit layer, and at least A dielectric layer is sequentially stacked. The material of the aforementioned dielectric layer is a first dielectric substance, which is characterized in that the dielectric layer has at least one patterned opening, and the patterned opening is filled with a second dielectric substance. In addition, the present invention provides a method for manufacturing a printed circuit board with a hybrid dielectric layer, including: 1. Providing a printed circuit board, the printed circuit board is formed by laminating an insulating core layer and a first conductor. 2. A dielectric layer is formed on the first conductor layer by, for example, curtain coating, so that the first conductor is laminated between the dielectric layer and the insulating core layer. The material of the dielectric layer is a photosensitive dielectric material. 3 · Remove part of the dielectric layer by exposure and development. (Please read the precautions on the back before filling this page.) Binding: This paper size applies to China National Standard (CNS) A4 (210x297 mm) 550998 A7 8612t \ vf.doc / 012 5. Description of the invention (>) to form at least one patterned opening and expose the first conductor 餍. 4 A second dielectric substance is filled into the patterned opening. Furthermore, the present invention proposes a method for manufacturing a printed circuit board with a hybrid dielectric layer, including: 1. Providing a printed circuit board, the printed circuit board is formed by laminating an insulating core layer and a first conductor. 2. A dielectric layer is formed on the first conductor layer by, for example, screen printing, so that the first to the conductor layers are stacked between the dielectric layer and the insulating core layer. The dielectric layer has at least two patterned openings and exposes a first conductor layer, and the material of the dielectric layer is a first 71 mouse substance. 3. The dagger patterned opening is filled with a second dielectric substance. The second dielectric substance is a low-dielectric-constant material, such as polytetrafluoroethylene, polybenzoic acid epoxy resin. According to the features of the present invention, the dielectric material filled in each patterned opening can be filled with a variety of different dielectric materials according to different needs, without the need to add additional wiring layers or replace different materials in a comprehensive manner and is more expensive. The dielectric layer can reduce the material cost, simplify the wiring design, and then increase the wiring area or reduce the number of layers. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below and described in detail with the accompanying drawings as follows. FIG. 2 is a schematic flow chart of a method for manufacturing a printed circuit board with a hybrid dielectric layer according to the present invention; FIGS. 2a to 2d show schematic flow charts of a method for manufacturing a printed circuit board with a hybrid dielectric layer according to the present invention and form a blind hole. 6 (Please read the notes on the back before filling this page)

經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4^^7〇 χ 297公复) 550998 86 ! 2twf.doc/0 1 2 A7 B7 五、發明說明(Γ) 圖式標號說明 100、110 :單層板 200、210 :線路層 --------裝 i I (請先閱讀背面之注意事項再填寫本頁) 212、214 :導通墊 300 :可感光型之介電層 400 :特殊要求之介電材質 320、410 :盲孔 鉸佳實施例 參考第la〜le圖,其繪示本發明較佳實施例具有混 合型介電層之印刷電路板製造方法流程示意圖。本實施例 中之多層板,如第la圖所示,是以分別具有一線路層200、 210之單層板1〇〇、11〇,經熱壓合(hot press)後,所形成 之雙層板爲例。當最上方之線路層210必須於其上疊合之 介電層,使用不同材質之介電材料(例如爲避免線路間之 時間延遲上升,而使用之低電阻値介電材質),又不欲全 面更換介電層之材質時(例如爲成本上之考量),即爲本 發明可應用之場合。 經濟部智慧財產局員工消費合作社印製 其步驟如下:首先如第lb圖所示,於線路層210 上塗佈一層可感光型之介電層300,其塗佈之方式可以爲 簾幕式塗佈(curtain coating)。接著以曝光顯影之方式,於 此可感光型之介電層300上欲疊合不同介電材質處形成至 少一圖案化開口 3 10,如第1c圖所示。再如第Id圖所示, 於圖案化開口 310內塡滿所需之介電材質400。最後,如 第le圖所示,對介電材質400進行平整化,以便於進行 7 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 550998 86 1 2twf.doc/0 1 2 A7 B7 五、發明說明(G ) 後續疊合其他層板之作業。 其中,圖案化開口 310之數量可以不只爲一個’且 每一圖案化開口 310內所塡充之介電材質400 ’可以針對 不同需求而塡入各種不同的介電材質’例如不同介電係 數、不同玻璃轉換溫度之材質。 又可以網版印刷(screen printing)之方式’直接於線 路層210上形成一具有圖案化開口 310之可感光型之介電 層 300 〇 若前述之多層板是以增層法(build up)時’因其上必 須形成一些盲孔(via)以作爲後續電鍍金屬層以導通不同層 線路之用,故可於可感光型之介電層300上’同時形成圖 案化開口 310以及於導通墊212上形成一盲孔320 ’如第 2a圖所示。然後,如第2b圖所示,於圖案化開口 31〇內 塡滿所需之介電材質400。最後,如第2c圖所示’對介電 材質400進行平整化,以利於進行後續形成其他層板之作 茉0 又若於具有介電材質400之區域內,也必須形成盲 孔以作爲導通墊214連接其他層線路之用,則可以雷射鑽 孔或其他機械鑽孔之方式,於導通墊214上之介電材質400 形成一盲孔410,如第2d圖所示。 依照上述本發明之較佳實施例可知,本發明至少具 有下列優點:每一圖案化開口內所塡充之介電材質,可以 針對不同需求而塡入各種不同的介電材質,而不需增加額 外佈線層或全面替換不同材料且較昂貴之介電層,可降低 8 本紙張尺度適用中國國豕標準(CNS)A4規格(210 X 297公髮) -----I--I----裝·-- (請先閱讀背面之注意事項再填寫本頁) -SI}. 經濟部智慧財產局員工消費合作社印製 550998 j · 8 6 1 21 \v f. d 〇 c / 0 1 2 ^ _B7_ 五、發明說明(9 ) 材料成本,簡化佈線設計,進而增加佈線面積或減少層數。 雖然本發明已以一較佳實施例揭露如上,然其並非 用以限定本發明,任何熟習此技藝者,在不脫離本發明之 精神和範圍內,當可作些許之更動與潤飾,因此本發明之 保護範圍當視後附之申請專利範圍所界定者爲準。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 9 本紙張尺度適用中國國家標準(CNS)A4規格(21〇χ 297公釐)Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the paper size is applicable to Chinese National Standard (CNS) A4 ^^ 7〇χ 297 public reply) 550998 86! 2twf.doc / 0 1 2 A7 B7 V. Description of Invention (Γ) Figure 100, 110: single-layer board 200, 210: circuit layer -------- install i I (please read the precautions on the back before filling this page) 212, 214: conductive pad 300: photosensitive Type dielectric layer 400: dielectric materials 320, 410 with special requirements: Blind hole hinges Refer to Figures la to le for a preferred embodiment, which illustrates the manufacture of a printed circuit board with a hybrid dielectric layer in a preferred embodiment of the present invention Method flow diagram. As shown in FIG. 1a, the multilayer board in this embodiment is a single-layer board 100 and 110 having a circuit layer 200 and 210, respectively. After hot pressing, the double-layer board is formed. Laminate as an example. When the uppermost circuit layer 210 must be stacked on top of the dielectric layer, use different dielectric materials (such as low-resistance 上升 dielectric materials to avoid time delay rise between circuits), and do not want to replace it completely The material of the dielectric layer (for example, in terms of cost considerations) is a place where the present invention can be applied. The steps of printing by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs are as follows: First, as shown in FIG. 1b, a photosensitive dielectric layer 300 is coated on the circuit layer 210, and the coating method can be curtain coating. Cloth (curtain coating). Then, at least one patterned opening 3 10 is formed on the photosensitive dielectric layer 300 where different dielectric materials are to be stacked by exposure and development, as shown in FIG. 1c. As shown in FIG. Id, the patterned opening 310 is filled with the required dielectric material 400. Finally, as shown in Fig. Le, the dielectric material 400 is flattened to facilitate 7 paper sizes. Applicable to China National Standard (CNS) A4 (210 X 297 mm) 550998 86 1 2twf.doc / 0 1 2 A7 B7 V. Description of the Invention (G) Subsequent operations for laminating other boards. Among them, the number of the patterned openings 310 may not be only one, and the dielectric material 400 filled in each of the patterned openings 310 may be filled with various dielectric materials according to different needs, such as different dielectric coefficients, Material with different glass transition temperature. Alternatively, screen printing can be used to form a photosensitive dielectric layer 300 having a patterned opening 310 directly on the circuit layer 210. If the aforementioned multilayer board is built up, 'Because some vias must be formed thereon for subsequent electroplated metal layers to conduct different layers of circuits, it is possible to form patterned openings 310 and conductive pads 212 at the same time on the photosensitive dielectric layer 300' A blind hole 320 'is formed thereon as shown in FIG. 2a. Then, as shown in FIG. 2b, the required dielectric material 400 is filled in the patterned opening 31o. Finally, as shown in Figure 2c, the dielectric material 400 is leveled to facilitate the subsequent formation of other layers. If the dielectric material 400 is used in the area, a blind hole must also be formed for conduction. For the connection of the pad 214 with other layers of lines, a blind hole 410 can be formed in the dielectric material 400 on the conductive pad 214 by laser drilling or other mechanical drilling, as shown in FIG. 2d. According to the above-mentioned preferred embodiments of the present invention, it can be known that the present invention has at least the following advantages: The dielectric material filled in each patterned opening can be filled with different dielectric materials for different needs without adding. Additional wiring layers or full replacement of more expensive dielectric layers of different materials can reduce 8 paper sizes Applicable to China National Standard (CNS) A4 specification (210 X 297) ----- I--I-- --Installation ... (Please read the precautions on the back before filling this page) -SI}. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 550998 j · 8 6 1 21 \ v f. D 〇c / 0 1 2 ^ _B7_ V. Description of the invention (9) Material cost, simplify wiring design, and then increase the wiring area or reduce the number of layers. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application. (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 9 This paper size applies to China National Standard (CNS) A4 (21〇χ 297 mm)

Claims (1)

550998 4 86 1 2twf.doc/0 1 2 A8 R8 C8 Γ)8 £ Hi 土 六、申請專利範圍 1·一種具有混合型介電層之印刷電路板,適用於一 印刷電路板,s亥印刷電路板由一絕緣蕊、至少一線路層以 及至少一介電層依序疊合而成,該介電層之材質爲第一介 電物質,其特徵在於: 該介電層具有至少一圖案化開口,該圖案化開口內 塡滿第二介電物質。 2. 如申請專利範圍第1項所述之具有混合型介電層 之印刷電路板,其中該第二介電物質爲低介電係數材料。 3. 如申請專利範圍第2項所述之具有混合型介電層 之印刷電路板,其中該第二介電物質爲聚四氟乙烯。 4. 如申請專利範圍第2項所述之具有混合型介電層 之印刷電路板,其中該第二介電物質爲聚苯醚環氧樹脂。 5. 一種具有混合型介電層之印刷電路板製造方法, 包括: 提供一印刷電路板,該印刷電路板係由一絕緣芯 層、一第一導體層疊合形成; 於該第一導體層上形成一介電層,使該第一導體層 疊合於該介電層與該絕緣芯層之間,該介電層之材質爲一 感光型介電材質; 以曝光顯影之方式移除部分該介電層,以形成至少 一圖案化開口,並暴露出該第一導體層;以及 於該圖案化開口內塡入充滿一第二介電物質。 6. 如申請專利範圍第5項所述之具有混合型介電層 之印刷電路板製造方法,其中該第二介電物質爲低介電係 10 ----------------- (請先閱讀背面之注意事項再填寫本頁) 訂·- 線· 本紙張尺度適用中國國家標準(CNS)A4規格(2]0 X 297公Μ ) 550998 86 1 2twf.doc/0 1 2 A8 R8 C8 D8 % 时 I 申請專利範圍 數材料。 7. 如申請專利範圍第6項所述之具有混合型介電層 之印刷電路板製造方法,其中該第二介電物質爲聚四氟乙 烯。 8. 如申請專利範圍第6項所述之具有混合型介電層 之印刷電路板製造方法,其中該第二介電物質爲聚苯醚環 氧樹脂。 9. 如申請專利範圍第5項所述之具有混合型介電層 之印刷電路板製造方法,其中於該第一導體層上形成一介 電層之方式包括簾幕式塗佈。 10. —種具有混合型介電層之印刷電路板製造方法, 包括: 提供一印刷電路板,該印刷電路板係由一絕緣芯 層、一第一導體層疊合形成; 於該第一導體層上形成一介電層,使該第一導體層 疊合於該介電層與該絕緣芯層之間,該介電層具有至少一 圖案化開口,並暴露出該第一導體層,該介電層之材質爲 一第一介電物質;以及 於該圖案化開口內塡入充滿一第二介電物質。 11. 如申請專利範圍第10項所述之具有混合型介電 層之印刷電路板製造方法,其中該第二介電物質爲低介電 係數材料。 12. 如申請專利範圍第11項所述之具有混合型介電 層之印刷電路板製造方法,其中該第二介電物質爲聚四氟 (請先閱讀背面之注意事項再填寫本頁) 裝 灯· 線. 本紙張尺度適用中國國家標準(CNS)A4規格(2】〇χ 297公餐) 550998 86 1 2twf.doc/0 1 2 A8 R8 C8 D8 六、申請專利範圍 乙烯。 13. 如申請專利範圍第11項所述之具有混合型介電 層之印刷電路板製造方法,其中該第二介電物質爲聚苯醚 環氧樹脂。 14. 如申請專利範圍第10項所述之具有混合型介電 層之印刷電路板製造方法,其中於該第一導體層上形成一 介電層之方式,包括網版印刷。 (請先閱讀背面之注意事項再填寫本頁) 裝 --線· 聲 ;P 12 本紙張尺度適用中國國家標準(CNS)A4規格(210χ297公坌)550998 4 86 1 2twf.doc / 0 1 2 A8 R8 C8 Γ) 8 £ Hi Tu 6. Patent application scope 1. A printed circuit board with a hybrid dielectric layer, suitable for a printed circuit board, printed circuit The board is formed by sequentially stacking an insulating core, at least one circuit layer, and at least one dielectric layer. The material of the dielectric layer is a first dielectric substance, which is characterized in that the dielectric layer has at least one patterned opening. The patterned opening is filled with a second dielectric substance. 2. The printed circuit board with a hybrid dielectric layer as described in item 1 of the scope of the patent application, wherein the second dielectric substance is a low dielectric constant material. 3. The printed circuit board with a hybrid dielectric layer as described in item 2 of the scope of the patent application, wherein the second dielectric substance is polytetrafluoroethylene. 4. The printed circuit board with a hybrid dielectric layer as described in item 2 of the patent application scope, wherein the second dielectric substance is a polyphenylene ether epoxy resin. 5. A method for manufacturing a printed circuit board with a hybrid dielectric layer, comprising: providing a printed circuit board, the printed circuit board being formed by laminating an insulating core layer and a first conductor; on the first conductor layer A dielectric layer is formed, and the first conductor is laminated between the dielectric layer and the insulating core layer. The material of the dielectric layer is a photosensitive dielectric material; a part of the dielectric is removed by exposure and development. An electrical layer to form at least one patterned opening and expose the first conductor layer; and pour a second dielectric substance into the patterned opening. 6. The method for manufacturing a printed circuit board with a hybrid dielectric layer as described in item 5 of the scope of the patent application, wherein the second dielectric substance is a low dielectric system 10 ------------ ----- (Please read the precautions on the back before filling this page) Order ·-Thread · This paper size is applicable to China National Standard (CNS) A4 specification (2) 0 X 297mm) 550998 86 1 2twf.doc / 0 1 2 A8 R8 C8 D8% when I apply for patent coverage number of materials. 7. The method for manufacturing a printed circuit board with a hybrid dielectric layer according to item 6 of the scope of the patent application, wherein the second dielectric substance is polytetrafluoroethylene. 8. The method for manufacturing a printed circuit board with a hybrid dielectric layer according to item 6 of the scope of the patent application, wherein the second dielectric substance is a polyphenylene oxide epoxy resin. 9. The method for manufacturing a printed circuit board with a hybrid dielectric layer as described in item 5 of the scope of patent application, wherein the method of forming a dielectric layer on the first conductor layer includes curtain coating. 10. A method for manufacturing a printed circuit board with a hybrid dielectric layer, comprising: providing a printed circuit board, the printed circuit board being formed by laminating an insulating core layer and a first conductor; and forming the first conductor layer on the first conductor layer A dielectric layer is formed thereon, so that the first conductor is laminated between the dielectric layer and the insulating core layer, the dielectric layer has at least one patterned opening, and the first conductor layer is exposed, the dielectric The material of the layer is a first dielectric substance; and a second dielectric substance is filled in the patterned opening. 11. The method for manufacturing a printed circuit board with a hybrid dielectric layer as described in item 10 of the scope of patent application, wherein the second dielectric substance is a low-dielectric-constant material. 12. The method for manufacturing a printed circuit board with a hybrid dielectric layer as described in item 11 of the scope of patent application, wherein the second dielectric substance is polytetrafluoro (please read the precautions on the back before filling this page). Lamps and wires. This paper size applies to China National Standard (CNS) A4 specifications (2) 0 297 meals. 550998 86 1 2twf.doc / 0 1 2 A8 R8 C8 D8 Sixth, the scope of patent application for ethylene. 13. The method for manufacturing a printed circuit board with a hybrid dielectric layer according to item 11 of the scope of the patent application, wherein the second dielectric substance is a polyphenylene ether epoxy resin. 14. The method for manufacturing a printed circuit board with a hybrid dielectric layer as described in item 10 of the scope of patent application, wherein a method of forming a dielectric layer on the first conductor layer includes screen printing. (Please read the precautions on the back before filling out this page) Packing-line · sound; P 12 This paper size is applicable to China National Standard (CNS) A4 (210x297 cm)
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