TW548482B - Structure of outer leads - Google Patents

Abstract

A structure of outer leads is formed on a substrate for outputting or inputting an electronic signal. The structure of outer leads includes a plurality of parallel conductive wires positioned along a first direction, a plurality of terminals, and an insulation layer covered on the conductive wires. Additionally, each of the terminals is located at one end of the corresponding conductive wires, and a predetermined interval is existed between the two adjacent terminals along the first direction. Furthermore, a maximum width of each terminal perpendicular to the first direction is larger than a maximum width of each conductive wire perpendicular to the first direction.

Description

548482 V. Description of the invention (1) The technical field to which the invention belongs The present invention relates to an outer pin structure, especially an outer pin structure that can increase alignment accuracy. In the prior art, the liquid crystal display panel must be driven by a driving integrated circuit chip to produce a rich and beautiful picture. The bonding method of the liquid crystal display panel and the driver integrated circuit chip currently uses tape automated bonding (TAB) as one of the main technologies. Its manufacturing process is divided into tape design, internal pin bonding, Sealing, bonding with external pins, etc. The external pin bonding is used to electrically connect the liquid crystal display panel and the driving integrated circuit chip, so that the driving signals for driving the integrated circuit chip can be accurately transmitted to the liquid crystal display panel In addition, the design of the outer pin structure is particularly important. Please refer to FIG. 1, which is a simplified schematic diagram of a liquid crystal display panel. As shown in FIG. 1, a liquid crystal display panel 10 includes a substrate 1 2, an X-axis printed circuit board (X-board) 1 4, and a Y-axis printed circuit board (Y-board) 16, and the X-axis The printed circuit board 14 and the Y-axis printed circuit board 16 are used to output signals to the substrate 12 so that the liquid crystal display panel 10 displays a picture. In addition, the liquid crystal display panel 10 includes a plurality of tape carrier packages (TCP) 18 for electrical connection.

548482 V. Description of the invention (2) The printed circuit board 14 and the substrate 12 are used to electrically connect the circuit board 16 and the substrate 12, and each tape-and-reel package is brushed with an integrated circuit chip 20. Each of the sealing substrates 12 is provided with a plurality of scanning lines Si ~ s and a plurality of data lines `` η '', and each scanning line sr S and each data line D are connected to each other: an active area on the i array Γ substrate 2 Within 1 ~, a plurality of pixels (not shown) arranged in a cart shape are defined. In addition, the substrate 丨 2 further includes — bow 1: junction area (〇uter Uacl bonding regi〇n) l2b, with: Talk about the trace lines S1 ~ S # and the various data lines D and Dn are electrically connected to the corresponding The ▼ -type package 18 is described in detail below. Consider Figures 2 to 4. Figure 2 is a stand-up I of area A shown in Figure 1. Figure 3 is a top view of the pin structure outside Figure 2. Figures 1, 2, and 2 are along the tangent line. Sectional sketch of 4--4. As shown in Figure 2 and Figure 3, the tape-and-reel package 8 also contains a plurality of external pins (for example, ts ^ 22b, 22C, and 22d), which are used to package an electronic signal from the tape-and-reel package. Each of them is out to the substrate 12, and a plurality of rubber feet (for example, 24a, 24b, 24c, and 24d) are also provided in the terminal crimping area 1 2b for receiving materials from the material Γ ^ package body 1 8 Electronic signal, and input the electronic signal to the corresponding data line. The difference is shown in FIG. 4. An anisotropic conductive film (anisotropic conductive film) is provided between the tape and reel package 18 and the substrate 12.

548482 V. Description of the invention (3) ACF) 26 is used to electrically connect the outer pins 22a to 22d to the corresponding outer pins 24a to 24d. Generally speaking, the anisotropic conductive film 26 is adhered between the tape-and-reel package 18 and the substrate 12 using an adhesive method, and usually includes an adhesive 2 6 a and a plurality of conductive particles 2 6 b. Dispersed in the adhesive 26a, each conductive particle 26b includes a spherical polymer, a nickel-gold layer (ni eke 1-go 1 d), is plated on the surface of the spherical polymer, and an insulating layer It is coated on the nickel-gold layer, and the adhesive 2 6 a is made of epoxy resin (e ρ ο X yresi η). In order to respond to the market demand, the number of daylight elements of the liquid crystal display panel 10 is increasing. Therefore, the number of external pins for electrically connecting the tape and reel package 18 and the substrate 12 also increases, and each external lead must be reduced. 1 ead width (W and W / as shown in Figure 3) or lead pitch (W and W2 'as shown in Figure 3), which will make each external lead The feet are prone to electrical shorts due to thermal expansion. For example, in the area B shown in Figure 4, theoretically the outer pin 2 2 b should be electrically connected to the outer pin 24b only, but misalignment due to thermal expansion or due to process and equipment factors Both will cause the conductive particles 26a to conduct the external pins 22b and 24a, so an electrical short circuit will occur between the external pins 22b and 24a, which will affect the normal operation of the LCD panel 10. SUMMARY OF THE INVENTION An object of the present invention is to provide an external pin structure to solve the foregoing problems.

548482 V. Description of Invention (4) Question. According to the purpose of the present invention, in the external pin structure, the external pin outputs or inputs an electronic signal. The wires arranged in parallel in the outer direction are covered on the wires, one end of the wire is any two adjacent ones of the predetermined distance, and each of the terminals is greater than each of the wires perpendicular to the first due to The outer pins of the present invention are spaced a predetermined distance apart, and each of the outer leads leads to a narrower wire, so that the outer pins can be increased. Since each outer pin has a higher joint yield, the alignment accuracy of the outer pins is improved. On the other hand, an anti-flux or a protective layer, so the implementation please refer to Figure 5, which is a diagram. As shown in FIG. 5, a plurality of outer pins 44 are provided on the substrate 40. A preferred embodiment of the invention is provided-the structure is provided on a substrate, and the wheel pin structure includes a plurality of edges. A plurality of terminals and an insulating layer are respectively provided on the lead terminals in the first direction and spaced apart from the maximum width in one direction in the first direction. In the structure, two adjacent external pin systems each have a wider terminal and — the number of external pins in the pin structure. A wider terminal, so the relative ground, and thus the structure of each outer pin is increased, and the wires of each outer pin are covered to avoid the occurrence of an electrical short circuit. Schematic diagram of the outer lead structure of the present invention. Structure 40 includes a substrate 42, a complex surface, and a plurality of outer leads.

548482

46 is inserted on the substrate 40 between two adjacent outer pins 44 and each outer pin 44 and each outer pin 46 are parallel to each other. Among them, each outer pin 44 includes a terminal 44a and a wire 44b connected to the terminal 44a ', and each outer pin 46 also has a terminal 46a and a wire 46b connected to the terminal 46a, and the outer pin The structure 40 electrically connects the substrate 42 to other substrates through the terminals 44a and 46a. In addition, the outer pin structure 40 further includes an insulating layer 48 covering each of the wires 44b and 46b 'to prevent the wires 44b and 46 from being electrically short-circuited by other conductors' and to protect the circuit. It is worth noting that, in the preferred embodiment of the present invention, the distance between two adjacent terminals 44a and 46a is d, so that the outer pins 44 and 46 are arranged in a different arrangement. The widths W of the terminals 44a and 46a are larger than the respective wires 44b and W4. Furthermore, the shape of each of the terminals 4 4 a and 4 6 a may be circular, square, or other non-rectangular shapes. Pin i, the right pin structure 40 and the conventional pin shown in Figure 3, etc., from H, when the outer pin width is the same (that is, W and W are in each guide !! Foot structure 4 〇, the width of each terminal 44a ίϊϊϊΓΓπ /

Is greater than the wi distance, that is, the short circuit between each terminal "a and each lead 46b case 2 (the other two one), this will reduce the electricity generated by thermal expansion 'case ^ 1 = aspect, if the outer pin width Both have the same purpose as the pitch. 纟 Invention of the outer arch 丨 foot structure 40 will have more outer pins

Page 9 548482 V. Description of the invention (6) In a preferred embodiment of the present invention, the substrate 4 2 is a flexible substrate (f 1 e X ib 1 esubstrate), such as a flexible printed circuit board ( flexible printed circuit board (FPC), flexible flat cable (FFC), substrate used in tape and reel package, or substrate used in chip on film (COF) technology Wait. In addition, the insulating layer 48 is a solder resist 'such as a melamine resin or an epoxy resin. In addition, in other embodiments of the present invention, the substrate 42 may also be a glass substrate of a liquid crystal display panel. At this time, the insulating layer 48 is a passivation layer, such as siiicori nitride. 0 Next, the bonding manner between the lead structures outside the present invention will be explained in order to present the features of the present invention more clearly. Please refer to FIGS. 6 to 8. FIG. 6 is a schematic diagram of an external pin bonding structure according to the present invention. FIG. 7 is a schematic cross-sectional view taken along the tangent line 7-7 in FIG. 6. Schematic cross-section. As shown in FIG. 6, an outer lead bonding structure (OLB) 50 includes a flexible substrate 52 and a glass substrate 62 located below the flexible substrate 52. Among them, a plurality of external pins 5 4 and 5 6 which are parallel and interlaced with each other are provided on the lower surface of the flexible substrate 52, and a plurality of parallel and mutually parallel pins are provided on the upper surface of the glass substrate 62. Interleave outer pins 6 4 and 6 6. In addition, each of the outer pins 5 4 and 5 6 has a terminal 5 4 a, 5 6 a and a wire 5 4 b,

Page 10 548482 V. Description of the invention (7) 56b is connected to the terminals 54a, 56a, and the outer pins 64, 66 each have a terminal 64a, 66a and a wire 64b, 66b connected to the terminals 64a, 66a. The structures of the outer pins 5 4, 6 4 and 5 6, 6 6 are the same as those of the pins 4 4 and 4 6 except for FIG. 5, so they are not described again. In addition, the outer pin bonding structure 50 further includes a solder resist 5 8 covering the wires 5 4 b and 5 6 b, and a protective layer 68 covering the leads 64b and 66b, and the solder resist 58 and The protective layer 68 is used to avoid the phenomenon of electrical short circuit. On the other hand, as shown in FIG. 7 and FIG. 8, the outer pin bonding structure 5 0 further includes an anisotropic conductive film 70, which is adhered between the flexible substrate 52 and the glass substrate 62 and used for bonding The terminals 5 4 a and 5 6 a are electrically connected to the corresponding terminals 66 a and 64 a, respectively. Generally speaking, the anisotropic conductive film 70 includes an adhesive 7 0 a and a plurality of conductive particles 7 0 b dispersed in the adhesive 7 01. Each of the conductive particles 7 0 b is an anisotropic conductive film 70. The conductive part includes a spherical polymer, a nickel-gold layer electroplated on the surface of the spherical polymer, and an insulating layer covering the nickel-gold layer. The adhesive 70a is usually For epoxy.

It is worth noting that, since the outer pins 54, 56, 6 4 and 66 of the present invention all have wider terminals 54a, 56a, 64a, and 66a, the outer pins 5 4, 5 6 and outer pins are relatively increased. The contact area between pins 6 6, 6 4 can further improve the alignment accuracy between outer pins 5 4, 5 6 and outer pins 6 6, 6 4 and also increase outer pins 5 4 , 5 6 and the conductive area between the outer pins 6 6, 6 4. On the other hand, in areas C and D shown in FIG.

548482 5. In the description of the invention (8), since the lead wire 56b is covered with the solder resist 58, even if the conductive particles 7Ob are connected between the terminal 66a and the wire 56b, there will be no electrical short circuit between the terminal 66a and the wire 56b . Similarly, in the area E and the area F shown in FIG. 8, since the conductive layer 66 is covered with the protective layer 68, the electrical short between the terminal 56a and the conductive line 66b can be avoided. Simple and ancient | The lead structure outside the present invention can avoid the electrical short-circuit phenomenon caused by thermal expansion or alignment. Difficult to move compared to the conventional technology, the pins are arranged in a poor row of | terminals and a narrower number of wire pins. In addition, because of this, the bonding wires between the outer and outer lead structures are relatively covered with a solder resist or short circuit. Based on the above, the thermal expansion or misalignment of the text described above is only an equivalent coverage made by the scope of this patent. In the external mode of the present invention, and each external, the alignment accuracy of each external pin can be increased. On the other side, a protective layer, the electrical short pin structure φ pins caused by the present invention are all L external pin structure + wide width surface, each plus each foot structure ## 生 电 性 路 相 Γ To avoid changes and modifications due to the better implementation of the Ming, _ 548482 is a simple illustration of the diagram: Figure 1 is a simplified schematic diagram of a liquid crystal display panel. FIG. 2 is a schematic perspective view of the area A shown in FIG. 1. Figure 3 is a top view of the pin structure other than Figure 2. Figure 4 is a schematic cross-sectional view taken along line 4-4 of Figure 3. FIG. 5 is a schematic diagram of a pin structure outside the present invention. FIG. 6 is a schematic diagram of an external pin bonding structure according to the present invention. Fig. 7 is a schematic cross-sectional view taken along line 7-7 of Fig. 6. Figure 8 is a schematic cross-sectional view taken along line 8-8 of Figure 6. Explanation of symbols: 10 LCD panel 12, 4 2 substrate 12a active area 12b outer pin bonding area 1 4 X-axis printed circuit board 16 Y-axis printed circuit board 18 Tape-and-reel package 20 Integrated circuit chip 22a, 22b, 22c, 22d, 24a, 24b, 24c, 24d, 44, 46, 54, 56, 64, 66 Outer pins 2 6, 7 0 Anisotropic conductive film 2 6 a, 7 0 a Adhesives 26b, 70b Conductive particle 40 outer pin structure

Page 13 548482 Brief description of drawings 4 4 a, 4 6 a, 5 4 a, 5 6 a, 6 4 a, 6 6 a Terminal 44b, 46b, 54b, 56b, 64b, 66b Conductor 4 8 Insulation layer 50 outside Pin bonding structure 52 Flexible substrate 58 Solder resist 62 Glass substrate 68 Protective layer

Page 14

Claims (1)

VI. Application scope 1 · An external pin structure is provided on a substrate for outputting or inputting an electronic signal. The external pin structure includes: a plurality of parallel in the first direction Arranged wires; a plurality of terminals are provided at one end of each of the wires, and any two adjacent terminals are spaced a predetermined distance in the first direction, and each terminal is perpendicular to the maximum width of the first direction Is greater than the maximum width of each of the wires perpendicular to the first direction; and an insulating layer covers the wires. 2 · If the lead structure is outside the scope of the first patent application, the substrate is a flexible substrate. 3 · If the lead structure is beyond the scope of the patent application, the insulation layer is a solder resist. 4 · If the lead structure is beyond the scope of patent application item 3, wherein the flexible substrate includes a flexible printed circuit board (f 1 e X ib 1 eprinted eir ^ uit board, FPC) or a flexible Planar cable (flexible f 1 at cab 1 e, FFC) 〇1 i, the pin structure outside the range of the third item, where the flexibility = f '糸 I roll' package (taPe carrier package (TCP). Page 15 548482 6. Scope of patent application 6. For example, the lead structure outside the scope of patent application No. 3, in which the flexible substrate is a thin-film flip-chip (chi ρ ο nfi 1 m, C 0 F) technology The substrate. 7. For the lead structure other than the scope of the patent application, the substrate is a glass substrate including a liquid crystal display panel. 8. For the pin structure other than the scope of the patent application, the insulation layer is a passivation layer. 9. For example, the lead structure outside the scope of the patent application item 7, wherein the glass substrate includes an outer lead bonding region, and the outer lead structure is disposed in the outer lead bonding region. 1 0. —An external pin structure is provided on a substrate for outputting or inputting an electronic signal. The external pin structure includes: a plurality of first external pins. An external pin is disposed on the substrate in parallel along a first direction, and each of the first external pins has a first terminal and a first wire connected to the first terminal, and each of the first The maximum width of the terminal perpendicular to the first direction is greater than the maximum width of each of the first wires perpendicular to the first direction; a plurality of second outer pins, each of the second outer pins is inserted in two phases in parallel Between the adjacent first external pins, each of the second external pins has a second terminal, and a second wire is connected to the second terminal. Page 16 548482 VI. Application scope of patents --- The maximum width of the two terminals perpendicular to the first direction is greater than the maximum width of each of the second wires perpendicular to the first direction, and each of the first terminals and each of the The second terminals are spaced a predetermined distance apart in the first direction; and an insulating layer covers the first conductive wires and the second conductive wires. 1 1 · If the lead structure is outside the scope of the patent application, the substrate is a flexible substrate. 12 · If the lead structure is beyond the scope of patent application item 11, wherein the insulation layer is a solder resist. 13 If the application contains Kui Straight _ ±, | ^ a this general — 1 range of the lead structure outside the 12th item of the lead structure 'wherein the flexible storm board includes a 7 J flexible printed circuit board or a flexible flat panel line. 1 4 If Shenjidong's substrate is ^ ί, the pin structure outside the scope of item 12 'is the substrate used in the flexible package. 1 5 · If the name of the substrate is the same as that of the pin structure outside the profit-seeking area No. 12, the substrate is used for the flexibility "/ film-on-chip technology. 1 6 · If the technology is eight The structure of the lead outside the scope of patent of the Ming patent is '10', wherein the substrate is a glass substrate of a display panel. 548482 VI. Scope of patent application 1 7. If the pin structure outside the scope of patent application No. 丨 6, the insulation layer is a protective layer. '18. If the scope of the patent application is 6 or more, the glass substrate includes an outer pin bonding area, and the outer pin structure is disposed in the outer pin bonding area. 1 9 · An external pin bonding structure (〇u 七 er 1 eadb ο nding) structure, the external pin bonding structure includes: a flexible substrate ', and the lower surface of the flexible substrate is provided with a plurality of edges A first outer pin arranged in parallel in a first direction, and each of the first outer pins has a first terminal and a first wire connected to the first terminal, and any two adjacent first terminals A predetermined distance is spaced in the first direction, and the maximum width of each first terminal perpendicular to the first direction is greater than the maximum width of each first wire perpendicular to the first direction; a solder resist covering the On the first wires, a glass substrate is disposed on the lower side of the flexible substrate, and a plurality of second outer pins are provided on the upper surface of the glass substrate, and each of the second outer pins is connected to each of the first The outer pins are parallel to each other, and each of the second outer pins has a second terminal and a second wire connected to the second terminal, and any two adjacent second terminals are in the first direction. Are separated by a predetermined distance, each of the second terminals is perpendicular to The maximum width of each line of the first direction is larger than the maximum width of the second conductive line perpendicular to the first direction; a protective layer covers the second wire such; and Page 18 548482 VI. At least one bonding unit for patent application is provided between the first outer pins and the second outer pins, and is used to electrically connect each of the first outer pins to a corresponding one. Each second external pin. 20. If the pin bonding structure is beyond the scope of item 19 of the patent application, the solder resist is used to avoid the electrical short circuit between the first outer pins and the second outer pins, and protect the First external pin. m 2 1. According to the pin bonding structure outside the scope of patent application No. 20, the protective layer is used to avoid the electrical short circuit between the first outer pins and the second outer pins, and to protect the Wait for the second external pin. 2 2. The pin bonding structure other than item 19 of the scope of the patent application, wherein each of the bonding units includes an anisotropic conductive film (ACF) or a solder ball structure. Page 19