TW546567B - The Simplification and making of reliable one-to-multiple access system - Google Patents

Abstract

The present invention is related to an access system of commonly used pin or commonly used bus. The purpose of the invention is to provide a data access plan that performs access onto the other external plural devices (such as the memory and the device stored with data) by passing the first device (particularly the integrated circuit having plural functions and larger volume) through the commonly used pin (or the commonly used channel) so as to reduce the pin number of the device and miniaturize device volume. In addition, the design and fabrication bottlenecks of larger integrated circuit can be avoided. The invention is featured with using a controllable circuit to isolate the other external apparatus when the first device conducts access onto one external apparatus so as to reach the advantages of sharing the pin in addition to avoiding possible data error or the other persecution caused by sharing the pin.

Description

546567 V. Description of the invention (7 ------- · Field of invention 0 Tea is related to dwelling acupoints, ..., a% acupoint £ · £, the access system of the drain, do not mention an access system: a product Circuit elements are injured by complex prostheses ^ Do not match-the buffer memory is executed with another component that holds data ^ / by / knife is, the main integrated circuit elements in a digital camera pass 1 prosthetic foot 2 especially outside ( Refers to the main integrated circuit components; a system with two pins. A thousand different W to perform access to different elements Background of the related industry requires the function of the integrated circuit The volume of the physical circuit has grown to a certain length-pf Large, but in the same work, especially the key G class; but the volume of Heshun province keeps the volume of the road, which has a considerable electrical effect on design, manufacturing, etc. It can be inferred that, if r Bits are applied to different external memories or components. The enemy circuits have reached a certain level through different pins. These scripts have reduced the critical meaning of integrated circuit design and manufacturing. The following are difficult / And cost, the following is a digital phase An example of a machine is illustrated. The body lightening indicator is a data access system of a conventional digital camera, in which a signal channel 4 is stored on a signal channel 4 and a signal channel 5 is stored on a buffer body 5. U d has subscribed for access and has been referred to as oxygen 5 to other 2 (for example, an image storage memory card, let !: afi edia Card) to perform access' Another integrated circuit 1 sends a command signal to the memory by referring to θ Body 3 to notify memory 3

546567 V. Description of the invention (2) 1 channel 1 performs access, and the integrated circuit 1 will also send instructions through the instruction channel 7 to run the intelligent circuit 2 to notify the integrated circuit 2 to cooperate with the integrated circuit to execute μ. In the above-mentioned access system, the signal channels 4 and 5 each occupy the integrated circuit and have different pins. If each channel number is 8 bits, it will occupy A f pins in total, and if the number of signal channel bits is more, it will occupy a total of Γΐ; two more. On the other hand, the command channels 6 and 7 each occupy different products 穑 _ & different pin positions. Therefore, the total number of command channels 6 and 7 occupied by the 2 ^ 1 pin is also considerable. In order to obtain the memory 3 and the integrated circuit 2 = Γ, the integrated circuit 1 in the above-mentioned conventional digital camera needs to have substantial feet. Under the trend that the integrated circuit functions are increasing, but the volume is being increased, the number of pins of the integrated circuit is reduced. The importance of the cost and difficulty of the design or production of the mm-bit camera will gradually increase. Therefore, it is proposed for an integrated circuit component to perform shared access on its external memory and at least one other component respectively to effectively reduce the number of integrated circuit pins, which not only makes digital ΪOther digital apparatuses (integrated circuits) can have a larger volume integrated circuit, so that the design or manufacturing: difficulty will not encounter a bottleneck. Ugly Although the above-mentioned conventional system can be designed such that the integrated circuit 1 passes through the complex: bit: its external memory 3 and component 2 perform access to reduce the neck, but the number of a ladder foot positions to avoid the integration The design of the circuit 1 from the bottle design to the production will lead to a consequence: the state of the component 2 will become silly. The circuit 1 accesses the memory 3. For example, the digital camera's /: Smart Card (Smart Media Card)

Page 5 ^ 46567 5. Description of the invention (3)) 疋 A slot of a memory card that can be inserted or removed at any time will cause a short circuit, which will cause fμ: when inserting or removing, the access data of this record 3 is wrong. Therefore, the present invention '屮: One pair of buffer memory cases, on the one hand, the integrated circuit can perform access via a ugly memory accessor's memory or component, and its faces and pins on multiple external memories or When the component performs access, these memories are hypothetical diagrams shown in Figure 2! Xi: The foot position is wrong. 6 and 7 cases. … 'Does not need or omit the instruction channel invention to explain that it is a multi-product ;;;; material access scheme, let-element (especially: and the element that holds the data: ;; bu :: = its: element: (for example, memory The design and manufacture of the device is equal to Γ. At the same time, it also eliminates the need for larger integrated circuits. For the sake of convenience, the access bits provided in the present invention are provided with multiple external components. F: other components) to perform access, while isolating other external devices, I can use a controllable circuit to share the time that can be shared by the same time as the advantages of pin sharing when the device is accessed = 1, the advantage of exempting script data storage at 1 Take the program j, if there is an error or other problems. The first element (for example, any :: J is an access system used to make-its external-memory and: less 1: or a central processing unit CPU) pair Brother—70 (with data) execution memory 546567 Fifth, the description of the invention (4) access. This access system includes a first signal channel; a second signal channel; a third signal channel; and a signal Channel controller; these signal channels can be commonly known as bus (bus), the One end of a signal channel and one end of the second signal channel are connected in parallel to an interface portion of the first component (such as a set of output / input ports of an integrated circuit), and the other end of the first signal channel is connected to the memory. , The other end of the second signal channel is electrically connected to the second component via the signal channel controller and the third signal channel, and when the first component performs access to the memory, the signal channel controller isolates the The second signal channel and the third signal channel, so that the second element does not affect the first element to perform access to the memory. In practical applications, the above-mentioned signal channel controller and the second element may be close to each other, The third signal channel is made non-existent, so the representative example of the data access scheme in the present case may not include the third signal channel. In the above access system, the first signal channel and the second signal channel may be b And a common signal channel, one end of the common signal channel is connected to an interface portion of the first element, and the other end of the common signal channel is connected to the recorder 'the common The other end of the signal channel also passes through the signal channel controller = electrically connects the second component. When the first component performs access to the memory, the signal channel controller isolates the common signal channel from the second component. — The above access system may further include a first instruction channel, a second instruction channel, a third instruction channel, and an instruction channel controller. One end of the first instruction channel is parallel to one end of the second instruction channel. At the other interface portion of the first component, the other end of the first command channel is connected to the memory,

Page 7 546567 V. Description of the invention (5) The first instruction instruction channel and the first component is issued / kind of the first body, the first element is issued, the first instruction is the second instruction, the first instruction controller and the The first does not exist, so the above-mentioned access system containing the three fingers is merged into a memory body of a common element, and the common electrical connection is made at this time, the instruction piece. The male representative example of the data access scheme in this case is another access system for a first component to perform access to a memory, at least a second component, and at least a second component. The system includes: a first signal channel; a second signal channel; a third signal channel; a fourth signal &channel; and a letter avoidance controller, one end of the first signal channel is parallel to the end Connected to an interface portion of the first element, the other end of the channel is electrically connected to the second element and the completed command signal, and the element is about to or has caused the signal to affect the channel and the first signal. One element can be used in the above case. In the system, the first command channel interface part and the same command channel are two elements. The channel controller stores one finger in each other through the completion of the three fingers in the memory. When the execution of the first instruction by the body and the execution of the access body are performed, the instruction instructs the channel, so that in the international application, i is close to each other, so that the representative of the fetch scheme & Road, pass, the first channel controls the second and the three instruction examples, and the third device knows the memory of a component and the output of the device. The isolation element is subject to the channel control. The channel and the second instruction channel may be connected at one end of the same instruction channel to the other end of the first instruction channel and connected to the other end. The first component of the instruction channel controller also accesses the memory through the common instruction channel and the first instruction channel. Binary of the _th signal channel

Page 8 546567, 5 'Description of the invention (6) The other end of the other of the first signal channel passes through the second channel to control a component, the second letter, and the first, the second channel, and the second channel to perform storage. The third letter and the first access are connected to the register and the channel, and the two command instructions are connected to the second signal and the second signal to execute the third channel to avoid the memory access system. When accessing the signal, the signal can be transmitted to avoid affecting the two control channels of the two component terminals. When accessing, the signal can be saved from the first access, the channel, and the memory, device, and third channel. The other end is electrically connected to the first signal channel, and also isolates a component, a device, the first pair of memory number channels, and a four-signal pass component. The components are mutually connected with one end of the first signal channel and an interface memory of the second signal-component. The third letter is designed so that its number channel is controlled by the first channel controller to isolate the first signal channel. The first element also prevents the first element from interacting with each other. The other end is also connected to the other three storage channels and a controller. The channel is electrically connected to the other end of the first signal via the second end. The signal path passes through this element. The fetch system may further include a third instruction channel, in which the first element is about to be connected to the second channel controller, the second signal channel and the signal channel, and electricity is also passed through the 4; three elements, when the first control The device isolates a component of the second signal channel, etc., which affects the access of the first component to the access of the second file to the third and second signal channels and the two children, and the component to the third component channel. One end of the parallel connection channel is connected to the other end of the signal channel control, the second signal, the fourth signal channel instruction channel, a fourth instruction channel, and a completed record

Page 9 546567 V. Description of the invention (7): When the bank executes access, it turns out a first type of instruction signal and two channels, knowing that the memory—the first component—is about to be the first finger; fetch, and where the first -The component is about to complete or has completed; success, its execution: time-out 'out-the second type of instruction signal, after one: several pieces of execution of the instruction channel controller, the third instruction channel order channel,: -The element is about to complete or has completed the access to the second element = When the third element is about to be completed or has completed the access, the signal of the element 7 is rounded, and after passing through the second instruction channel, the instruction passes two instructions and four instructions. Channel, etc., to inform the third component that the _ = :, the first component performs access to it; output the first person or complete when the first component 2 notifies the memory that the first component is about to be completed = No.2, J: The instruction channel controller isolates the second instruction channel from = access k channels, and also isolates the second instruction channel from the fourth finger = two instruction elements, etc. are subject to the first instruction 'number : Shadow: To avoid mentioning that another access system can also be designed as, its ". The controller rotates the second instruction signal on the first component, so that the channel component will soon or has finished executing the first component, and notifies the second instruction channel and the fourth instruction channel; and in the — ^ Away from the office ~ a kind of instruction signal to notify the third element that the ___ one piece turns out and the = Cheng Jun 'when it performs the access, isolates the second finger or the e channel. Phase 7 channel and the second = The above description shows that multiple devices (memory, other components, etc.) are stored in the data provided in this case; execute c, yes, -------

Page 10

= Pieces pass through their common interface parts (for example, _ can let -I 546567 V. Description of invention (8) so that the first component can send instruction signals to multiple external devices via its common interface parts, greatly reducing the output / The number of input pins. Brief introduction to the drawings Figures 1 and 2 illustrate the known cases. Figure 3 shows an embodiment of the first access system of the present invention. Figure 4 shows the implementation of the first access system of the present invention. One of the examples is a more detailed design manner. FIG. 5 shows a second embodiment of the access system of the present invention. FIG. 6 shows a more detailed design manner of one of the second access system embodiments of the present invention. Figure 7 shows the timing of each circuit of the present invention in conjunction with Figure 3. Figure number description 1 integrated circuit 1 2 integrated circuit 2 3 memory 4 signal channel 5 signal channel 1 6 command channel 7 command channel 3 0 signal channel control Device 3 1 first element 3 2 second element

Page 11 546567 V. Description of the invention (9) 3 3 Memory 3 4 First signal channel 35 Second signal channel 3 6 Third signal channel 3 7 Signal generator 3 8 Control signal (including 381, 382) 3 9 Instruction Channel control signal 4 0 command channel controller 41 first command channel 42 second command channel 43 third command channel 4 6 fourth signal channel 5 0 signal channel controller 5 2 third element 6 0 command channel controller 61 first Command channel 6 2 Second command channel 63 Third command channel 64 Fourth command channel 7 1 First time period 7 2 Second time period 7 3 Third time period 7 4 Fourth time period 3 11 Interface parts

Page 12 546567 Positions, parts, face, interface, interface, one, another, other, device, road, system, control, electricity, control, control, control, control, control, number, order, order number 4 12 3 4 ο ο ο ο ο 5 6 6 6 6

5. Description of the invention (ίο) 3 1 2 Interface part 3 8 1 Control signal start order 3 8 2 Control signal stop order 4 8 1 First sub control signal 4 8 2 Second control signal 4 8 3 No. 1 — Control signal 5 0 1 The first electronic circuit 5 0 2 The second electronic circuit 5 0 3 Detailed description of an interface portion of the signal channel controller FIG. 3 shows an embodiment of the first access system of the present invention, which is used to allow a first A component 31 performs access to a memory 33 and at least one second component 32. The first access system includes: a first signal channel 3 4;-a second signal channel 3 5;-a third A signal channel 36; and a signal channel controller 30; one end of the first signal channel 34 and one end of the second signal channel 35 are connected in parallel to an interface portion 3 1 of the first element 3 1 ( Such as a set of input / output ports), the other end of the first signal channel 3 4 is connected to the memory 3 3, and the other end of the second signal channel 35 is passed

Page 13 546567 V. Description of the invention (π) The signal channel controller 30, the third signal channel 36, and the second element 32, when the first element 31 takes the memory 3 3, The signal channel controller 3 Q isolates the second signal channel I and the third signal channel 36 to prevent the second component 32 from being shadowed and the component 31 from performing access to the memory 33. In practical application, the signal channel controller 30 and the second element 32 may be equal to each other without the third signal channel 36, so the representative example in this case may not be included in the third signal channel 36. The solution of == the above-mentioned first type of access in this case contains a signal generator 37, which is located at the station ★ 1J can also include the execution of the memory 33; = J-producer "in the first- Element 3 The channel controller 30 is isolated from the driver output = control signal 3 8 drives the channel 36. The signal generator No. 35 and the third signal part can also be located outside it, ^ j, in the The internal circuit of the first element 3, for example, the first element " This is one of the first element 31 as the signal generator 37. A logic processing circuit of 31 can have the same kind of storage as the above-mentioned one in this case. Take the system 2 1 and the number generator 3 3 ^ "number generator at the first element 3 8 ′ until the-element 3 1 amount m: No, when the control signal 3 is turned out. The body 3 3 executes the access completion_ The control signal 3 8 above, as shown in the above, and a stop order 3 8 2 may include a start order 3 and the device 30 starts to isolate the second letter 7 3 8 1 The channel is controlled until the signal generator u 22 35 and the third signal channel 3 0 f output the stop 546567. 5. Description of the invention (12) The above-mentioned electronic circuit of the case has an impedance in the room, otherwise Provide a signal channel 3 6 In the first impedance type access system, the pass signal 3 8 channel 3 5 and the second signal received the second signal resistance, and a second impedance is recorded on the first signal channel to a component. In this case, the impedance is until the signal connection is much larger than the first controller and the third part 3 3, the device 40, the signal channel 3 6 and the body 3 3 1 through the second electronic component described in the second element. The second gets the stop 3 5 The second instruction of the second pass 40, the second instruction 12, the second finger, the second generator is large enough to avoid the second letter 3 to perform the access After the second signal 3 2 executes an access system 'it receives the signal channel 3 stop order 3 8 2 and The third kind of letter impedance. An access system i 4 1, the third command channel 4 2 of the first command channel 4 2 and the second command channel 3 7 are far away from the first impedance, and the second channel 3 5 'the brother — Kind of channel 3 5. Take the 0 system. The start order 3 5 and the third channel provide the first channel 36. The 6 controller can provide a signal channel of the third signal channel 36 within a period of time. 3 5 and the third are larger than the second impedance, the component 3 2 passes the third and so on, and the impedance of the first component 3 is small enough, and the third signal channel 36 and other controllers can also be designed as 81 to provide a The first kind of k-channel 36 is between 36 and the second kind of impedance is between the second. The first kind of impedance, as shown in FIG. 4, may further include a second command channel 42 and a command channel 43 The other end of the first command channel 4 and 7 are connected to the interface 31 of the first component 31 and the other end of the channel 3 is connected to the other end of the memory 3, and the second component 32 is electrically connected via the command channel control 4 3 and the like. , A component 3 1 is about to be completed

Page 15 546567,

V. Description of the invention (13) ___ When the memory 3 3 executes the access, the first instruction channel 4 1 is notified ^: a kind of first instruction signal, which is about to be or has completed the access to it after 1: Two bodies and two] J first element 3 first-element 3 1 is about to be completed and has completed the current second tiger 2 device 3 7 at this time, respectively output a second finger ten μ two element 3 2 to perform access 2, the The instruction channel controller 4 is first, and the second instruction channel 4 knows the second element 32, the first element; f, causes the channel 43 to wait for access. The signal generator 37 executes the channel controller 4 through the execution of the pair to isolate the first: J = memory 33, the finger: 'so as to avoid the second element 3; two; m and the third instruction, said . In the application of Beij, it is said that "the mutual shadows 32 can be close to each other, so that the channel controller 40 and the data accessor of the second element mentioned above in this case ^: 7 channel 43 is equal to not exist, so Channel 43. The representative example of the case may not include the third finger mentioned above, and the first four rounded fingers 401 can be received by the signal generator 3 to order channel 4 2 invite Xidi, control # No. 3 9 to perform the isolation. The second finger is shown in FIG. 5: == order channel 43. The first element 3 1 is a "one" access system embodiment, which is used to make one and at least-the third element Du: Jiyi body 3 3. At least-the second element 3 2. The access is performed with {a first signal pass, Zeng q 2 and so on, which may include: channel 36; ~ ^ a second signal channel 35; Three signals 5 〇, the first ~ = bluff channel 4 6; and one end of a signal channel controller channel 3 4 and the second signal channel 3 5

Page 16 546567 V. Description of the invention (15) Memory 3 3 performs access. In the second type of access system mentioned above, when the first component 3 1 piece 3 2 performs the access, the signal generator 37 outputs a number 4 8 2 to drive the signal channel controller 50 to isolate the channel 3 5 and the fourth signal channel 4 6, and when the first element ^ three element 5 2 performs the access, the signal generator 37 7-round signal 4 8 3 drives the signal channel controller 5 〇 number channel 3 5 and the third signal channel 36 to avoid the access of the 31 to the second element 3 2 and the third element respectively, and to avoid the first element 31 from the third element $ and the The second element 32 affects each other, that is, the second control 2, the third control signal 4 8 3, etc. are used to avoid the access of the first element second element 32, and the third element 5 2 avoids each other. When the first component 31 accesses the third component 52, the components 32 affect each other. In the second embodiment of the access system described above in this case, the signal generates: Ϊ a component 31 is about to access the memory 3 3, the first and the third component 59 Rong ^ Yishan # 2 special subscription access (in The different components of the special control signal Z are 3 1 8 :, 8 1, 4 8 2, 4 8 3, etc., =;: = memory body 33, the second component 3 when the above-mentioned completion of the case is completed. Including an activation order and an embodiment of the access system, the controls perform an isolation operation (: death order 'the activation order stimulates, (eg, isolates the second signal through 3) the second signal of the second control signal Pass 3 1 to the first out and the third to control the second letter to avoid the access of the first element 5 2 to each other, 1 to control the signal 4 8 pieces 3 1 to this effect, and also avoid the second generator 3 7 is in front of element 3 2 and input until the first 2 and the third signal can control the emperor 1 to start the third signal.

Page 18 546567 V. Description of the invention (17) 50 can include a first two electronic circuit 502 (receives the first control letter 5) provides the first 5 and the third signal channel provides the third The impedance is provided in the fourth signal channel 4 6 for the second impedance (four impedances (low impedance) between the low third signal channel 36 and 6 between the channels 4 6. The second impedance is much larger than the first received the first The second control letter 5 0 1 provides the second 5 and the third signal channel provides the third impedance (the fourth control signal of the fourth channel a 7 tiger channel 4 6 the third 8 4 for the first impedance (high second There are four kinds of impedance between channels 3 and 6 (low impedance). Between channels 4 and 6. Electronic circuit 501 (shown in Fig. 6), the signal (signal number 4 8 1), the impedance (high impedance) in the Between 36th and 6th, and the second electrical (high impedance) is between the second signal; otherwise, the first electronic impedance) is connected to the second signal, and the second electronic circuit 5 is connected to the second signal channel 3 5 An impedance is much larger than the second or fourth impedance. In addition, the impedance (low impedance) ) Between the 36th and the second electrical high impedance) between the second signal and the period controlled by the signal channel, the first electronic impedance) passes through the second signal, and the second The electronic circuit 5 controls the first electrical one signal sub-circuit number in the second signal channel 3 5 and the channel circuit 5 3 5 2 is provided to the first impedance channel to control the first electrical signal sub-circuit channel 3 device 5 〇 circuit. 5 channels 3 5 〇2 to the first and first device 5 0 sub-circuit channel 3 5 0 2 3 5 and 0 1 to the first and the fourth signal, the device 5 〇 sub-circuit channel 3 5 0 2 5 and the received 0 1 mention the first and the fourth signals. In the second embodiment of the access system described above, if the control signals 4 81, 482, and 483 each include a start order and a stop order, and The letter

Page 20 546567 V. Description of the invention (18) The channel controller 50 includes the first and second electric U disks and a sub-circuit 50 2, then the signal channel controls the starting of the p R ^ signal 4 8 i ( That is, the second = received by the first control body 33), the first electronic circuit is about to provide impedance (high impedance) to the memory type between the second signal channel 3 and the first channel 36, and The second electronic circuit is signaled (high impedance) between the second signal channel 35 and the second and second impedances, until the signal channel controller 5. ^: Stop order for channel 4 6 ", the first electronic circuit C: the control signal 4 has an impedance (low impedance) between the second signal channel 3 and the second signal channel 3-3, and the first The two electronic circuits 50 and the f signal channel (low impedance) are connected to the second signal channel 35; ::: Between two or four impedances, the first-type impedance is much greater than the second-type impedance "is much greater than The fourth impedance is as described above. = Reactance, the third impedance 0 receives the second control signal 4 8 2 and the starter 5 pieces 3 1 is about to perform the second element 3 2. The one-element circuit 501 provides low impedance to the first signal channel), the first-electronic signal channel 36, and the third = the third signal channel 35 and the fourth signal channel ^ $ 2 provides the impedance channel controller 50 to receive the third; 4 to 62. The letter (that is, the-element 31 is about to be; with 乂 = order), the first electronic circuit 5 1 on two 70 pieces 52 perform the access channel 3 5 and the third signal channel 36 6 signal communication 0 2 to provide a low resistance pit in the second signal ^ — and 4 sub-circuit 5 546567. V. Description of the invention ( 21) a

Channel 6 4; = The device ”turns out the third number, u notifies Rong the second few pieces 5 2 The first element i, ie: L moves the command channel controller 60 to separate the command channel 6 2 With the brother's three command channels Bing Speaking a, s ^ — No. 6 8 can also be compared with the aforementioned control letter. In the manner of H < controlled letter 82, 4 8 3, including, 4 683 (not shown in the figure) ), The effect of each part 6δσ injury 6 '6 8 2 ^ is compared with these control signals 1, 6 8 2, 6 8 3, etc. Obviously, the second type mentioned above in this case;] ", 4 8 3. Channel 6 1 and the second instruction channel 6 In the conventional embodiment, the first instruction is additionally connected to the interface portion 3 1 2; as shown by the first component 31, the "birth" of the third instruction channel 63 3 7. As shown in FIG. 660, an interface part 603, and the other “鸲” is connected to the command channel controller 2 'the fourth command channel ’one: end: connection? The other component 3 660 is another interface part 6 〇, connect the instruction channel controller 2. The other end of U4 'is electrically connected to the third component 5. As shown in FIG. 6, this case makes the channel controller 6 OK: In the embodiment of the $ access system, the finger 2 control circuit 3 The first control circuit 6001 and the order signal to notify the Ji generator 3 7 to output the second finger when it performs the access °, the first element 3 1 on the 3 s is coming soon Or the completed channel 62 is isolated from the second button and the control circuit 601, the second instruction is isolated from the second finger 7 channel 6 3, and the second control circuit 6 〇 2 the Rui generator and the fourth Instruction channel 64; In addition, the second instruction signal is issued to notify the second element. Page 24 546567 V. Description of the invention (22) Item 3 2 The first element 3 1 is about to be or has been completed. The second instruction generates three elements 5 2 in the signal, the second command channel number to perform channel 6 on it. 2 4 5 Channel 3 is turned on, during the time period (at this time / the first system controller 3); at that time, the letter element 3 is rewritten as shown in Figure 3 or (for example, the circuit 6 6 4; and the second line is notified when it is accessed). 2 and the second signal, the second electrical number is 2 and the control signal buf fer 5 is separated from the first or the other 7 1, the first signal is connected 3 to 1 and the period is isolated. The second description shows that there is a set of inputs of the other elements of Figure 6. The first control three command channels are 6 controllers, 3 sub-circuits, 5 0 2 4 5 and buf fer: G and DIR input symbols pass through the three signal channels 3. One element 3 shown in FIG. 7 is the second message to the channel control memory. The first controller 3 and the element 3 ′ are the first element to execute the storage / export first circuit 6 3 °, and the figure 6 is OK.), Which ( The format 6 of the IC is used in conjunction with the second element 30. The front guide 3 3 executes the access number channel 3 5 and the component 3 1 communicates with the 0th post) 2. Write. The data file 3 1) No need to take, only need to) Connect the data letter to perform the access channel 6 2 and the third piece 3 1 is about to be turned off or 0 1 when the second is isolated, the The four-finger instruction letter has completed an instruction of the first electronic circuit 5 which is a buffer integrated circuit (received from the data book), and before the selection, the instructions in FIG. 3 are conducted, and the component 32 performs write through) In the period (at this time, the third signal is read through the second element 32); in the period 7 4 one element is numbered as the second signal, and back to it, enter the operation 7 2, the channel control channel 3 6 out (this, the first Take the solution to make a component (for example, the number of channels 3, 1 and 1 on the outside of the interface, only need to use

Page 25 546567 V. Description of the invention (23) The other interface part 3 1 2 (such as a system command, which greatly saves the number of pins and input / output ports) sends a bottleneck on access control. Here, to avoid the design and manufacture of integrated circuits, if the present invention is applied to a digital camera, the digital camera ’s main integrated electric dagger :: 31 phase), the memory 3 3 is equivalent to digital phase inspection, ground device C pu SDRAM),-Yuan ^ 9 γ, a camera's buffer memory (for example ^ :::,: "# " " ^^. #, ^,, (t): s:;: t5M2e: a " c: d: J f = For better understanding of the present invention or the more practical implementation so far / ° The spirit and scope of the invention are not limited to the embodiments disclosed above, which can include various modifications or Approximate scheme.

Page 26

Claims (1)

546567 1 1 1 * ---- ~ ----- ^ — An access system for allowing a first component to access a memory and at least one j ^ component, the access system includes: a A first signal channel; a second signal channel; a third signal channel; and a signal channel controller; one end of the first signal channel is connected in parallel with a second terminal of the second signal channel to a first signal channel; Interface part, the other end of the first signal channel is connected to the memory body, and the other end of the second signal channel passes through the communication controller, the The second signal channel is electrically connected to the second element, and when the third element performs access to the memory ', the channel controller isolates the second signal channel from the third signal channel. 2 · As the generator in the first scope of the patent application, the signal generator outputs a control signal to drive the channel and the third signal channel at this time, so as not to perform access to the memory. 3 · If the device born in item 2 of the scope of patent application is about to control the signal at the first element, until the-element 4 · If the item in scope 2 of the patent application contains a start order and a stop order, The second signal path and the generator output the stop order. The access system described above further includes a signal. The first element performs an access channel controller on the memory to isolate the second signal and the second element affects the access system of the first element, wherein the signal generates a memory. Before the bank performs the access, it is the time to perform the access to the memory. The access system described above, wherein the control signal, the activation command excites the channel controller and the third signal channel until the signal ^ 546567. VI. Scope of Patent Application 5 • The access system described in item 2 of the scope of patent application, the generator is located in the first element. 6. The access system according to item 2 of the scope of patent application, the generator is a logic processing circuit of the first element. 7 · The access system described in item 2 of the scope of patent application, the controller is an electronic circuit that receives the control signal for a first impedance to the second signal channel and the third signal, otherwise provides a second An impedance between the second signal path and the 'the first impedance is greater than the second impedance. 8. As for the access system described in item 4 of the scope of patent application, the controller is an electronic circuit, and when it receives the start-up order, it resists the stop order between the second signal path and the third signal path. Instead, a second impedance is provided between the signal channels. 筮 筮 gt 9> If the first impedance is larger than the second impedance, the access system described in item 2 of the patent Qiaowei , The second instruction channel and a third instruction pass-stub; one end of the first-instruction channel and the is; = the memory, "two instruction channel parts, and in which the signal is generated; the channel is electrically connected to the memory When the body executes access;-the component is about the first-instruction channel, I know; = out-kind of-refers to the execution of access to the first, the first body, the first-component, and the first component turn out the first In the period in which the signal is generated, the signal is generated in the channel control, the third signal channel in which the channel control 4 is provided for a first type of resistance, is received between the channel and the third impedance until the channel is controlled. It also includes a first command and a finger two command channel. The other end is connected to the second it. 丨 and the completed order signal, and the upcoming or completed signal to the note f 546567 6. When the scope of the patent application is filed, the instruction channel controller isolates the second instruction channel from the The third instruction channel, so as to prevent the second component from being affected by the first instruction signal. 10. The access system according to item 9 of the scope of patent application, wherein the signal generator is about to be completed by the first component and has been completed. When accessing the second component, a second instruction signal is output respectively, via the second instruction channel, the instruction channel controller, the third instruction channel, etc. to notify the second component that the first component is about to be or Access to it has been completed. 11. An access system for allowing a first component to perform access to a memory, at least a second component, and at least a third component, etc. The access system includes: A first signal channel; a second signal channel; a third signal channel; a fourth signal channel; and a signal channel controller one end of the first signal channel and the first signal channel One end of the signal channel is connected to an interface portion of the first component, the other end of the first signal channel is connected to the memory, and the other end of the second signal channel passes the signal channel controller and the third signal channel. The second component is electrically connected, and the other end of the second signal channel is also electrically connected to the third component through the signal channel controller and the fourth signal channel. When the first component performs access to the memory, The signal channel controller isolates the second signal channel from the third signal channel, and also isolates the second signal channel from the fourth signal channel. 1 2. The access system described in item 11 of the scope of patent application, Contains one more Page 546567 Sixth, the scope of patent application ^ f generator, the signal generator at the first element of the record ^, output a control signal to drive the signal channel control ^ away from the second channel and the third signal channel ... the The second element performs the access to the memory unit, and also isolates the second signal channel from the four signals; this prevents α from affecting the third element; the memory unit performs the access. For each access to the access system described in item u of the scope of the patent application,: = When the access is performed, the signal channel controller isolates the two—the 11 and the fourth signal channel, and When the first component performs access to the piece, the signal channel controller isolates the third piece; the No. channel, to avoid the second piece from the second piece = the first piece of the two pieces. The access of the first component to the second component is prevented from affecting the second component. " The access system according to item 12 of the profit range, wherein the message is entered immediately before access to the memory is performed. Ci Di Yifan completes the access to the memory 1 5 · If the patent application scope control signal includes an activation system as described in the 2nd item, wherein the controller starts to isolate the second% stop Command, the start command excites the channel control to isolate the second signal channel from the third signal channel, and the starter outputs the stop command. Λ Channel No. 4 until the signal is generated 1 6 • As described in the scope of the patent application, the No. generator is located in the access system described in the above item, where the letter is included. Page 30 546567 VI. Patent application scope 7. The access system as described in item 12 of the patent application scope, wherein the letter u generation is a logic processing circuit of the first element. \ 8. The access system as described in item 12 of the scope of patent application, wherein the channel controller is an electronic circuit, and when receiving the control signal, it provides a first impedance to A third impedance is also provided between the second signal path and the third signal path, or a second impedance is provided between the second signal path and the fourth signal path, otherwise a second impedance is provided to the second signal path. A fourth impedance is provided between the second signal channel and the second signal channel. The first impedance is greater than the first impedance and the third impedance is between the second signal channel and the fourth signal channel. Greater than this fourth impedance. 19. The access system according to item 12 of the scope of patent application, wherein the signal channel controller includes a first electronic circuit and a second electronic circuit, and the signal channel controller receives the control signal. During the period, the first electronic circuit provides a first impedance between the second signal channel and the third signal channel, and the second electronic circuit provides a third impedance between the second signal channel and the second signal channel. Between the fourth signal channel; otherwise, the first electronic circuit provides a first impedance between the second signal channel and the third signal channel, and the third electronic circuit provides a fourth impedance to the second signal Between the channel and :: 2 four-signal it channels, the first impedance is greater than the second impedance, and the μ impedance is greater than the fourth impedance. 1 2〇 · As described in Item 12 of the scope of patent application, the generator ^^^ accesses the second component / 'when the first component accesses the second component, where the letter -4 ^^ t Μ when the access is performed by the hidden body. , Output a first "S :: S": Ϊ The signal channel controller isolates the second signal channel from a 7L piece affecting the first component pair 546567 6. Apply for ill® '--------, the memory performs the execution access, and also drives the signal channel controller to isolate the first, the signal channel and the fourth signal channel, so as to prevent the third component from affecting the first A component performs access to the memory. Said 2 / · Rushen. The access system described in item 20 of the patent scope, wherein when the signal generator executes access to the second component, the generator generates a second control signal to drive The signal channel controller separates the first signal channel and the fourth signal channel, and when the first component performs access to the third component, the signal generator outputs a third control signal =, and drives the The signal channel controller isolates the second signal channel u to avoid the first 70 elements from interfering with the second element, and the first element from accessing the third element. The second elements affect each other. 22. The access system as described in item 2 of the scope of the patent application, where the channel controller in number 苴 is an electronic circuit that provides a first type within the time period when the first / control signal is received. Impedance is provided between the second signal channel and the third signal channel, and a third impedance is also provided between the second signal channel and the fourth signal channel, otherwise a second resistance channel No. 1 and the Between the third signal channel, a fourth impedance is also provided between the second signal channel and the third signal channel. The first impedance is greater than the second impedance, and the third impedance is greater than the fourth impedance. In addition, during the period when the signal channel controller receives the second control signal, a second impedance is provided between the second signal channel and the fourth signal channel; and the k channel controller receives During the period of the third control signal, the first impedance is provided between the second signal channel and the third signal channel. 546567 VI. Patent Application Park 23. If you apply for a patent application—the first instruction channel, the six stored four instruction channels, the two beat order channels, the first system, the third instruction channel, and the first pull channel a Milling road, one 箓-&; 含 amba containing or will have completed to: two-channel controller, dagger command channel, ―the first heart order letter, via: when ordering access, the piece is sidi ~~ The piece is about to be or has already been coughed. The 1st order channel 1 generator has turned out two bamboos. The execution has been completed. ====================================== ======================== === From time to time :: the first element controller, the first = meaning, sitting on the second finger; ^ Dbl generator elements will be printed or completed:; = Road, etc. to: Component execution: Take :, first-Xi first: t, after the second finger 'pass' generator generator turns out two; has completed its == to notify the third component of the controller , No., with notification = take; in the first-component] out ί: when the component is about to be taken or t, the first-component is about to be or has been 2 1 instruction letter X ;, also isolate the first Command channel:; effects; so I channel and the third element refers to two Ti ^, ^ third member being subjected to the four-channel instruction, to avoid patent application range as eight 2 x 3 of the instruction signal. ^ The channel controller accesses the signal generator access system, wherein the finger knows that the second element or the first element is about to or ::: a kind of instruction signal to: isolate the second instruction channel from the first execution memory. The fetcher outputs the second type of command signal with ': 3; and at this signal, the cow is about to complete or has completed access to it :: three elements this first — _ leaf & from the second command channel --- ------ 546567 6. Scope of patent application and the third instruction channel. 2 5. The access system according to item 24 of the scope of patent application, wherein the signal generator further outputs a command channel control signal to the command channel controller, and drives the command channel controller to output the signal channel controller at the signal generator. A second instruction signal to notify the second component that the second component is to be isolated from the fourth instruction channel when the first component is about to complete or has completed performing access to it; and the signal generator outputs the second component A command signal to notify the third element to isolate the second command channel from the third command channel when the first element is about to or has finished performing access to it. 2 6. The access system as described in item 21 of the scope of patent application, wherein the instruction channel controller includes a first control circuit and a second control circuit, and the signal generator outputs the first instruction A signal to notify the memory that the first control circuit isolates the second instruction channel from the third instruction channel when the first component is about to or has finished performing access to it, and the second control circuit isolates the second instruction channel The instruction channel and the fourth instruction channel; and the second control circuit is isolated when the signal generator outputs the second instruction signal to notify the second element that the first element is about to complete or has finished performing access to the first element The second instruction channel and the fourth instruction channel; and when the signal generator outputs the third instruction signal to notify the third component that the first component is about to or has finished performing access to the first component, the first instruction channel The control circuit isolates the second instruction channel from the third instruction channel. 2 7. An access system for allowing a first component to access a memory and at least a second component, the access system includes: a first signal channel; Page 34 546567 VI. Patent application scope A second signal channel; and a signal channel controller; one end of the first signal channel and one end of the second signal channel are connected in parallel to an interface portion of the first element, the The other end of the first signal channel is connected to the memory, and the other end of the second signal channel is electrically connected to the second component via the channel controller. When the first component performs access to the memory, the channel controls The device isolates the second signal path from the second element. 2 8. An access system for allowing a first component to access a memory, at least a second component, and at least a third component. The access system includes: a first signal channel; A second signal channel; and a signal channel controller, one end of the first signal channel and one end of the second signal channel are connected in parallel to an interface portion of the first element, and the other end of the first signal channel is connected to the memory The other end of the second signal channel is electrically connected to the second element through the signal channel controller, and the other end of the second signal channel is also electrically connected to the third element through the signal channel controller. When a component performs access to the memory, the signal channel controller isolates the second signal channel from the second component, and also isolates the second signal channel from the third component. 29. An access system for allowing a first component to access a memory and at least one second component, the access system includes: a signal channel; a signal channel controller; Page 35 546567 VI. Patent application scope One end of the signal channel is connected to an interface part of the first component, the other end of the signal channel is connected to the memory, and the other end of the signal channel is also electrically connected through the channel controller. The second component, when the first component performs access to the memory, the channel controller isolates the signal channel from the second component. 30. An access system for allowing a first component to access a memory, at least a second component, and at least a third component. The access system includes: a signal channel; and Signal channel controller One end of the signal channel is connected to an interface part of the first component, the other end of the signal channel is connected to the memory, and the other end of the signal channel is also electrically connected to the second component through the signal channel controller. With the third element, when the first element performs access to the memory, the signal channel controller isolates the signal channel from the second element, and also isolates the signal channel from the third element. Page 36