TW541366B - Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnace - Google Patents

Abstract

A silicon ingot is manufactured in a hot zone furnace by pulling the ingot from a silicon melt in the hot zone furnace in an axial direction, at a pull rate profile of the ingot from the silicon melt in the hot zone furnace that is sufficiently high so as to prevent interstitial agglomerates but is sufficiently low so as to confine vacancy agglomerates to a vacancy rich region at the axis of the ingot. The ingot so pulled is sliced into a plurality of semi-pure wafers each having a vacancy rich region at the center thereof that includes vacancy agglomerates and a pure region between the vacancy rich region and the wafer edge that is free of vacancy agglomerates and interstitial agglomerates. According to another aspect of the present invention, the ingot is pulled from the silicon melt in the hot zone furnace at a pull rate profile of the ingot from the silicon melt in the hot zone furnace that is sufficiently high so as to prevent interstitial agglomerates, but is also sufficiently low as to prevent vacancy agglomerates. Accordingly, when this ingot is sliced into wafers, the wafers are pure silicon wafers that may include point defects but that are free of vacancy agglomerates and interstitial agglomerates.

Description

Printed by the Consumer Cooperatives of the Central Bureau of Specimen of the Ministry of Economic Affairs ^ 541366 A7 -----_ Β7 ____ V. Description of the Invention (1) ~ ^ Related Application: This application claims the rights and names of US Application No. 60 / 063,086, forming a semiconductor casting "Ingot method and ingots and wafers formed therefrom", application date: October 24, 1997, and Korean Application No. 97-54899, application date: October 24, 1997, both of which were incorporated This invention is for reference. The invention is related to microelectronics manufacturing methods and devices, in particular, to the Shixi casting spinning method and silicon ingots and wafers made therefrom. BACKGROUND OF THE INVENTION Integrated circuits are widely used by consumers and consumers. Commercial use. Integrated circuits are usually made of single BΘ silicon. As the integrated density of integrated circuits continues to increase, it is important for integrated circuits to provide rain-quality single crystal semiconductor materials. Integrated circuits are often It is made by manufacturing large monocrystalline silicon ingots, then cutting the large ingots into wafers, performing a large number of microelectronic manufacturing processes on the wafers, and then die-cutting the wafers into packaged individual integrated circuits. Because of silicon ingots Purity and crystallinity The performance of the body circuit device has a great impact, so many efforts have been invested in the manufacture of ingots and wafers with fewer defects. Now the conventional method of making monocrystalline tweezers is described. The review of the Dagger method is provided in Textbook "VLSI Generation Silicon Processing, Volume 1, Process Technology," Early Authors Wolf and Dauber, pp. 1-35, 1986 (the disclosures of which are incorporated herein by reference ). In the manufacture of single crystal silicon, electronic polycrystalline stones are converted into single crystal stones. Polycrystalline stones such as quartzite are refined to make electronic grade polycrystalline stones. Subsequently, using Tchaikolasz (cz) and Floating Zone (FZ) technologies, the refined electronic-grade polycrystalline stone was grown into a single paper standard applicable to China Standard (CNS) A4 (2lGx ^^ -------- -4-.Install —_ Please read the notes on the back before filling out this page) Order, 丨; 541366

Jay. Since the present invention relates to the production of silicon ingots using CZ technology, the technology will now be described. CZ growth is about crystalline solidification of atoms originating from the liquid phase at the interface. Specifically, an electronic grade polycrystalline silicon feed is loaded into a crucible and the feed is dazzled. The silicon seed with the correct orientation tolerance is lowered into the molten silicon. The seed is then removed in the axial direction at a controlled rate. Seeds and hanging horses are usually rotated in reverse during the pulling process. The initial pull rate is usually fast, which results in a fine stone evening neck. Then, the temperature of the melt is lowered and stabilized to form a desired ingot diameter. This has always been maintained by controlling the pull rate. Lifting continues until the feed is nearly depleted ', at which point the tail end is formed. Figure 1 is a schematic diagram of the cz & puller. As shown in Figure 1, the cz lifter 1GG includes a furnace, a crystal pulling mechanism, an environmental controller, and a computer-based control system. The cz furnace is referred to as a hot zone furnace. The hot zone furnace includes heating elements 102 and 104, inner quartz 106 made of quartz, outer crucible 108 made of graphite, and a rotating shaft ιο (shown in FIG. 1). The heat shield 114 may provide additional heat distribution. The crystal pulling mechanism includes a crystal pulling shaft 120, which can be rotated in the opposite direction 122 of the direction 112, as shown. The crystal pulling shaft 120 holds a seed crystal 124 which is pulled out from a molten polycrystalline silicon feed 126 located in the crucible 106 to form a cast key us. The environmental control system includes a chamber enclosure 130, a cooling port 132, other machine controllers, and a vacuum ventilation system (not shown). A computer-based control system can be used to control heating elements, pullers, and other electrical devices. Please read the notes on the back J .. ▼ Please fill in the items and order them. • Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Decoration.

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Members of the Central Standards Bureau of the Ministry of Economic Affairs, printing of mechanical components in consumer cooperatives. In order to grow a single crystal silicon ingot, the seed 124 is brought into contact with the molten silicon feed i26, and is gradually pulled (upward) in the axial direction. The cooling and solidification of the molten silicon ingot 126 into a single crystal silicon system occurs at the interface 130 between the ingot 128 and the molten silicon 126. Real silicon ingots are different from ideal single crystal silicon because real silicon ingots contain defects or imperfections. This netting fatigue is undesirable in the manufacture of integrated circuit devices. These defects are usually classified as point defects or aggregates (third-degree space defects). There are two major types of dot defects: gap dot defects and interstitial dot defects. In void dot defects, a silicon atom is lost from the normal position of the silicon lattice. This void causes void dot defects. On the other hand, if an atom appears in the amorphous lattice position (interstitial position) of the silicon crystal, it will cause interstitial point defects. Point defects are usually formed on the intermediate interface 130 between the molten silicon 126 and the solid silicon 128. However, the accompanying caster 128 continued to be pulled, and the interface part began to cool. During the cooling process, void point defects and interstitial point defect spread may cause the defects to agglomerate and form void aggregates or interstitial aggregates. Aggregates are three-dimensional (large) structures caused by the aggregation of point defects. Interstitial defects are also referred to as translocation defects or D-defects. Aggregates are sometimes named after the technology used to detect these defects. As a result, void aggregates are occasionally referred to as crystal-derived particles (COP), laser scattering tomography (LST) defects, or flow pattern defects (FPD). Interstitial aggregates are also called large-scale metathesis (L / D) aggregates. For the discussion of the defects of monocrystalline silicon, refer to Chapter 2 of Wulf's and Tao Bo's textbook (the disclosure is incorporated herein for reference). It is known that many parameters need to be controlled, so as to grow this paper with a small number of defects. The size of this paper is applicable to China National Standard (CNS) A4 (210X297 mm)-installed-f Please read the precautions on the back before filling this page } 'ΨΨ— .. 6 541366 A7 B7 printed by M Consumer Cooperative, member of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (4) South purity cast key. For example, it is known that it is necessary to control the rate of seed pulling and the temperature gradient of the hot zone structure. Fronkov theory found that the ratio of V to G (called V / G) can determine the concentration of spot defects in the ingot, where v is the pulling rate of the ingot and G is the temperature gradient at the interface of the ingot melt. . "Fronkov's theory is detailed in Shi Xixuan's thirst formation mechanism", author Fronkov, Journal of Crystal Growth Volume 59, 1982, pages 625-643. An application of Fronkov's theory can be found in this case The inventor's literature, entitled "Effects of Crystal Fatigue on Device Characteristics", Proceedings of the 2nd International Advanced Shixi Material Science and Technology Symposium, November 25-29, 1996, p. 519. Figure 15 of this document (here again reproduced as Figure 2) shows a schematic explanatory diagram of the gap concentration and the interstitial concentration as a function of V / G. Fronkov theory shows that the generation of the void / interstitial mixture of the wafer is determined by V / G. In particular, a V / G ratio below a critical ratio will form an interstitial-rich ingot, and a V / G ratio above a critical ratio will form a void-rich ingot. Although physicists, materials scientists, and many other theoretical studies and CZ lifter manufacturers have performed many practical studies, reducing the density of defects in single-crystal silicon wafers is a continuing need. The final demand is pure silicon wafers that do not contain void aggregates and interstitial aggregates. SUMMARY OF THE INVENTION The present invention relates to a method for manufacturing a silicon ingot in a hot zone furnace by using a front spin-up rate graph derived from a fused melt of Shi Xi located in one of the hot zone furnaces. The ingot is pulled out along an axis from a Shixi smelting melt located in one of the hot section furnaces. The pulling rate is high enough to avoid filling the paper. The Chinese standard (CNS) A4 is applicable. Specification (210X 297mm) r pack-% · (Read the precautions on the back before filling this page) Order goose 541366 A7 B7 V. Description of the invention (5) Gap aggregation, but it is also low enough to collect the gaps The body is confined to one of the ingot-rich void regions of the ingot shaft. Subsequently, the thus-pulled cast is spin-cut into a plurality of semi-perfect wafers. The wafers have a void-rich region including void aggregates at the center, and a gap between the void-rich region and the void-rich region. A pure region between the edges of the wafer. The pure region does not contain void aggregates and interstitial aggregates. The present invention is based on the understanding that aggregates are formed from point defects only when the concentration of the point defects exceeds a certain critical concentration. If the concentration of (void or interstitial) point defects can be maintained below this critical concentration, aggregates will not form when the ingot is pulled. In order to maintain the concentration of point defects below the critical point, the ratio of the pulling rate at the pound-melt interface to the temperature gradient (V / G) is limited to ⑴ above the ingot- The first critical ratio of the pull rate at the melt interface to the temperature gradient, which must be maintained to avoid interstitial aggregates; and (2) lower than the lift at the ingot-melt interface The second critical ratio of the drawing rate to the temperature gradient is not too large, and the void aggregates are limited to one of the void-rich regions at the center of the ingot. Therefore, when the ingot is pulled out of the silicon melt in the hot zone furnace, the 'drawing rate' curve is adjusted to maintain the pulling rate versus temperature gradient above the first critical ratio and below the first Two critical ratios. Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs (please read the notes on the back before filling out this page) According to another aspect of the present invention, it is based on a A silicon melt ingot pulling rate curve is drawn from a silicon melt in one of the hot zone furnaces to pull out the town bonds. The pulling rate is high enough to avoid interstitial aggregates. , But low enough to avoid void aggregates. Therefore, when the ingot is cut into a wafer, the wafer is a pure silicon crystal that includes a few defects, but does not contain void aggregates and interstitial aggregates. The paper is sized according to the Chinese National Standard (CNS). 4 secret (21〇χ297297) 541366 A7 V. Description of the invention (6) The circle printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs. According to this aspect of the present invention, it has been determined that if the V / G ratio is restricted to a relatively narrow range, both the point gap concentration and the point gap concentration can be maintained below the formation of aggregates. The critical point of the defect concentration. Therefore, the entire ingot may not contain aggregates. To form pure silicon, the first critical ratio of the temperature gradient of the ingot melt rate curve is determined. The first critical ratio needs to be maintained to prevent interstitial aggregates. The second critical ratio to the temperature gradient, which is determined by the pull rate change curve of the ingot-melt interface, cannot exceed the second critical ratio to prevent void aggregates. Then determine the pull rate change curve and when the ingot is pulled from the silicon melt in the hot zone melting furnace, the pull rate change curve can be maintained to a temperature gradient ratio higher than the first critical ratio and lower than the second critical ratio. The pull rate versus temperature gradient to be maintained at the ingot-melt interface is between two critical ratios. Considering the radial temperature gradient and the axial temperature gradient in the radial direction, the temperature gradient across the wafer usually changes. The reason is In the crystal ~ compare the edge part with different thermal environment. The gradient of the edge of a particular wafer is usually higher than the center of the wafer. This is due to thermal characteristics. The pull rate is usually constant across the wafer. Therefore, the V / G ratio is generally reduced from the crystal center toward the wafer edge in the radial direction. The pull rate and hot zone furnace are designed to be within the diffusion length from the center of the circle to the edge of the wafer, maintaining the V / G ratio below the critical point defect concentration of the aggregate, that is, between the first critical ratio and the second Critical ratio. Similar considerations apply to the axial direction. In the axial direction, as the thermal mass of the ingot increases, the temperature gradient decreases as the ingot is pulled. Therefore, when the ingot is pulled, the pulling rate must be slowed down to maintain the V / G ratio between the first and second ratios.

Equipment-(Please read the notes on the back before filling out this page} 541366 A7 B7 Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (7) Critical ratio. Therefore, by controlling the pulling rate curve And maintaining V / G between the above two critical concentrations, a "half of a region with a gap-rich region at the center and a pure region between the gap-rich region and the edge of the wafer can be generated. "Pure wafer". The void-rich region may include void dot defects and aggregate defect, while the pure region does not contain any void aggregates and interstitial collectives. Preferably, 'pure wafers can be generated, It includes a bit of fatigue, but does not contain void aggregates and interstitial aggregates. The first and second critical ratios can be determined experimentally or through simulation. These ratios can be obtained by cutting a reference ingot into several pieces. Wafer or axially cut the reference ingot and empirically measure it. Experiments and simulation techniques can also be applied in combination. In particular, the first and second critical ratios can be adjusted within a range of one to one pull rate. Under the changing pull rate, the hot zone A reference ingot was pulled out of the silicon melt of the stage furnace and experimentally measured. Then, the reference ingot was cut into several wafers. For semi-pure wafers, one with a predetermined Wafers that are rich in voids and do not contain interstitial aggregates. It is preferred to 'identify' a wafer that has the smallest void-rich regions without interstitial aggregates. The first of this semi-pure wafer And the second critical ratio are calculated from the pulling rate of the identified wafer and the position of the identified wafer in the ingot. To determine the first and second critical ratios of pure wafers, the Pull out the reference casting key, cut it into several wafers, and then identify the wafers that do not contain void aggregates and interstitial aggregates. The first and second critical ratios of pure wafers are determined by warp (please read first Note on the back then fill out this page}-、 1Τ IW. -In 10-

F Pack-(Please read the notes on the back before filling this page),? τ Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 541366 A7 -------- B7 V. Invention Description (8) '— "-The pull rate of the identified wafer and the position of the identified wafer in the ingot are calculated. The reference ingot is preferably pulled from a silicon melt in a hot zone furnace at a pull rate that varies in a range of pull rates, and from a second pull rate that is lower than the first pull rate To a third pulling rate that is higher than the second pulling rate but lower or higher than the first pulling rate. The first, second and third pulling rates are preferably based on the required ingot diameter and the desired V / G ratio. A linear change in the pull rate is preferably used to determine the first and second critical ratios. In another experimental technique, the reference ingot is pulled out of Shi Xixuan's melt in the hot zone furnace at a pull rate that varies over a range of pull rates. Subsequently, the reference ingot is cut axially. For semi-pure wafers, in the axially cut ingot, at least one axial position with the smallest void-rich region and no interstitial aggregates was identified. Next, the first and second critical ratios of the semi-pure wafer are calculated from the corresponding pull rates of the axial positions identified in the axially cut ingot. In order to generate a perfect wafer, at least one axial position without void aggregates and interstitial aggregates was identified in the axially diced spin. Then, the first and second critical ratios of the perfect wafer are calculated from the pull rate of the identified axial position and the position of the axial position. The first and second critical ratios can also be determined using simulation theory. In particular, the first and second critical ratios can be identified by Fronkov theory. The change of the pulling rate curve to the radial temperature can be determined by the operation of the specific hot zone furnace that simulates the pulling process of the ingot. The graph of the pull rate change for the axial temperature can be determined by the operation of the hot zone furnace when the simulated front key is pulled. It can maintain the pull rate to the temperature of the ingot. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 × 297 public love) 11 541366 A7

Please read the memorandum of &©;

Printed by the Employees' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 V. Description of the invention (10) Figure 5 does not exemplify the change curve of the pulling rate theoretically determined by simulation according to the present invention. Fig. 6 illustrates a graph for experimentally determining a pull rate using an axial slice according to the present invention. Fig. 7 does not illustrate the variation curve of pulling rate determined experimentally by wafer identification according to the present invention. Fig. 8 illustrates an example of a combination of a simulation, an axial dicing, and a wafer clock for manufacturing an ingot according to the present invention. Fig. 9 is a schematic representative diagram of a Tchalaskipper lifter which is formed into perfect silicon according to a modification of the present invention. Figure 10 illustrates an example of changing the pull rate and determining the preferred pull rate according to the present invention. Fig. 11 is a representative view of an X-ray tomography image, illustrating the rich-gap-rich area, the interstitial-rich area, and the perfect area according to the first reference ingot of the present invention. Fig. 12 is a representative view of an X-ray tomography image, which illustrates the void-rich region, the interstitial region and the finish region according to the second reference ingot of the present invention. Figures 1J and 14 illustrate the graphs of the pull rate change of adding a void-rich wafer and a perfect wafer according to the present invention. Component reference comparison table 100 Tchaikolasz (CZ) puller 106 Inner crucible 102, 104 Heating element 108 Outer crucible Standard scale + Guanjiabiao half (CNS) A4 specification (210 X 297 public love) (Please read the precautions on the back of ts before filling out this page) Installation --- l ·-丨 Order i -f 13 541366 V. Description of the invention (11 110 112 114 120 121 124 126 Pulling the heat screen crystal in the first direction of the shaft Axial inversion seed Fused polycrystalline silicon feed 128 Tungsten bond 130 Cavity enclosure, interface 132 Cooling port 502-514, 602-612, 702-712. 802-814 Box 914 Covered by the Intellectual Property Bureau of the Ministry of Economic Affairs, Employee Consumer Cooperative, printed Detailed description The invention will be described in more detail below with reference to the drawings, which show the preferred specific examples of the invention. However, the invention can be embodied in many different forms without being deemed to be limited to the specific examples described herein; instead, it is provided These specific examples are completely and completely disclosed, thus completely conveying the scope of the present invention to those in the industry. Similar numbers in the full text indicate similar components. Summary: The gap-rich and perfect wafers are now described with reference to Figures 3A-3E. Semi-pure crystal In summary, the wafer has (1) a void-rich region at its center containing void aggregates, and (2) a pure region between the second gap region and the edge of the wafer, which does not contain void clusters And interstitial aggregates. As shown in Figure 3A, the manufacture of void-rich wafers can begin with a review of Fronkov's theory. The illustration of Fronkov's theory is illustrated in Figures 3 and 8. If it starts at the edge (E ) And the line ending at center (0) shows that according to the present invention, if the pull-up rate to the temperature gradient ratio of the ingot melt surface (referred to as V / G) is maintained greater than the diffusion length from edge e (labeled point a) (V / G) i, and this paper size applies Chinese National Standard (CNS) A4 (210 x 297 mm)

14 541366 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 ____B7-'----___________ V. Description of the invention (12) In the center c (V / Gh, you can manufacture semi-pure wafers which have The void-rich region and the pure region between the void-rich region and the edge of the wafer. In particular, V / G can be changed in the radial direction of the ingot across the wafer. Due to the thermal characteristics of the center and edge of the wafer, V / G usually decreases from the center of the wafer toward the edge of the wafer. In this way, the specific V / G range shown in Figure 3A appears from the center (C) to the edge (E) of the wafer. On the silicon ingot and wafer manufacturing There is considerable concern about the formation of aggregates in the wafer, including voids or interstitial aggregates. It is known that agglomeration systems are formed due to agglomeration of point defects formed when the ingot was originally made from a melt. The concentration of point defects is usually composed of a silicon ingot and silicon The interfacial conditions between the melts are determined. Then, as the ingot is further pulled, diffusion and cooling determine point defects to agglomerate to form aggregates. As shown in Figure 3B, it is found that there is a critical void point defect concentration according to the present invention [ V] * and critical interstitial point defect concentration⑴ *, Below this concentration, spot defects will not agglomerate to form aggregates. It was found that according to the present invention, if the spot defect concentration remains below the critical concentration of the wafer peripheral region, a void-rich region is formed in the center of the wafer, but between the wafer-rich A pure region is formed between the region and the edge of the wafer. As shown in Figure 3B, the gap concentration across the wafer remains below the critical void concentration [V] *, except near the center c. This is shown in Figure 3C in the middle The ~ region forms a void-containing region [V], but the void-rich region [v] does not contain void aggregates on the outer side of the wafer edge and is therefore marked as [p] (pure or perfect). Refer again to Figure 3B for the gap filler The interstitial concentration from the wafer center c to the wafer edge E corresponding to point A remains below the critical interstitial concentration [I] *. The diffusion length between the wafer and the edge E ^, The interstitial concentration is initially higher than the critical concentration of the ingot-melt interface [丨] *, and the paper size is expanded to apply the Chinese National Standard (CNS) A4 specification (21G χ 297 public love) ----------- 15. (Please read the notes on the back before filling out this page) Binding — Ψ 541366

It can prevent the filling of vacancies, which will diffuse from the material and will not form a polymer in the crystal growth process. The diffusion length Li is usually about 2.5 to 3 cm for an 8-inch wafer: so as shown in the figure, a semi-pure wafer is formed with a void-rich region [V] at its center and between the void-rich region and the edge. There is a perfect zone. The preferred pure area [P] accounts for at least 0 36% of the wafer area and more preferably at least 60% of the wafer area. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs

The right figure is the wafer shown in Figure 3C. V / G must be maintained at point a greater than (independent! And at center C less than or equal to (V / G) 2. To maintain the v / g ratio between two critical values) The two thermal conditions must be considered. First, the radial temperature gradient from the wafer center = to the wafer diffusion length a must be maintained within this range. In this way, the medium V / G must be close to (V / G) 2 俾 Limit void aggregates to void-rich regions. In addition, V / G at the distance L from the edge diffusion length must be maintained greater than (V / G) i to prevent interstitial aggregates. Therefore, the hot zone furnace is preferably designed to maintain The change in G from wafer center to wafer diffusion length can maintain V / G between (V / G) 2 and (V / G) i. The second consideration is to start at the seed and end at the end of the wafer G is changed in the axial direction when pulled from the melt. In particular, increasing the heat of the ingot, reducing the heat of the melt and other thermal considerations can make G drop when the ingot is pulled from the melt. In order to maintain V / G and the first and In the second critical ratio, it is necessary to adjust the curve of the pulling rate of the ingot when it is pulled from the smelting melt of the hot zone furnace. When the ingot is pulled, the void aggregates can be controlled by controlling V / G. Limited to the void-rich region [v] close to the ingot axis A, as shown in Figure 3D. No interstitial aggregates are formed, so the ingot region outside the void-rich region is marked as [p] to indicate pure or perfect. As shown in Figure 3D, multiple semi-pure crystals are obtained

This paper size is applicable to China National Standard (CNS) A4 (21 × 297 mm)

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Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, this paper rule "has a void-rich region [v] containing void aggregates, and a void-rich aggregate and a gap between the rich region and the edge of the wafer using the Chinese national standard. The pure region of the gap aggregate. The diameter of the rich region m is equal to that of each wafer. It is formed by a single coin: the wafer y number is shown on the 3D icon as ①, which is usually the coin σ. Wen Lu Shimin on the mother wafer. 1 q —— 〇7 and digital 18 sub-domain identification wafers are all from early * ^.

Figure 3E illustrates a graph of the rate of change in pulling rate used to maintain v left / = between two critical ratios when the ingot is pulled from the melt. Because g usually decreases with the pull of the melt from the dazzling melt, the pull rate V is usually slowed to keep WG between two critical ratios. In order to obtain the expected processing changes, the V / G car is better and more accurate in the middle of the first-to-second critical ratio. It is better to maintain the guard band to allow processing variations. Summary: Pure silicon wafers Figures 4A-4E correspond to Figures 3a_3] Figure E illustrates the control of the pulling rate ^ into pure silicon ingots and wafers. As shown in Figure 4A, if V / G is maintained within a tight tolerance range between the wafer center C and the diffusion length a from the wafer edge E, the formation of void aggregates and filling can be prevented throughout the wafer. As shown in FIG. 4B, the gap accumulation is thus maintained. At the wafer center (ingot axis a), the v / G ratio remains lower than the critical ratio (V / G) 2 at which the void aggregates can be formed. Similarly, V / G dimension

Hold at the critical ratio (V / G) i that can form interstitial aggregates. The pure stone eve [P] in Fig. 4C thus formed does not contain interstitial aggregates and void aggregates. Pure ingots are shown in Figure 4D along with a pure wafer. The curve of the pull rate of pure silicon is shown in Figure 4E. X 297 mm)

Install · — · --- l · — Order --------- ^ Γ. (Please read the precautions on the back before filling in the stomach) "541366 V. Description of the invention (15) Lifting rate change curve The decision of the graph according to the present invention is to form a semi-pure wafer with a gap-rich region in the center and a pure region between the gap-rich region and the wafer edge. When the ingot is pulled from the silicon melt in the hot zone furnace, the ratio of the temperature gradient of the maintained pulling rate to the ingot is higher than the first critical ratio and lower than the second critical ratio. In the same way, if you want to form pure silicon that contains point defects but does not contain void aggregates and interstitial aggregates, determine the pulling rate change curve (Figure 4E). When spinning, the ratio of the pulling rate to the temperature gradient can be maintained higher than the first critical ratio and lower than the second critical ratio. The determination of the pull rate change graph will now be described. The pull rate curve can be determined theoretically through simulation, experimentally via axial slicing reference casting, experimentally slicing the reference ingot into wafers, or a combination of these techniques. In addition, the pull rate change curve of pure Shixi can be determined by first determining the pull rate change curve of semi-pure silicon and then modifying the structure of the hot section to obtain the pull rate change curve of pure silicon. These techniques will now be described. The graph of the pulling rate obtained by the simulation is shown in FIG. 5 of the test result. The graph of the rate of pulling rate determined by the simulation theory will now be described. As shown in Figure 5, the 'commercial simulation software' can be used to simulate the V / G change (called Δ (v / G)) at block 502. Then, at block 504, it is determined whether the V / G variation of the diffusion length h from the center to the edge is small enough to meet the criteria for forming a semi-pure wafer or a pure wafer. In particular, the illustration of Figure 3C is illustrated. Γ is installed ir (please read the notes on the back before filling this page). Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs

^^ 66 A7 1 _ 丨 ^ — V. Description of the invention (丨 6) For silicon with gap-rich regions, △ (¥ / 〇 must be between ( V / G) 1 and (V / G) 2. In other words, the interstitial point defect concentration must be less than [丨] * for the radius of the wafer between the centers C and a, and the void point concentration is greater than the wafer radius of d. It must be less than [v] *. Similarly, as shown in Figure 4, to form pure silicon, Δ (ν / 〇) must be less than or equal to (v / Gh minus (V / G)! 俾 Maintain [v] below Critical concentration [Vp, for all the radius from the center c to the diffusion distance a must also be maintained ⑴below the critical concentration 卩] *. Continue to explain Figure 5, at block 504, if the V / G diameter determined at block 502 If the direction change is too large to meet the conditions of semi-pure wafers or pure wafers (Figures 3D and 4D), the hot zone can be modified at block 506 and re-simulated until the gradient is small enough to meet the desired conditions. Especially as As shown in FIG. 9, the hot zone 4 can be modified as follows, adding 盍 9 14 to the hot screen 114 to fill the space between the cover 914 and the hot zone screen 114 with a heat-retaining material such as ferrous carbide. Other hot zones can be used Segment modification to reduce as needed Temperature gradient. Referring to Figure 5 again, perform a V / G axial change simulation at block 508 to determine the Δ (ν / (}) change when the ingot is pulled up. Experiment again at block 51 to find out 'cross-over?' It is small enough to maintain the desired characteristics as the wafer grows. Otherwise, the hot zone is modified at block 506. Then at block 5 i 2, the pull rate curve is determined to maintain the critical V / G, as shown in Figure 3E or 4E As shown in Figure 1. Of course, this type of pull rate is used to make ingots at block 514. The better pull rate curve is used for block 5 丨 2 to maintain V / G between the two critical ratios, thus maintaining protection. Typical process changes can be taken into consideration. Loading-(Please read the precautions on the back before filling out this page). Customs · Intellectual Property Bureau, Ministry of Economic Affairs, Employee Consumption Cooperative, prints the curve of the pull rate change through axial slicing.

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Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs

Figure 6 of McCaw now illustrates the use of axial slices to experimentally determine the lift] graph. As shown in Fig. 6, the reference ingot is pulled at a different pulling rate at block 602. To determine the preferred pull rate, use a range of pull rates as shown in Figure 10. As shown in Figure 10, the pulling rate is adjusted from a high pulling rate (a) such as 1.2 mm / min to a low pulling rate (c) of 0.5 mm / min and returning to a high pulling rate. Low pull rate can be as low as 0.4 mm / min or less. The change in the pull rates (b) and (d) is preferably a linear change. An ingot having a cross section shown in Figs. Η and 12 can be produced. Figures u and 12 illustrate the void-rich, gap-filled, and perfect regions [v], ⑴, and [p] of the ingot, respectively. People in the industry understand that these areas have various aggregate concentrations not shown in the line graphs in Figures 11 and 12. Referring back to Figure 6, the ingot is sliced axially at block 604. As shown in Figure 11, for semi-pure silicon, the ingot is sliced along the axis, and axial slices are measured using conventional techniques such as copper decoration, seco-etching, X-ray tomography analysis, life measurement, and other conventional techniques. Aggregate concentration. Preferably, the aggregate is cut axially 'for mirror etching and annealed at 800 ° C for 4 hours under a nitrogen atmosphere and after 16 hours of annealing at 1000 C to measure the life. As shown in Fig. N, the 'axial position P' has a large void-rich region and a relatively small perfect region. The axial position Pa has a small void-rich region and a large perfect region. The axial position P3 has the smallest possible void-rich region and the largest possible perfect region ', but no gap-rich aggregate region is introduced. The axial position p4 has a very small void-rich region but a large gap-rich region, which is not desirable. Thus, at block 608 ', V / G is determined based on the axial position versus the axial position p3 along the first figure. At block 610, the determination of this position p can be satisfied when the wafer is pulled up.

This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 541366 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 5. The description of the lift rate curve according to the invention (18) and then the tungsten bond . People in the industry need to understand that the axial position P3 is not used for real production because of the increase in the interstitial area caused by process changes. In this way, the axial position between positions p2 and p3 can be selected regardless of process variations, and acceptable small void-rich regions can be included without interstitial aggregates. Axial coin slicing can also be performed on ingots pulled in hot sections, which are designed for pure silicon. Such an ingot is shown in FIG. 12. As shown in the u-graph, the animal contains voids, perfect regions, and interstitial-rich regions [V], [I], and [p]. As shown in Figure 12, the axial position P5_pl0 contains a void-rich center region similar to that shown in Figure u. Positions P? And Pl0 contain an interstitial-rich ring and a perfect center. However, the positions P6 and P9 are perfect, because there is no gap in the center and no gap in the edge. Thus, at block 606, the axial position corresponding to the position or dagger is selected, and at this block 608, V / G is determined. The pull rate change curve that can maintain this V / G is determined at block 6o0, and the ingot is grown at block 612. People in the industry need to understand that the adjacent position ^ and the axial position range of Pg can be used to produce pure silicon. This gives you the option to truly allow process changes while still maintaining perfect silicon characteristics. Change curve of pulling rate determined by sa-circle identification Now refer to FIG. 7 to illustrate the change curve of pulling rate determined by wafer identification experiment. As shown in FIG. 7, the reference ingot is pulled at a block% at a constant lifting rate. To determine the curve of the optimal pull rate, it is better to use a range of pull rates as shown in the figure. For example, the pulling rate is adjusted from high pulling rate ⑷ (here 12mm / min) to low pulling rate d. The paper size applies the Chinese National Standard (CNS) A4 specification (210 297 mm) f 碕 read the back of if first Zhuyin? Matters refill this page}

21 541366 A7 B7 V. Description of the invention (19) mm / min and high return speed. Low pull rate can be as low as 04 mm / min or less. The change in the pull rates ⑻ and ⑷ is preferably linear. It is possible to produce ingots with a cross section as shown in Fig. 11 or 12. Referring back to Figure 7, the ingot is sliced in a radial direction at block 704 to produce multiple wafers. With reference to the nth figure, for semi-pure silicon, the ingot is sliced to provide a representative wafer Wi_We, and then the concentration of these BB circles is measured using conventional techniques, such as copper decoration, last name engraving, and life test. Or other know-how. As shown in the figure, the wafer has large void-rich regions and relatively small perfect regions. The wafer% has a smaller void-rich region and a larger perfect region. The wafer w3 has the smallest possible void-rich region and the largest possible perfect region without introducing a gap-rich aggregate region. It is not desirable for a wafer to have a very small void-rich area but a large void-rich area. Thus, at block 708, the V / G of wafer W3 is determined based on the axial position of the wafer along the ingot in FIG. At block 710, a graph of the pulling rate of the wafer W3 is determined when the wafer is pulled, and then an ingot is manufactured. People in the industry must understand that the axial position of wafer W3 is not used for real production ’because the process change may cause the growth of the interstitial area. In this way, the axial position of the wafer between wafer W3 and wafer W2 can be selected to include acceptable small void-rich regions, but no interstitial aggregates have been introduced and are independent of process variations. Wafer slicing can also be performed on ingots designed for hot-segment pulling of perfect silicon. Such an ingot is shown in FIG. 12. As shown in FIG. 11, the void-rich region 'perfect region' and the interstitial-rich region [V] '[I] and [P] are shown. As shown in Fig. 12, multiple wafers W5 and W10 can be produced. Wafers W5 and W10 contain a void-rich center region similar to that shown in figure u. Wafer W7 and the paper with rich content are compatible with Chinese National Standards (CNS) A4 (210 X 297 mm). (Please read the back of the page; I will fill in this page before filling in this page.) Order: Intellectual Property Bureau, Ministry of Economic Affairs Printed by employee consumer cooperatives Printed by employee consumer cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs _ V. Invention Description (20) " ~ ~ | However, both the wafer and W9 are perfect, because there is no gap in the center and no gap in the edge. In this way, the axial position corresponding to the crystal circle W6 or W9 is selected at block 706, and V / G is determined at the axial position at block 708. At block 710, it is decided to maintain such a graph of the pull rate variation of v / G, and at block 712, an ingot is manufactured. People in the industry need to understand that a range of wafer positions can be selected for adjacent silicon to produce silicon. Selecting true V / G in this way allows multiple process variations while maintaining perfect silicon characteristics. Star 1_Examination and simulation technology determines the pull rate. Referring now to FIG. 8, a combination of simulation, axial slicing, and wafer time is used to manufacture the ingot of the present invention. As shown by block 802 in Figure 8, simulation can be used to determine a range of pull rates. At block 804, multiple reference ingots can be added. Several ingots were sliced axially at block 806, and several ingots were sliced at wafer 808. The optimal V / G is determined by the interaction between the axial slice, wafer identification, and simulation results obtained from block 810. A pull rate is then determined at block 812 and an ingot is manufactured at block 814. This process is performed twice to obtain pure silicon, so the hot zone can be modified as needed after obtaining semi-pure silicon. The actual pull rate will depend on a variety of variables, including but not limited to the ingot diameter, the use of a specific hot zone furnace and the quality of the silicon melt. Figures 13 and 14 illustrate examples of the pull rate variation curve (Figure 8) determined using a combination of simulation and experimental techniques. Fig. 13 illustrates an example of a pulling rate change curve of an ingot having a length of 100 cm and a diameter of 200 mm to form a 12 cm diameter void-containing region and providing a pure crushing area occupying 64% of the area. A model Q41 hot zone furnace manufactured by Mitsubishi Materials Corporation was used. Figure 14 illustrates the use of this paper size to apply Chinese National Standard (CNS) A4 (210 X 297 public love). — — — — — — — (Please read the notes on the back first (Fill in this page again) & 23 > 41366, invention description (21) =, 13 is the same as _parameter growth Pure Shixi's pull rate change curve 57, but using the modified thermal section of Figure 11. The drawings and descriptions of the present invention disclose typical and preferred specific examples of the present invention. Although specific terms are used, they are used for the general purpose of description and not for the purpose of limitation. The scope of this disclosure is set forth in the scope of the accompanying patent application. (Please read the precautions on the back before filling out this page) · Mu 1_§ n ϋ n · ϋ Iο, · MB a ··· W MB · Η · Ι wa 蜃 Printed by the Employees ’Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs

Claims (1)

541366 Application for Patent Scope No. 87101568 Patent Reexamination Application for Patent Scope Amendment Date of this revision: July 91 1. A method for making cut ingots in a -hot zone furnace, which includes the following steps: The curve of the prayer-pulling lift rate of the 炉 -melt in the hot zone furnace τ 'is drawn from the-material melt in the hot-zone furnace along the-axis to pull out the coin " The pulling rate is high enough to avoid interstitial agglomerates, but it is also low enough to restrict void aggregates to one of the spindle-rich void regions; where the pulling step is preceded by the following steps ... The critical ratio of the drawing rate to the temperature gradient of the ingot-melt interface 'This -critical ratio needs to be maintained to prevent the interstitial aggregate from determining the pulling rate to the temperature gradient of the ingot-melt interface— Critical ratio 'The second critical ratio cannot be too large. It limits the agglomerate aggregates to the rich void area at the center of the ingot; and determines a graph of the pulling rate. When the melt is pulled out, the graph can The temperature gradient of the ingot is maintained above the first critical ratio and lower than the second critical ratio; and /, the steps of the first critical ratio and the second critical ratio include the following steps:-a range of changes. At the drawing rate, a reference ingot is pulled out of the smelt melt in the hot zone furnace; the reference ingot is cut into several wafers; the size of the paper below the casting is t_ 家 标准 (_ Α4 Specifications ⑽χ297 公 ⑹ ¾ ...: (Please read the precautions on the back before filling this page) 4! 25- 541366 A8 B8 C8 π ---------___ VI. The scope of patent application identifies a region with the smallest rich voids Wafers without interstitial aggregates; and the first and second critical ratios are calculated from the pull rate of the identified wafer and the position of the identified wafer in the ingot. 2. The method according to item 丨 of the patent application scope, wherein after the lifting step, the step of cutting the ingot thus pulled out into a number of semi-perfect wafers is followed by a wafer such as σ Hai at its center There is a void-rich region including void aggregates, and a pure region between the void-rich region and the edge of the wafer. The pure region does not contain void aggregates and interstitial aggregates. 3. The method according to item 1 of the scope of patent application, wherein the silicon melt in the hot zone furnace is pulled at a pull rate varying from a pull rate of 0.4 亳 / min to 1.2¾ m / min. The step of pulling the reference ingot includes the following steps: At a pulling rate, the reference ingot is pulled out of the silicon melt in the hot zone furnace, and the pulling rate is 1.2 mm / The pull rate per minute was changed to a pull rate of 0.4 mm / min, and then changed to a pull rate greater than 0.4 mm / min. In the method of item 3 of the patent, the pulling rate is linearly changed within a pulling rate of 0.4 mm / minute to 12 mm / minute. 5. The method according to item 丨 in the scope of patent application, wherein the steps for determining the first critical ratio and the second critical ratio include the following steps: ^ is from 0.4 mm / min to 丨 2 mm / The pull rate in minutes is pulled from the melt in the hot zone furnace at the pull rate of the culture. Zhang ruler (⑽) A4 size (21〇297mm) ---- -• Line 丨 (Please read the precautions on the back before filling in this page) ， 可 -26-Please request the patent inventor to issue a reference ingot; cut the reference ingot in the axial direction; In the reference ingot rich in void area, at least one vehicle direction position with and without interstitial aggregates was identified; the pull rate of at least _ vehicle check position identified from the identification and the warp determined The position of at least _ ^ a ^ mi ^ axial positions in the axially cut ingot differs significantly from the first and second critical ratios. 6. If the method in the fifth item of the patent application is applied, I. < < < > > at a pull rate that varies within a pull rate of 0.4 mm / min to 1.2 $ q / min, The step of pulling the reference ingot from the material melting in the hot zone furnace includes the following steps: At a pulling rate, the reference ingot is pulled out of the silicon melt in the hot zone furnace. The pulling speed ㈣ changed from a pulling rate of 12 mm / min to a pulling rate of 0.4 mm / min, and then changed to a pulling rate greater than 0.4 mm / min. 7. According to the method of claim 6, the pull rate is changed linearly within a pull rate of 0.4 mm / min to h2 mm / min. 8. The method of claim 1 in the scope of patent application, wherein the steps for determining the first critical ratio and the first ¾ boundary ratio include the following steps: The first and second critical ratios are determined by Fronkov theory; The simulation of the hot zone furnace during the pulling of the ingot is used to determine a graph of the pulling rate versus the radial temperature gradient. The scope of D8 patent application is determined by the simulation of the hot zone furnace during the pulling of the ingot. A graph of the pulling rate versus the axial temperature gradient; a graph of the pulling rate vs. the radial temperature as proposed by M, and a graph of the pulling rate versus the axial temperature as proposed by M Rate curve graph, when the ingot is pulled out of the silicon melt in the hot zone furnace, the drawing rate curve can maintain the ratio of the drawing rate to the temperature gradient in the ingot higher than the first A critical ratio but lower than the second critical ratio. 9 · As in the method of claim 2 of the patent scope, wherein the wafers have a crystal Q area and wherein the pure regions occupy at least 36 of the wafer area %.忉 · The method according to item 9 of the patent application scope, wherein the pure region accounts for at least 60% of the area of the wafer. U. The method according to item 丨 of the patent application range, wherein the pulling step is preceded by the following steps: At a pulling rate that varies within a pulling rate of 0.4 mm / min to h2 mm / min, Pull out the reference spin from the silicon melt in the zone furnace; cut the reference ingot into several wafers; identify a wafer with a minimum of void-rich regions and no interstitial aggregates; The pull rate of the identified wafer and the position of the identified wafer in the ingot are calculated for the wafer with the smallest void-rich area and no interstitial aggregates. The ratio of the temperature gradient of the interface; and a drawing of the pulling rate curve. When the ingot is pulled from the hot zone furnace silicon-28-, the patented Fan Yuan melt, the 裎 19, ^ Hailing The elongation curve can maintain this ratio. 12. If the method of the U-th family of patents is applied, the method will change the pull rate from 0.4 内 m / min to 1.2¾m / min. The steps of pulling the reference ingot by the material melt towel: ^ At the -pulling rate, the reference ingot is pulled out from the material melt located in the hot zone furnace, and the pulling rate is determined by a The pull rate of 12 mm / min was reduced to-a pull rate of 0.4 mm / min, and then changed to a pull rate of greater than 0.4 mm / min. U · As in the method of the patent application scope μ, wherein the pulling step is preceded by the following steps: At a pulling rate that varies within a pulling rate of 0.4 mm / minute to 12 mm / minute, Pull out the reference prayer key from the hot melt of the hot zone furnace; cut the reference ingot in the axial direction; and in the axially cut reference ingot, identify at least one with a small table with voids and no Axial position of interstitial agglomerates; at least one axial position of the ingot from the identified wafer pull rate and axial cutting of the ingot, for at least one axis with the smallest void-rich area and no interstitial agglomerates To the position, calculate the ratio of the pulling rate to the temperature gradient of the ingot_melt interface; and determine a pulling rate curve graph, when the ingot is being pulled from Shi Xixuan melt in the hot zone furnace, The pull rate curve can maintain the ratio. 14. The method according to item 13 of the scope of patent application, in which one is 0.4 mm / min. The paper size is suitable for money _ home standard (⑽) M specification ⑽ χ297 public love) -29- ............ (Please read the precautions on the back before filling in this page). Order. M1366 A8 B8 C8 ： -------- 08 _ 7, scope of patent application- — At a pulling rate that varies within a pulling rate of 1.2 to 1.2 milligrams per minute, the step of pulling the reference spindle from the stone melt in the hot zone furnace includes the following steps: At the pull rate, the reference casting screw is pulled out of the stone smelting melt located in the hot zone furnace. The pull rate is reduced from the pull rate of 12 mm to 0.4 mm / The pulling rate per minute was subsequently changed to a pulling rate greater than 0.4 mm / min. 15. The method according to claim 1 in the patent application, wherein the pulling step is preceded by the following steps: A simulation drawing of the hot zone furnace during the pulling of the ingot is used to determine a curve of the pulling rate versus the radial temperature gradient. ; Determine a graph of the pulling rate vs. the axial temperature gradient through the simulation of the hot zone furnace during the ingot pulling process; From the simulated graph of the pulling rate vs. the radial temperature, and simulate the A graph of the pulling rate versus the axial temperature, and a pulling rate curve determined by Fronkov's theory, which can maintain the & pulling rate versus the radial and axial temperature gradients -Interstitial agglomerates can be avoided 'and the void agglomerates are confined to a region located in the void-rich region of the ingot shaft. 16 · —A method for manufacturing a silicon ingot in a hot zone furnace, which includes the following steps: • Originating in place. A graph of the pulling rate curve of a silicon melt in one of the hot zone furnaces. Next, the ingot is pulled out from a silicon melt in one of the hot zone furnaces, and the pulling rate is high enough to avoid interstitial set. The paper size applies to the HS standard (cns) M Specifications (QX297 Gongchu) -30- 541366 A8 B8 C8 D8 patent-applied polymer, and low enough to avoid void aggregates. 17. The method of claim 16 in the scope of patent application, wherein the pulling step is followed by the following steps: cutting the drawn ingot from this into several pieces of pure crystals that do not contain void aggregates and interstitial aggregates circle. 1 8. The method of claim 16 of the patent scope, wherein the pulling step is preceded by the following steps: determining the first critical ratio of the pulling rate to the temperature gradient of the ingot-melt interface, the first critical ratio must be Is maintained to avoid interstitial agglomerates and a second critical ratio of the pulling rate to the temperature gradient of the ingot-melt interface, the second critical ratio must not be too large to avoid interstitial agglomerates; Drawing rate curve, when the ingot is pulled from the silicon melt in the hot zone furnace, the drawing rate curve can maintain the ratio of the pulling rate to the μ-degree gradient to be lower than the first critical ratio and low At the second critical ratio. 19. The method of claim 18 in the scope of patent application, wherein the step of determining the first critical ratio and the second critical ratio includes the following steps: a pull rate of 0.4 mm / min to 1.2 mm / min At the internal and anxiety pulling rate, the reference ingot is pulled out from the silicon melt in the hot zone furnace; the reference ingot is cut into several wafers; an aggregate that does not contain voids is identified and The circle of interstitial aggregates; and said (Please read the precautions on the back before filling this page) Order! * 丨 • By the pull rate of the identified wafer and the identified wafer in prayer -31-541366 6. The position in the key of the patent application Fan Yuan calculates the first and second critical ratios. ^ The method of applying for item 19 of the patent scope, in which a reference is made by pulling in a material in a hot zone furnace at a pulling rate varying from 0.4 mm / min to L2U / min. The phase step includes the following steps: At a pull rate, the reference point is pulled out of the melt in the hot zone furnace, and the pull rate is from a pull rate of 12 milligrams per minute. Culture to-a pull rate of 0.4 mm / min, then changed to a pull rate greater than 0.4 mm / min. 21. The method of claim 20 in the patent application range, wherein the pulling rate is changed linearly within a pulling rate of -0.4 mm / minute to 12 mm / minute. Α As the method of applying for the scope of the patent No. 20, wherein the steps of determining the first critical ratio and the second critical ratio include the following steps: ▲ Within the pull rate of 0.4 mm / minute to 1.2 mm / minute At the rate of pulverization, the reference ingot is pulled out from the second melt in the hot zone furnace; the reference ingot is cut in the axial direction; in the axially cut reference ingot, the identification Calculate at least one axial position that does not contain void aggregates and interstitial aggregates; and calculate the pull rate from at least one axial position identified and at least one axial position in an axially cut ingot to calculate the First and second critical ratios. & The method according to item 22 of the scope of patent application, in which the paper size is -4 mm / min. The paper standard applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -32- 541366 A8 B8 C8 D8, the scope of patent application The step of pulling the reference ingot from the silicon melt in the hot zone furnace at a pulling rate that varies within a pulling rate of 1.2 耄 / min includes the following steps: At a pulling rate, The reference ingot was pulled out of the silicon melt in the hot zone furnace. The pulling rate was changed from a pulling rate of 12 mm / min to a pulling rate of 0.4 mm / min. The rate was then changed to a pull rate greater than 0.4 mm / min. 24. The method according to item 23 of the patent application range, wherein the pulling rate is changed linearly from a pulling rate of -0.4 mm / minute to 12 mm / minute. 25. The method according to item 18 of the scope of patent application, wherein the steps for determining the first critical ratio and the second critical ratio include the following steps: The first critical ratio and the second critical ratio are determined by Fronkov theory; A graph of the pulling rate versus the radial temperature gradient is determined by the simulation operation of the hot zone furnace during the tungsten spinning lift; a simulation of the hot zone furnace during the casting rotation is used to determine a pulling rate A graph of the axial temperature gradient; a graph of the simulated pull rate versus radial temperature, and a graph of the simulated pull rate versus axial temperature to determine a pull rate graph. When casting When the ingot is pulled out of the silicon melt in the hot zone furnace, the pulling rate curve can maintain the ratio of the pulling rate to the degree gradient in the ingot above the first critical ratio and lower than Second Pro ratio. 26. The method of claim 16 in which the temperature range is determined before the pulling step. ί-: ... 鬓:… (Please read the notes on the back before filling this page) • Order—Zero Line 丨 -33 541366 The scope of applying for a patent includes the following steps: 0.4 to 12 mm per minute At a pull rate of 1 minute / min, the reference ingot is pulled out from the melt in the hot zone furnace; the reference ingot is cut into several wafers; round; one is identified The pulling rate of the wafers without the void aggregates and interstitial aggregates, and the position of the identified wafers in the ingot, for the circle without the interstitial aggregates and interstitial aggregates, Calculate the example of the pulling rate versus the temperature gradient of the casting spin and the melt interface; and determine a pulling rate curve graph. When the ingot is pulled out of the silicon melting melt in the hot zone furnace, the The pull rate curve maintains this ratio. The method for applying for item No. 26, wherein the extraction rate is changed from the lava solution in the hot zone furnace at a pulling rate varying from 0.4 mm / min to 1.2 mm / min. The step of pulling the reference ingot includes the following steps: At the pull rate, the reference _ is pulled out of the melt in the hot zone furnace, and the pull rate is _ 12 milliseconds. The pull rate was changed to-a pull rate of 0.4 mm / min, and then changed to a pull rate greater than 0.4 mm / min. Consider the method of claim 16 in the patent application range, in which the following steps are preceded by the pull-up step: within the range of 0.4 mm / min to 19 zhizhiye, the rate of pull-out of the main pen in the knife is not per minute Downgraded to the paper standard applicable to China National Standard (CNS) A4 specifications (21〇 > < 297 public reply) .........— (Please read the precautions on the back before filling this page). I-line 丨 -34- 、 Patent application scope 'is located in the melt of the hot zone furnace The reference ingot is pulled out at a variable pulling rate; the reference ingot is cut in the axial direction; in the axially cut reference prayer key, the axial position of the void aggregate and the interstitial aggregate is included; " The lift rate of the wafers that have not been identified and the axial cutting sphericity > an axial position, calculated for the interstitial 隹 ㈣Η 丨 to the position that does not contain void aggregates and Μ 卞 ά direction ' The ratio of the drawing rate to the temperature gradient of the ingot melt interface; and determine a drawing rate curve diagram, which is drawn when the ingot is pulled out of the hot melt in the hot zone furnace This ratio can be maintained. The method of applying for the 28th patent scope of the invention, wherein at a pulling rate varying from 04 mm / min to a pulling rate of 1.2 «m / min, the method is carried out by the melt in the hot zone furnace. The step of pulling the reference ingot includes the following steps: At the pulling rate, the reference ingot is pulled out of the stone melt in the hot zone furnace, and the pulling rate is from-12 亳 m / min. The pulling rate was changed to a pulling rate of 0.4 mm / min, and then changed to a pulling rate greater than 0.4 mm / min. 30. The method according to item 16 of the patent application, wherein the pulling step is preceded by the following steps: A simulation of the hot zone furnace during the pulling of the ingot is used to determine a pulling rate versus the radial temperature gradient. Graph; The paper size is determined by the simulation of the hot zone furnace during the lifting of the prayer ingot. Applicable to China National Standard (CNS) A4 specification (210 X 297 mm) -35- 541366 A8 B8 C8 _—____ D8 ^ A patent application range of pulling rate vs. axial temperature gradient; from the simulated pulling rate vs. radial temperature, and from the simulated pulling rate vs. axial temperature, and from Fronkov theory 'to determine a pull rate curve that can maintain the pull rate versus radial and axial temperature gradients in a range that avoids void aggregates and interstitial aggregates . 31. A method for manufacturing a silicon ingot in a hot zone furnace, comprising the following steps: Under a drawing of a pulling rate curve of an ingot derived from a silicon melt in the hot zone furnace, The ingot is pulled out of a silicon melt in the hot zone furnace. The pulling rate is to produce a semi-perfect wafer. The wafer has a rich A void-containing region and a pure region between the gap-rich region and the edge of the wafer. The pure region includes interstitial defects, but does not include interstitial aggregates and interstitial aggregates. 32. The method according to item 31 of the patent application scope, wherein the ingot step is followed by bismuth and the following steps are performed: the ingot thus pulled out is cut into several semi-perfect wafers, and the wafers are at their centers. There is a void-rich region containing agglomerates and a pure region between the void-rich region and the wafer edge. The pure region does not contain void aggregates and interstitial aggregates. 33. The method of claim 31, wherein the pulling step is preceded by the following steps: determining the first critical ratio of the pulling rate to the temperature gradient of the ingot-melt interface, the first critical ratio must be maintained To avoid interstitial agglomerates, this paper size applies the Chinese national standard (〇 ^ A4 size (21〇> C297 public love) (Please read the precautions on the back before filling this page) -36 A8 B8 ---— C8 ----- 刖 _ Application for Special Purpose · One —: — The L-th limit ratio of the pull-up rate to the temperature gradient of the ingot_melt interface. The two critical ratios must not be too large, and confine the void aggregates to the void-rich area at the center of the ingot; and determine a graph of the pulling rate when the ingot is removed from the silicon iron body of the hot zone furnace. When pulling, the pulling rate curve can maintain the ratio of the pulling rate to the gradient at a south threshold lower than a second critical ratio. 34. The method according to item 33 of the patent application, wherein the step of determining the first critical ratio and the second critical ratio includes the following steps: Culture at a pull rate of 0.4 mm / minute to 12 mm / minute At the pulling rate of 50, the reference prayer key is pulled out from the silicon melt in the hot zone furnace; the reference ingot is cut into several wafers; one with the smallest void-rich area and no filler is identified. Gap aggregate wafers; and the first and second critical ratios are calculated from the pull rate of the identified wafer and the position of the identified wafer in the ingot. 35. According to the method of claim 34 in the scope of patent application, the middle of the pull rate is 0.4 mm, the nominal range is 1.2 d: within a pull rate of m / min. The step of pulling the reference casting spin in the silicon melt of the furnace includes the following steps: At a pulling rate ·, the reference ingot is pulled out of the silicon melt in the hot zone furnace. The pulling rate is Change from a pull rate of 12 mm / min to a pull rate of 0.4 milliliter / min, and then change the paper size to the Chinese national standard (⑽> A4 size⑵GX tearing) —a ' ............ Please read the notes on the back before filling in this page), j-T— -37- Application for patent Fan Yuan to-more than 0.4 mm / minute pull rate. 36. The square way of the 35th item in the patent application range is 0.4 mm / min to change within the line. !! .2 Lifting rate of Ai / min 37. As in the method of claim 33 in the patent application range, wherein the steps of determining the first critical ratio and the second critical ratio include the following steps: | 1 is 0.4 mm / The reference ingot is pulled out from the melt in the hot zone furnace at a pull rate that varies from a minute to a pull rate of 12 mm / minute; the reference ingot is cut in the axial direction; Among the axially cut reference cast keys, at least one axial position with minimum interstitial-rich areas and no interstitial aggregates was identified; and the pulling rate from the identified at least one axial position, and the shaft The first and second critical ratios are calculated by cutting at least one axial position in the cast key. 3 = Method of 37 items in the patent application range, in which the silicon in the hot zone furnace is pulled at a pulling rate that varies from 0.4 millimeters per minute to 1.2 millimeters per minute. The step of pulling the reference ingot in the melt includes the following steps: At a pulling rate, the reference ingot is pulled out of the silicon melt in the hot zone furnace, and the pulling rate is from 12 to 12. The pull rate of mm / min was changed to a pull rate of 0.4 mm / min, and then changed to a pull rate of greater than 0.4 mm / min. 541366 A8 B8 C8 -------- ---- D8 VI. The scope of Chinese patents " ~~-39. If the method of the 38th scope of the patent application, the pull rate is based on line 1. The ± mode varies within a pull rate of 0.4 mm / min to 12 mm / min. 40. The method of claim 33 in the patent application, wherein the steps for determining the first critical ratio and the second critical ratio include the following steps: The first and second critical ratios are determined by Fronkov theory; A graph of the pulling rate versus the radial temperature gradient is determined by the simulation operation of the hot zone furnace during the pulling of the ingot; the simulation rate of the hot zone furnace during the pulling of the ingot is used to determine a pulling rate A graph of the axial temperature gradient; a graph of the simulated pull rate versus radial temperature, and a graph of the simulated pull rate versus axial temperature to determine a pull rate graph. When casting When the ingot is pulled out of the silicon melt in the hot zone furnace, the pulling rate curve can maintain the ratio of the pulling rate to the temperature gradient in the ingot above the first critical ratio and lower than The second critical ratio. 41. The method according to item 32 of the patent application scope, wherein the wafers have a wafer area, and the pure region accounts for at least 36% of the wafer area. 42. The method of claim 41, wherein the pure region occupies at least 60% of the wafer area. 43. A method for manufacturing a silicon ingot in a hot zone furnace, comprising the following steps: under a pulling rate curve of an ingot derived from a silicon melt in the hot zone furnace, Located in a silicon melt in one of the hot zone furnaces' This paper size applies to China National Standard (CNS) A4 (210X297mm) -39- • :: Fee (please read the notes on the back before filling (This page) • Ordering · Profit-seeking Fanyuan Lifting = The ingot is pulled out, and the pulling rate can produce a perfect wafer, which contains spot defects but does not contain void aggregates and interstitial aggregates. 4 The method of item 43, wherein the ingot ㈣ is followed by two steps: cutting the drawn ingot from this into several pure wafers, which do not contain void aggregates and interstitial aggregates body. The method of claim 43 of patent #m 'which is preceded by the following pulling step: determining the L-th boundary ratio of the pulling rate to the temperature gradient of the ingot-melt interface, the first critical ratio must be maintained,俾 Avoid the interstitial aggregates and the first boundary ratio of the pull-up rate to the temperature gradient of the cast-bond_melt interface, the second critical ratio cannot be too large, so as to avoid interstitial aggregates; and Lifting rate curve. When the ingot is pulled from the silicon melt in the hot zone furnace, the pulling rate curve can maintain the ratio of the pulling rate to the serviceability gradient above the first critical ratio. Below the second critical ratio. 46. The method of claim 45, wherein the steps of the first critical ratio and the second critical ratio of mosquitoes include the following steps: within a pull rate of 0.4 mm / min to 1.2 mm / min The reference ingot is pulled out of the silicon melt in the hot zone furnace at a reduced pulling rate; the reference ingot is cut into several wafers; an aggregate that does not contain voids and an interstitial aggregate is identified The size of the wafer; and the standard of this paper is suitable for the country (M specifications (× 297)), the patent application scope, the pull rate of other wafers, and the position of the identified wafers in the casting lean are calculated. The first and second critical ratios. ^ The method in the 46th scope of the patent application, whose t is at a pulling rate of -0.4 milligrams per minute 2¾ meters / knife bell rate, is extracted from the hot-zone furnace-cut melt The step of pulling the reference key includes the following steps: Under the pulling rate, a reference casting spin is proposed from the stone evening melt located in the hot zone furnace. The pulling material is accelerated by _ to 12 milliseconds. The rate changed to a pulling rate of -0.4 mm / min, and then changed to a pulling rate of -greater than 0.4 mm / min. The method of item 47 of the material benefit range, wherein the pulling rate is changed within a line of one quarter of a quarter of a quarter of a quarter. ...- to 丨. 2 mm / min pull rate 49. For example, the method of applying for the 45th pavilion of the patent application scope, the 45th item of the younger brother, where the steps of determining the-critical ratio and the second critical ratio include the following steps. Change: Lifting: The reference ingot is cut in the axial direction by pulling in the body of the hot zone furnace in the pull rate of 'min to 1,2 mm / min = below the rate'; Bagu t this In the axially cut reference casting screw, the bell determined the axial position of at least one gap-free aggregate and interstitial aggregate; and the lift-cut cutting ingot from the identified to less than one axial position. At least one uranium ^ noon and sleeve two critical ratio. Axial position 'calculates the range of the-and A8 B8 C8 patent application 50. For example, the 49th method of the patent application range, the method of which, one in the range of 0.4 mm / minute to 1.2 $ m / minute At a pulling rate that varies within the pulling rate, the step of pulling the reference casting slag from the melt in the hot zone furnace includes the following steps: At a pulling rate, from the silicon in the hot zone furnace The reference casting spin was pulled out of the melt. The pulling rate was changed from a pulling rate of 12 mm / min to a pulling rate of 0.4 mm / min, and then changed to a value greater than 0.4 mm. Pull rate per minute. 51. The method of item 5G of the Shining Patent, wherein the pulling rate is changed linearly within a pulling rate of -0.4 mm / minute to 12 mm / minute. A. The method according to item 45 of the patent application range, wherein the steps for determining the first horizontal boundary ratio and the first critical ratio include the following steps: determining the first and second critical ratios from Fronkov's theory; The simulation operation of the hot zone furnace during the casting spin lift to determine a graph of the pulling rate versus the radial temperature gradient; the simulation operation of the hot zone furnace during the casting spin lift to determine a pulling rate pair A graph of the axial temperature gradient; a graph of the simulated pulling rate versus radial temperature, and a graph of the simulated pulling rate versus axial temperature to determine a graph of the pulling rate. When being pulled out of the silicon melt in the hot zone furnace, the drawing rate curve can maintain the ratio of the drawing rate to the temperature gradient in the ingot above the first critical ratio and below the first critical ratio. Two critical ratio 0 -42