TW536889B - IP address built-up and search method of router and device therefor - Google Patents

Abstract

The invention discloses an IP address built-up and search method of router and device there for using compression technique to effectively reduce the memory space required by segment array of indirect lookup table and multiple next hop array so that the search frequency of memory is among 1 to 4 times and only one time memory search if pipeline transmission method is applied. Besides, when routing table is updated, the invention won't have to rebuild forwarding table and can quickly finish updating action.

Description

536889 A7 B7 V. Description of the invention (1) tjl field The present invention relates to an Internet Protocol (Internet Protocol) address finding method for a router (Γ 0 U ter), and particularly to a method for finding an address. A multi-stage forwarding table (f owardingtab 1 e) is used to find the IP address. Ming background. Due to the rapid development of the Internet and the tendency of network traffic to become unpredictable, the original 80/20 rule (80% of traffic flows in the local area network and 20% of traffic flows in the wide area network). ) Is no longer applicable, and the rise of the super high-speed Internet (G igabit E thernet) has made routers a bottleneck in network performance. Generally speaking, a router has a routing table (Ro otn ag t a b 1 e), which contains connection information between networks, and the router performs routing information processing based on the routing table when packet exchange is performed. However, because routers need to consume a lot of resources when performing routing information processing, it is one of the important reasons that cause routers to slow down. In order to improve the performance of the third layer (network layer) for packet switching, the ability to route queries must be effectively improved. For each incoming packet, the router must perform a 1? Address search in its routing table with the destination address of the packet to determine which destination to send to. Each entry in the routing table contains: destination address / network mask and output port number. Because CIDR technology is proposed, 536889 in the routing table

The item is defined as ㈣fix / pre-bit length and output port number, and the length of the pre-bit is limited to 0 to 32. The IP address search mechanism is to find the longest prefix at the destination address of each incoming packet in the routing table in the router. Point (n ext hop). Due to the complexity of this process, most routers currently use software to implement it, but its conversion speed cannot meet the huge traffic on today's network. It also makes IP address search the most important bottleneck on the current network. One way to improve the router's query capability is to use indirect lookup. In this method, a binary binary trie i2 corresponding to a previously set element in the routing table is firstly defined, and an lp address occupied by each preceding bit is defined. Then construct a segment array and a plurality of sub-drop arrays (next h〇p

Line array), * The IP address search mechanism is to use the guidance of the sector array and the sub-location array to find the sub-location corresponding to the packet. Fig. 10) to Fig. 1 (c) are examples of the indirect table lookup method. Figure 1 (a) is a virtual binary tree structure from the ten leading bits (numbered A to J) in the routing table. Figure 1 (b) defines the IP address occupied by each leading bit (numbers A to J). Figure 1 (c) divides the leading bit into two nibbles, and (nibb 1 e). The higher nibble is used as the position of the segment array j 3 and the lower half. Byte system is used as array of multiple sub-drops -5- t paper scale is applicable to τ Sekitsuka (CNS χ 297 public love) ------ 536889 A7 B7

14, 14 |, and 14 " addresses' and the segment array "and a plurality of sub-drop arrays 14 to 14 (inner valley is based on the IP address occupied by each of the preceding bits) Fill in. For example, the first-column of the sector array 13 records the sub-drop point (the number of bits in the current set bit is less than or equal to four) or points to the sub-drop point. Columns 14 ~ 14 " The column indicates the longest offset k of the previous set bit corresponding to this indicator (the number of bits of the leading bit minus four) 'and the second drop point array 14 ~ 14 || corresponding to this indicator has a total of 2k contents. The The sub-drop point array 14 ^ i4 " has only one column, which records the sub-drop points. After the content of the sector array and a plurality of sub-drop point arrays 14 ~ 14 is constructed, the lp address search mechanism can use the packet The 1? Address matches the guidance of the sector array 13 and the sub-drop array 1 4 ~ 1 4 f | to find the sub-drop corresponding to the packet. However, the dot array 14 recalls the memory. The array of sections of the table method ^ ~ 14 " is not flexible in use, 3 and multiple times and requires a lot of booking to improve another router query performance The method of force is disclosed in the patent specification of the Republic of China Patent Bulletin No. 410292, the invention name is "Method and System for Routing Information Construction and Khan Path Inquiry of Super High Speed Switching Router". This method The compression method is used to make the output port query times less than three times during packet exchange, and the size of the forwarding table is limited to 5 i2KB or less. However, the above compression method is very complicated, and when the connection of the router is changed, its The relative forwarding table must be reconstructed to get the most complete routing table, which is very inconvenient in use. -6-

536889 A7

In order to meet the needs of more and more users on the network, how to construct a router with high transmission efficiency is a very important issue at present. Brief Description of the Invention The main object of the present invention is to provide a method and a device for constructing and searching an IP address of a router. In order to achieve the above-mentioned object, the method and device for constructing and searching IP addresses of the present invention effectively reduce the size of the segment array of the indirect look-up table method. Scan to calculate a 16-bit compressed bit map or sub-drop, and then put the result in the sub-drop column of the first 1¾ transfer table. Therefore, the entire segment array is divided into 2 i2 first groups and recorded in the first-order transfer table. When all the 16-bit values of the first group are the same, the second drop point of the first-order transfer table / the first drop-down column is recorded; otherwise the second drop-point of the first-order transfer table / The mapping pair records a compressed bit mapping pair, and the index column records the position i of the second-order transfer table. Since the value of the compressed bitmap pair code is ^ 1m, the corresponding adjacent bit values of the sector array are not equal. Therefore, by accumulating the bit values of the compressed bitmap pair code, the number is logical 1, that is, It can be deduced that the number contained in the corresponding second-order forwarding table. If the number of leading bits is less than 16, the second drop point / index block of the second-order transfer table is recorded according to the order of each drop point in the sector array. Conversely, the second drop point / indicator column of the second-order transfer table records an indicator, and the longest offset is the green-longest offset. If this paper size is in accordance with the Chinese National Standard (CNS) A4 specification (210X 297 mm ^ ------- take the bit length of long offset ...), you need to use the third-order transfer table and the fourth a Table, if not, only the third-order transfer table is needed. In addition, according to the above-mentioned order, the -16-bit compressed bit mapping code or m can be set to the second point of the third-order transfer table. Stop. Because the Japanese system scans with V sub-drop arrays included, the entire sub-drop array is divided into 21 "" h second groups (1 is called 〇 for leading position (the longest deviation The number of bits shifted minus one and a half of the number of Ip 数), and the text is recorded in the third-order transfer table. When the values of all bits in the first: group are the same, the third-order transfer table The second drop point / map pair records a single drop point; otherwise, the second drop point / map pair column of the third-order transfer table is recorded with green-compressed bit map pair 'and means that the fourth-order transfer table is recorded. Address. If the value of the compressed bit mapping pair is equal to the value of the corresponding adjacent bit value of the subordinate column, the bits of the compressed bit mapping pair are accumulated. The number of logic 1 can be used to derive the corresponding number in the fourth-order forwarding table. The fourth-order forwarding table contains only one drop point. The IP address construction and The searching method and device are first compressing a routing table occupying more memory into a smaller forwarding table, and then searching for an IP address. The present invention has the following advantages: 1. The number of memory queries is between one and four If the pipeline scheme is used, only one memory query is required. 2. When the routing table is changed, there is no need to rebuild the forwarding table, and 536889 A7 can be quickly changed.

B7 completes the update action. Can be used for static random processing memory (SRAM). 4. The required memory space is small. The present invention will be explained in accordance with the following drawings, in which: Figures 1 (a) to 1 / (c) are the conventional p-address construction and searching methods and devices thereof; / Figure 2 is the router of the present invention ιρ Address construction and searching method and parallel device I An embodiment; Μ 装-: 2 I Sun and Moon <construct the first order transfer table and the first [order transfer table] Figure 4 is the third order transfer of the construction of the present invention Table and the first embodiment; θ ^ ^ one of the tables is a real diagram of the construction of the first-order transfer table and second-order transfer table of the present invention 6 is a diagram of the construction of the third-order transfer table of the present invention; Flowchart 7 is a schematic diagram of FIG. 5 and FIG. 6; FIG. 8 is a flowchart of a method for searching for ιρ address of the present invention; FIG. 9 is a first embodiment of the method for searching for an address of the present invention; and FIG. The IP address finding device of the present invention—Example components The paper size is applicable to the Chinese National Standard (CNS) A4 specification (21 × 297 mm) -9, 536889 A7 B7 V. Description of the invention (7) 11 Routing table 13 Segment array 2 1 First-order transfer table 23 Third-order transfer table 2 11 hits / maps 22 1 hits / finger Column 23 1 drop point / indicator column 24 1 drop point column 10 1 First order transfer table 103 Third order transfer table 1 05 Fourth order transfer table 1 07 Second parallel adder 109 Multiplexer 111 Second addition Device 12 binary tree structure 14, 14 ', Η,》, sub-drop point array 2 2 second-order transfer table 24 fourth-order transfer table 2 12 index column 2 2 2 longest offset 襕 2 3 2 index 襕 102 The second-order transfer table 104. The third-order transfer table 106. The first parallel adder 1008, the comparator 110, the first adder 1, 12, and 12 '. Method and device for constructing and searching IP address-embodiment. In order to effectively reduce the memory requirements and speed up the query, this embodiment uses four sets of transfer tables, namely first-order transfer table 21, second-order transfer table 22, third-order transfer table 23, and fourth-order transfer table. 24, of which the first-order transfer table 21 and the second-order transfer table 22 correspond to the segment array 1 3 of the look-up table method, and the third-order transfer table 2 3 and the fourth-10- National Standard (CNS) A4 specification (210X 297 mm) 536889 A7 —------—— —_ B7 V. Description of the invention (~ 71 -----— Step transfer table 24 corresponds to the interrogation table The second drop point array of the law 1 4. The first-order transfer table 2 i contains a drop point / map pair 2 丨 1 and the index column 2 Ruoju / Insert point / map pair 2 1 1 contains a drop Point, the indicator column 2 12 is blank (nuU); and if the second drop point / mapping pair column 2 丨 丨 contains a [, sink element mapping code (C 〇m P ressi ο η B it M ap CB Μ), the child index block 2 1 2 points to the address of the second-order transfer table 22 2. The second-order transfer table 2 2 includes a drop point / indicator column 2 2 1 and a longest offset column 2 2 2. Ruoju / Incoming Point / Deduction 2 2 1 contains a drop point, the longest offset 襕 222 is blank (nuU); and if the drop point / indicator column 221 contains _indicator ', the longest offset column 222 contains a longest offset The number of bits of (10ngest offset). The third-order transfer table 23 includes a drop point / map pair 2 3 1 and an index block 2 3 2. If the second drop point / map pair 2 3 1 contains a time 'Falling point', the indicator column 2 3 2 is blank (nuU); and if the falling point / mapping pair 2 3 1 contains a compressed bit mapping pair, the indicator column 2 3 2 points to the fourth order The address of the transfer table 24. The fourth-order transfer table 24 only contains a drop-down column 2 4 1. In order to effectively reduce the size of the segment array of the indirect look-up table method 3, the present invention uses two segments of the array Scanning from left to right with (e ^ try) as the unit to calculate a 16-bit compressed bit map or sub-point, and then put the result in the first-order transfer table 2 sub-point 1 Column 2 1 1. In general, the compressed bit mapping code sets the leftmost bit to logic 1, and the remaining bits depend on the adjacent bits of the sector array. If the corresponding sector array Adjacent -11- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) ^ 36889 A7

If the bit TCI values are not equal ', the corresponding compressed bit mapping code is logic 1; otherwise, d is logic 0. Since the present invention performs a scan using the (4,4,4) segment arrays containing (, n:; y) as a unit, the entire segment array is divided into 2 ^ first groups, and the green is recorded in the first stage Transfer Form 2ι. When the values of all the i 6 bits of the first group are the same, the first order transfer table 2 1 of the second drop point / map pair 2 u records a single failure; otherwise, the first order transfer table 2 1 The next drop / map pair field 211 records a compressed bit map pair, and the index column 2 records the address of the second-order transfer table 22. Because the value of the compressed bitmap pair is to the right i 'represents the corresponding adjacent bit value of the array of child segments, which are not equal', by accumulating the bit values of the compressed bitmap pair, the number of logical ones is 1. Second, the corresponding number contained in the second-order transfer table 22 can be derived. If the number of bits in Lai's set bit is less than! 6, then the second-order transfer table 22 of the second drop point / indicator block 22 &quot; records the order of each drop point in the sector array. On the other hand, the second landing point / index of the second-order transfer table 22 records an index &apos; and the longest offset block 2 2 2 records a longest offset. FIG. 3 is an embodiment of the construction of the first-order transfer table 21 and the second-order transfer table according to the present invention. As the segment array 13 contains the (aAAAAABBPDDDDDDD) nibble value sa 屮] and: all are the same Therefore, a compressed bitmap pair code is calculated to be 1 0 0 0 00 1 0 1 1 0 0 0 0 00. Also, because the compressed bitmap pair code has 4 bits with a value of logic 1 Therefore, the corresponding second-order transfer table 22 has 4 inclusions. In addition, the segment array 1 3 contains -12- ^ The paper size applies the Chinese National Standard (CNS) A4 specification (210X297 public love) ' &quot; ~ ^ —_____

536889 A7 B7

(CCCCCCCCCCCCCCCCCC) The nibble values SAk [i] are all the same, so the first-order transfer table 2 1 of the secondary point / map pair 2 1 丨 directly stores C as the secondary point. The following algorithm can be used to generate the embedded values of the first-order transfer table 21 and the second-order transfer table 22.

Input: Segment array (S egme π ί arr α less [7]) Output: First-order transfer table and second-order transfer table / * SA ([ζ] represents the kth group of the segment array Contains CBM ([z ·] represents the value of 16-bit CBM, L1FT [々] represents the first-inclusive value of the first-order transfer table, L2FTH) ·] represents the value of the k-th first-order transfer table Implied in bit y *

For &gt; t = 〇to212-1 do {CBM ^ [0] == 1, flag = 0? Y = q If SA, [0] = index then {construct a corresponding third-order transfer table L2FTJ0] — ( Address of the second-order forwarding table, the longest offset bit length) j = 1

Flag = 1

For ί = 1 to 15 do 、 13- The paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) 536889 A7 B7 V. Description of the invention (

If SA ^ [/] = SA ^ [/-1] then CBM ^ [/] ^ 〇 Else {CBM, [/] = 1 flag = 1

I f S A J z ·] = index h e n {construct a corresponding L 3 F T L2FT》 | j ·] = (the address of the third-order transfer table, the longest offset bit length)}

Else L2FI ^ L /] — (SA々 [Z ·], blank)

If flag = 0 then L1FT [々] — (SA moxibustion [0], blank)

Else LI FT [Moxibustion] — (CBM *, k-th second-order transfer table, top, and clothing address)} If the longest offset bit length is greater than 4, you need to use the third-order transfer table 23 and the first Fourth-order transfer table 24, otherwise only third-order transfer table 23 is needed. In order to effectively reduce the size of the sub-drop array of the indirect look-up table method, the present invention calculates from the left to the right by using the 24 sub-drop array inclusion (en try) as a unit. -14-This paper standard applies to Chinese national standards (CNS) A4 size (210 X 297 mm) 536889 A7 B7

A 16-bit 7C compressed bit maps to a pair of codes or sub-drop points, and then places the result in 3 first 1¾ transfer table 2 3 sub-drop points 2 3 1. Since the present invention scans with an entry of 24 sub-drop arrays, the entire sub-drop array is divided into a second group (length represents the number of bits of the longest offset of the preceding bits minus One-half the number of IP bits), and recorded in the third-order transfer table 23. When the values of all the bits of the second group are the same, the second drop point of the third-order transfer table 23 records a single drop point; otherwise, the third-order transfer table 23 has a second drop point. The dot / mapping pair column 2 3 1 records a compressed bit mapping pair, and the index column 2 3 2 records the address of the fourth-order transfer table 24. Since the value of the compressed bitmap pair code is 1, it means that the corresponding adjacent bit values of the sub-drop array are not equal. Therefore, by accumulating the bit values of the compressed bitmap pair code, the number is logical 1. The corresponding number in the fourth-order transfer table 24 can be derived. The fourth-order transfer table 24 contains only one landing point 2 4 1. FIG. 4 shows an embodiment of a third-order transfer table 23 and a fourth-order transfer table 24 according to the present invention. Since the half-byte values HNAk [i] contained in the previous paragraph of the sub-drop array (AAAAAABBBDDDDDDD) are not all the same, a compressed bitmap pair code is calculated to be 1000001001000000. In addition, since the compressed bit map has three bits whose value is a logical one, the corresponding fourth-order transfer table 24 has three inclusions. In addition, the following paragraph contains the half-byte value HNAk [i] of (EEEEEEEEEEEEEEEE) -15- This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 536889 A7 one ____ Β7 5. The description of the invention (13) is the same, so the third-order transfer table 2 3 of the second drop point / map pair 2 3 1 directly stores E as the second drop point. The following algorithm can be used to generate the embedded values of the third-order transfer table 23 and the fourth-order transfer table 24. Star · Third-Order Transfer iCAja Fourth-Order Spinner G ^ FT / I ^ FT ^^ Input: Cilop Point Matrix / One / 20 Household ―array [/]) Output: Third-order Transfer Table and Fourth-Order Transfer Table / * N Η AVII [/] represents the i-th inclusion of the k-th sub-drop matrix, CBMJz ·] represents the value of the 16-bit CBM, and L3FT [A:] represents the third-order transfer table The value contained in moxibustion, L4FT々 [/] represents the content of the / bit of the kth fourth-order transfer table ~

If longest offset &lt; 4 then L3FT = NHA

Else {For exempt = 0 to · 4-1 do CBM々 [0] = 1, flag = 0, y · = 〇 For / = ltol5do 0

Else {CBM々 [/] = 1 -16- This paper size applies to China National Standard (CNS) A4 (210x 297 mm) 536889

L4FT Mountain ·] = NHA Mountain.] = Y + 1, flag = 1

If flag = 〇then L3FT⑷— (NHA Hill ·], blank) Else L3FT〇] — (Address of CBM々) Figure 5 shows the construction of the first-order transfer table 2 and the second-order transfer table u of the present invention. Private image. At step 50, the invention begins. In step 5 丨, the segment array and the plurality of sub-drop arrays are obtained according to the indirect table method. In step W, the X 2 area # is scanned once in the array as a unit, and the entire segment array is divided into 2 1 2 first groups. In step 53, it is determined whether the values of all 16 bits of the first group are the same. If the answer is yes, go to step 54, otherwise go to step 55. In step 54, the first-order transfer table records the second point / mapping point and the index point record is blank. In step 5 5 ′, the second landing point / map pair of the -p! Transfer table records a compressed bit map pair and the index column records the address of the second-order transfer table. At step 56 ', it is determined whether the number of bits of the preceding bit is less than 16. If the answer is yes, go to step 57; otherwise, go to step 58. In step ", the / fall point / indicator column of the first 1¾ transfer table is sequentially and non-repetitively recorded in the second drop point in the segment array, and the longest offset column is recorded. In step 5 of 8,- 17-

B7 V. Description of the invention (first, 1¾ turns! £ table (secondary point / index block records an index, and the longest offset block records a longest offset. At step 59, the present invention ends.) Figure 6 shows the invention Construct the third-order transfer table 23 and the fourth-order transfer table μ,: private map. In step 60, the invention starts. In step 61, whether the longest offset of the first group is greater than 4. If the answer is If yes, go to step 6 3, otherwise go to step 6 2. In step 62, use the third-order transfer table to record the sub-drops. In step 63, scan the array of 24 sub-drops and scan the whole The array of sub-drops is divided into 2length · 4 second groups. At Step 6 4 ， whether the values of all bits in the first group are the same. If the answer is yes, go to step 65, otherwise enter Step 66. At step 65, the second drop point of the third-order transfer table records the first drop point, and the indicator block is filled in blank. At step 66, the second drop point of the third-order transfer table / The mapping block records a compressed bit mapping pair, and the index block records the address of the fourth-order transfer table. In step 67, the The fourth-order transfer table records a drop point. At step 68, the present invention ends. Figure 7 is a schematic diagram of Figures 5 and 6, and the first to fourth-order transfer tables 21 to 24 are obtained accordingly. Figure 8 The flowchart of the method for finding the IP address of the invention. In step 80, the invention starts. In step 81, the 0th to 11th bits from the left of the IP address are counted as the first order of access. The address of the transfer table. In step 82, is the indicator column of the first-order transfer table blank? If the answer is yes, go to step 8 3, otherwise go to step 84. At step 8 3, the first step Transfer Form No.-18- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 536889 A7

The second drop point / mapping pair, a —… the main, 彳 / 彳 洛 point. At step 8 4, the second order of the first-order transfer table / mapping ^ τ blows the pair to a compressed bit mapping pair, and the index column passes to the second-order dry sample,, transfer ^ Table &lt; start address, and the 12th to 15th bits of the IP address are used to match the ^ ~ ^ two bit mapping pairs to obtain the relative address of the second-order transfer table. In step β ς X, ^ 8 5, check whether the longest offset column of the second-order transfer table is 0. If the answer is 3 疋, go to step 8 6; otherwise, go to step 8 7—at step 86, the second point of the second-order transfer table / map pair gets ^% 87. The longest offset of the transfer table: 111 is obtained from the 16th to (m + 11) bits of the 1P address. The first-order transfer table <relative address. In step 88, check whether the indicator column of the third-order transfer table is blank. If the answer is yes, then go to step. Then enter step 9 0. In step 89, the second drop point of the third-order transfer table is obtained. At step 90, & the second drop point / map pair of the third-order transfer table obtains a compressed bit map pair code, which is obtained from the indicator column: the start address of the fourth-order transfer table ... IP address The (m + 12) th bit (m + 1 5) th bit is matched with the compressed bitmap to obtain the relative address of the fourth-order transfer table. At step # 91, the second point / map pair of the second-order transfer table gets the second point. At step 92, the invention ends. FIG. 9 is an embodiment of the IP address finding method of the present invention, in which the IP address is expressed in 8 bits for convenience. First, the two bits (0th and 1st bits) before the ιρ address are used as the address for accessing the first order transfer table 21. If the corresponding index block 212 included in the corresponding first-order transfer table 2 丨 is blank, -19- ----- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 536889 5 2. Description of the invention (then the value of the Luo point / information of Shaanxi on the column 211 represents the second falling point. On the contrary, the value of the Luo point / inflection of Yan Shaanxi avoids j. A compressed bit mapping pair. The 9th address of the IP address a /,-"m 2 and 3 are used to calculate that the IP address is located in the compressed bit: the logic of the mapping pair. The bit in [], in this example, is located in the second inclusion of the second-order transfer table 22. Because the longest offset value of the second-order transfer table 22 is 3, the address of 1? The 4th bit is used to access the second-order reversal of the brother, 2 shang ', and get the meaning of Table 23. If the corresponding index contained in the corresponding third-order transfer table 23 is blank, Then the value of the second drop point / map pair 2 31 represents the second ^, point. Otherwise, the second drop point / map pair Mei 1 full value (11 1 0) represents a compressed bit map pair code. 15 &gt; The 5th and 6th bits of the address ^ are used to calculate the j The p-address is located at the logical 1-heart bit of the compressed bit-mapping code. For this example, it is located in the fourth-order transfer table 24. The following algorithm can be used for I p Table lookup operation.! £ Lookup table input · First to fourth order transfer tables (LIFT to L4FT) output: second drop point / L1F Ding [ki] _I represents the first] ^ of the first order transfer table Second landing point / mapping pair,

LlFTfkJ.P represents the first and second embedded index of the first-order transfer table, and L2FTkl [k2] .I represents the second embedded order of the second-order transfer point / map pair, -20-

This paper size applies to the Chinese National Standard (CNS) Αϋ ^ ΐ〇x 297 public director)-536889 A7 B7 V. Description of the invention (18) L2FTkl [k2] .L represents the maximum of the k2th contained in the second-order transfer table Offset value, L3FTk2 [k3] .I represents the k3th embedded point / mapping pair in the third-order transfer table, and L3FTk2 [k3] .P represents the k2th embedded index in the third-order transfer table , L4FTk3 [k4] represents the k4th implied second landing point of the fourth-order transfer table

Get (IP, a, b) represents a function that responds to the values of the a-th to b-th bits of the IP address from the left * / j ^ GeUIPH 1)

If LlFTtkJ.P ^ blank then reply LIFTtkJ.I Else {j2 = Get (IP, 12,15) j ^ LlFTUH.I The number of bits with logic 1 from the 0th to the 2nd bit j3 = j3- 1

If L2FTjl [j3] .L-empty white then reply

L2FTjl [j3] .I

If L2FTjl [j3] .L ^ 4 then Reply to L3FTj3 [Get (IP? 16? L2FTj1 [j3] .L + 15)]. I Else -21-This paper size applies to China National Standard (CNS) A4 specifications (210 x 297 mm) 536889 A7 B7 V. Description of the invention (19 {j4 = Get (IP5i69L2FTjl [j3] .L + l 1)

If L3FTj3 [j4] .P = empty then reply L3FTj3 [j4] .I Else {j5 = Get (IP5i6? L2FTjl [j3] .L + 125L2FTjl [j 3] .L + 1 5) j6 — L2FTj3 [j4] .l Number of logic i of the 0th to j5th bits j6 = j6-l Reply L4FTj4 [j6], FIG. 10 is an embodiment of the lp address finding device of the present invention, and includes a first transition table 101 ( Contains a 16-bit sub-drop / map pair and a 16-bit indicator block), m send table 1G2 (including a 16-bit sub-drop / map pair and an 8-bit longest offset column), a The third-level transfer table ι03 (including the 16-bit secondary drop point / map pair column and the 6-bit indicator column), the third-level transfer table 104 (including the 8-bit secondary drop point) Stop), _ fourth-order transfer table 1 05 (including the 8-bit second drop point column), two parallel adders 10 and 107, a comparator, two adders, and a multiplexer 1 〇9 and two shutters 112 and 112 ,. 11 &gt; The address is from bit 0 to bit 31, where the symbol represents bit a to bit b of the IP address, and it seems that 0 is 536889 A7 --------- B7 V. Description of the invention (~ ^ ~) &Quot; '--- Access the address of the first order forwarding table 101. If the accessed index column is empty = ’, then the value of the next drop point / map pair column is output to the multiplexer 109. The cover 112 is used to convert the cover to the 16-bit cover; if the value of the cover is 0001, then the 16-bit cover is 110,000,000,000,000,000; It seems that the value is 0010, and the 16-bit mask is 11100000000000000; and so on. The parallel adder 106 is used to calculate the number of logics of the value of the second landing point / map pair and the value processed by the I mask 1 12, and its output is used to access the second-order transfer table 丨〇2 relative address. The adder tool 0 is used for indexing (representing the starting address of accessing the second-order transfer table 102) and the output of the parallel adder 106 (representing accessing the second-order transfer table 102). Relative address) are added, and an address for accessing the second-order transfer table 102 is generated. If the longest offset of the accessed second-order transfer table 102 is 0, the value of the second drop point / map pair is output to the multiplexer 109. The comparator 108 is used to compare whether the longest offset value is greater than 4; if the answer is yes, then look for the third-order conversion table, otherwise, look for another third-order conversion table. The parallel adder 1 07 is used to calculate the number of logical values of the value of the second drop point / map pair and the value processed by the masker 1 12, and its output is used to access the fourth-order transfer table. Relative address of 丨 〇5. The adder 1 1 1 is used for indexing (representing the start address of the fourth-order transfer table 1 05) and the output of the parallel adder 1 107 (representing the access to the fourth-order transfer table 丨 〇 The relative address of 5) is added, and an address for accessing the fourth-order transfer table 105 is generated. The masker 112f has the same function as the masker 1 12 and is used to convert the Go to 6-bit mask. The -23- This paper size applies to Chinese National Standard (CNS) A4 (210X 297 mm) 536889 A7

The value of the second landing point / mapping pair column of the fourth-order transfer table 105 outputs 109. β evening… Table 1 is a comparative analysis table of the implementation efficiency and hardware requirements of the invention and the conventional table of knowledge and the patent announcement of the Republic of China. From the analysis of Table 1, it can be confirmed that the present invention is superior to conventional techniques in terms of performance and hardware cost &lt; performance.

The technical content and technical features of the present invention are disclosed as above. However, those skilled in the art may still make various substitutions and modifications based on the teaching and disclosure of the present invention without departing from the spirit of the present invention. Therefore, the protection scope of the present invention should not be limited to those disclosed in the embodiments, but should include various substitutions and modifications that do not depart from the present invention, and are covered by the following patent application scope. -24- This paper size applies to China National Standard (CNS) Α4 size (210X 297mm) binding line ·

Claims (1)

8 8 8 8 A BCD Variation: The method of constructing the IP address of the router is to include at least the first order two ... the order transfer table to record the set and / or entered points relative to the routing table before, including the following steps ... Array and multiple sub-drop arrays;, £ &amp; The array is divided into multiple first groups; M Erguang and the values of all 16 bits of the <Ip address are the same, then: the sub-drop of the step transfer table The dot / map pair column is recorded with the green-second drop point and the index of the-table is blank, otherwise the second drop point / map pair is bad = a compressed bit map pair is recorded and the index column record of the -order transfer table is recorded The address of the first-order transfer table; if the number of bits set before the routing table is less than S 16, the entry points and sum columns of the second-order transfer table are sequentially and non-repetitively recorded in the segment array. : The second drop point and the longest offset column of the second-order transfer table record 0, otherwise the second drop point / indicator column of the second-order transfer table records an indicator, and the longest offset column of the second 1¾ transfer table records a longest Offset; the longest offset of the first group of right is greater than 4, then the third order transfer table is used to record the second drop point, otherwise the second drop point is arrayed Divided into multiple second groups; if the values of all bits of the IP address of the first group are the same, the second drop point / map pair in the third-order transfer table records a single drop point and the third-order transfer Fill in the blank of the index of the table, otherwise, the second drop point / map pair of the third-order transfer table records a compressed bit map pair code and the third-order transfer table-25-This paper size applies to the Chinese National Standard (CNS ) A4 size (210 X 297 mm) 536889 Scope of patent application Meaning index: record the address of the west-order transfer table; and use the fourth-order transfer table to record the landing point. 2. The method for constructing ιρ address of a router as described in the scope of the patent application, wherein the sector array is scanned once with 24 internal units and the entire sector array is divided into a first group. . 3. The method for constructing the lp address of the router as described in the scope of the patent application (i), wherein the sub-drop array is scanned with 24 inclusions, and the entire sub-drop array is divided into 2 ength · 4 _, Two groups, where length represents the longest offset. Install the routing KIP address * Find Wanfa, which is used to find the IP address in the method of constructing the IP address of the router in the patent scope, including the following steps: Use the X bits of the IP address as storage Take the address of the first-order transfer table; if the index 襕 included in the access of the first-order transfer table is blank, then the second point of the first-order transfer table / map pairing is used to obtain the second order, otherwise the The second landing point / mapping pair of the first-order transfer table holds the __bit ㈣ code and the index of the second-order transfer table holds the starting address of the second table; 'from the remaining 1 of the IP address 6-X bits are matched to obtain the relative address of the second-order transfer table; if the longest offset column included in the access of the second-order transfer table is 0, the The second drop point / map pairing point is obtained from h Ren Luo point, otherwise -26- 536889 As Β8 C8 Use the 16th to (m + 11) bit-pair address of the longest partial address of the second-order transfer table; the longest offset m shifted from IP &amp; Access to the third-order forwarding table The second landing point of the third-order forwarding table is matched by the second-order mapping of the third-order forwarding table, and the starting address of the third-order forwarding table; If the indicator column is blank, the second drop point will be obtained from the / night pair, otherwise * / the mapping pair will get a compression and shrinkage bit. The indicator column of the table will get the fourth order (m + 12) of the IP address. Bit-to- (m + 15) bits and the compressed bit mapping pairs are used to obtain the relative address of the fourth-order transfer table; and the accessor of the fourth-order transfer table is called ^ Zujiluo Point / mapping pairs are obtained. 5. The method for searching the ιρ address of the router as described in item 4 of the scope of patent application, in which the 0th to uth bits from the left of the IP address are used as the first-order transfer table. Address. • 1 P searching device for routers, which is used to find IP addresses in the IP address construction method of routers under the scope of patent application, including: I a first-order forwarding table, including sub-location / mapping pairs Columns and indicators, and the first-order forwarding table uses X bits of the IP address as the access address; a first masker is used to mask the rest of the IP address. 6 ~ X -27- 536889 &amp;yuan;-a first parallel adder connected to the second drop / map pair of the first-order transfer table and the first shader for generating a relative address for accessing the second-order transfer table ; A first adder, which is used to sum up the index of the first-order transfer table and the output of the first parallel adder; a second-order transfer table, which includes a second drop point / map pair and the longest offset stop And the second-order transfer table uses the output of the first adder as an access address; a third-order transfer table includes a sub-point / map pair column and an index column, and the third-order transfer table is The I p address is indexed by the longest offset 最长 of the longest offset 该 of the second-order transfer table as its access address; the first masker 'is used to block the rest of the I p address 1 6 ~ Χ bits; a second parallel adder connected to the second drop point / map pair of the third-order transfer table and the second masker for generating the relative access to the fourth-order transfer table Address; a second adder, which is used to sum the index of the third-order transfer table and the output of the second parallel adder; a fourth-order The sending table includes a secondary drop point column, and the fourth-order conversion table uses the output of the second adder as an access address; and a multiplexer connected to the secondary drop-point of the first-order transfer table / Mapping butterfly, -28- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 536889 A8 B8 C8 D8 6. Scope of patent application The second order point / indicator of the second order transfer table, the third order point, the second order point / map pair, and the second order point in the fourth order table. 7 · The IP finding device as described in item 6 of the scope of patent application, which additionally includes a comparator and a third-order transfer table containing only the second drop point block. If the longest offset value of the second-order transfer table is greater than 4 , Then look for the third-level conversion table that includes the second drop point / map pair and the indicator column, otherwise look for the third-level conversion table that includes only the second drop point column. 8. The IP searching device of the router according to item 6 of the scope of patent application, wherein the first-order forwarding table uses the 0th to 11th bits from the left of the IP address as the access address. -29- This paper size applies to Chinese Painter Standard (CNS) A4 (210X 297mm)